CN117424570A - Charge amplifier - Google Patents

Charge amplifier Download PDF

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Publication number
CN117424570A
CN117424570A CN202311600242.XA CN202311600242A CN117424570A CN 117424570 A CN117424570 A CN 117424570A CN 202311600242 A CN202311600242 A CN 202311600242A CN 117424570 A CN117424570 A CN 117424570A
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China
Prior art keywords
circuit
resistor
impedance transformation
output
input
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曾娅娟
李桓戍
曾昭文
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Tangzhi Science & Technology Hunan Development Co ltd
Beijing Tangzhi Science & Technology Development Co ltd
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Tangzhi Science & Technology Hunan Development Co ltd
Beijing Tangzhi Science & Technology Development Co ltd
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Priority to CN202311600242.XA priority Critical patent/CN117424570A/en
Publication of CN117424570A publication Critical patent/CN117424570A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

The application discloses a charge amplifier relates to integrated electron piezoelectric sensor technical field. The charge amplifier includes an input stage impedance transformation circuit, an output stage amplification circuit, and an output stage bias circuit. The scheme specifically utilizes an input stage impedance transformation circuit to receive charge signals transmitted by a piezoelectric sensor under direct current bias provided by an output stage bias circuit, converts the charge signals into voltage signals, and further outputs amplified voltage signals through an output end of an output stage amplifying circuit, so that charge/voltage conversion is realized. As the output end of the output stage amplifying circuit is connected with the power supply, the collinear transmission of the power supply and signals is realized, and the wiring cost is greatly reduced.

Description

Charge amplifier
Technical Field
The application relates to the technical field of integrated electronic piezoelectric sensors, in particular to a charge amplifier.
Background
An integrated electronic piezoelectric sensor (Integrated Electronics Piezo-Electric, IEPE) is a piezoelectric acceleration sensor of a self-charged amplifier or voltage amplifier, which is powered by a constant current source, and simultaneously transmits voltage signals through a power supply loop, and is compatible with an industrial IEPE standard interface. Currently, in integrated electronic piezoelectric sensors, a conventional charge amplifier employs an integrating circuit formed by an integrated operational amplifier to realize charge/voltage conversion.
However, the charge amplifier employing the integrated operational amplifier is generally relatively large in size, which is disadvantageous in achieving miniaturization. More importantly, as the integrated operational amplifier needs to be powered, the signal wire and the power wire need to be independently wired, and collinear transmission of the signal and the power cannot be realized, so that the wiring cost is higher, and the price of the integrated operational amplifier is higher than that of discrete components.
In view of the above, how to use a discrete component design circuit to solve the problem that the current charge amplifier cannot realize the collinear transmission of signals and power supplies, and the wiring cost is high is a problem to be solved by those skilled in the art.
Disclosure of Invention
The purpose of this application is to provide a charge amplifier to solve current charge amplifier and can't realize signal and power collineation transmission, the problem that the wiring cost is high.
To solve the above technical problem, the present application provides a charge amplifier, including: an input stage impedance transformation circuit, an output stage amplifying circuit and an output stage biasing circuit;
the input end of the input stage impedance transformation circuit is connected with the output end of the piezoelectric sensor and is used for receiving charge signals transmitted by the piezoelectric sensor and converting the charge signals into voltage signals;
the first input end of the output stage amplifying circuit is connected with the first output end of the input stage impedance transformation circuit, the second input end of the output stage amplifying circuit is connected with the second output end of the input stage impedance transformation circuit, and the output stage amplifying circuit is used for receiving the voltage signal, amplifying the voltage signal and outputting the amplified voltage signal through the output end of the output stage amplifying circuit; the output end of the output stage amplifying circuit is connected with a power supply, and the power supply is used for supplying power to the charge amplifier;
the first end of the output stage bias circuit is connected with the power supply, the second end of the output stage bias circuit is grounded, and the third end of the output stage bias circuit is connected with the feedback end of the input stage impedance transformation circuit and is used for providing direct current bias for the input stage impedance transformation circuit.
In one aspect, the method further comprises: a high-pass filter circuit;
the input end of the high-pass filter circuit is connected with the output end of the piezoelectric sensor, and the output end of the high-pass filter circuit is connected with the input end of the input stage impedance transformation circuit and is used for filtering low-frequency interference in the charge signal.
In another aspect, the high pass filter circuit includes a second resistor and a first capacitor;
the first end of the first capacitor is used as the input end of the high-pass filter circuit, the second end of the first capacitor is connected with the first end of the second resistor, and the second end of the second resistor is used as the output end of the high-pass filter circuit.
In another aspect, the input stage impedance transformation circuit includes: an input stage bias circuit and an impedance transformation sub-circuit;
the first end of the impedance transformation sub-circuit is used as the input end of the input stage impedance transformation circuit, the second end of the impedance transformation sub-circuit is used as the first output end of the input stage impedance transformation circuit, the third end of the impedance transformation sub-circuit is used as the second output end of the input stage impedance transformation circuit, and the fourth end of the impedance transformation sub-circuit is used as the feedback end of the input stage impedance transformation circuit for acquiring the direct current bias, receiving the charge signal transmitted by the piezoelectric sensor and converting the charge signal into the voltage signal;
the first end of the input stage bias circuit is connected with the fifth end of the impedance transformation sub-circuit, and the second end of the input stage bias circuit is grounded and used for providing bias voltage for the impedance transformation sub-circuit.
In another aspect, the output stage bias circuit includes: the third resistor, the fourth resistor, the fifth resistor and the fourth capacitor;
the first end of the third resistor is connected with the first end of the fourth resistor, the second end of the fourth resistor is connected with the first end of the fifth resistor and the first end of the fourth capacitor, and the second end of the fourth capacitor and the second end of the fifth resistor are grounded;
wherein the second end of the third resistor is used as the first end of the output stage bias circuit; the second end of the fourth capacitor and the second end of the fifth resistor are used as the second end of the output stage bias circuit together; the first end of the fourth capacitor is used as a third end of the output stage bias circuit.
In another aspect, the impedance transformation sub-circuit includes: the first field effect transistor, the second capacitor, the sixth resistor and the seventh resistor;
the first end of the second capacitor is connected with the first end of the sixth resistor, and the second end of the sixth resistor is connected with the first end of the seventh resistor;
wherein, the grid electrode of the first field effect transistor and the first end of the second capacitor are used as the first end of the impedance transformation subcircuit; the drain electrode of the first field effect transistor is used as the second end of the impedance transformation subcircuit; the second end of the second capacitor is used as a third end of the impedance transformation subcircuit; a second end of the seventh resistor is used as a fourth end of the impedance transformation subcircuit; the source electrode of the first field effect transistor is used as a fifth end of the impedance transformation subcircuit.
In another aspect, the input stage bias circuit includes: a third field effect transistor;
the source electrode of the third field effect tube is grounded and connected with the drain electrode of the third field effect tube;
the grid electrode of the third field effect transistor is used as a first end of the input stage bias circuit; and the source electrode of the third field effect transistor is used as the second end of the input stage biasing circuit.
In another aspect, the output stage amplifying circuit includes: the second field effect transistor, the first triode and the second triode;
the grid electrode of the second field effect tube is connected with the source electrode of the second field effect tube; the source electrode of the second field effect transistor is connected with the base electrode of the first triode; the emitter of the first triode is connected with the base electrode of the second triode; the emitter of the second triode is connected with the drain of the second field effect transistor; the collector electrode of the first triode and the collector electrode of the second triode are grounded;
the source electrode of the second field effect transistor is used as a first input end of the output stage amplifying circuit; the drain electrode of the second field effect transistor is used as a second input end of the output stage amplifying circuit; and the emitter of the second triode is used as the output end of the output stage amplifying circuit.
In another aspect, the method further comprises: a third capacitor and an eighth resistor;
the first end of the third capacitor is connected with the first end of the seventh resistor; the second end of the third capacitor is connected with the first end of the eighth resistor; the second end of the eighth resistor is grounded.
In another aspect, the method further comprises: a first resistor;
the first end of the first resistor is connected with the first end of the first capacitor, and the second end of the first resistor is grounded.
The charge amplifier comprises an input stage impedance transformation circuit, an output stage amplifying circuit and an output stage biasing circuit; the input end of the input stage impedance transformation circuit is connected with the output end of the piezoelectric sensor and is used for receiving charge signals transmitted by the piezoelectric sensor and converting the charge signals into voltage signals; the first input end of the output stage amplifying circuit is connected with the first output end of the input stage impedance transformation circuit, the second input end of the output stage amplifying circuit is connected with the second output end of the input stage impedance transformation circuit and is used for receiving the voltage signal, amplifying the voltage signal and outputting the amplified voltage signal through the output end of the output stage amplifying circuit; the output end of the output stage amplifying circuit is connected with a power supply, and the power supply is used for supplying power to the charge amplifier; the first end of the output stage bias circuit is connected with a power supply, the second end of the output stage bias circuit is grounded, and the third end of the output stage bias circuit is connected with the feedback end of the input stage impedance transformation circuit and is used for providing direct current bias for the input stage impedance transformation circuit. Therefore, the scheme utilizes the input stage impedance transformation circuit to receive the charge signal transmitted by the piezoelectric sensor under the direct current bias provided by the output stage bias circuit, converts the charge signal into a voltage signal, and further outputs the amplified voltage signal through the output end of the output stage amplifying circuit, thereby realizing charge/voltage conversion. As the output end of the output stage amplifying circuit is connected with the power supply, the collinear transmission of the power supply and signals is realized, and the wiring cost is greatly reduced.
Drawings
For a clearer description of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a charge amplifier according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of another charge amplifier according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a charge-to-voltage conversion output frequency response simulation of a charge amplifier without a low frequency bootstrap circuit provided in an embodiment of the present application;
fig. 4 is a schematic diagram of a charge-to-voltage conversion output frequency response simulation of a charge amplifier after setting a low-frequency bootstrap circuit according to an embodiment of the present application.
Wherein 8 is a piezoelectric sensor, 9 is a power supply, 10 is an input stage impedance transformation circuit, 11 is an output stage amplifying circuit, 12 is an output stage biasing circuit, 13 is a high pass filter circuit, 101 is an impedance transformation sub-circuit, and 102 is an input stage biasing circuit.
Detailed Description
The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments herein without making any inventive effort are intended to fall within the scope of the present application.
The core of the application is to provide a charge amplifier to solve the problem that the current charge amplifier can not realize collinear transmission of signals and power supply and has high wiring cost.
In order to provide a better understanding of the present application, those skilled in the art will now make further details of the present application with reference to the drawings and detailed description.
Fig. 1 is a schematic diagram of a charge amplifier according to an embodiment of the present application. As shown in fig. 1, the charge amplifier includes: an input stage impedance conversion circuit 10, an output stage amplification circuit 11, and an output stage bias circuit 12;
the input end of the input stage impedance transformation circuit 10 is connected with the output end of the piezoelectric sensor 8 and is used for receiving charge signals transmitted by the piezoelectric sensor 8 and converting the charge signals into voltage signals;
a first input end of the output stage amplifying circuit 11 is connected with a first output end of the input stage impedance transformation circuit 10, a second input end of the output stage amplifying circuit 11 is connected with a second output end of the input stage impedance transformation circuit 10, and is used for receiving the voltage signal, amplifying the voltage signal and outputting the amplified voltage signal through an output end of the output stage amplifying circuit 11; the output end of the output stage amplifying circuit 11 is connected with a power supply 9, and the power supply 9 is used for supplying power to the charge amplifier;
the first end of the output stage bias circuit 12 is connected with the power supply 9, the second end of the output stage bias circuit 12 is grounded, and the third end of the output stage bias circuit 12 is connected with the feedback end of the input stage impedance transformation circuit 10 and is used for providing direct current bias for the input stage impedance transformation circuit 10.
Specifically, the charge amplifier provided in the present application is mainly composed of an input stage impedance transformation circuit 10, an output stage amplification circuit 11, and an output stage bias circuit 12. The input stage impedance conversion circuit 10 is connected with the piezoelectric sensor 8, and is capable of receiving the high internal resistance charge signal transmitted by the piezoelectric sensor 8 and converting the high internal resistance charge signal into a low internal resistance voltage signal. The piezoelectric sensor 8 may be a sensor that outputs a charge signal, such as a piezoelectric ceramic or a piezoelectric crystal, and is not limited in this embodiment. The output stage amplifier circuit 11 is connected to the input stage impedance transformation circuit 10, and is capable of receiving a voltage signal having a low internal resistance and outputting the voltage signal through its own output terminal. The charge amplifier further includes an output stage bias circuit 12 capable of providing a dc bias to the input stage impedance transformation circuit 10 to form a dc negative feedback therewith to eliminate zero drift.
It should be noted that, in this embodiment, the output terminal of the output stage amplifying circuit 11 is simultaneously connected to the power supply 9, and the power supply 9 simultaneously supplies power to each device of the whole charge amplifier. Because the output stage amplifying circuit 11 and the power supply 9 form two-wire system output, the problem of collinear transmission of the power supply 9 and signals is solved, and the wiring cost is effectively reduced.
In addition, the specific circuit structures of the input stage impedance transformation circuit 10, the output stage amplification circuit 11, and the output stage bias circuit 12 are not limited in this embodiment, and are dependent on the specific implementation.
In this embodiment, the charge amplifier includes an input stage impedance transformation circuit, an output stage amplification circuit, and an output stage bias circuit; the input end of the input stage impedance transformation circuit is connected with the output end of the piezoelectric sensor and is used for receiving charge signals transmitted by the piezoelectric sensor and converting the charge signals into voltage signals; the first input end of the output stage amplifying circuit is connected with the first output end of the input stage impedance transformation circuit, the second input end of the output stage amplifying circuit is connected with the second output end of the input stage impedance transformation circuit and is used for receiving the voltage signal, amplifying the voltage signal and outputting the amplified voltage signal through the output end of the output stage amplifying circuit; the output end of the output stage amplifying circuit is connected with a power supply, and the power supply is used for supplying power to the charge amplifier; the first end of the output stage bias circuit is connected with a power supply, the second end of the output stage bias circuit is grounded, and the third end of the output stage bias circuit is connected with the feedback end of the input stage impedance transformation circuit and is used for providing direct current bias for the input stage impedance transformation circuit. Therefore, the scheme utilizes the input stage impedance transformation circuit to receive the charge signal transmitted by the piezoelectric sensor under the direct current bias provided by the output stage bias circuit, converts the charge signal into a voltage signal, and further outputs the amplified voltage signal through the output end of the output stage amplifying circuit, thereby realizing charge/voltage conversion. As the output end of the output stage amplifying circuit is connected with the power supply, the collinear transmission of the power supply and signals is realized, and the wiring cost is greatly reduced.
Fig. 2 is a schematic diagram of another charge amplifier according to an embodiment of the present application, where in some embodiments, as shown in fig. 2, the charge amplifier further includes: a high-pass filter circuit 13;
the input end of the high-pass filter circuit 13 is connected with the output end of the piezoelectric sensor 8, and the output end of the high-pass filter circuit 13 is connected with the input end of the input stage impedance transformation circuit 10 and is used for filtering low-frequency interference in the charge signal.
In practice, the pyroelectric effect of the piezoelectric sensor 8 generates a low frequency charge signal, which is converted by the charge/voltage of the charge amplifier and then output a low frequency disturbance. In order to eliminate low frequency interference, the charge amplifier further comprises a high pass filter. It will be appreciated that a high pass filter is provided between the piezoelectric sensor 8 and the input stage impedance transformation circuit 10.
As shown in fig. 2, the high-pass filter circuit 13 includes a second resistor R2 and a first capacitor C1;
the first end of the first capacitor C1 is used as the input end of the high-pass filter circuit 13, the second end of the first capacitor C1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is used as the output end of the high-pass filter circuit 13.
Specifically, the high-pass filter circuit 13 is constituted by a second resistor R2 and a first capacitor C1. The arrangement of the first capacitor C1 and the second resistor R2 can filter out the low-frequency pyroelectric signal generated by the piezoelectric sensor 8 due to the abrupt temperature change.
In addition to the high-pass filter circuit 13, the charge amplifier may further include: a first resistor R1;
the first end of the first resistor R1 is connected with the first end of the first capacitor C1, and the second end of the first resistor R1 is grounded.
In a specific implementation, the first resistor R1 is configured to prevent the charge signal loss generated by the insulation resistance of the piezoelectric sensor 8 in the high-temperature application environment, and improve the input impedance. In this embodiment, the specific model and parameters of the first resistor R1, the second resistor R2 and the first capacitor C1 are not limited, and are determined according to specific implementation conditions.
Based on the above embodiments, in some embodiments, as shown in fig. 2, the input stage impedance transformation circuit 10 includes: an input stage bias circuit 102 and an impedance transformation sub-circuit 101;
the first end of the impedance transformation sub-circuit 101 is used as the input end of the input stage impedance transformation circuit 10, the second end of the impedance transformation sub-circuit 101 is used as the first output end of the input stage impedance transformation circuit 10, the third end of the impedance transformation sub-circuit 101 is used as the second output end of the input stage impedance transformation circuit 10, the fourth end of the impedance transformation sub-circuit 101 is used as the feedback end of the input stage impedance transformation circuit 10, and is used for acquiring direct current bias, receiving charge signals transmitted by the piezoelectric sensor 8 and converting the charge signals into voltage signals;
the first end of the input stage bias circuit 102 is connected to the fifth end of the impedance transformation subcircuit 101, and the second end of the input stage bias circuit 102 is grounded for providing a bias voltage to the impedance transformation subcircuit 101.
Specifically, the charge/voltage conversion function of the input stage impedance conversion circuit 10 is mainly realized by the impedance conversion sub-circuit 101. And the input stage bias circuit 102 is capable of providing a bias voltage to the impedance transformation subcircuit 101.
As shown in fig. 2, the impedance transformation sub-circuit 101 includes: the first field effect transistor T1, the second capacitor C2, the sixth resistor R6 and the seventh resistor R7;
the first end of the second capacitor C2 is connected with the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected with the first end of the seventh resistor R7;
wherein, the gate of the first field effect transistor T1 and the first end of the second capacitor C2 are used as the first end of the impedance transformation sub-circuit 101; the drain electrode of the first field effect transistor T1 is used as the second end of the impedance transformation subcircuit 101; the second end of the second capacitor C2 is used as the third end of the impedance transformation subcircuit 101; the second end of the seventh resistor R7 serves as the fourth end of the impedance transformation sub-circuit 101; the source of the first fet T1 serves as the fifth terminal of the impedance transformation sub-circuit 101.
As can be seen, the impedance transformation sub-circuit 101 is constituted by a first field effect transistor T1, a second capacitor C2, a sixth resistor R6 and a seventh resistor R7. In this embodiment, the types and parameters of the first fet T1, the second capacitor C2, the sixth resistor R6, and the seventh resistor R7 are not limited, and are determined according to the specific implementation.
As shown in fig. 2, the input stage bias circuit 102 includes: a third field effect transistor T3;
the source electrode of the third field effect tube T3 is grounded and is connected with the drain electrode of the third field effect tube T3;
wherein the gate of the third fet T3 is used as the first end of the input stage bias circuit 102; the source of the third fet T3 serves as the second terminal of the input stage bias circuit 102.
Specifically, the drain electrode of the third fet T3 is connected to the source electrode, so that it functions like a diode that is turned on unidirectionally, and forms a voltage bias circuit for the source electrode of the first fet T1. The positive conduction voltage drop of the bias voltage is negative temperature coefficient while the bias voltage is provided; when the temperature rises, the on voltage drops, so that the voltage of the source electrode of the first field effect tube T1 drops, the trend of the voltage drop of the grid electrode and the source electrode of the first field effect tube T1 caused by the temperature rise is counteracted, the working point is stabilized, the temperature compensation function is realized, and in addition, the third field effect tube T3 can also compensate the temperature drift of the first field effect tube T1 while the bias voltage is provided. In this embodiment, parameters of a specific model of the third fet T3 are not limited, and are determined according to specific implementation conditions.
Based on the above embodiments, in some embodiments, as shown in fig. 2, the output stage bias circuit 12 includes: a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a fourth capacitor C4;
the first end of the third resistor R3 is connected with the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected with the first end of the fifth resistor R5 and the first end of the fourth capacitor C4, and the second end of the fourth capacitor C4 and the second end of the fifth resistor R5 are grounded;
wherein the second end of the third resistor R3 is used as the first end of the output stage bias circuit 12; the second terminal of the fourth capacitor C4 and the second terminal of the fifth resistor R5 are commonly used as the second terminal of the output stage bias circuit 12; the first terminal of the fourth capacitor C4 serves as a third terminal of the output stage biasing circuit 12.
Specifically, the output stage bias circuit 12 is connected across the power supply 9 and the ground as a whole, and can provide a proper dc bias. The fourth capacitor C4 is used for reducing noise of dc bias, forming dc negative feedback with the input stage impedance transformation circuit 10, and eliminating zero drift.
Based on the above embodiments, in some embodiments, as shown in FIG. 2. The output stage amplifying circuit 11 includes: the second field effect transistor T2, the first triode Q1 and the second triode Q2;
the grid electrode of the second field effect tube T2 is connected with the source electrode of the second field effect tube T2; the source electrode of the second field effect transistor T2 is connected with the base electrode of the first triode Q1; the emitter of the first triode Q1 is connected with the base electrode of the second triode Q2; the emitter of the second triode Q2 is connected with the drain of the second field effect transistor T2; the collector of the first triode Q1 and the collector of the second triode Q2 are grounded;
the source electrode of the second field effect transistor T2 is used as the first input end of the output stage amplifying circuit 11; the drain electrode of the second field effect transistor T2 is used as a second input end of the output stage amplifying circuit 11; the emitter of the second transistor Q2 serves as the output of the output stage amplifying circuit 11.
Specifically, in the output stage amplifying circuit 11, a PNP type darlington transistor is formed by the first transistor Q1 and the second transistor Q2, and a cascode output circuit is formed. The base electrode and the emitter electrode of the common emitter output circuit are respectively connected with the source electrode and the drain electrode of the second field effect transistor T2.
It should be noted that the voltage between the base and the emitter of the PNP type darlington triode is equal to the voltage between the drain and the source of the second field effect transistor T2, and is opposite to the voltage between the base and the emitter, the voltage between the collector and the collector is less than zero, the voltage between the base and the collector is greater than zero, and the darlington triode is forward-turned on. The second field effect transistor T2 mainly ensures the working states of the first transistor Q1 and the second transistor Q2, provides normal working points for the two transistors, makes the two transistors operate in a linear amplifying state, ensures low output impedance, and combines signals and the power supply 9 to form two-wire system output.
In this embodiment, the specific model and parameters of the second fet T2, the first transistor Q1, and the second transistor Q2 are not limited, and are determined according to specific implementation conditions.
Based on the above embodiments, in some embodiments, the charge amplifier further includes: a third capacitor C3 and an eighth resistor R8;
the first end of the third capacitor C3 is connected with the first end of the seventh resistor R7; the second end of the third capacitor C3 is connected with the first end of the eighth resistor R8; the second terminal of the eighth resistor R8 is grounded.
Specifically, the third capacitor C3 and the eighth resistor R8 together constitute a low-frequency bootstrap circuit. The low-frequency bootstrap circuit is connected between the connection point of the sixth resistor R6 and the seventh resistor R7 of the feedback resistor of the charge amplifier and the ground, and forms a T-shaped feedback network with the feedback resistor of the charge amplifier, so that the low-frequency response is improved. The resistance values of the sixth resistor R6 and the seventh resistor R7 are equal.
Fig. 3 is a schematic diagram of a charge-to-voltage conversion output frequency response simulation of a charge amplifier without a low frequency bootstrap circuit according to an embodiment of the present application. It can be understood that when the low-frequency bootstrap circuit is not provided, as shown in fig. 3, the low-frequency cutoff frequency of the output amplitude-frequency curve is:
it can be seen that, in order to reduce the low-frequency cutoff frequency, the resistance values of the feedback resistor sixth resistor R6 and the seventh resistor R7 need to be increased, and the resistor package with a large resistance value tends to be large and expensive, which increases the circuit cost. When the low-frequency bootstrap circuit is not used, the gain of the circuit is 3.9615dB when the charge amplifier is at 1Hz, the passband gain is 6.1281dB, 2.167dB is reduced, and the attenuation is more than 20%.
After the low-frequency bootstrap circuit is added, the low-frequency cutoff frequency is not required to be reduced by increasing the feedback resistor, and r6=r7 is generally taken, and the calculation formula of the low-frequency cutoff frequency is as follows:
fig. 4 is a schematic diagram of a charge-to-voltage conversion output frequency response simulation of a charge amplifier after setting a low-frequency bootstrap circuit according to an embodiment of the present application. As shown in fig. 4, it can be seen that after the low-frequency bootstrap circuit is added, the gain of the circuit is 5.9847dB at 1Hz of the charge amplifier, the gain of the passband is 6.1281dB, the drop is 0.143dB, and the attenuation is less than 1%.
A charge amplifier provided by the present application is described in detail above. In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section. It should be noted that it would be obvious to those skilled in the art that various improvements and modifications can be made to the present application without departing from the principles of the present application, and such improvements and modifications fall within the scope of the claims of the present application.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

Claims (10)

1. A charge amplifier, comprising: an input stage impedance conversion circuit (10), an output stage amplification circuit (11), and an output stage bias circuit (12);
the input end of the input stage impedance transformation circuit (10) is connected with the output end of the piezoelectric sensor (8) and is used for receiving charge signals transmitted by the piezoelectric sensor (8) and converting the charge signals into voltage signals;
the first input end of the output stage amplifying circuit (11) is connected with the first output end of the input stage impedance transformation circuit (10), the second input end of the output stage amplifying circuit (11) is connected with the second output end of the input stage impedance transformation circuit (10), and the output stage amplifying circuit is used for receiving the voltage signal, amplifying the voltage signal and outputting the amplified voltage signal through the output end of the output stage amplifying circuit (11); the output end of the output stage amplifying circuit (11) is connected with a power supply (9), and the power supply (9) is used for supplying power to the charge amplifier;
the first end of the output stage bias circuit (12) is connected with the power supply (9), the second end of the output stage bias circuit (12) is grounded, and the third end of the output stage bias circuit (12) is connected with the feedback end of the input stage impedance transformation circuit (10) and is used for providing direct current bias for the input stage impedance transformation circuit (10).
2. The charge amplifier of claim 1, further comprising: a high-pass filter circuit (13);
the input end of the high-pass filter circuit (13) is connected with the output end of the piezoelectric sensor (8), and the output end of the high-pass filter circuit (13) is connected with the input end of the input stage impedance transformation circuit (10) and is used for filtering low-frequency interference in the charge signal.
3. A charge amplifier according to claim 2, characterized in that the high-pass filter circuit (13) comprises a second resistor and a first capacitor;
the first end of the first capacitor is used as an input end of the high-pass filter circuit (13), the second end of the first capacitor is connected with the first end of the second resistor, and the second end of the second resistor is used as an output end of the high-pass filter circuit (13).
4. Charge amplifier according to claim 1, characterized in that the input stage impedance transformation circuit (10) comprises: an input stage bias circuit (102) and an impedance transformation sub-circuit (101);
a first end of the impedance transformation sub-circuit (101) is used as an input end of the input stage impedance transformation circuit (10), a second end of the impedance transformation sub-circuit (101) is used as a first output end of the input stage impedance transformation circuit (10), a third end of the impedance transformation sub-circuit (101) is used as a second output end of the input stage impedance transformation circuit (10), and a fourth end of the impedance transformation sub-circuit (101) is used as a feedback end of the input stage impedance transformation circuit (10) for acquiring the direct current bias, receiving the charge signal transmitted by the piezoelectric sensor (8) and converting the charge signal into the voltage signal;
the first end of the input stage bias circuit (102) is connected with the fifth end of the impedance transformation subcircuit (101), and the second end of the input stage bias circuit (102) is grounded and used for providing bias voltage for the impedance transformation subcircuit (101).
5. The charge amplifier of claim 1, wherein the output stage bias circuit (12) comprises: the third resistor, the fourth resistor, the fifth resistor and the fourth capacitor;
the first end of the third resistor is connected with the first end of the fourth resistor, the second end of the fourth resistor is connected with the first end of the fifth resistor and the first end of the fourth capacitor, and the second end of the fourth capacitor and the second end of the fifth resistor are grounded;
wherein the second end of the third resistor is used as a first end of the output stage biasing circuit (12); the second end of the fourth capacitor and the second end of the fifth resistor are used as the second end of the output stage biasing circuit (12) together; the first end of the fourth capacitor is used as a third end of the output stage biasing circuit (12).
6. The charge amplifier according to claim 4, wherein the impedance transformation sub-circuit (101) comprises: the first field effect transistor, the second capacitor, the sixth resistor and the seventh resistor;
the first end of the second capacitor is connected with the first end of the sixth resistor, and the second end of the sixth resistor is connected with the first end of the seventh resistor;
wherein the gate of the first field effect transistor and the first end of the second capacitor are used as the first end of the impedance transformation subcircuit (101); the drain electrode of the first field effect transistor is used as a second end of the impedance transformation subcircuit (101); a second end of the second capacitor is used as a third end of the impedance transformation subcircuit (101); a second end of the seventh resistor is used as a fourth end of the impedance transformation subcircuit (101); the source of the first field effect transistor is used as a fifth end of the impedance transformation subcircuit (101).
7. The charge amplifier of claim 4, wherein the input stage bias circuit (102) comprises: a third field effect transistor;
the source electrode of the third field effect tube is grounded and connected with the drain electrode of the third field effect tube;
wherein the gate of the third field effect transistor is used as a first end of the input stage bias circuit (102); the source of the third field effect transistor is used as a second end of the input stage biasing circuit (102).
8. A charge amplifier according to any one of claims 1 to 7, wherein the output stage amplifying circuit (11) comprises: the second field effect transistor, the first triode and the second triode;
the grid electrode of the second field effect tube is connected with the source electrode of the second field effect tube; the source electrode of the second field effect transistor is connected with the base electrode of the first triode; the emitter of the first triode is connected with the base electrode of the second triode; the emitter of the second triode is connected with the drain of the second field effect transistor; the collector electrode of the first triode and the collector electrode of the second triode are grounded;
the source electrode of the second field effect transistor is used as a first input end of the output stage amplifying circuit (11); the drain electrode of the second field effect transistor is used as a second input end of the output stage amplifying circuit (11); the emitter of the second triode is used as the output end of the output stage amplifying circuit (11).
9. The charge amplifier of claim 6, further comprising: a third capacitor and an eighth resistor;
the first end of the third capacitor is connected with the first end of the seventh resistor; the second end of the third capacitor is connected with the first end of the eighth resistor; the second end of the eighth resistor is grounded.
10. A charge amplifier according to claim 3, further comprising: a first resistor;
the first end of the first resistor is connected with the first end of the first capacitor, and the second end of the first resistor is grounded.
CN202311600242.XA 2023-11-28 2023-11-28 Charge amplifier Pending CN117424570A (en)

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CN202311600242.XA CN117424570A (en) 2023-11-28 2023-11-28 Charge amplifier

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117713746A (en) * 2024-02-05 2024-03-15 成都凯天电子股份有限公司 Piezoelectric signal conditioning circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117713746A (en) * 2024-02-05 2024-03-15 成都凯天电子股份有限公司 Piezoelectric signal conditioning circuit
CN117713746B (en) * 2024-02-05 2024-05-14 成都凯天电子股份有限公司 Piezoelectric signal conditioning circuit

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