CN117423788A - LED wafer capable of reducing laser cutting damage, preparation method and LED chip - Google Patents

LED wafer capable of reducing laser cutting damage, preparation method and LED chip Download PDF

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Publication number
CN117423788A
CN117423788A CN202311403994.7A CN202311403994A CN117423788A CN 117423788 A CN117423788 A CN 117423788A CN 202311403994 A CN202311403994 A CN 202311403994A CN 117423788 A CN117423788 A CN 117423788A
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layer
laser
chip
substrate
sub
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张星星
林潇雄
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Devices (AREA)
  • Dicing (AREA)

Abstract

The invention discloses an LED wafer for reducing laser cutting damage, a preparation method and an LED chip, and relates to the technical field of semiconductor devices, wherein the LED wafer comprises: the semiconductor device comprises a substrate and a plurality of chip units arranged on the substrate, wherein each chip unit comprises an epitaxial layer and a chip layer, and isolation grooves are formed between any adjacent chip units; the passivation layer covers the epitaxial layer and the chip layer and exposes the metal electrode of the chip layer; the protective layer at least covers the surface of the passivation layer in the isolation groove; and when the laser cuts adjacent chip units along the laser penetration channels, the laser cuts the substrate through the laser penetration channels to form a plurality of independent LED chips. The invention solves the technical problems that in the prior art, when the LED wafer is cut by laser, reflected laser irradiates the epitaxial layer, damage is caused to the epitaxial layer, and the epitaxial quality is reduced.

Description

LED wafer capable of reducing laser cutting damage, preparation method and LED chip
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to an LED wafer for reducing laser cutting damage, a preparation method and an LED chip.
Background
The flip LED chip is widely applied to the fields of illumination, backlight and the like because of the advantages of high current resistance, no wire bonding and the like. The flip chip structure is sequentially a substrate, a substrate PSS, an epitaxial layer and a chip layer from bottom to top. The epitaxial layer is composed of an N-type semiconductor, a quantum well and a P-type semiconductor. The chip layer is composed of a transparent conductive layer, a first electrode, a passivation layer and a second electrode from bottom to top. The passivation layer wraps the epitaxial layer and all the chip layers below the second, the passivation layer is etched through an ICP dry method to manufacture a first electrode connecting hole, the second electrode is electrically connected with the first electrode through the first electrode connecting hole, and the passivation layer plays roles of reflecting light and insulating protection.
The flip LED chip is formed by cutting a wafer by laser, and the cutting position is called an isolation groove. The passivation layer is typically of DBR structure, i.e. made of SiO 2 And TiO 2 The high-low refractive index insulating material is formed by superposition, and the light reflection can reach more than 98% in the wavelength range of 400-600 nm. The laser cuts at a wavelength of 1064nm, the passivation layer has a low reflectivity at this wavelength, substantially less than 20%, and the laser can penetrate the passivation layer.
However, at the time of laser dicing, the laser light is reflected due to the substrate or the substrate PSS, and the reflected laser light irradiates the epitaxial layer, causing damage to the epitaxial layer, resulting in a reduction in the yield of the LED chip.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an LED wafer for reducing laser cutting damage, a preparation method and an LED chip, so as to solve the technical problems that in the prior art, when the LED wafer is subjected to laser cutting, reflected laser irradiates an epitaxial layer, damage is caused to the epitaxial layer and the epitaxial quality is reduced.
A first aspect of the present invention provides an LED wafer for reducing laser dicing damage, the LED wafer comprising:
the semiconductor device comprises a substrate and a plurality of chip units arranged on the substrate, wherein each chip unit comprises an epitaxial layer and a chip layer, and isolation grooves are formed between any adjacent chip units;
the passivation layer covers the epitaxial layer and the chip layer and exposes the metal electrode of the chip layer;
the protective layer at least covers the surface of the passivation layer in the isolation groove;
and etching the protective layer and the passivation layer at the bottom of the isolation groove to form a laser penetrating channel, and cutting the substrate by laser through the laser penetrating channel to form a plurality of independent LED chips when cutting adjacent chip units along the laser penetrating channel by the laser.
According to an aspect of the foregoing technical solution, the protective layer is of a DBR structure and is formed by overlapping a first material and a second material.
According to an aspect of the foregoing technical solution, the first material is SiO 2 With TiO 2 One of the materials is SiO 2 With TiO 2 Another of the above.
According to one aspect of the technical scheme, the overlapping layer number of the first material and the second material is more than or equal to 15, and the thickness of the protective layer is more than or equal to 1.5 mu m.
According to an aspect of the above technical solution, the protective layer includes a laser reflection sub-layer and a reflection protection sub-layer sequentially stacked on the passivation layer, and the reflection protection sub-layer covers an outer surface of the laser reflection sub-layer.
According to an aspect of the above technical solution, the material used for manufacturing the laser reflection sublayer includes Ag, au, cu metal, and the thickness of the laser reflection sublayer is 1000-10000 a.
According to one of the above technical solutionsIn aspects, the material used to make the reflective protective sub-layer is an insulating material comprising SiO 2 、Al 2 O 3 、SiN X The thickness of the reflection protection sub-layer is 2000-20000A.
The second aspect of the present invention provides a method for manufacturing an LED wafer for reducing laser cutting damage, the method comprising:
providing a substrate and manufacturing a plurality of chip units on the substrate; wherein, isolation grooves are arranged between any adjacent chip units;
manufacturing a passivation layer on the surface of the chip unit and in the isolation groove;
manufacturing a protective layer on the passivation layer, wherein the protective layer covers the passivation layer and exposes a metal electrode of a chip layer in the chip unit;
etching the protective layer at the bottom of the isolation groove to remove at least part of protective layer material, exposing the surface of the substrate, and forming a laser penetration channel for guiding laser movement at the bottom of the isolation groove.
According to an aspect of the foregoing technical solution, the step of fabricating a protective layer on the passivation layer, where the protective layer covers the passivation layer and exposes the metal electrode of the chip layer in the chip unit specifically includes:
manufacturing a protective layer on the passivation layer in a film plating mode;
etching to remove at least part of the protective layer material and the passivation layer material by photoetching and dry etching so as to expose the N-type metal electrode and the P-type metal electrode of the chip layer respectively;
or alternatively
Etching to remove at least part of passivation layer material by adopting photoetching and dry etching so as to expose the substrate at the bottom of the isolation groove and expose the N-type metal electrode and the P-type metal electrode of the chip layer; manufacturing a laser reflection sub-layer on the passivation layer in a photoetching and coating mode, so that the laser reflection sub-layer covers the passivation layer on the side surface of the isolation groove;
manufacturing a reflection protection sub-layer on the laser reflection sub-layer;
and etching to remove the reflection protection sub-layer formed at the bottom of the isolation groove through photoetching and dry etching to obtain the protection layer comprising the laser reflection sub-layer and the reflection protection sub-layer. .
The third aspect of the present invention provides an LED chip, where the LED chip is obtained by cutting the LED wafer along the laser penetrating path at the bottom of the isolation groove in the above technical solution.
Compared with the prior art, the LED wafer, the preparation method and the LED chip for reducing the laser cutting damage have the beneficial effects that:
the chip units comprising the epitaxial layers and the chip layers are arranged on the substrate, so that isolation grooves are formed between the adjacent chip units, the passivation layers covering the epitaxial layers and the chip layers are manufactured on the surfaces of the chip units, the protective layers are manufactured on the surfaces of the passivation layers in the isolation grooves and used for being combined with the passivation layers to block reflected laser generated when the substrate is cut by the laser, the laser penetrating channels arranged at the bottoms of the isolation grooves can guide the laser to directly act on the substrate at the bottom layer, the reflected laser cannot be additionally generated, the reflected laser generated when the substrate is cut by the laser can be blocked by the protective layers and the passivation layers, the protection of the epitaxial layers and the chip layers is achieved, the laser cutting damage of the LED wafer is reduced, and the epitaxial quality of the epitaxial layers in the LED chip is effectively ensured.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of an LED wafer with reduced laser dicing damage according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram of an LED wafer with reduced laser cutting damage according to a second embodiment of the present invention;
FIG. 3 is a flow chart of a method for manufacturing an LED wafer for reducing laser dicing damage according to an embodiment of the invention;
description of the drawings:
the semiconductor device comprises a substrate 10, a PSS structure 11, a chip unit 20, an N-type semiconductor layer 21, a quantum well layer 22, a P-type semiconductor layer 23, a transparent conductive layer 24, an N-type first electrode 251, a P-type first electrode 252, a passivation layer 26, an N-type second electrode 271, a P-type second electrode 272, an isolation trench 30, a protective layer 40, a laser reflection sublayer 41, a reflection protection sublayer 42 and a laser penetration path 50.
Detailed Description
In order to make the objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
A first aspect of the present invention provides an LED wafer for reducing laser dicing damage, the LED wafer comprising:
the semiconductor device comprises a substrate and a plurality of chip units arranged on the substrate, wherein each chip unit comprises an epitaxial layer and a chip layer, and isolation grooves are formed between any adjacent chip units;
the passivation layer covers the epitaxial layer and the chip layer and exposes the metal electrode of the chip layer;
the protective layer at least covers the surface of the passivation layer in the isolation groove;
and etching the protective layer and the passivation layer at the bottom of the isolation groove to form a laser penetrating channel, and cutting the substrate by laser through the laser penetrating channel to form a plurality of independent LED chips when cutting adjacent chip units along the laser penetrating channel by the laser.
Further, the protective layer is of a DBR structure and is formed by overlapping a first material and a second material.
Further, the first material is SiO 2 With TiO 2 One of the materials is SiO 2 With TiO 2 Another of the above.
Further, the overlapping layer number of the first material and the second material is more than or equal to 15, and the thickness of the protective layer is more than or equal to 1.5 mu m.
Further, the protective layer comprises a laser reflection sub-layer and a reflection protection sub-layer which are sequentially laminated on the passivation layer, and the reflection protection sub-layer covers the outer surface of the laser reflection sub-layer.
Further, the material for manufacturing the laser reflection sub-layer comprises Ag, au and Cu metal, and the thickness of the laser reflection sub-layer is 1000-10000A.
Further, the material used for forming the reflection protection sub-layer is an insulating material comprising SiO 2 、Al 2 O 3 、SiN X The thickness of the reflection protection sub-layer is 2000-20000A.
The second aspect of the present invention provides a method for manufacturing an LED wafer for reducing laser cutting damage, the method comprising:
providing a substrate and manufacturing a plurality of chip units on the substrate; wherein, isolation grooves are arranged between any adjacent chip units;
manufacturing a passivation layer on the surface of the chip unit and in the isolation groove;
manufacturing a protective layer on the passivation layer, wherein the protective layer covers the passivation layer and exposes a metal electrode of a chip layer in the chip unit;
etching the protective layer at the bottom of the isolation groove to remove at least part of protective layer material, exposing the surface of the substrate, and forming a laser penetration channel for guiding laser movement at the bottom of the isolation groove.
Further, a protective layer is manufactured on the passivation layer, the protective layer covers the passivation layer and exposes the metal electrode of the chip layer in the chip unit, and the method specifically includes:
manufacturing a protective layer on the passivation layer in a film plating mode;
etching to remove at least part of the protective layer material and the passivation layer material by photoetching and dry etching so as to expose the N-type metal electrode and the P-type metal electrode of the chip layer respectively;
or alternatively
Etching to remove at least part of passivation layer material by adopting photoetching and dry etching so as to expose the substrate at the bottom of the isolation groove and expose the N-type metal electrode and the P-type metal electrode of the chip layer; manufacturing a laser reflection sub-layer on the passivation layer in a photoetching and coating mode, so that the laser reflection sub-layer covers the passivation layer on the side surface of the isolation groove;
manufacturing a reflection protection sub-layer on the laser reflection sub-layer;
and etching to remove the reflection protection sub-layer formed at the bottom of the isolation groove through photoetching and dry etching to obtain the protection layer comprising the laser reflection sub-layer and the reflection protection sub-layer. .
The third aspect of the present invention provides an LED chip, where the LED chip is obtained by cutting the LED wafer along the laser penetrating path at the bottom of the isolation groove in the above technical solution.
Compared with the prior art, the LED wafer, the preparation method and the LED chip for reducing the laser cutting damage have the beneficial effects that:
the chip units comprising the epitaxial layers and the chip layers are arranged on the substrate, so that isolation grooves are formed between the adjacent chip units, the passivation layers covering the epitaxial layers and the chip layers are manufactured on the surfaces of the chip units, the protective layers are manufactured on the surfaces of the passivation layers in the isolation grooves and used for being combined with the passivation layers to block reflected laser generated when the substrate is cut by the laser, the laser penetrating channels arranged at the bottoms of the isolation grooves can guide the laser to directly act on the substrate at the bottom layer, the reflected laser cannot be additionally generated, the reflected laser generated when the substrate is cut by the laser can be blocked by the protective layers and the passivation layers, the protection of the epitaxial layers and the chip layers is achieved, the laser cutting damage of the LED wafer is reduced, and the epitaxial quality of the epitaxial layers in the LED chip is effectively ensured.
Example 1
Referring to fig. 1, a first embodiment of the present invention provides an LED wafer with reduced laser dicing damage, and dicing is performed based on the LED wafer to obtain a plurality of individual LED chips, in other words, the LED wafer in this embodiment is a set of LED chips to be diced, and includes a plurality of LED chips.
In this embodiment, the LED wafer includes:
a substrate 10, and a plurality of chip units 20 arranged on the substrate 10, wherein the chip units 20 comprise an epitaxial layer and a chip layer, and isolation grooves 30 are arranged between any adjacent chip units 20;
a passivation layer 26, wherein the passivation layer 26 covers the epitaxial layer and the chip layer, and exposes the metal electrode of the chip layer;
a protective layer 40, wherein the protective layer 40 at least covers the surface of the passivation layer 26 in the isolation trench 30;
wherein, at the bottom of the isolation trench 30, the passivation layer 26 and the protection layer 40 are etched to form a laser penetrating channel 50, and when the laser cuts the adjacent chip units 20 along the laser penetrating channel 50, the laser cuts the substrate 10 through the laser penetrating channel 50 to form a plurality of individual LED chips.
In this embodiment, the substrate 10 is a common substrate 10, and is used for receiving the chip units 20 supporting a plurality of LED chips, where an isolation groove 30 for implementing wafer dicing is provided between any two adjacent chip units 20, for example, a vertical isolation groove 30 is provided between any two adjacent chip units 20 in the horizontal direction, and a horizontal isolation groove 30 is provided between any two adjacent chip units 20 in the vertical direction, and the purpose of forming the isolation groove 30 between the adjacent chip units 20 is to separate each chip unit 20 so as to facilitate dicing the substrate 10, so that the diced substrate 10 and the chip units 20 form individual LED chips.
The substrate 10 is a Si substrate 10 having a PSS structure 11, i.e., the Si substrate 10 after patterning.
In this embodiment, the passivation layer 26 is disposed on the LED wafer, that is, the surface of each chip unit 20 and the isolation groove 30 are both provided with the passivation layer 26, and the passivation layer 26 covers the epitaxial layer and the chip layer of the chip unit 20 for protecting the LED chip, and when the passivation layer 26 covers the epitaxial layer and the chip layer, the metal electrode of the chip layer is exposed, so that the exposed metal electrode is electrically connected with the circuit board, so that the fabricated passivation layer 26 cannot completely encapsulate the chip unit 20.
It should be noted that, in the present embodiment, the metal electrode includes a first electrode layer and a second electrode layer. The first electrode layer includes an N-type first electrode 251 and a P-type first electrode 252, wherein the N-type first electrode 251 is located in the Mesa step and contacts the N-type semiconductor layer 21 of the epitaxial layer to electrically connect with the N-type semiconductor layer 21, and the P-type first electrode 252 is connected with the P-type semiconductor layer 23 of the epitaxial layer, for example, the P-type first electrode 252 contacts the transparent semiconductor layer of the chip layer above the epitaxial layer to electrically connect with the P-type semiconductor layer 23.
In addition, in order to make the metal electrode relatively flush, the metal electrode further includes a second electrode layer, where the second electrode layer includes an N-type second electrode 271 and a P-type second electrode 272. The N-type second electrode 271 is in contact with the N-type first electrode 251 to achieve electrical connection, and the P-type second electrode 272 is in contact with the P-type first electrode 252 to achieve electrical connection.
After the first electrode layer of the chip layer is manufactured, i.e., after the N-type first electrode 251 and the P-type first electrode 252 of the first electrode layer are manufactured, the passivation layer 26 should be manufactured on the surface of each chip unit 20 and in the isolation trench 30 between the adjacent chip units 20, and the passivation layer 26 covers the chip units 20 with the first electrode layer and the isolation trench 30, i.e., the passivation layer 26 covers the N-type first electrode 251 and the P-type first electrode 252. Therefore, in order to connect the N-type first electrode 251 and the N-type second electrode 271 and connect the P-type first electrode 252 and the N-type second electrode 271, at least a portion of the passivation layer material on the N-type first electrode 251 and the P-type first electrode 252 needs to be removed after the passivation layer 26 is fabricated, so as to connect the N-type first electrode 251 and the N-type second electrode 271 and connect the P-type first electrode 252 and the P-type second electrode 272.
In this embodiment, the LED wafer further includes a protective layer 40, where the protective layer 40 at least covers the surface of the passivation layer 26 in the isolation trench 30, and can reflect light with a wavelength of 1064 by more than 80%, so as to reflect the laser when the substrate 10 of the LED wafer is cut by the laser, and the combination of the protective layer 40 and the passivation layer 26 does not act on the epitaxial layer located on the sidewall of the isolation trench 30, so that the damage to the epitaxial layer is not easy to occur.
It should be noted that, the width of the isolation groove 30 is 10-30 μm, the edge of the laser penetration path 50 is 3-10 μm from the edge of the isolation groove 30, that is, the range of the passivation layer 26 and the protective layer 40 coating the epitaxial layer is 3-10 μm, so that the passivation layer 26 and the laser protective layer play a role in protecting epitaxy.
In addition, since the LED wafer cuts the substrate 10 at the bottom layer along the isolation groove 30 by laser, in order to guide the laser to reduce the reflected light of the laser, the protective layer 40 and the passivation layer 26 form the laser penetration channel 50 by etching at the bottom of the isolation groove 30, and when the laser cutting is performed, the laser can directly act on the substrate 10 at the bottom layer through the laser penetration channel 50, thereby cutting the substrate 10, reducing the reflected light of the laser, and since the substrate 10 is made of a reflective material, when the substrate 10 is cut, a part of the reflected laser cannot be prevented from being reflected onto the protective layer 40 at the side surface of the isolation groove 30, and the protective layer 40 further reflects the reflected laser, and when the substrate 10 is cut by the laser, the protective layer 40 and the passivation layer 26 are protected, the laser is not easy to damage the epitaxial layer of the chip unit 20, thereby ensuring the epitaxial quality of the epitaxial layer.
It should be noted that, in this embodiment, the epitaxial layer in the chip unit 20 includes: an N-type semiconductor layer 21, a quantum well layer 22, and a P-type semiconductor layer 23 are sequentially stacked on the substrate 10. The chip layers in the chip unit 20 shown in this embodiment include: a transparent conductive layer 24, a first electrode layer, a second electrode layer, a passivation layer 26, and a protective layer 40.
In the present embodiment, the protective layer 40 is a DBR structure formed by overlapping a first material and a second material, the first material being Si0 2 The second material is TiO 2 And the number of overlapping layers of the first material and the second material is 31.
As shown in table 1, table 1 is a table of parameters for each layer in the protective layer 40.
TABLE 1
When the LED wafer with reduced laser cutting damage is used to manufacture an LED chip, during laser cutting, laser will cut the substrate 10 at the bottom layer along the laser penetrating path 50 at the bottom of the isolation groove 30 between the chip units 20, reflected laser reflected by the substrate 10 will be reflected to the protective layer 40 on the side wall of the isolation groove 30, the protective layer 40 will further reflect the reflected laser, and the laser is not easy to damage the epitaxial layer of the chip unit 20 through the protection of the protective layer 40 and the passivation layer 26, so that the laser cutting damage is reduced, and the epitaxial quality of the epitaxial layer is effectively ensured.
Referring to fig. 3, in the present embodiment, a method for manufacturing the LED wafer for reducing laser cutting damage includes steps S1 to S4:
step S1, providing a substrate and manufacturing a plurality of chip units on the substrate; wherein, isolation grooves are arranged between any adjacent chip units.
Wherein, a plurality of chip units 20 are fabricated on the substrate 10, that is, a plurality of times of stacking is performed on the substrate 10 to obtain epitaxial layers of the plurality of chip units 20, and a chip layer is fabricated on each epitaxial layer, so that the LED wafer to be diced is obtained in combination with the substrate 10.
And S2, manufacturing a passivation layer on the surface of the chip unit and in the isolation groove.
And S3, manufacturing a protective layer on the passivation layer, wherein the protective layer covers the passivation layer and exposes the metal electrode of the chip layer in the chip unit.
It should be noted that, the protective layer 40 is fabricated on the passivation layer 26, and the protective layer 40 is exposed from the metal electrode of the chip layer in the chip unit 20 when covering the passivation layer 26, specifically, the N-type first electrode 251 and the P-type first electrode 252 of the first electrode layer are exposed, so that the through holes exposing the N-type first electrode 251 and the P-type first electrode 252 are formed on the protective layer 40 for connecting with the N-type second electrode 271 and the P-type second electrode 272 of the second electrode layer respectively.
The protection layer 40 is manufactured to protect the chip unit 20, so as to prevent the epitaxial layer of the chip unit 20 from being damaged by the reflected laser during the laser dicing, thereby reducing the laser dicing loss.
And S4, etching the protective layer at the bottom of the isolation groove to remove at least part of protective layer material, and exposing the surface of the substrate to form a laser penetration channel for guiding laser movement at the bottom of the isolation groove.
The purpose of forming the laser penetration path 50 is to make the laser directly act on the underlying substrate 10 by making an opening in advance, so that the laser will not contact with the protective layer 40 or the passivation layer 26 to generate reflected laser, and the reflected laser which is inevitably generated when the laser cuts the substrate 10 along the laser penetration path 50 will be further reflected by the protective layer 40, so that the epitaxial layer of the chip unit 20 will not be damaged, and the laser cutting damage is reduced.
Compared with the prior art, the LED wafer, the preparation method and the LED chip for reducing the laser cutting damage have the beneficial effects that:
the chip units comprising the epitaxial layers and the chip layers are arranged on the substrate, so that isolation grooves are formed between the adjacent chip units, the passivation layers covering the epitaxial layers and the chip layers are manufactured on the surfaces of the chip units, the protective layers are manufactured on the surfaces of the passivation layers in the isolation grooves and used for being combined with the passivation layers to block reflected laser generated when the substrate is cut by the laser, the laser penetrating channels arranged at the bottoms of the isolation grooves can guide the laser to directly act on the substrate at the bottom layer, the reflected laser cannot be additionally generated, the reflected laser generated when the substrate is cut by the laser can be blocked by the protective layers and the passivation layers, the protection of the epitaxial layers and the chip layers is achieved, the laser cutting damage of the LED wafer is reduced, and the epitaxial quality of the epitaxial layers in the LED chip is effectively ensured.
Example two
Referring to fig. 2, a second embodiment of the present invention also provides an LED wafer for reducing laser dicing damage, which is also based on the LED wafer dicing to obtain a plurality of individual LED chips, wherein the LED wafer in the present embodiment has a substantially similar structure as the LED wafer in the first embodiment, except that:
in this embodiment, the protective layer 40 is shown to include a laser reflective sub-layer 41 and a reflective protective sub-layer 42 laminated on the passivation layer 26.
The material used to make the laser reflection sublayer 41 is Ag metal, and the thickness of the laser reflection sublayer 41 is 1000 a. The material used to make the reflective protective sub-layer 42 is an insulating material, specifically SiO 2 The reflective protection sub-layer 42 has a thickness of 2000 a.
That is, the protective layer 40 in the present embodiment is not made of two reflective materials overlapped in the first embodiment, but is made of two sub-layers, each of which performs a different function by selecting a specific material, by lamination.
Compared with the prior art, the LED wafer, the preparation method and the LED chip for reducing the laser cutting damage have the beneficial effects that:
the chip units comprising the epitaxial layers and the chip layers are arranged on the substrate, so that isolation grooves are formed between the adjacent chip units, the passivation layers covering the epitaxial layers and the chip layers are manufactured on the surfaces of the chip units, and the protective layers are manufactured on the surfaces of the passivation layers in the isolation grooves, wherein the protective layers comprise the laser reflection sub-layers and the laser protection sub-layers and are used for being combined with the passivation layers to block reflected laser generated when the substrate is cut by the laser, the laser penetrating channels arranged at the bottoms of the isolation grooves can guide the laser to directly act on the substrate at the bottom layer, the reflected laser cannot be additionally generated, the reflected laser generated when the substrate is cut by the laser can be blocked by the protective layers and the passivation layers, the protection of the epitaxial layers and the chip layers is achieved, the laser cutting damage of the LED wafer is reduced, and the epitaxial quality of the epitaxial layers in the LED chip is effectively ensured.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, and are described in detail, but are not to be construed as limiting the scope of the invention. It should be noted that it is possible for those skilled in the art to make several variations and modifications without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.

Claims (10)

1. An LED wafer for reducing laser dicing damage, the LED wafer comprising:
the semiconductor device comprises a substrate and a plurality of chip units arranged on the substrate, wherein each chip unit comprises an epitaxial layer and a chip layer, and isolation grooves are formed between any adjacent chip units;
the passivation layer covers the epitaxial layer and the chip layer and exposes the metal electrode of the chip layer;
the protective layer at least covers the surface of the passivation layer in the isolation groove;
and etching the protective layer and the passivation layer at the bottom of the isolation groove to form a laser penetrating channel, and cutting the substrate by laser through the laser penetrating channel to form a plurality of independent LED chips when cutting adjacent chip units along the laser penetrating channel by the laser.
2. The LED wafer of claim 1, wherein said protective layer is a DBR structure formed from a first material overlapping a second material.
3. The LED wafer of claim 2, wherein said first material is SiO 2 With TiO 2 One of the materials is SiO 2 With TiO 2 Another of the above.
4. The LED wafer of claim 2, wherein the number of overlapping layers of said first material and said second material is greater than or equal to 15, and wherein the thickness of said protective layer is greater than or equal to 1.5 μm.
5. The LED wafer of claim 1, wherein said protective layer comprises a laser reflective sub-layer and a reflective protective sub-layer sequentially laminated on said passivation layer, said reflective protective sub-layer covering an outer surface of said laser reflective sub-layer.
6. The LED wafer of claim 5, wherein the material used to make said laser reflective sub-layer comprises Ag, au, cu metal, said laser reflective sub-layer having a thickness of 1000-10000 a.
7. The LED wafer of claim 5, wherein the material used to make the reflective protective sub-layer is an insulating material comprising SiO 2 、Al 2 O 3 、SiN X The thickness of the reflection protection sub-layer is 2000-20000A.
8. The preparation method of the LED wafer for reducing the laser cutting damage is characterized by comprising the following steps of:
providing a substrate and manufacturing a plurality of chip units on the substrate; wherein, isolation grooves are arranged between any adjacent chip units;
manufacturing a passivation layer on the surface of the chip unit and in the isolation groove;
manufacturing a protective layer on the passivation layer, wherein the protective layer covers the passivation layer and exposes a metal electrode of a chip layer in the chip unit;
etching the protective layer at the bottom of the isolation groove to remove at least part of protective layer material, exposing the surface of the substrate, and forming a laser penetration channel for guiding laser movement at the bottom of the isolation groove.
9. The method for manufacturing an LED wafer for reducing laser dicing damage of claim 8, wherein a protective layer is formed on the passivation layer, and the protective layer covers the passivation layer and exposes the metal electrode of the chip layer in the chip unit, specifically comprising:
manufacturing a protective layer on the passivation layer in a film plating mode;
etching to remove at least part of the protective layer material and the passivation layer material by photoetching and dry etching so as to expose the N-type metal electrode and the P-type metal electrode of the chip layer respectively;
or alternatively
Etching to remove at least part of passivation layer material by adopting photoetching and dry etching so as to expose the substrate at the bottom of the isolation groove and expose the N-type metal electrode and the P-type metal electrode of the chip layer; manufacturing a laser reflection sub-layer on the passivation layer in a photoetching and coating mode, so that the laser reflection sub-layer covers the passivation layer on the side surface of the isolation groove;
manufacturing a reflection protection sub-layer on the laser reflection sub-layer;
and etching to remove the reflection protection sub-layer formed at the bottom of the isolation groove through photoetching and dry etching to obtain the protection layer comprising the laser reflection sub-layer and the reflection protection sub-layer.
10. An LED chip, wherein the LED chip is obtained by cutting the LED wafer according to any one of claims 1 to 7 along the laser penetrating path at the bottom of the isolation trench.
CN202311403994.7A 2023-10-27 2023-10-27 LED wafer capable of reducing laser cutting damage, preparation method and LED chip Pending CN117423788A (en)

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CN202311403994.7A CN117423788A (en) 2023-10-27 2023-10-27 LED wafer capable of reducing laser cutting damage, preparation method and LED chip

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