CN117396035A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN117396035A
CN117396035A CN202311406595.6A CN202311406595A CN117396035A CN 117396035 A CN117396035 A CN 117396035A CN 202311406595 A CN202311406595 A CN 202311406595A CN 117396035 A CN117396035 A CN 117396035A
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CN
China
Prior art keywords
display panel
layer
substrate
conductive portion
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311406595.6A
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Chinese (zh)
Inventor
屈忆
张波
周洋
白露
廖茂颖
舒晓青
冯翱远
初志文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202311406595.6A priority Critical patent/CN117396035A/en
Publication of CN117396035A publication Critical patent/CN117396035A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/38Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens

Abstract

A display panel and a display device are provided. The display panel includes: the substrate base plate is provided with a display area and a peripheral area, and the peripheral area is positioned on at least one side of the display area; a plurality of pixels located in the display area; a plurality of connection pads located in the peripheral region; a plurality of signal lines extending from the display region to the peripheral region; and an organic insulating layer located in the display region and the peripheral region; one of the plurality of bonding pads is connected with at least one of the plurality of signal lines, and the organic insulating layer is provided with a first opening near the plurality of bonding pads, wherein the first opening is positioned in the peripheral area. The display panel blocks the water-oxygen channel, prevents water-oxygen from attacking and corroding the connecting pad or the signal wire connected with the connecting pad, improves the reliability and the reliability, and improves the working stability of the display panel.

Description

Display panel and display device
Technical Field
At least one embodiment of the present disclosure relates to a display panel and a display device.
Background
With the continuous update of Organic Light-Emitting Diode (OLED) technology, the types of OLED products are becoming more and more abundant. Color filter on package (Color Filter On Encapsulation, COE) technology offers more possibilities for OLED flexible products. The technology of COE has wide application in OLED display products. The product adopting the COE technology has the advantages of high transmittance, low power consumption, long service life, thin thickness and the like, and the COE technology can be applied to more OLED products in the future.
Disclosure of Invention
At least one embodiment of the present disclosure provides a display panel and a display device.
Embodiments of the present disclosure provide a display panel including: a substrate base plate having a display area and a peripheral area, the peripheral area being located on at least one side of the display area; a plurality of pixels located in the display area; a plurality of connection pads located in the peripheral area; a plurality of signal lines extending from the display region to the peripheral region; and an organic insulating layer located in the display region and the peripheral region; one of the plurality of bonding pads is connected with at least one of the plurality of signal lines, and the organic insulating layer is provided with a first opening near the plurality of bonding pads, wherein the first opening is positioned in the peripheral area.
For example, the organic insulating layer covers an end of at least one of the plurality of pads near the display region.
For example, the plurality of pads are arranged along a first direction, and the first opening extends along the first direction.
For example, the first openings are provided in plural, the plural first openings are arranged in a second direction, and the first direction intersects with the second direction.
For example, an orthographic projection of the first opening on the substrate overlaps an orthographic projection of at least two signal lines of the plurality of signal lines on the substrate.
For example, the pad has a first conductive portion and a second conductive portion, the first conductive portion and the second conductive portion are connected, the first conductive portion is closer to the substrate than the second conductive portion, and the second conductive portion is connected to at least one signal line through the first conductive portion.
For example, the display panel further includes a plurality of inorganic insulating layers, and the signal line is covered with at least one inorganic insulating layer of the plurality of inorganic insulating layers at the first opening position.
For example, the first conductive portion is covered with at least two inorganic insulating layers among the plurality of inorganic insulating layers.
For example, the at least two inorganic insulating layers include a passivation layer and an interlayer insulating layer, the passivation layer is located on a side of the organic insulating layer, which is close to the substrate, the interlayer insulating layer is located on a side of the organic insulating layer, which is away from the substrate, the passivation layer is located on a side of the second conductive portion, which is close to the substrate, the interlayer insulating layer is located on a side of the second conductive portion, which is away from the substrate, and the connection pad is composed of the first conductive portion and the second conductive portion.
For example, the interlayer insulating layer further has a second opening configured to expose the plurality of pads.
For example, the first conductive portion and the second conductive portion are in contact.
For example, an orthographic projection of the first opening on the substrate base plate does not overlap with an orthographic projection of the second conductive portion on the substrate base plate.
For example, the second conductive portion is located at a side of the organic insulating layer close to the substrate base plate.
For example, the peripheral region has a inflection region, and the first opening is located in the inflection region.
For example, the peripheral region has a pad region, and the first opening is located near the pad region.
For example, the display panel further includes an encapsulation layer, a touch layer, and a color filter structure, the touch layer is closer to the substrate than the color filter structure, a barrier layer of an organic insulating material is disposed between the touch layer and the color filter structure, the encapsulation layer is configured to encapsulate the plurality of pixels, and the encapsulation layer is located on a side of the touch layer that is closer to the substrate.
For example, an orthographic projection of the barrier layer on the substrate does not at least partially overlap with an orthographic projection of the first opening on the substrate.
For example, the display panel further comprises a protective layer, which is located on a side of the barrier layer facing away from the substrate, and the orthographic projection of the protective layer on the substrate does not overlap with the orthographic projection of the first opening on the substrate at least partially.
For example, the display panel further includes a flexible circuit board connected to the plurality of pads.
In the display panel provided by the embodiment of the present disclosure, the pixel includes a pixel circuit configured to drive the light emitting element and a light emitting element, and the organic insulating layer is located between the light emitting element and the pixel circuit.
The embodiment of the disclosure also provides a display device, which comprises any one of the display panels.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, and it is apparent that the drawings in the following description relate only to some embodiments of the present disclosure, not to limit the present disclosure.
Fig. 1 is a cross-sectional view of a display panel.
Fig. 2 is a cross-sectional view of a display panel.
Fig. 3 is a schematic plan view of a display panel.
Fig. 4 is a cross-sectional view of a pad in a display panel.
Fig. 5 is a plan view of a pad in a display panel.
Fig. 6 is a plan view of a pad in a display panel.
Fig. 7 is a schematic plan view of a display panel according to an embodiment of the disclosure.
Fig. 8 is a schematic plan view of a display panel according to an embodiment of the disclosure.
Fig. 9 is a schematic plan view of a pad of a display panel according to an embodiment of the disclosure.
Fig. 10 is a cross-sectional view of a pad of a display panel according to an embodiment of the disclosure.
Fig. 11 is a schematic cross-sectional view of a display panel according to an embodiment of the disclosure.
Fig. 12 is a schematic plan view of another display panel according to an embodiment of the disclosure.
Fig. 13 is a schematic plan view of a display panel according to an embodiment of the disclosure.
Fig. 14 is a schematic plan view of a pad of a display panel according to an embodiment of the disclosure.
Fig. 15 is a schematic cross-sectional view of another display panel provided in an embodiment of the disclosure.
Fig. 16 is a partial plan view of a display panel according to an embodiment of the present disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a," "an," or "the" and similar terms do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
Fig. 1 is a cross-sectional view of a display panel. As shown in fig. 1, the display panel includes a back plate BP, where the back plate BP includes a packaging layer TFE, a barrier layer TBL is disposed on the packaging layer TFE, a touch structure TS is disposed on the barrier layer TBL, a barrier layer CBL is disposed on the touch structure TS, a color filter structure COE is disposed on the barrier layer CBL, and a protective layer COC is disposed on the color filter structure COE. The color filter structure COE includes a black matrix and a color filter layer CF.
The cole technology generally adopts an inorganic isolation scheme, as shown in fig. 1, a barrier layer CBL disposed on the touch structure TS is an inorganic insulating layer, and the barrier layer CBL may be formed by a chemical vapor deposition (Chemical Vapor Deposition, CVD) process to isolate the color filter structure cole from the touch structure TS. The scheme of using a barrier layer CBL of inorganic insulating material between the color filter structure COE and the touch structure TS has the following drawbacks: the color filter structure COE is an organic layer, the contact adhesion force between the color filter structure COE and the barrier layer CBL of the inorganic insulating material is not high, film Peeling (Peeling) is easy to occur, the barrier layer CBL of the inorganic insulating material is crisp in texture for a foldable OLED product, when the color filter structure COE collides with the outside, film breakage is easy to occur, the strength is not high, the stress characteristics of the inorganic layer and the organic layer are different, and the display panel is easy to warp, invert (surface unevenness) and the like after the color filter structure COE is collided with the outside. Therefore, the barrier layer between the color filter structure COE and the touch structure TS can be an organic film layer, so that the strength of the display panel can be effectively improved, and the stress risk of products such as foldable products can be reduced.
Fig. 2 is a cross-sectional view of a display panel. As shown in fig. 2, the barrier TOC between the color filter structure COE and the touch structure TS may be an organic insulating layer to avoid warpage and arching.
Fig. 3 is a schematic plan view of a display panel. As shown in fig. 3, the display panel includes: a substrate BS, a plurality of pixels PX, and a plurality of pads 101, the substrate BS having a display area 201 and a peripheral area 202, the peripheral area 202 being located on at least one side of the display area 201; a plurality of pixels PX are located in the display area 201; the plurality of pads 101 are located in the peripheral region 202. Embodiments of the present disclosure are illustrated with the peripheral region 202 surrounding the display region 201. A plurality of pads 101 may be used to connect to external circuitry. For example, the external circuit includes a flexible circuit board, but is not limited thereto.
Fig. 4 is a cross-sectional view of a pad in a display panel. As shown in fig. 4, the substrate BS is provided with the gate insulating layer GI, the interlayer insulating layer ILD is provided on the gate insulating layer GI, the conductive portion P01 is provided on the interlayer insulating layer ILD, the passivation layer PVX is provided on the conductive portion P01, the conductive portion P02 is provided on the passivation layer PVX, the conductive portion P02 is connected to the conductive portion P01 through a via penetrating the passivation layer PVX, the planarizing layer PLN2 is provided on the conductive portion P02, the interlayer insulating layer TLD is provided on the planarizing layer PLN2, the conductive portion P03 is provided on the interlayer insulating layer TLD, and the conductive portion P03 is connected to the conductive portion P02 through a via penetrating the interlayer insulating layer TLD. The planarization layer PLN2 has a via hole at the junction of the conductive portion P03 and the conductive portion P02, and the size of the via hole in the planarization layer PLN2 is larger than that in the interlayer insulating layer TLD.
As shown in fig. 4, the conductive portion P01, the conductive portion P02, and the conductive portion P03 constitute the pad 101. The pad 101 is a stacked structure of a plurality of film layers. The structure at the bonding pad shown in fig. 3 corresponds to a display panel employing a barrier layer CBL of an inorganic insulating material.
If the barrier TOC between the color filter structure COE and the touch structure TS is an organic insulating layer, the structure of the pad shown in fig. 4 will generate a loss of material (metal) at the dashed line box a in fig. 4, because the process of manufacturing the color filter structure COE will cause the end loss of the conductive portion P03. For example, the conductive portion P03 has a structure of three sub-layers such as titanium/aluminum/titanium (Ti/Al/Ti), and the developing solution or etching solution corrodes the edge of the conductive portion P03, so that aluminum of the intermediate sub-layer is etched at the edge to form undercut. If the boundary of the conductive portion P03 is covered with the barrier layer TOC of an organic insulating material, the barrier layer TOC of an organic insulating material is liable to absorb water and oxygen, and is liable to be peeled off (Peeling) by absorbing water in a reliability test.
Fig. 5 is a plan view of a pad in a display panel. Fig. 6 is a plan view of a pad in a display panel. As shown in fig. 5 and 6, the pad 101 is connected to the connection line CL, and the interlayer insulating layer TLD has an opening PN0. If the structure of fig. 4 is adopted, the portion of the interlayer insulating layer TLD located at the pad region 204 is removed, and the interlayer insulating layer TLD is absent to cover the boundary of the planarization layer PLN (the planarization layer PLN 2), so that a water-oxygen path is easily formed during the reliability test, and water vapor is transferred from the pad region 204 to the pad 101 and finally causes corrosion. The dashed box B in fig. 5 and 6 is a position that is easily affected by water oxygen.
Fig. 5 and 6 show the boundary 301 of the organic film layer. For example, the organic film layer may be a planarization layer. As shown in fig. 5 and 6, the portion above the boundary 301 is provided with an organic film layer, and the portion below the boundary 301 is not provided with an organic film layer (the material of the organic film layer is removed), i.e., the organic film layer shows the film layer with an opening therein.
Fig. 5 and 6 show a part of the display panel. Other organic layers may also have vias.
Embodiments of the present disclosure provide a display panel and a display device. The organic insulating layer L1 has a first opening PN1 near the plurality of pads 101 to block water and oxygen, thereby avoiding affecting the light emitting device and improving reliability.
Fig. 7 is a schematic plan view of a display panel according to an embodiment of the disclosure. Fig. 8 is a schematic plan view of a display panel according to an embodiment of the disclosure. Fig. 9 is a schematic plan view of a pad of a display panel according to an embodiment of the disclosure. Fig. 10 is a cross-sectional view of a pad of a display panel according to an embodiment of the disclosure. Fig. 11 is a schematic cross-sectional view of a display panel according to an embodiment of the disclosure. Fig. 12 is a schematic plan view of another display panel according to an embodiment of the disclosure. Fig. 13 is a schematic plan view of a display panel according to an embodiment of the disclosure. Fig. 14 is a schematic plan view of a pad of a display panel according to an embodiment of the disclosure. Fig. 15 is a schematic cross-sectional view of another display panel provided in an embodiment of the disclosure.
As shown in fig. 7 to 13, an embodiment of the present disclosure provides a display panel including: a substrate BS, a plurality of pixels PX, a plurality of pads 101, a plurality of signal lines 102, and an organic insulating layer L1 (planarization layer PLN 2). The substrate BS has a display area 201 and a peripheral area 202, the peripheral area 202 being located on at least one side of the display area 201. The plurality of pixels PX are located in the display area 201. The plurality of pads 101 are located in the peripheral region 202. The plurality of signal lines 102 extend from the display region 201 to the peripheral region 202. The organic insulating layer L1 is located in the display region 201 and the peripheral region 202. One pad 101 of the plurality of pads 101 is connected to at least one signal line 102 of the plurality of signal lines 102, and the organic insulating layer L1 has a first opening PN1 near the plurality of pads 101, the first opening PN1 being located in the peripheral region 202.
In the display panel provided by the embodiment of the disclosure, the organic insulating layer L1 has the first opening PN1 near the plurality of pads 101 to block the water-oxygen channel, prevent the water-oxygen from attacking and corroding the pads 101 or the signal lines connected with the pads, avoid affecting the light emitting element, improve the reliability and the reliability, and improve the working stability of the display panel.
For example, as shown in fig. 10, in order to protect the pads 101, the organic insulating layer L1 covers one end of at least one pad 101 of the plurality of pads 101 near the display area 201. The embodiment of the present disclosure takes an example in which one end of each of the pads 101 near the display region 201 is covered with the organic insulating layer L1.
For example, as shown in fig. 9 and 14, the plurality of pads 101 are arranged along the first direction X, and the first opening PN1 extends along the first direction X. The first opening PN1 is elongated, and the length direction of the elongated shape is the extending direction thereof. As shown in fig. 9 and 14, the first opening PN1 is provided, and the first opening PN1 serves as a water-oxygen blocking structure, so that the water-oxygen invasion path is cut off, the water-oxygen invasion is prevented from affecting the connection line CL connected to the pad 101, and the light emitting element is prevented from being affected. The connection line CL may be a portion of the signal line 102.
For example, as shown in fig. 12, the first openings PN1 are provided in plural, the plural first openings PN1 are arranged in the second direction Y, and the first direction X intersects the second direction Y. The first openings PN1 are disposed to facilitate forming a plurality of water-oxygen barrier structures, and cut off the water-oxygen attack path.
For example, as shown in fig. 9, 12, and 14, in order to simplify the process, a first opening PN1 is formed in a long stripe shape, and an orthographic projection of the first opening PN1 on the substrate BS overlaps with an orthographic projection of at least two signal lines 102 of the plurality of signal lines 102 on the substrate BS. The first opening PN1 corresponds to at least two signal lines 102 among the plurality of signal lines 102. In some embodiments, the first opening PN1 corresponds to all of the plurality of signal lines 102.
For example, as shown in fig. 10, the pad 101 is formed in a stacked structure of a plurality of conductive parts, the pad 101 has a first conductive part P1 and a second conductive part P2, the first conductive part P1 and the second conductive part P2 are connected, the first conductive part P1 is closer to the substrate BS than the second conductive part P2, and the second conductive part P2 is connected to at least one signal line 102 through the first conductive part P1.
For example, as shown in fig. 10, the display panel further includes a plurality of inorganic insulating layers L0, and the signal line 120 is covered with at least one inorganic insulating layer of the plurality of inorganic insulating layers L0 at the position of the first opening PN 1. At the first opening PN1 position, the inorganic insulating layer L0 located above the signal line 120 protects the signal line 120.
For example, as shown in fig. 10, in order to better protect the signal line 120, the first conductive portion P1 is covered with at least two inorganic insulating layers L0 among the plurality of inorganic insulating layers L0.
For example, as shown in fig. 10, at least two inorganic insulating layers L0 include a passivation layer PVX and an interlayer insulating layer TLD to form a double layer (two inorganic insulating layers) protection to avoid corrosion of the signal line 102. The passivation layer PVX is located at a side of the organic insulation layer L1 close to the substrate BS, the interlayer insulation layer TLD is located at a side of the organic insulation layer L1 away from the substrate BS, the passivation layer PVX is located at a side of the second conductive portion P2 close to the substrate BS, and the interlayer insulation layer TLD is located at a side of the second conductive portion P2 away from the substrate BS. Fig. 10 illustrates an example in which the inorganic insulating layer L0 includes a passivation layer PVX and an interlayer insulating layer TLD.
As shown in fig. 10, in order to protect the pad 101, the organic insulating layer L1 is in contact with the passivation layer PVX and with the interlayer insulating layer TLD at a position of the first opening PN1 near the pad 101.
As shown in fig. 10, in order to protect the pad 101, the organic insulating layer L1 is also in contact with the second conductive portion P2 at a position of the first opening PN1 near the pad 101.
For example, as shown in fig. 10 and 13, the pad 101 is constituted by a first conductive portion P1 and a second conductive portion P2. I.e. with the elements of the two conductive pattern layers closest to the substrate base BS. In order to avoid material loss at the dashed line box a of the display panel shown in fig. 4, the pad stacked in three layers is not provided, but is provided in a double-layer structure, i.e., the uppermost conductive portion shown in fig. 4 is removed.
For example, as shown in fig. 9, 10, and 14, the interlayer insulating layer TLD has a second opening PN2, and the second opening PN2 is configured to expose the plurality of pads 101. In the process of forming the color filter structure, the interlayer insulating layer TLD is used to protect the pad 101, cover the pad region, and after the color filter structure is formed, the interlayer insulating layer TLD is etched to form the second opening PN2, so that the structure shown in fig. 10 is formed, and compared with the structure shown in fig. 4, the interlayer insulating layer TLD is used to block water and oxygen, which cannot directly enter the pad region, and cannot form a water vapor channel, so that corrosion of the pad 101 and the signal line 102 connected with the pad region is avoided. In addition, compared with the structure shown in fig. 4, the structure shown in fig. 10 forms the dual-layered pad 101, so that material loss can be avoided. Accordingly, the organic insulating layer L1 (planarization layer PLN 2) also has an opening at the pad 101 to expose the pad 101. As shown in fig. 10, the barrier TOC and the protection layer COC also have openings at the pads 101 to expose the pads 101. For example, as shown in fig. 10, at the first opening PN1, all the organic layers are removed to facilitate effective blocking of the water oxygen channel.
As shown in fig. 10, the orthographic projection of the barrier layer TOC on the substrate BS does not overlap with the orthographic projection of the first opening PN1 on the substrate BS at least partially. So as to be beneficial to effectively blocking the water oxygen channel. In some embodiments, in order to better block the water-oxygen channel, the orthographic projection of the barrier layer TOC on the substrate BS at least does not overlap with the orthographic projection of the first opening PN1 on the substrate BS.
As shown in fig. 10, the orthographic projection of the protective layer COC on the substrate BS and the orthographic projection of the first opening PN1 on the substrate BS do not overlap at least partially. So as to be beneficial to effectively blocking the water oxygen channel. In some embodiments, in order to better block the water oxygen channel, the orthographic projection of the protective layer COC on the substrate BS and the orthographic projection of the first opening PN1 on the substrate BS do not overlap at least.
For example, as shown in fig. 10, the first conductive portion P1 and the second conductive portion P2 contact to form a stacked structure.
As shown in fig. 10, the substrate BS has a gate insulating layer GI provided thereon, an interlayer insulating layer ILD provided thereon, and a first conductive portion P1 provided thereon. The film layer structure between the first conductive part P1 and the substrate base BS is not limited to that shown in fig. 10, and may be provided as needed.
For example, as shown in fig. 9 and 10, in order to achieve both protection of the pads and cutting of the water-oxygen channel, the orthographic projection of the first opening PN1 on the substrate BS and the orthographic projection of the second conductive portion P2 on the substrate BS do not overlap. That is, the first opening PN1 and the second conductive portion P2 have a space therebetween. The first opening PN1 and the second conductive portion P2 have a space in the extending direction of the pad 101. The extending direction of the bonding pad 101 refers to the length direction of the bonding pad 101. In embodiments of the present disclosure, the extension direction of one component refers to the length direction of the component.
Fig. 10 also shows a conductive element 601, the conductive element 601 being located in the same layer as the second conductive portion P2, i.e. being formed from the same layer using the same patterning process. As shown in fig. 10, the planarizing layer PLN2 conductive element 601
For example, as shown in fig. 7 to 10, 12, 13, and 14, the peripheral region 202 has a pad region 204, the plurality of pads 101 are disposed in the pad region 204, and the first opening PN1 is located near the pad region 204.
As shown in fig. 9 and 14, the interlayer insulating layer TLD is shown with a second opening PN 2. The boundary 302 is the upper boundary of the second opening PN 2. That is, in fig. 9 and 14, the upper side of the boundary 302 is a region of the material having the interlayer insulating layer TLD, and the lower side of the boundary 302 is a region of the material not having the interlayer insulating layer TLD, that is, a region where the second opening PN2 is located.
Fig. 9 and 14 show a part of the display panel. The interlayer insulating layer TLD may also have a via hole at other locations, for example in the display area.
Compared with the display panel shown in fig. 11, the planarization layer PLN in the display panel shown in fig. 15 has the planarization layer PLN1, the planarization layer PLN2, and the planarization layer PLN3, and the display panel has the connection element CE1, the connection element CE2. As shown in fig. 15, the first electrode E1 is connected to the connection element CE1 through the connection element CE2, and the connection element CE1 is connected to the pixel circuit PXC. The first electrode E1 penetrates the planarization layer PLN3, the connection element CE2 penetrates the planarization layer PLN2, and the connection element CE1 penetrates the planarization layer PLN1. In the case where the display panel is a display panel as shown in fig. 15, the organic insulating layer L1 may be at least one of a plurality of planarization layers between the first electrode E1 and the pixel circuit PXC.
The embodiments of the present disclosure do not limit the number of planarization layers located between the first electrode E1 and the pixel circuit PXC. At least one planarization layer is provided between the first electrode E1 and the pixel circuit PXC.
Fig. 11 and 15 schematically show the pixel circuit PXC, and the specific structure of the pixel circuit PXC is not shown. For example, the pixel circuit PXC includes a transistor and a capacitor. The embodiment of the present disclosure is not limited to the specific structure of the pixel circuit PXC, and may be determined as needed.
Fig. 16 is a partial plan view of a display panel according to an embodiment of the present disclosure.
For example, as shown in fig. 7 to 8 and fig. 16, the peripheral region 202 has a inflection region 203, and the first opening PN1 is located in the inflection region 203. The bending region 203 is located at one side of the pad region 204 near the display region 201. As shown in fig. 7, the bending region 203 has a bending line BL. The display panel may be bent along the bending line BL, and a portion of the display panel under the bending line BL is bent to the back to overlap with the remaining portion to reduce the bezel. Of course, the display panel provided by the embodiments of the present disclosure may not have a bending region.
For example, as shown in fig. 2 and 11, the display panel further includes an encapsulation layer TFE, a touch structure TS and a color filter structure COE, the touch structure TS is closer to the substrate BS than the color filter structure COE, a barrier layer TOC of an organic insulating material is disposed between the touch structure TS and the color filter structure COE, the encapsulation layer TFE is configured to encapsulate a plurality of pixels PX (encapsulate the light emitting elements EM), and the encapsulation layer TFE is located on a side of the touch structure TS close to the substrate BS. As shown in fig. 2 and 11, the display panel further includes a protective layer COC.
In the embodiment of the present disclosure, one pixel PX is the smallest display unit. The plurality of pixels PX emitting light of different primary colors constitute one display pixel.
For example, the encapsulation layer TFE includes a thin film encapsulation layer. For example, the encapsulation layer TFE may include at least one of an inorganic encapsulation layer, an organic encapsulation layer. For example, the encapsulation layer TFE may adopt a stacked encapsulation structure of an inorganic encapsulation layer, an organic encapsulation layer, and an inorganic encapsulation layer. For example, the inorganic encapsulation layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the organic encapsulation layer includes a resin, but is not limited thereto.
As shown in fig. 11, a barrier layer TBL is disposed on the back plate BP, a touch structure TS is disposed on the barrier layer TBL, a barrier layer TOC is disposed on the touch structure TS, the barrier layer TOC is made of an organic insulating material, and a color filter structure COE is disposed on the barrier layer TOC. The color filter structure COE and the touch structure TS are both disposed on the encapsulation layer TFE of the back plate BP. For example, the barrier layer TBL may be made of an inorganic insulating material. The barrier layer TOC between the color filter structure COE and the touch control structure TS adopts an organic insulating layer to avoid the problems of warping, arching and the like.
As shown in fig. 11, the back plate BP includes a substrate BS and pixel circuits PXC on the substrate BS. The pixel circuit PXC is connected to the light emitting element EM to drive the light emitting element EM to emit light.
As shown in fig. 11, the light emitting element EM includes a first electrode E1 and a second electrode E2. As shown in fig. 11, the first electrode E1 is connected to the pixel circuit PXC. For example, one of the first electrode E1 and the second electrode E2 is an anode, and the other of the first electrode E1 and the second electrode E2 is a cathode.
For example, the pixel circuit PXC includes a transistor and a capacitor. For example, the pixel circuit PXC includes a driving transistor and a data writing transistor.
In some embodiments, the pixel circuit PXC includes a driving transistor, a data writing transistor, a light emission control transistor, a threshold compensation transistor, a reset control transistor, and a storage capacitor. The structure of the pixel circuit PXC is not limited to the above description, and may be as desired.
As shown in fig. 11, the light emitting element EM further includes a light emitting functional layer EL between the first electrode E1 and the second electrode E2. For example, the light emitting functional layer EL may include a light emitting functional layer EL1, a light emitting functional layer EL2, and a light emitting functional layer EL3.
As shown in fig. 11, the touch structure TS includes a touch layer TL1 and a touch layer TL2, and an interlayer insulating layer TLD is disposed between the touch layer TL1 and the touch layer TL 2. For example, the interlayer insulating layer TLD may be made of an inorganic insulating material.
As shown in fig. 11, the color filter structure COE includes a black matrix BM and a color filter layer CF. The color filter layer CF includes a filter COR, a filter COG, and a filter COB. The filter COR is configured to transmit the first color light, the filter COG is configured to transmit the second color light, and the filter COB is configured to transmit the third color light. For example, the first color light is red light, the second color light is green light, and the third color light is blue light.
As shown in fig. 11, the display panel further includes a pixel defining layer PDL configured to expose a portion of the first electrode E1.
As shown in fig. 11, the display panel further includes a connection element CE through which the first electrode E1 is connected to the pixel circuit PXC. Fig. 11 also shows the planarizing layer PLN1 and the planarizing layer PLN2.
Fig. 11 illustrates an example in which the display panel includes the planarization layer PLN1 and the planarization layer PLN2, but is not limited thereto. The embodiment of the present disclosure will be described taking the organic insulating layer L1 as the planarization layer PLN2 as an example, but is not limited thereto. As shown in fig. 11 and 15, the organic insulating layer L1 may be one or more planarization layers (e.g., a planarization layer PLN1 and/or a planarization layer PLN2 and/or a planarization layer PLN 3) located under the first electrode E1. For example, the organic insulating layer L1 may be at least one planarization layer between the first electrode E1 and the pixel circuit PXC. For example, the organic insulating layer L1 is located between the light emitting element EM and the pixel circuit PXC. For example, the organic insulating layer L1 is located between the first electrode E1 of the light emitting element EM and the pixel circuit PXC.
For example, as shown in fig. 8, the display panel further includes a flexible circuit board 99, and the flexible circuit board 99 is connected to a plurality of pads 101.
As shown in fig. 8, the display panel further includes a plurality of output bumps BP1, a plurality of input bumps BP2, and a plurality of dummy bumps BP3.
Fig. 8 also shows the data line DL. The data line DL is configured to supply a data signal, for example, a data voltage, to the pixel PX. The number of data lines DL is not limited to that shown in fig. 8, and may be as required.
The number of pixels PX in the display panel is not limited to that shown in fig. 8, and the wiring and structure in the display panel are not limited to that shown in fig. 8, and may be as required.
As shown in fig. 8, the display panel further includes a data line DL, a first power supply voltage line PL1, and a second power supply voltage line PL2. The data line DL is configured to supply the data voltage Vdt to the pixel PX, the first power supply voltage line PL1 is configured to supply the first power supply voltage VDD to the pixel PX, the second power supply voltage line PL2 is configured to supply the second power supply voltage VSS to the pixel PX, and the plurality of output bumps BP1 include the output bumps BP1 respectively connected to the data line DL, the first power supply voltage line PL1, and the second power supply voltage line PL2. For example, the first power voltage VDD is greater than the second power voltage VSS. The second electrode E2 of the light emitting element EM is connected to the second power supply voltage line PL2.
As shown in fig. 8, in the display panel provided by the embodiment of the present disclosure, the signal line 102 may include at least one of a data line DL, a first power supply voltage line PL1, and a second power supply voltage line PL2.
In the display panel provided by the embodiments of the present disclosure, the bonding pad 101 may also be referred to as a bump.
As shown in fig. 8, the display panel further includes an integrated circuit 88, for example, the integrated circuit 88 and the flexible circuit board 99 may be respectively bonded to the display panel. For example, the integrated circuit 88 is bonded to conductive structures, such as various bumps, on the display panel. For example, the flexible circuit board 99 is bonded to conductive structures, such as various bumps, on the display panel. The bumps on the display panel that are bonded to the flexible circuit board 99 may be connected to the bumps on the display panel that are bonded to the integrated circuit 8.
As shown in fig. 9 to 11, an embodiment of the present disclosure further provides a display panel including: a substrate base plate BS having a display area 201 and a peripheral area 202, the peripheral area 202 being located on at least one side of the display area 201; a plurality of pixels PX located in the display area 201; a plurality of pads 101 located in the peripheral region 202; a plurality of signal lines 102 extending from the display region 201 to the peripheral region 202; an encapsulation layer TFE configured to encapsulate the plurality of pixels PX; the touch structure TS is positioned on one side of the packaging layer TFE, which is away from the substrate BS; color filter structure COE; the side of the touch structure TS, which is away from the encapsulation layer TFE; the organic insulating layer L1 is positioned between the touch control structure TS and the color filter structure COE; one pad 101 of the plurality of pads 101 is connected to at least one signal line 102 of the plurality of signal lines 102, and the organic insulating layer L1 has a first opening PN1 near the plurality of pads 101, the first opening PN1 being located in the peripheral region 202.
For example, as shown in fig. 10, the organic insulating layer L1 covers an end of at least one of the plurality of pads 101 near the display area 201, the plurality of pads 101 are aligned along the first direction X, and the first opening PN1 extends along the first direction X.
For example, as shown in fig. 10, the pad 101 has a first conductive portion P1 and a second conductive portion P2, the first conductive portion P1 and the second conductive portion P2 are connected, the first conductive portion P1 is closer to the substrate BS than the second conductive portion P2, the second conductive portion P2 is connected to at least one signal line 102 through the first conductive portion P1, and the pad 101 is constituted by the first conductive portion P1 and the second conductive portion P2.
For example, as shown in fig. 10, the second conductive portion P2 is located on the side of the organic insulating layer L1 close to the substrate base BS.
For example, in embodiments of the present disclosure, the planarizing layer PLN (including the planarizing layer PLN1, the planarizing layer PLN2, and the planarizing layer PLN 3) is made of an organic insulating material. For example, the material of the planarization layer PLN includes a resin, but is not limited thereto.
For example, in embodiments of the present disclosure, the material of the barrier layer TOC includes a transparent optical cement, but is not limited thereto.
For example, in the embodiment of the present disclosure, the material of the protective layer COC includes transparent optical paste, but is not limited thereto.
In an embodiment of the present disclosure, the inorganic insulating material includes at least one of silicon oxide, silicon nitride, and silicon oxynitride, but is not limited thereto.
For example, the display panel may further include an encapsulation layer configured to encapsulate the plurality of light emitting elements to avoid attack by water and oxygen.
For example, in the embodiment of the present disclosure, the first conductive part P1 may be made of a metal material, for example, metal including molybdenum (Mo), but is not limited thereto.
For example, in an embodiment of the present disclosure, the second conductive portion P2 may be made of a metal material, for example, the metal includes at least one of titanium (Ti) and aluminum (Al).
For example, in the embodiment of the present disclosure, the first and second conductive portions P1 and P2 may be made of different metal materials.
For example, in an embodiment of the present disclosure, one of the first electrode E1 and the second electrode E2 is an anode of a light emitting element, and the other of the first electrode E1 and the second electrode E2 is a cathode of the light emitting element. The embodiment of the present disclosure will be described taking the first electrode E1 as an anode and the second electrode E2 as a cathode as an example.
For example, the first electrode E1 is made of a conductive material. For example, the material of the first electrode E1 includes a metal and a conductive metal oxide. For example, the first electrode E1 is formed by stacking Indium Tin Oxide (ITO), silver (Ag), and Indium Tin Oxide (ITO). The material and structure of the first electrode E1 may be set as needed.
For example, the second electrode E2 is made of a conductive material. For example, the material of the second electrode E2 includes a metal or an alloy. For example, the material of the second electrode E2 includes Mg/Ag alloy. The material and structure of the second electrode E2 may be set as desired.
For example, the pixel defining layer PDL may employ a black pixel defining layer. Typically, the color film structure on the package (color filter on encapsulation, COE) can be matched with the black pixel defining layer.
In some figures of embodiments of the present disclosure, the plan view shows a first direction X and a second direction Y, and the cross-sectional view shows a third direction Z. The first direction X and the second direction Y are both directions parallel to the main surface of the substrate base BS. The third direction Z is a direction perpendicular to the main surface of the substrate base BS. For example, the first direction X and the second direction Y intersect. Embodiments of the present disclosure will be described taking as an example a first direction X and a second direction Y perpendicular. For example, the main surface of the substrate BS is the surface of the substrate BS for manufacturing each element. The upper surface of the substrate BS in the cross-sectional view is a main surface of the substrate BS. The third direction Z is perpendicular to the first direction X and perpendicular to the second direction Y.
The embodiment of the disclosure also provides a display device, which comprises any one of the display panels.
For example, the display device may be a display device such as an organic light emitting diode display device, and any product or component having a display function including a television, a digital camera, a mobile phone, a wristwatch, a tablet computer, a notebook computer, a navigator, and the like, including but not limited to the embodiments of the present disclosure.
The following points need to be described:
(1) Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another.
(2) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are referred to, and other structures may refer to the general design.
(3) In the drawings for describing embodiments of the present disclosure, the thickness of layers or regions is exaggerated for clarity. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
(4) Embodiments of the present disclosure and features in the embodiments may be combined with each other without conflict.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (21)

1. A display panel, comprising:
a substrate base plate having a display area and a peripheral area, the peripheral area being located on at least one side of the display area;
a plurality of pixels located in the display area;
a plurality of connection pads located in the peripheral area;
a plurality of signal lines extending from the display region to the peripheral region; and
an organic insulating layer located in the display region and the peripheral region,
wherein, a pad of the plurality of pads is connected with at least one signal line of the plurality of signal lines, the organic insulating layer has a first opening near the plurality of pads, and the first opening is located in the peripheral region.
2. The display panel of claim 1, wherein the organic insulating layer covers an end of at least one of the plurality of pads near the display area.
3. The display panel of claim 1, wherein the plurality of pads are arranged along a first direction, the first opening extending along the first direction.
4. A display panel according to claim 3, wherein the first openings are provided in a plurality, the plurality of first openings being arranged in a second direction, the first direction intersecting the second direction.
5. The display panel of claim 1, wherein an orthographic projection of the first opening on the substrate overlaps an orthographic projection of at least two of the plurality of signal lines on the substrate.
6. The display panel of any one of claims 1-5, wherein the bonding pad has a first conductive portion and a second conductive portion, the first conductive portion and the second conductive portion being connected, the first conductive portion being closer to the substrate than the second conductive portion, the second conductive portion being connected to at least one signal line through the first conductive portion.
7. The display panel according to claim 6, further comprising a plurality of inorganic insulating layers, wherein the signal line is covered with at least one inorganic insulating layer of the plurality of inorganic insulating layers at the first opening position.
8. The display panel according to claim 7, wherein the first conductive portion is covered with at least two inorganic insulating layers among the plurality of inorganic insulating layers.
9. The display panel according to claim 8, wherein the at least two inorganic insulating layers include a passivation layer and an interlayer insulating layer, the passivation layer is located on a side of the organic insulating layer close to the substrate, the interlayer insulating layer is located on a side of the organic insulating layer away from the substrate, the passivation layer is located on a side of the second conductive portion close to the substrate, the interlayer insulating layer is located on a side of the second conductive portion away from the substrate, and the connection pad is composed of the first conductive portion and the second conductive portion.
10. The display panel of claim 9, wherein the interlayer insulating layer further has a second opening configured to expose the plurality of pads.
11. The display panel of claim 6, wherein the first conductive portion and the second conductive portion are in contact.
12. The display panel of claim 6, wherein an orthographic projection of the first opening on the substrate does not overlap an orthographic projection of the second conductive portion on the substrate.
13. The display panel of claim 6, wherein the second conductive portion is located on a side of the organic insulating layer that is adjacent to the substrate.
14. The display panel of any one of claims 1-5, wherein the perimeter region has a inflection region, the first opening being located in the inflection region.
15. The display panel of any one of claims 1-5, wherein the peripheral region has a pad region, and the first opening is located proximate to the pad region.
16. The display panel of any one of claims 1-5, further comprising an encapsulation layer, a touch layer, and a color filter structure, wherein the touch layer is closer to the substrate than the color filter structure, a barrier layer of an organic insulating material is disposed between the touch layer and the color filter structure, the encapsulation layer is configured to encapsulate the plurality of pixels, and the encapsulation layer is located on a side of the touch layer that is closer to the substrate.
17. The display panel of claim 16, wherein an orthographic projection of the barrier layer on the substrate does not at least partially overlap an orthographic projection of the first opening on the substrate.
18. The display panel of claim 17, further comprising a protective layer, wherein the protective layer is located on a side of the barrier layer facing away from the substrate, an orthographic projection of the protective layer on the substrate at least partially does not overlap with an orthographic projection of the first opening on the substrate.
19. The display panel of any one of claims 1-5, further comprising a flexible circuit board, wherein the flexible circuit board is coupled to the plurality of pads.
20. The display panel according to any one of claims 1 to 5, wherein the pixel includes a pixel circuit and a light emitting element, the pixel circuit is configured to drive the light emitting element, and the organic insulating layer is located between the light emitting element and the pixel circuit.
21. A display device comprising the display panel according to any one of claims 1-20.
CN202311406595.6A 2023-10-26 2023-10-26 Display panel and display device Pending CN117396035A (en)

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Application Number Priority Date Filing Date Title
CN202311406595.6A CN117396035A (en) 2023-10-26 2023-10-26 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311406595.6A CN117396035A (en) 2023-10-26 2023-10-26 Display panel and display device

Publications (1)

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CN117396035A true CN117396035A (en) 2024-01-12

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Country Link
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