CN117388789A - Full-decompression detection chip and detection device for electric energy meter - Google Patents
Full-decompression detection chip and detection device for electric energy meter Download PDFInfo
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/04—Testing or calibrating of apparatus covered by the other groups of this subclass of instruments for measuring time integral of power or current
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The application relates to the electric energy meter detection field, discloses an electric energy meter full decompression detection chip and detection device, include: an ADC sampling interface, a register circuit and a calculation circuit; the ADC sampling interface is connected with a three-phase circuit to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit to be tested, and the sampling electric signal is stored in the register circuit; the computing circuit is connected with the register circuit; according to the ADC sampling interface, the sampling electric signals are directly written into the register, the calculation circuit directly reads data from the register circuit, a communication link is not required to be used for transmitting the data, and the energy consumption of the full-voltage-loss detection circuit is reduced. Meanwhile, the computing circuit and the ADC sampling interface are arranged in the same chip, and the computing circuit and the ADC sampling interface share a power supply loop, so that errors in the data transmission process caused by the fact that any circuit is turned off due to insufficient output power of a battery are prevented. Thereby improving the accuracy and reliability of the full voltage loss detection of the electric energy meter.
Description
Technical Field
The application relates to the field of electric energy meter detection, in particular to an electric energy meter full-voltage-loss detection chip and a detection device.
Background
In the working process of the electric energy meter, when the voltage of the three-phase power supply circuit is lower, the normal working of the electric energy meter can be influenced, the counting is inaccurate, and even the electric energy meter is damaged. Therefore, the power supply condition of the electric energy meter needs to be detected at any time, and the full voltage loss condition of the electric energy meter needs to be detected and recorded.
The total voltage loss of the electric energy meter means the working condition that the voltages of the three-phase power supply circuit are lower than the critical voltage of the electric energy meter, and the load current in the power supply circuit is greater than 5% of rated current, and when the total voltage loss occurs, the voltage, current, power and power factor values of all phases at the occurrence time and the end time of the total voltage loss disclosure need to be recorded. In the prior art, after an ammeter enters a low power consumption state for a period of time, a power failure meter reading battery is adopted to supply power to start a hard metering chip to detect voltage signals and current signals, and data acquired by the hard metering chip is sent to a main chip through an SPI communication link or a UART communication link so that the main chip can judge whether the ammeter enters the full voltage loss state.
Fig. 1 is a structural diagram of a full-voltage-loss detection device of an existing electric energy meter, as shown in fig. 1, a hard metering chip is connected with three power supply lines (shown by a dotted line box in fig. 1) of a three-phase circuit, in the scheme, a main chip and the hard metering chip are required to work cooperatively, a communication link is required to be opened, the power consumption of the two chips in the process is large, and the output power of a power failure meter reading battery may not meet the system power consumption. Meanwhile, because the reset voltages of different chips are different, when data are sent through a communication link, two chips are awakened simultaneously, the instantaneous power in a circuit is increased, the chip with higher reset voltage can be reset, the transmitted data are wrong, the normal operation of a system is affected, and the full voltage loss detection accuracy of the electric energy meter is reduced.
Therefore, how to provide a full-voltage-loss detection device for an electric energy meter so as to more accurately and reliably detect whether the electric energy meter is subjected to full voltage loss is a problem to be solved by those skilled in the art.
Disclosure of Invention
The purpose of this application is in order to solve among the prior art and need main chip and hard measurement chip to cooperate the in-process that detects the full decompression operating mode of electric energy meter because the power failure meter reading battery output is not enough leads to detecting the problem that the accuracy reduces, consequently, this application provides a full decompression of electric energy meter detects chip and detection device to improve the accuracy and the reliability of detection.
In order to solve the technical problem, the application provides an electric energy meter full decompression detection chip, include:
an ADC sampling interface, a register circuit and a calculation circuit;
the ADC sampling interface is connected with a three-phase circuit to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit to be tested, and the sampling electric signal is stored in the register circuit;
the computing circuit is connected with the register circuit to acquire the sampling electric signals in the register circuit, and determines the voltage value and the current value of the three-phase circuit to be tested according to the sampling electric signals;
the computing circuit is also used for judging whether the voltage value and the current value of the three-phase circuit to be tested meet preset conditions or not;
and if the preset condition is met, determining that the electric energy meter is in a full-decompression state.
Preferably, the process of writing the sampled electrical signal into the register circuit by the ADC sampling interface includes:
the ADC sampling interface is used for acquiring the data type and the data length of the sampled electrical signal;
the ADC sampling interface is also used for determining a target register address according to the data type and the data length and writing the sampling electric signal into the register circuit according to the target register address.
Preferably, the process of obtaining the sampled electrical signal in the register circuit by the computing circuit includes:
when the computing circuit detects that the working state of the register circuit meets a preset condition, acquiring the target register address corresponding to the sampling electric signal, and reading data in the target register address.
Preferably, before the calculating circuit determines the voltage value and the current value of the three-phase circuit to be tested according to the sampling electric signal, the calculating circuit is further used for controlling the ADC sampling interface to be closed.
Preferably, the process of determining, by the computing circuit, whether the voltage value and the current value of the three-phase circuit to be tested meet the preset conditions includes:
the calculation circuit judges whether the voltage value of the three-phase circuit to be detected is smaller than the voltage threshold of the electric energy meter, and the current value of the three-phase circuit to be detected is larger than the current threshold.
In order to solve the technical problem, the application also provides a full voltage loss detection device of the electric energy meter, which comprises the full voltage loss detection chip of the electric energy meter.
Preferably, the method further comprises: an alarm circuit;
the alarm circuit is connected with the full-voltage-loss detection chip of the electric energy meter so as to acquire alarm information and send an alarm; the alarm information is information generated when the electric energy meter full-voltage-loss detection chip detects that the electric energy meter is in the full-voltage-loss state.
Preferably, the method further comprises: a voltage detection unit;
the input end of the voltage detection unit is connected with the three-phase circuit to be detected to obtain a voltage detection value, judge whether the voltage detection value is smaller than a voltage threshold of the electric energy meter, and generate a starting instruction if the voltage detection value is smaller than the voltage threshold of the electric energy meter;
the output end of the voltage detection unit is connected with the electric energy meter full-voltage-loss detection chip, so that the starting instruction is sent to the electric energy meter full-voltage-loss detection chip to judge whether the electric energy meter is in a full-voltage-loss state or not.
Preferably, the method further comprises: starting a timing unit;
the input end of the starting timing unit is connected with the voltage detection unit so as to acquire the starting instruction;
the starting timing unit is used for judging whether the voltage detection values in the detection period are smaller than the voltage threshold value of the electric energy meter after the starting instruction is acquired; and if the voltage thresholds are smaller than the voltage threshold of the electric energy meter, controlling the starting of the full-voltage-loss detection chip of the electric energy meter.
Preferably, the alarm circuit comprises a buzzer and an indicator lamp.
The application provides a full decompression detection chip of electric energy meter, include: an ADC sampling interface, a register circuit and a calculation circuit; the ADC sampling interface is connected with a three-phase circuit to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit to be tested, and the sampling electric signal is stored in the register circuit; the computing circuit is connected with the register circuit to acquire a sampling electric signal, and determines a voltage value and a current value of the three-phase circuit to be tested according to the sampling electric signal; the computing circuit is also used for judging whether the voltage value and the current value of the three-phase circuit to be tested meet preset conditions or not; if the preset condition is met, the electric energy meter is determined to be in a full-decompression state. Therefore, in the technical scheme provided by the application, the ADC sampling interface directly writes the sampling electric signals into the register, and the calculation circuit directly reads data from the register circuit, so that a communication link is not required to be used for transmitting the data, and the energy consumption of the full-voltage-loss detection circuit is reduced. Meanwhile, the computing circuit and the ADC sampling interface are arranged in the same chip, and the computing circuit and the ADC sampling interface share a power supply loop, so that errors in the data transmission process caused by the fact that any circuit is turned off due to insufficient output power of a battery are prevented. Thereby improving the accuracy and reliability of the full voltage loss detection of the electric energy meter.
In addition, the application also provides a full decompression detection device of electric energy meter, including above-mentioned full decompression detection chip of electric energy meter, the effect is the same above.
Drawings
For a clearer description of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a full-voltage-loss detection device of a conventional electric energy meter;
fig. 2 is a structural diagram of an electric energy meter full-voltage-loss detection chip provided in an embodiment of the present application;
the reference numerals are as follows: the circuit comprises an ADC sampling interface 1, a register circuit 2, a calculation circuit 3, an electric energy meter full-voltage-loss detection chip 4, a main chip 5, a hard metering chip 6, a communication link 7 and a three-phase circuit to be tested 8.
Detailed Description
The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments herein without making any inventive effort are intended to fall within the scope of the present application.
The core of the application is to provide a full voltage loss detection chip and a detection device of the electric energy meter so as to improve the accuracy and reliability of the full voltage loss detection result of the electric energy meter.
The total voltage loss of the electric energy meter refers to the working condition that if the three-phase voltage of the electric energy meter is lower than the critical voltage of the electric energy meter and any phase or multiphase load current is greater than 5% of rated current and the duration is greater than 60s in the three-phase power supply system. The existing low-power-consumption full-voltage-loss detection method is that when the low power consumption is 60 th seconds, a main chip 5 wakes up and wakes up a hard metering chip 6 autonomously, the hard metering chip 6 samples the phase line voltage and current, the main chip 5 acquires the phase line voltage and current data sampled by the hard metering chip 6 through a communication link 7 such as an SPI or a UART, and whether a full-voltage-loss event occurs or not is judged and recorded by using the data. But waking up the main chip 5, the hard meter chip 6 and the communication link 7 at the same time will result in a large total power consumption in the circuit, which may result in a reset of the hard meter chip 6 or the main chip 5 when the battery power is insufficient. If only one chip is reset, errors may occur in the voltage and current data transmission process, so that the main chip 5 may have errors in judging the full voltage loss event. In order to solve this technical problem, this application provides a full decompression detection chip of electric energy meter, include: an Analog-to-digital converter (ADC) sampling interface, a register circuit 2, and a calculation circuit 3; the ADC sampling interface 1 is connected with a three-phase circuit 8 to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit 8 to be tested, and the sampling electric signal is stored in the register circuit 2; the computing circuit 3 is connected with the register circuit 2 to acquire a sampling electric signal, and determines a voltage value and a current value of the three-phase circuit 8 to be tested according to the sampling electric signal; the calculating circuit 3 is further used for judging whether the voltage value and the current value of the three-phase circuit 8 to be tested meet preset conditions; if the preset condition is met, the electric energy meter is determined to be in a full-decompression state. Therefore, in the technical scheme provided by the application, the ADC sampling interface 1 directly writes the sampling electric signals into the register, the calculation circuit 3 directly reads data from the register circuit 2, a communication link is not required to be used for transmitting the data, and the energy consumption of the full-voltage-loss detection circuit is reduced. Meanwhile, the computing circuit 3 and the ADC sampling interface 1 are arranged in the same chip, and share a power supply loop, so that errors in the data transmission process caused by the fact that any circuit is turned off due to insufficient output power of a battery are prevented. Thereby improving the accuracy and reliability of the full voltage loss detection of the electric energy meter.
In order to provide a better understanding of the present application, those skilled in the art will now make further details of the present application with reference to the drawings and detailed description.
Fig. 2 is a block diagram of a full voltage loss detection chip of an electric energy meter, provided in an embodiment of the present application, as shown in fig. 2, the full voltage loss detection chip of an electric energy meter provided in the present application includes: an ADC sampling interface 1, a register circuit 2 and a calculation circuit 3; the ADC sampling interface 1 is connected with a three-phase circuit 8 to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit 8 to be tested, and the sampling electric signal is stored in the register circuit 2; the computing circuit 3 is connected with the register circuit 2 to acquire a sampling electric signal, and determines a voltage value and a current value of the three-phase circuit 8 to be tested according to the sampling electric signal; the calculating circuit 3 is further used for judging whether the voltage value and the current value of the three-phase circuit 8 to be tested meet preset conditions; if the preset condition is met, the electric energy meter is determined to be in a full-decompression state.
It should be noted that, the full voltage loss detection chip of the electric energy meter provided in this embodiment includes, besides the above-mentioned ADC sampling interface 1, the register circuit 2 and the calculating circuit 3, circuits necessary for ensuring the normal operation of the chip, such as a power circuit and a crystal oscillator circuit, where only the ADC sampling interface 1, the register circuit 2 and the calculating circuit 3 are emphasized, and the kinds and circuit structures of other circuits are not described again.
In a specific implementation, the ADC sampling circuit is generally composed of an ADC module, a sample-and-hold circuit, a digital signal processing circuit, and the like. The ADC module is responsible for converting the analog signal into a digital signal, the sample hold circuit is used for maintaining the stability of the signal in the sampling process, and the digital signal processing circuit is used for further processing and analyzing the digital signal. In an ADC sampling circuit, a sample-and-hold circuit is one of the key parts. It generally consists of a sampling switch for coupling the signal to the holding capacitor at the sampling instant and a holding capacitor for holding the signal steady during sampling. In addition, the ADC sampling circuit also needs to consider the problem of clock signal synchronization. The clock signal is the basis of ADC sampling and if the clock signal is not stable or synchronous, it may lead to inaccuracy in the sampling result. Therefore, in the ADC sampling circuit, a stable clock source needs to be employed, and synchronization of clock signals between different modules is ensured. In this embodiment, the ADC sampling interface 1 is connected to a three-phase power supply circuit of the electric energy meter to be measured, so as to collect an electrical signal of the three-phase power supply circuit.
The register circuit 2 is a basic block of a digital logic circuit for temporarily storing binary data or codes. The register circuit 2 is constituted by flip-flops and combinational logic circuits. In the register circuit 2, data is stored in flip-flops, each of which may store one bit of binary data. The combinational logic circuit is used for realizing the functions of data input, output and shift. The flip-flops in the register circuit 2 may be classified into types of D flip-flops, JK flip-flops, T flip-flops, and the like, according to the connection manner of the flip-flops. The register circuit 2 is almost ubiquitous in various digital circuit systems, and is used for data transfer, buffering, and shifting operations, and the like. The input and output of the register circuit 2 may be a single data or a sequence of data and the shift operation may be a shift to the left or right. In the present embodiment, the register circuit 2 is used to store the sampled electrical signal acquired by the ADC sampling interface 1, so as to be read by the computing circuit 3.
The calculation circuit 3 is a circuit for realizing a chip calculation function, and is generally composed of a logic gate, a register, a timing control circuit, and the like, and in this embodiment, the calculation circuit 3 acquires a sampling electric signal by reading the register circuit 2, and judges whether or not a full voltage loss time occurs based on the sampling electric signal.
In the technical scheme provided by the application, the data transmission between the computing circuit 3 and the ADC sampling circuit is realized through the register circuit 2, and a communication link is not required to be established between the computing circuit 3 and the ADC sampling circuit, so that the power consumption of a chip is reduced.
Furthermore, in the working process of the full-voltage-loss detection chip of the electric energy meter, the ADC sampling interface 1 is required to work to collect the electric signals, and the electric signals are stored in the register circuit 2. Subsequently, the calculation circuit 3 reads the electric signal from the register circuit 2 to determine the operation state of the electric energy meter. It can be seen that, during the calculation process of the calculation circuit 3, the ADC sampling interface 1 has completed sampling work and is in an idle state, so that the ADC sampling interface 1 can be turned off to further reduce the chip power consumption.
In an implementation, the ADC sampling interface 1 is connected to a three-phase circuit 8 to be tested (as shown by the dashed box in fig. 2). The ADC sampling interface can be directly connected with the three-phase circuit 8 to be tested to obtain a sampling electric signal; the sampled electrical signal may be obtained by a non-contact sensor such as a hall sensor, which is not limited herein.
The embodiment provides an electric energy meter full-decompression detection chip, including: an ADC sampling interface, a register circuit and a calculation circuit; the ADC sampling interface is connected with a three-phase circuit 8 to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit 8 to be tested, and the sampling electric signal is stored in the register circuit; the computing circuit is connected with the register circuit to acquire a sampling electric signal and determine the voltage value and the current value of the three-phase circuit 8 to be tested according to the sampling electric signal; the computing circuit is also used for judging whether the voltage value and the current value of the three-phase circuit 8 to be tested meet preset conditions or not; if the preset condition is met, the electric energy meter is determined to be in a full-decompression state. Therefore, in the technical scheme provided by the application, the ADC sampling interface directly writes the sampling electric signals into the register, and the calculation circuit directly reads data from the register circuit, so that a communication link is not required to be used for transmitting the data, and the energy consumption of the full-voltage-loss detection circuit is reduced. Meanwhile, the computing circuit and the ADC sampling interface are arranged in the same chip, and the computing circuit and the ADC sampling interface share a power supply loop, so that errors in the data transmission process caused by the fact that any circuit is turned off due to insufficient output power of a battery are prevented. Thereby improving the accuracy and reliability of the full voltage loss detection of the electric energy meter.
In an implementation, the ADC sampling interface 1 writes the sampled electrical signal to the register circuit 2 comprises: acquiring the data type and the data length of the sampled electrical signal; determining a target register address according to the data type and the data length; the sampled electrical signal is written into the register circuit 2 according to the target register address.
The target register address may be a randomly allocated address, or an address allocated according to a predetermined rule, which is not limited herein. For example: all data can be written from front to back, or can be written in a form of a queue.
Accordingly, when the calculation circuit 3 determines whether there is a full-loss-of-voltage event based on the sampled electrical signal, the calculation circuit 3 obtains the sampled electrical signal including: when the working state of the register circuit 2 meets the preset condition, acquiring a target register address corresponding to the sampling electric signal; the data in the destination register address is read.
Further, since the power consumption of the chip is limited, the size of the memory space is limited, and when the stored data is too much, the memory space may be insufficient, so after the computing circuit 3 reads the data in the target register address, the read data may be deleted to release the memory space.
It should be noted that, in the working process of the full voltage loss detection chip of the electric energy meter, the ADC sampling interface 1 needs to work to collect the electric signal, and then the computing circuit 3 reads the electric signal from the register circuit 2 to determine the working state of the electric energy meter. When the calculation circuit 3 calculates, the ADC sampling interface 1 is already in an idle state, and before the step of determining the voltage value and the current value of the three-phase circuit 8 to be measured according to the sampled electrical signal, the calculation circuit 3 is further used for controlling the ADC sampling interface 1 to be turned off in order to further reduce the chip power consumption.
In a specific implementation, the determining, by the computing circuit 3, whether the voltage value and the current value of the three-phase circuit 8 to be tested meet the preset conditions includes: and judging whether the voltage value of the three-phase circuit 8 to be tested is smaller than the voltage threshold value of the electric energy meter, and judging whether the current value of the three-phase circuit 8 to be tested is larger than the current threshold value.
In addition, the application also provides a full voltage loss detection device of the electric energy meter, which comprises the full voltage loss detection chip of the electric energy meter.
The full-voltage-loss detection device for the electric energy meter comprises an alarm circuit, a voltage detection circuit and the like besides the full-voltage-loss detection chip for the electric energy meter. The alarm circuit is used for sending alarm information to a manager when the electric energy meter is determined to be in a full-voltage-loss state, so that timely maintenance is facilitated. The voltage detection circuit is used for judging whether the electric energy meter is in a low-power consumption state in a detection period.
The embodiment provides a full decompression detection device of electric energy meter, including above-mentioned full decompression detection chip of electric energy meter, this chip includes: an ADC sampling interface, a register circuit and a calculation circuit; the ADC sampling interface is connected with a three-phase circuit to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit to be tested, and the sampling electric signal is stored in the register circuit; the computing circuit is connected with the register circuit to acquire a sampling electric signal, and determines a voltage value and a current value of the three-phase circuit to be tested according to the sampling electric signal; the computing circuit is also used for judging whether the voltage value and the current value of the three-phase circuit to be tested meet preset conditions or not; if the preset condition is met, the electric energy meter is determined to be in a full-decompression state. Therefore, in the technical scheme provided by the application, the ADC sampling interface directly writes the sampling electric signals into the register, and the calculation circuit directly reads data from the register circuit, so that a communication link is not required to be used for transmitting the data, and the energy consumption of the full-voltage-loss detection circuit is reduced. Meanwhile, the computing circuit and the ADC sampling interface are arranged in the same chip, and the computing circuit and the ADC sampling interface share a power supply loop, so that errors in the data transmission process caused by the fact that any circuit is turned off due to insufficient output power of a battery are prevented. Thereby improving the accuracy and reliability of the full voltage loss detection of the electric energy meter.
On the basis of the above embodiment, the full voltage loss detection device for an electric energy meter further includes: an alarm circuit; the alarm circuit is connected with the full-voltage-loss detection chip of the electric energy meter so as to acquire alarm information and send an alarm; the alarm information is information generated when the electric energy meter full-voltage-loss detection chip detects that the electric energy meter is in a full-voltage-loss state.
Further, the alarm circuit comprises a buzzer and an indicator lamp. When the electric energy meter full-decompression detection chip detects that the electric energy meter is in a full-decompression state, the buzzer is controlled to give out alarm sounds, and the indicator lamp is controlled to flash, so that management staff is reminded of timely maintenance.
In specific implementation, the total voltage loss of the electric energy meter means that the voltages of three-phase power supply circuits of the electric energy meter are lower than the critical voltage of the electric energy meter, and the load current in the power supply circuits is greater than 5% of the rated current, so as to prevent misjudgment of a detection chip caused by voltage fluctuation, and generally, the voltages of the power supply circuits are required to be ensured to be lower than the critical voltage of the electric energy meter in a detection period.
In order to solve this technical problem, on the basis of the above embodiment, the electric energy meter total voltage loss detection device further includes: a voltage detection unit and a start timing unit; the input end of the voltage detection unit is connected with the three-phase circuit 8 to be detected to obtain a voltage detection value, judge whether the voltage detection value is smaller than a voltage threshold of the electric energy meter, and generate a starting instruction if the voltage detection value is smaller than the voltage threshold of the electric energy meter; the output end of the voltage detection unit is connected with the electric energy meter full-voltage-loss detection chip, so that a starting instruction is sent to the electric energy meter full-voltage-loss detection chip to judge whether the electric energy meter is in a full-voltage-loss state or not.
The input end of the starting timing unit is connected with the voltage detection unit to acquire a starting instruction; the starting timing unit is used for judging whether the voltage detection values in the detection period are smaller than the voltage threshold value of the electric energy meter after the starting instruction is acquired; and if the voltage values are smaller than the voltage threshold value of the electric energy meter, controlling the starting of the full-voltage-loss detection chip of the electric energy meter.
In specific implementation, when the voltage detection value of the electric energy meter is detected to be smaller than the voltage threshold value of the electric energy meter, the starting timing unit is controlled to start timing, and if the voltage detection value is larger than the voltage threshold value of the electric energy meter in the detection period, the timer of the starting timing unit is controlled to be set to zero. If the voltage threshold value of the electric energy meter is always smaller than the voltage threshold value of the electric energy meter in the detection period, the electric energy meter full-voltage-loss detection chip is awakened when the detection period is ended, so that whether the electric energy meter is in a full-voltage-loss state is determined.
The full-voltage-loss detection chip and the detection device for the electric energy meter are described in detail. In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section. It should be noted that it would be obvious to those skilled in the art that various improvements and modifications can be made to the present application without departing from the principles of the present application, and such improvements and modifications fall within the scope of the claims of the present application.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. The utility model provides an electric energy meter full decompression detects chip which characterized in that includes:
an ADC sampling interface (1), a register circuit (2) and a calculating circuit (3);
the ADC sampling interface (1) is connected with a three-phase circuit (8) to be tested of the electric energy meter so as to acquire a sampling electric signal of the three-phase circuit (8) to be tested, and the sampling electric signal is stored in the register circuit (2);
the computing circuit (3) is connected with the register circuit (2) to acquire the sampling electric signal in the register circuit (2) and determine the voltage value and the current value of the three-phase circuit (8) to be tested according to the sampling electric signal;
the computing circuit (3) is also used for judging whether the voltage value and the current value of the three-phase circuit (8) to be tested meet preset conditions or not;
and if the preset condition is met, determining that the electric energy meter is in a full-decompression state.
2. The electric energy meter full voltage loss detection chip according to claim 1, wherein the process of writing the sampled electrical signal into the register circuit (2) by the ADC sampling interface (1) comprises:
the ADC sampling interface (1) is used for acquiring the data type and the data length of the sampled electrical signal;
the ADC sampling interface (1) is also used for determining a target register address according to the data type and the data length, and writing the sampling electric signal into the register circuit (2) according to the target register address.
3. The electric energy meter full voltage loss detection chip according to claim 2, wherein the process of acquiring the sampled electrical signal in the register circuit (2) by the computing circuit (3) comprises:
when the computing circuit (3) detects that the working state of the register circuit (2) meets a preset condition, acquiring the target register address corresponding to the sampling electric signal, and reading data in the target register address.
4. The full-voltage-loss detection chip of the electric energy meter according to claim 1, wherein before the calculation circuit (3) determines the voltage value and the current value of the three-phase circuit (8) to be detected according to the sampled electric signal, the calculation circuit (3) is further configured to control the ADC sampling interface (1) to be turned off.
5. The full-voltage-loss detection chip of the electric energy meter according to claim 1, wherein the process of the computing circuit (3) judging whether the voltage value and the current value of the three-phase circuit (8) to be detected meet the preset condition comprises:
the calculating circuit (3) judges whether the voltage value of the three-phase circuit (8) to be detected is smaller than the voltage threshold of the electric energy meter, and the current value of the three-phase circuit (8) to be detected is larger than the current threshold.
6. An electric energy meter full-voltage-loss detection device, which is characterized by comprising the electric energy meter full-voltage-loss detection chip according to any one of claims 1 to 5.
7. The electrical energy meter full-voltage loss detection device of claim 6, further comprising: an alarm circuit;
the alarm circuit is connected with the full-voltage-loss detection chip of the electric energy meter so as to acquire alarm information and send an alarm; the alarm information is generated when the electric energy meter full-voltage-loss detection chip detects that the electric energy meter is in a full-voltage-loss state.
8. The electrical energy meter full-voltage loss detection device of claim 6, further comprising: a voltage detection unit;
the input end of the voltage detection unit is connected with the three-phase circuit (8) to be detected to obtain a voltage detection value, judge whether the voltage detection value is smaller than a voltage threshold of the electric energy meter, and generate a starting instruction if the voltage detection value is smaller than the voltage threshold of the electric energy meter;
the output end of the voltage detection unit is connected with the electric energy meter full-voltage-loss detection chip, so that the starting instruction is sent to the electric energy meter full-voltage-loss detection chip to judge whether the electric energy meter is in a full-voltage-loss state or not.
9. The electrical energy meter full-voltage loss detection device of claim 8, further comprising: starting a timing unit;
the input end of the starting timing unit is connected with the voltage detection unit so as to acquire the starting instruction;
the starting timing unit is used for judging whether the voltage detection values in the detection period are smaller than the voltage threshold value of the electric energy meter after the starting instruction is acquired; and if the voltage thresholds are smaller than the voltage threshold of the electric energy meter, controlling the starting of the full-voltage-loss detection chip of the electric energy meter.
10. The full-voltage loss detection device of the electric energy meter according to claim 7, wherein the alarm circuit comprises a buzzer and an indicator lamp.
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| CN202311703489.4A CN117388789A (en) | 2023-12-13 | 2023-12-13 | Full-decompression detection chip and detection device for electric energy meter |
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| CN202311703489.4A CN117388789A (en) | 2023-12-13 | 2023-12-13 | Full-decompression detection chip and detection device for electric energy meter |
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| CN101387663A (en) * | 2007-10-08 | 2009-03-18 | 杭州利尔达科技有限公司 | Ultra low power consumption full-decompression measuring set and measurement method |
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