CN113933739A - Direct current fault recording device and fault recording method - Google Patents
Direct current fault recording device and fault recording method Download PDFInfo
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Abstract
The invention belongs to the technical field of direct-current power supply fault analysis, and particularly relates to a direct-current fault recording device and a fault recording method. The invention provides a direct current fault recording device and a fault recording method based on the fault recording requirements of a direct current power supply, an integrated power supply system and a lithium battery energy storage system for the key information quantity of a direct current side, which are different from the information quantity and configuration requirements of a traditional power system dynamic recording device, and have the technical advantages of less configuration paths of analog quantity and switching quantity, high cost control requirement, low cost and small volume.
Description
Technical Field
The invention belongs to the technical field of direct-current power supply fault analysis, and particularly relates to a direct-current fault recording device and a fault recording method.
Background
The traditional fault recording device is mainly used for recording faults of key information quantities such as alternating voltage, current and the like of an automatic control and management system of a power system, is used for dynamically recording data before and after power grid disturbance, and is a main basis for analyzing and positioning power grid faults. The common mode is that the acquisition unit and an industrial personal computer provided with a hard disk are integrated, and even the acquisition unit and a wave recording work station are combined. The networking mode is complicated, the requirement on the number of functional configuration paths is high, the cost is high, and the size is large.
The requirements on the application reliability and safety of an electric power system and a lithium battery pack are stricter day by day, and the current technical field of a direct-current power supply for electric power, an integrated power supply system and a lithium battery energy storage system has the fault recording requirement on some key information quantity on the direct-current side for analyzing and positioning faults; based on the characteristics of key information quantity and the difference of the number of roads, the traditional fault recording device cannot meet the requirements of cost and volume of the application occasions.
Disclosure of Invention
In view of this, the invention provides a dc fault recording device and a fault recording method based on the fault recording requirements of the dc power supply for electric power, the integrated power system and the lithium battery energy storage system for the key information volume of the dc side, which are different from the information volume and configuration requirements of the conventional dynamic recording device for the electric power system, and have the technical advantages of less configuration paths of analog quantity and switching quantity, high cost control requirements, low cost and small volume.
In order to achieve the technical purpose, the invention adopts the following specific technical scheme:
a direct current fault recorder comprises an acquisition circuit, a control circuit, an HMI display circuit, a time synchronization circuit and a data storage circuit;
the acquisition circuit is in communication connection with the control circuit and is used for isolating and carrying out operational amplification processing on detection signals of telemetering and telesignaling information of analog quantity and switching quantity and converting the detection signals into adaptive class voltage acquired by AD (analog-to-digital);
the time setting circuit is in communication connection with the control circuit and is used for periodically receiving a time setting signal of the upper computer and calibrating the local clock circuit at any time;
the control circuit is used for acquiring the output signal acquired by the AD, processing the telemetering and remote signaling information based on the judgment parameter, judging the telemetering and remote signaling information to be a storage type of continuous recording or a storage type of trigger recording, and carrying out periodic time synchronization based on the time synchronization circuit;
the HMI display is in communication connection with the control circuit, is configured with a human-computer interaction interface and is used for displaying data information of fault recording;
the data storage circuit comprises MRAM and SRAM communicatively coupled to the control circuit; the MRAM is used for saving the judgment parameter; the SRAM is connected with the control circuit through a parallel interface and is used for expanding the cache space of the control circuit.
Further, the detection signal is a hall signal or a transmitter signal.
Further, the control circuit is an ARM or DSP processor and a peripheral circuit.
Further, the determination parameter includes a variable start determination value and an out-of-limit start determination value.
Further, the AD acquisition is provided on the acquisition circuit or the control circuit.
Further, the HMI is displayed as an industrial configuration display screen.
Furthermore, the HMI display is also used for storage and file processing of the fault recording, and is provided with a USB interface for exporting the fault recording file.
Further, the MRAM is further configured to open a storage list based on matching between the occupied memory of the trigger data of the determination parameter and the sending rate, store the sequence number of the trigger record, the buffer start address pointer, and the buffer end address pointer, and cache and send the number of the determination parameter, thereby controlling the buffering and sending timing sequence of the determination parameter.
Further, the fault recording device further comprises a power manager; the power supply manager is connected with the control circuit and used for providing power supply for the control circuit.
Further, the invention also provides a fault recording method based on the direct current fault recording device, which is characterized by comprising the following steps:
s101: on the basis of the time synchronization circuit, the control circuit completes periodic time synchronization, and the consistency of the local time of the fault recording device and the time of an upper computer is ensured;
s102: finishing information acquisition of the analog quantity and the switching value based on the acquisition circuit;
s103: based on the requirement of an application occasion, caching the Ta time period of the trigger data, calculating the size of a storage space according to the configuration number and the time period length of the analog quantity and the switching value, and further confirming that the SRAM is used in the cache address interval of the Ta time period;
judging whether a starting condition for triggering recording is met in real time within a Ta time period; the starting condition satisfaction comprises out-of-limit starting value satisfaction and mutation starting value satisfaction; comparing and judging the data acquired in the step 2) with out-of-limit and mutation judgment parameters stored in an MRAM (magnetic random access memory) to determine whether information meets the starting condition of triggering record, and if not, circularly covering and storing in a cache in a Ta time period; if the starting condition is met, recording the current time node, recording the current position pointer and the serial number of the SRAM to the MRAM, and triggering the data cache of the Tb time period;
s104: after the Tb time period is entered, confirming the time length used for the Tb time period, calculating the size of a storage space according to the specific configuration number of the analog quantity and the switching value, the time period length and the storage requirement of multiple continuous triggers, and confirming the buffer address interval of the SRAM used for the Tb time period;
whether continuous trigger starting conditions occur is also determined at all times in the Tb time period, if yes, the Tb time period is re-timed until no trigger starting conditions are met and the time length of the Tb time period is counted up, or the buffer space of the Tb time period is counted up; then ending the storage of the Tb period, and recording an ending position pointer of the Tb period into the MRAM;
s105: enabling the control circuit to be in real-time communication with the HMI display through the RJ45, and transmitting the continuous data and the trigger data in the cache to the HMI display circuit;
s106: and after the HMI display receives the continuous data and the trigger data, the HMI display carries out data storage and data file processing, and displays the continuous data and the trigger data according to the data attributes.
By adopting the technical scheme, the invention can bring the following beneficial effects:
the invention is different from the traditional fault recording storage mode, realizes fault recording by combining the functions of display, storage and file processing of an industrial configuration screen through high-frequency acquisition and extended cache, and has the advantages of flexible configuration, low price and small volume.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a block diagram of a dc fault recorder according to an embodiment of the present invention;
fig. 2 is a flowchart of a dc fault recording method according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the disclosure, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. Additionally, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than the number, shape and size of the components in practical implementation, and the type, quantity and proportion of the components in practical implementation can be changed freely, and the layout of the components can be more complicated.
In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.
In an embodiment of the present invention, a dc fault recorder is provided, as shown in fig. 1, including an acquisition circuit, a control circuit, an HMI display, a time synchronization circuit, and a data storage circuit;
the control circuit is an ARM or DSP processor and a peripheral circuit, is a core control part of the fault recording device and is used for completing data acquisition, processing and communication; the acquisition circuit is connected with the analog quantity and the switching value to complete acquisition of telemetering and remote signaling information shown in figure 1, and data processing is carried out based on the judgment parameters to confirm the storage type of the data information, namely continuous recording or triggered recording; the communication bus is communicated with the display HMI to realize the display and storage of data; and periodically time-setting to store the real-time point of the fault;
the HMI display is an industrial configuration display screen, is different from the high cost and the large volume of an industrial personal computer, has low cost and flexible Flash memory configuration, is a human-computer interaction interface of a fault recording module, mainly completes the display, the storage and the file processing of fault recording data, and can be inquired and derived through a USB;
the acquisition circuit is a processing circuit for analog quantity and switching value, namely telemetering and remote signaling information shown in figure 1, and is used for isolating and amplifying the detection signal so as to convert the measured information quantity into a voltage grade acquired and adapted by a subsequent control circuit AD; further, Hall signals or transmitter signals and the like can be accessed; further, when the AD of the control circuit is not adopted, the acquisition circuit also comprises an independent AD acquisition chip which is communicated with the control circuit through the SPI or the IIC to realize acquisition of the acquired information;
the time setting circuit comprises a clock circuit and a time setting receiving circuit and is used for periodically receiving a time setting signal of the upper computer, calibrating the local clock circuit in real time and ensuring the consistency and accuracy of local time and an upper computer system so as to record a time node when a fault occurs;
the data storage circuit comprises an MRAM and an SRAM communicatively connected to the control circuit;
MRAM (nonvolatile magnetic random access memory) circuit, mainly used for keeping analog quantity and switching value trigger the judging parameter recorded, such as sudden change start judging value and off-limit start judging value; further relates to the matching of the memory occupied by the trigger data and the communication sending rate, and a storage list is developed for storing the serial number of the trigger record, the cache starting address pointer, the cache ending address pointer and the serial number of the cache sending trigger record and controlling the cache and sending time sequence of the trigger data; the stored information is not lost when power failure occurs, and the information such as the judgment parameters can be displayed and modified through HMI display;
the SRAM (static random access memory) circuit is based on the configuration requirements, sampling frequency requirements and trigger record requirements of the analog quantity and the switching value, an internal RAM of an ARM (advanced RISC machine) or DSP (digital signal processor) of the control circuit cannot meet the cache requirements, and the SRAM circuit is connected with the control circuit through a parallel interface and used for expanding the available cache space of the control circuit; based on the configuration requirements of the analog quantity and the switching value, the sampling frequency requirements and the trigger recording requirements, dividing the cache space by combining the communication rate to realize the caching of continuous data and trigger data;
the power supply manager is a power supply processing circuit, converts power supply input into low-voltage power supply input matched with the control circuit according to the system grade, and realizes automatic switching with a backup battery and charging management of a back battery through the power supply controller, namely when the power supply input is normal, a subsequent circuit is supplied with power by the power supply input and performs charging management according to the state of the backup battery; when the power input is abnormally powered off, the power controller is automatically switched to a backup battery for supplying power; the purpose of further power backup is to ensure the complete transmission of recording data such as trigger data, continuous data and the like in the cache, so as to ensure the integrity of fault recording information and avoid data loss caused by power failure of the cache;
in this embodiment, a fault recording method based on the dc fault recording apparatus is provided, as shown in fig. 2, including the following steps:
and S101, completing periodic time synchronization based on a time synchronization receiving circuit and a clock circuit to ensure the consistency and accuracy of the local time and an upper computer system.
And S102, combining an acquisition circuit to complete the acquisition of accessed analog quantity and switching quantity, namely the information acquisition of telemetering and telesignaling shown in figure 1. The specific acquisition frequency is subject to the requirements of application occasions.
S103, buffering a Ta time period of the trigger data based on the requirements of application occasions, confirming that the duration of the Ta time period is generally larger than 0.1S according to the requirements, and calculating the size of a storage space according to the specific configuration number and the time period length of the analog quantity and the switching value so as to confirm that the SRAM is used in the buffer address interval of the Ta time period. Judging whether starting conditions for triggering recording are met in real time within a Ta time period, wherein the starting conditions comprise out-of-limit starting and sudden change starting; the specific implementation mode is that the information obtained by the acquisition circuit is compared with out-of-limit and mutation judgment parameters stored in MRAM (magnetic random access memory) to judge whether the information reaches the starting condition of triggering record, and if the starting condition is not met, the information content is stored in a buffer memory in the Ta time period in a circulating covering mode; if the starting condition is met, recording the current time node, recording the current SRAM position pointer and the serial number to the MRAM, and triggering the data cache of the Tb time period.
And S104, after the storage in the Tb time period, similarly, the time length in the Tb time period is confirmed according to the requirement and is generally more than 3S, and the size of the storage space is calculated according to the specific configuration number of the analog quantity and the switching value, the time period length and the storage requirement of multiple continuous triggers so as to confirm the buffer address interval of the SRAM used in the Tb time period. Whether continuous trigger starting conditions occur is also determined at all times in the Tb time period, if yes, the Tb time period is re-timed until no trigger starting conditions are met and the time length of the Tb time period is counted; or the buffer space of the Tb period is counted up, the storage of the Tb period is finished, and the pointer of the end position of the Tb period is recorded in the MRAM.
S105, the synchronous control circuit is in real-time communication with the HMI display through the RJ45 and is used for transmitting the continuous data and the trigger data in the cache to the HMI display circuit for subsequent processing; the continuous data determines a transmission period according to the requirements of application occasions, and the transmission period is generally less than 1 s/time; judging whether trigger data to be sent exist or not by reading the trigger data number which is stored in the MRAM and is sent last time and comparing the trigger data number with the latest trigger data number, so that the trigger data number to be sent is read, and the trigger data position pointers of the corresponding number position in the MRAM are read, wherein the trigger data position pointers comprise the initial position pointer and the end position pointer in the SRAM, and the data content of the corresponding storage address is obtained according to the position pointers of the SRAM and is sent to the HMI display circuit; the communication between the further control circuit and the HMI display circuit is not limited to the form of an RJ45 network, and according to the specific configuration quantity of analog quantity and switching value and the space size of an SRAM, the continuous storage and communication sending coordination work CAN meet the storage requirement that trigger data is not lost, such as RS485 or CAN communication; further, storage intervals corresponding to the Ta and Tb periods of the SRAM may be divided into multiple groups to satisfy coordination between communication delay and buffer space.
S106, after the HMI displays and receives the continuous data and the trigger data, the HMI carries out data storage and data file processing, and displays the continuous data and the trigger data according to the data attribute so as to be convenient for local troubleshooting; furthermore, the data file can be exported according to a specified format through a USB interface so as to be convenient for background viewing and processing. The HMI display circuit, namely the flash space size of the industrial configuration display screen, calculates the minimum capacity according to the specific configuration quantity of the analog quantity and the switching value, the continuous data storage time length and the storage circulation of the trigger data so as to meet the requirements.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A direct current fault recorder is characterized by comprising an acquisition circuit, a control circuit, an HMI display, a time synchronization circuit and a data storage circuit;
the acquisition circuit is in communication connection with the control circuit and is used for isolating and carrying out operational amplification processing on detection signals of telemetering and telesignaling information of analog quantity and switching quantity and converting the detection signals into adaptive class voltage acquired by AD (analog-to-digital);
the time setting circuit is in communication connection with the control circuit and is used for periodically receiving a time setting signal of the upper computer and calibrating the local clock circuit at any time;
the control circuit is used for acquiring the output signal acquired by the AD, processing the telemetering and remote signaling information based on the judgment parameter, judging the telemetering and remote signaling information to be a storage type of continuous recording or a storage type of trigger recording, and carrying out periodic time synchronization based on the time synchronization circuit;
the HMI display is in communication connection with the control circuit, is configured with a human-computer interaction interface and is used for displaying data information of fault recording;
the data storage circuit comprises MRAM and SRAM communicatively coupled to the control circuit; the MRAM is used for saving the judgment parameter; the SRAM is connected with the control circuit through a parallel interface and is used for expanding the cache space of the control circuit.
2. The dc fault recording apparatus of claim 1, wherein: the detection signal is a Hall signal or a transmitter signal.
3. The dc fault recording apparatus of claim 2, wherein: the control circuit is an ARM or DSP processor and a peripheral circuit.
4. The dc fault recording apparatus of claim 1, wherein: the decision parameters include a variable start decision value and an out-of-limit start decision value.
5. The dc fault recording apparatus of claim 1, wherein: the AD acquisition is arranged on the acquisition circuit or the control circuit.
6. The dc fault recording apparatus of claim 1, wherein: the HMI is displayed as an industrial configuration display screen.
7. The dc fault recording apparatus of claim 6, wherein: the HMI display is also used for storing and processing the fault recording files, and is provided with a USB interface for exporting the fault recording files.
8. The dc fault recording apparatus of claim 1, wherein: the MRAM is also used for opening up a storage list based on the matching of the occupied memory and the sending rate of the trigger data of the judgment parameters, storing the serial number of the trigger record, the cache starting address pointer and the cache ending address pointer, caching and sending the serial number of the judgment parameters, and further controlling the cache and sending time sequence of the judgment parameters.
9. The dc fault recording apparatus of claim 1, wherein: the fault recording device also comprises a power supply manager; the power supply manager is connected with the control circuit and used for providing power supply for the control circuit.
10. A fault recording method of a dc fault recording apparatus according to any one of claims 1 to 9, comprising the steps of:
s101: on the basis of the time synchronization circuit, the control circuit completes periodic time synchronization, and the consistency of the local time of the fault recording device and the time of an upper computer is ensured;
s102: finishing information acquisition of the analog quantity and the switching value based on the acquisition circuit;
s103: based on the requirement of an application occasion, caching the Ta time period of the trigger data, calculating the size of a storage space according to the configuration number and the time period length of the analog quantity and the switching value, and further confirming that the SRAM is used in the cache address interval of the Ta time period;
judging whether a starting condition for triggering recording is met in real time within a Ta time period; the starting condition satisfaction comprises out-of-limit starting value satisfaction and mutation starting value satisfaction; comparing and judging the data acquired in the step 2) with out-of-limit and mutation judgment parameters stored in an MRAM (magnetic random access memory) to determine whether information meets the starting condition of triggering record, and if not, circularly covering and storing in a cache in a Ta time period; if the starting condition is met, recording the current time node, recording the current position pointer and the serial number of the SRAM to the MRAM, and triggering the data cache of the Tb time period;
s104: after the Tb time period is entered, confirming the time length used for the Tb time period, calculating the size of a storage space according to the specific configuration number of the analog quantity and the switching value, the time period length and the storage requirement of multiple continuous triggers, and confirming the buffer address interval of the SRAM used for the Tb time period;
whether continuous trigger starting conditions occur is also determined at all times in the Tb time period, if yes, the Tb time period is re-timed until no trigger starting conditions are met and the time length of the Tb time period is counted up, or the buffer space of the Tb time period is counted up; then ending the storage of the Tb period, and recording an ending position pointer of the Tb period into the MRAM;
s105: enabling the control circuit to be in real-time communication with the HMI display through the RJ45, and transmitting the continuous data and the trigger data in the cache to the HMI display circuit;
s106: and after the HMI display receives the continuous data and the trigger data, the HMI display carries out data storage and data file processing, and displays the continuous data and the trigger data according to the data attributes.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114915033A (en) * | 2022-06-15 | 2022-08-16 | 苏州云能魔方能源科技有限公司 | Large-scale energy storage power station black box system based on cloud edge cooperation |
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Non-Patent Citations (1)
| Title |
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| 胡志坤;林勇;安庆;桂卫华;何多昌;: "电力电子装置故障录波器设计", 计算机测量与控制, no. 02, pages 3 - 5 * |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114915033A (en) * | 2022-06-15 | 2022-08-16 | 苏州云能魔方能源科技有限公司 | Large-scale energy storage power station black box system based on cloud edge cooperation |
| CN114915033B (en) * | 2022-06-15 | 2023-12-15 | 苏州云能魔方能源科技有限公司 | Large-scale energy storage power station black box system based on cloud edge cooperation |
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