CN117374064A - Target substrate with micro semiconductor structure - Google Patents
Target substrate with micro semiconductor structure Download PDFInfo
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- CN117374064A CN117374064A CN202311152954.XA CN202311152954A CN117374064A CN 117374064 A CN117374064 A CN 117374064A CN 202311152954 A CN202311152954 A CN 202311152954A CN 117374064 A CN117374064 A CN 117374064A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 188
- 239000000758 substrate Substances 0.000 title claims abstract description 140
- 230000005496 eutectics Effects 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims description 59
- 239000010409 thin film Substances 0.000 claims description 21
- 238000012546 transfer Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 229920000642 polymer Polymers 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 12
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 239000012790 adhesive layer Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 239000013078 crystal Substances 0.000 description 4
- 239000011265 semifinished product Substances 0.000 description 4
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000000813 microcontact printing Methods 0.000 description 2
- -1 polyethylene naphthalates Polymers 0.000 description 2
- 239000002861 polymer material Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
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- 239000004033 plastic Substances 0.000 description 1
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- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
- B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
- B65G47/00—Article or material-handling devices associated with conveyors; Methods employing such devices
- B65G47/74—Feeding, transfer, or discharging devices of particular kinds or types
- B65G47/90—Devices for picking-up and depositing articles or materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/95001—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Wire Bonding (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
The invention provides a target substrate with a micro semiconductor structure. A target substrate with micro semiconductor structure comprises a target substrate, a plurality of micro semiconductor structures and a plurality of micro contact protrusions. The target substrate has a board body and a plurality of conductive parts arranged on the board body. The micro semiconductor structure is graphically arranged on the target substrate; each micro semiconductor structure is provided with a body and at least one electrode arranged on the body; the at least one electrode and the corresponding conductive part on the target substrate are in eutectic bonding; the micro-contact protrusion connects the body of the micro-semiconductor in a pattern to the plate body of the target substrate.
Description
This application is a divisional application of the inventive patent application with application number 201810787206.1.
Technical Field
The present invention relates to a target substrate with a micro semiconductor structure, and more particularly, to a target substrate with a micro semiconductor structure after batch transfer.
Background
Micro light emitting diodes have their technical limitations in mass transfer.
Conventional light emitting diodes (with a side length exceeding 100 μm) are usually formed into arrays of light emitting diode dies after an epitaxial (epi) process, and are transferred onto a carrier substrate by a pick-up head (pick-up head) corresponding to a die. However, as soon as the light emitting diode is brought into micron, it occurs: the side length of the micro light emitting diode crystal grain is relatively small (such as below 100 micrometers or below grade), the size of the selecting head has a miniature lower limit, and the size of the selecting head is larger than the size of the light emitting diode crystal grain, so that the micro light emitting diode crystal grain cannot be effectively picked up; in addition, the miniaturization means that the number of die formed by the same-size wafer will be greatly increased, and the one-to-one pick-up in the conventional process makes the yield of the micro light emitting diode extremely low.
The industry has utilized micro-contact printing (micro contact printing) technology to preset a large number of concave-convex patterns on a polymer material template for corresponding to the micro light emitting diode die to be selected so as to achieve the requirement of transferring to a target substrate in large quantity. In practice, however, the polymer material itself must have both hardness and tackiness properties to remain undeformed during repeated bonding processes.
Therefore, there is a need in the art to provide an efficient and innovative macro-transfer technique.
Disclosure of Invention
In view of the above, the present invention can form a pattern of micro-contact protrusions on a target substrate to selectively mass-bond a plurality of micro-semiconductor structures, thereby providing a target substrate with micro-semiconductor structures.
Therefore, the invention provides a target substrate with a micro semiconductor structure, which comprises a target substrate, a plurality of micro semiconductor structures and a plurality of micro contact convex parts. The target substrate is provided with a plate body and a plurality of conductive parts arranged on the plate body; the micro semiconductor structure is graphically arranged on the target substrate; each micro semiconductor structure is provided with a body and at least one electrode arranged on the body; wherein, the at least one electrode and the corresponding conductive part are in eutectic bonding; the micro-contact convex part connects the body of the micro-semiconductor to the plate body of the target substrate.
Therefore, the invention provides a target substrate with micro semiconductor structures, which comprises a target substrate, a plurality of micro semiconductor structures arranged on the target substrate, and a first bonding component and a second bonding component which are used for connecting each micro semiconductor structure to the target substrate. The target substrate is provided with a plate body and a plurality of conductive parts arranged on the plate body; each micro semiconductor structure is provided with a body and at least one electrode arranged on the body. The first bonding assembly is formed by eutectic bonding of the at least one electrode of each micro semiconductor structure and the conductive part corresponding to the target substrate; the second bonding assembly connects the body of each micro semiconductor structure to the plate body of the target substrate, and is composed of at least one micro contact convex part.
Drawings
FIGS. 1A and 1B are flowcharts of first and second embodiments of a method for batch transfer of micro semiconductor structures according to the present invention;
FIG. 1C is a flow chart of a third embodiment of a method for batch transfer of micro semiconductor structures according to the present invention;
FIG. 1D is a flow chart of a fourth embodiment of a method for batch transfer of micro semiconductor structures according to the present invention;
FIG. 1E is a flowchart of a fifth embodiment of a method for batch transfer of micro semiconductor structures according to the present invention;
FIG. 1F is a flowchart of a sixth embodiment of a method for batch transfer of micro semiconductor structures according to the present invention;
FIGS. 2A-2H are schematic views illustrating the processes of FIGS. 1A and 1B;
FIGS. 2I-2J are schematic views illustrating the process of FIG. 1C;
FIGS. 3 and 3A are schematic diagrams illustrating different embodiments of FIGS. 2D and 2E;
FIGS. 4 and 4A-4I are schematic diagrams illustrating different embodiments of micro-contact protrusions;
FIGS. 5A-5C are schematic process diagrams illustrating a fourth embodiment and a fifth embodiment of a method for batch transferring micro semiconductor structures according to the present invention;
FIG. 5D is a schematic process diagram of a fifth embodiment of a method for batch transfer of micro semiconductor structures according to the present invention;
FIGS. 6A-6D are schematic views illustrating a seventh embodiment and an eighth embodiment of a method for transferring micro semiconductor structures in batch according to the present invention;
FIG. 6E is a schematic process diagram of an eighth embodiment of a method for bulk transferring micro semiconductor structures according to the present invention;
FIG. 7 is a process schematic diagram of a ninth embodiment of a method for bulk transferring micro semiconductor structures according to the present invention; and
fig. 8A to 8C are schematic process views illustrating a tenth embodiment of a method for transferring micro semiconductor structures in batch according to the present invention.
Detailed Description
The present invention relates to a method for bulk transfer of micro semiconductor structures that allows array-wise arrangement of micro-scale structures/devices and bulk pick-up and integration onto non-native substrates without damage to the structures/devices themselves. Specific embodiments of the present invention will be described in detail below with reference to the drawings, the description of the drawings, and the reference numerals; in the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements; moreover, reference numerals are used for illustration of components, processes, steps, etc., and definition of sequence, upper and lower relationships between components is provided for illustration and description only unless defined herein.
As used herein, "semiconductor structure" and "semiconductor device" are synonymously used and broadly refer to a semiconductor material, die, structure, device, component of a device, or semi-finished product. The "micro" semiconductor structures and "micro" semiconductor devices used are synonymous and refer generally to microscale. Semiconductor devices include high quality monocrystalline and polycrystalline semiconductors, semiconductor materials fabricated via high temperature processing, doped semiconductor materials, organic and inorganic semiconductors, and combinations of semiconductor materials and structures (such as dielectric layers or materials, or conductive layers or materials) having one or more additional semiconductor devices or non-semiconductor devices. Semiconductor components include, but are not limited to, transistors, photovoltaic devices including solar cells, diodes, light emitting diodes, lasers, p-n junctions, photodiodes, integrated circuits, and sensor semiconductor devices and device components. Further, a semiconductor component may refer to a part or portion that forms a functional semiconductor device or article.
As used herein, a "target substrate" refers to a non-native substrate for receiving a "micro semiconductor structure"; which may be an intermediate or final substrate in the process. Examples of materials for the virgin or non-virgin substrate include polymers, plastics, resins, polyimides, polyethylene naphthalates, polyethylene terephthalates, metals, metal foils, glass, quartz, flexible glass, semiconductors, sapphire, or thin film transistors (thin film transistor, TFT), and the like.
For ease of understanding and description, a "micro semiconductor structure" is used herein as an example of a semi-finished product of a defined micro semiconductor structure that completes at least one epitaxial layer; the "target substrate" is exemplified by a thin film transistor.
First embodiment
Fig. 1A, 2A to 2G are flowcharts of main concepts and process diagrams of the method for transferring micro semiconductor structures in batch according to the present invention. The micro semiconductor structure is exemplified by a horizontal electrode or a flip-chip electrode.
As shown in fig. 1A, the method for transferring micro semiconductor structures in batch according to the present invention at least includes step S10, step S20, and step S30.
Step S10: patterned micro-contact bumps 22 are formed on a target substrate 10 as shown in fig. 2A to 2E.
Step S20: the micro semiconductor structures 50 are made to approach the target substrate 10, and the micro contact protrusions 22 adhere to the corresponding portions of the micro semiconductor structures 50, as shown in fig. 2F to 2G.
Step S30: the micro semiconductor structure 50 remains patterned and positioned on the target substrate 10 as shown in fig. 2H.
Second embodiment
The present embodiment is further specifically described with reference to fig. 1B, and further describing a flowchart.
Step S10, as shown in fig. 2A to 2E, includes step S12, step S14, and step S16.
Step S12: see also fig. 2A and 2B. As shown in fig. 2A, the target substrate 10 has a plate body 12 and a plurality of pairs of conductive portions 14 provided on the plate body 10; as shown in fig. 2B, a pre-adhesive layer 20 is laid on the target substrate 10; the pre-adhesive layer 20 covers at least the plurality of conductive portions 14 for subsequent processing. The pre-adhesion layer 20 is not limited to a positive photoresist layer or a negative photoresist layer, and may be etched and developed to divide the pre-adhesion layer 20 into a cured portion P1 and an uncured portion P2 (see fig. 3). In the present invention, the pre-adhesive layer 20 is exemplified by a positive photoresist layer, and is not limited thereto.
Step S14: see also fig. 2C, 2D, and 3. As shown in fig. 2C, a shielding member 30 is provided, wherein the shielding member 30 includes a quartz substrate 32, and a patterned light shielding layer 34 disposed on the quartz substrate 32; the mask 30 is placed over the target substrate 10 and the pre-adhesive layer 20 thereof, and irradiated with ultraviolet light L, and the portion of the pre-adhesive layer 20 not shielded by the light shielding layer 34 is cured by the ultraviolet light L to be a cured portion P1, and the opposite pre-adhesive layer 20 not irradiated with ultraviolet light is an uncured portion P2. A schematic diagram of the cured portion P1 and the uncured portion P2 is also shown in FIG. 3.
Step S16: see also fig. 2E, 3A and 4. As shown in fig. 2E, the non-cured portion P2 of the pre-adhesive layer 20 is developed and washed away, so that a plurality of micro-contact protrusions 22 patterned on the target substrate 10 are left, and the micro-contact protrusions 22 have tackiness. Wherein the micro-contact convex part 22 is patterned to correspond to the conductive part 14; in other words, each pair of conductive portions 14 is disposed adjacent to at least one microcontact protrusion 22, or each of the microcontact protrusions 22 is disposed adjacent to a corresponding conductive portion 14. Wherein each micro-contact protrusion 22 includes, but is not limited to, at least one bump; in this embodiment, a single bump implementing a single micro-contact protrusion 22 is disposed between each pair of conductive portions 14, as shown in fig. 4.
The height of each micro-contact protrusion 22 is higher than the height of each conductive part 14, and a height difference d is formed between each micro-contact protrusion 22 and each conductive part 14, as shown in fig. 2E.
The configuration of the micro-contact protrusion 22 corresponding to the conductive portion 14 can be referred to, but not limited to, a first configuration Q1 and a second configuration Q2 in fig. 3A, which can be mixed or applied separately.
The micro-contact protrusion may form different embodiments for the corresponding pair of conductive portions 14, which are mainly distinguished by: whether or not the microcontact protrusions are distributed between the pair of conductive portions 14. For example, referring to fig. 4A, each micro-contact protrusion 22a includes a plurality of bumps 222a, the bumps 222a are in a discontinuous structure (e.g., an intermittent structure) surrounding the pair of conductive portions 14, and one bump 222a may be disposed between the pair of conductive portions 14. For example, referring to fig. 4B, the two micro-contact protrusions 22B are in a continuous structure and are disposed in parallel on opposite sides of the corresponding pair of conductive portions 14. For example, referring to fig. 4C, a micro-contact protrusion 22C is formed in a continuous structure and is disposed between the corresponding pair of conductive portions 14. For example, referring to fig. 4D, the two micro-contact protrusions 22D are a bump 222D, which are respectively disposed outside the corresponding pair of conductive portions 14. For example, referring to fig. 4E, each of the two micro-contact protrusions 22E includes a plurality of bumps 222E in a discontinuous structure (e.g., an intermittent structure) surrounding the outer sides of the corresponding pair of conductive portions 14. For example, referring to fig. 4F, the two micro-contact protrusions 22F are in a continuous annular structure and respectively surround the corresponding conductive portions 14. For example, referring to fig. 4G, a micro-contact protrusion 22G extends from between the corresponding pair of conductive portions 14 toward the outside of each conductive portion 14 in a continuous structure. For example, referring to fig. 4H, a micro-contact protrusion 22H surrounds the pair of conductive portions 14 and has an i-shape, similar to the plurality of bumps 222a of fig. 4A surrounding the pair of conductive portions 14, except that the micro-contact protrusion 22H of fig. 4H has a continuous structure; the micro-contact protrusion 22h can also be simulated as a combination of two micro-contact protrusions 22B and 22C of fig. 4B and 4C; the micro-contact protrusion 22h may also be modeled as a variation of the two micro-contact protrusions 22G of fig. 4G. For example, referring to fig. 4I, a micro-contact protrusion 22I surrounds the pair of conductive portions 14 and has a shape of a Chinese character 'ri', similar to the two micro-contact protrusions 22F in fig. 4F that are bonded to each other; the micro-contact protrusion 22I may be simulated as a combination of the micro-contact protrusion 22 and the micro-contact protrusion 22E in fig. 4 and 4E, except that the micro-contact protrusion 22I in fig. 4I has a continuous structure. Micro-contact protrusions 22, 22a, 22c, 22f, 22g, 22h, 22i distributed between the pair of conductive portions 14 further provide an insulating effect to the pair of conductive portions 14. The embodiments of the microcontact protrusions described above are merely exemplary, and are not intended to limit the present invention.
Step S20, as shown in fig. 2F to 2H, includes step S22 and step S24.
Step S22: as shown in fig. 2F, a plurality of micro semiconductor structures 50 are brought close to the target substrate 10; the plurality of micro semiconductor structures 50 are carried by a carrier 40; the effect of the carrying device 40 is that the carrying device 40 carries the micro semiconductor structure 50; the carrying device 40 may employ vacuum suction nozzles, static electricity, or equivalent means to achieve the same effect. The carrier 40 of the present invention is illustrated as having an adhesive surface 42 that remains uniformly flat, and is not intended to limit the invention.
Wherein the micro semiconductor structure 50 is adhered to the adhering surface 42. Each of the micro semiconductor structures 50 has a body 52 and a pair of electrodes 54 disposed on the body 52. The micro semiconductor structures 50 are typically arranged in an array, and the micro semiconductor structures 50 may be micro light emitting diode dies that are complete in process and individually independent, or micro light emitting diode semi-finished products that are interrupted in process but individually independent.
Step S24: as shown in fig. 2G, the micro-contact protrusions 22 patterned on the target substrate 10 contact and mass-adhere a portion of the micro-semiconductor structure 50 on the carrier 40. In other words, the micro semiconductor structure 50 is mass bonded by the micro-contact protrusions 22. At this time, at least one micro-contact protrusion 22 contacts and adheres to the body 52 of each micro-semiconductor structure 50, and each micro-contact protrusion 22 does not interfere with the electrode 54 when adhering to the body 52 of each micro-semiconductor structure 50. At this time, the electrode 54 of each of the micro semiconductor structures 50 has not generally contacted the corresponding conductive portion 14 on the target substrate 10.
Step S30: referring to fig. 2H, moving away from the carrier 40, the micro semiconductor structures 50 bonded in batches by the micro-contact bumps 22 are separated from the carrier 40, remain patterned and positioned on the target substrate 10. The adhesion between the micro-contact protrusion 22 and the corresponding micro-semiconductor structure 50 is greater than the adhesion between the carrier 40 and the micro-semiconductor structure 50, which is sufficient to keep the patterned micro-semiconductor structure 50 away from the carrier 40. In this embodiment, the micro semiconductor structure 50 that is not adhered to the micro contact protrusion 22 in batch at this time remains away from the carrier device 40 of the target substrate 10. In addition, in fig. 2H, the vertical removal of the carrier 40 is merely exemplary, and is not meant to limit the present invention.
Third embodiment
In this embodiment, the following processes are added to the first and second embodiments, and please refer to fig. 1C, fig. 2I, and fig. 2J.
The embodiment is that: a predetermined means is applied to the micro semiconductor structure held on the target substrate to generate a conductive structure with the conductive portion on the target substrate.
Step 40, which follows steps S10, S20, S30; and includes step S42 and step S44, as shown in fig. 2I and fig. 2J.
Step S42: as shown in fig. 2I, a device HP is provided, and a predetermined means is applied to the micro semiconductor structures 50 patterned on the target substrate 10, so that the electrodes 54 of each of the micro semiconductor structures 50 contact the conductive portions 14 corresponding to the target substrate 10, and each of the micro contact protrusions 22 sticking the body 52 of each of the micro semiconductor structures 50 fills between the body 52 of each of the micro semiconductor structures 50 and the plate body 12 of the target substrate 10. The electrodes 54 of each of the micro semiconductor structures 50 and the corresponding conductive portions 14 are subjected to eutectic bonding (eutectic bonding); each of the micro-contact protrusions 22 is hardened by a high temperature. The effect of the predetermined means is to make the electrodes 54 and the corresponding conductive portions 14 eutectic; the predetermined means may be hot pressing, ultrasonic heat fusion, electromagnetic coil heating, or the like to achieve the same effect. The predetermined means of this embodiment is exemplified by hot pressing, and is not intended to limit the present invention.
Step S34: referring to fig. 2J, the device HP is removed. At this time, a first bonding element 62 and a second bonding element 64 are defined to connect each of the micro semiconductor structures 50 to the target substrate 10; the first bonding element 62 and the second bonding element 64 constitute one bonding structure 60 connecting each of the micro semiconductor structures 50 to the target substrate 10. The first bonding unit 62 is formed by eutectic bonding of at least one electrode 54 of each micro semiconductor structure 50 and the corresponding conductive portion 14 of the target substrate 10, and connects the body 52 of each micro semiconductor structure 50 to the board 12 of the target substrate 10; the second bonding element 64 is formed by hardening at least one micro-contact protrusion 22, and connects the body 52 of each micro-semiconductor structure 50 to the body 12 of the target substrate 10.
It should be noted that when the second bonding element 64 is located between each pair of electrodes 54 of each of the micro semiconductor structures 50, an insulating effect may be provided to two electrodes 54 of each pair of electrodes.
Fourth embodiment
In this embodiment, step S10, step S20, and step S30 are repeated after the second embodiment is completed; see also fig. 1D, and fig. 5A-5C. Other steps that are identical in terms of indication and functionally similar to the first and second embodiments are given the same reference numerals.
Referring to fig. 1D, in the present embodiment, after step S10, step S20, and step S30 in the first and second embodiments are completed, the micro semiconductor structure 50 is patterned and mass-glued, and then in step S50, it is selected whether to return to step S10; if yes, go back to step S10 to perform the process of patterning and batch bonding other micro semiconductor structures 50 a; if not, the process is ended.
Step S10 is entered: referring to fig. 5A, a pre-adhesion layer 20a is re-deposited on the target substrate 10 having the patterned micro semiconductor structures 50; in this embodiment, the positive resist layer is used as an example, and the same or another shielding member 30a is used for shielding and curing by irradiation of ultraviolet rays L.As shown in fig. 5B, the non-cured portions of the pre-adhesive layer 20a are developed and washed away, leaving a plurality of microcontact protrusions 22a again patterned on the target substrate 10; the micro-contact protrusion 22a in the present embodiment may be higher than the micro-semiconductor structure 50 previously adhered to the target substrate 10, and defines a height difference d therebetween u 。
Step S20, S30: as shown in fig. 5C, the carrier device 40 is made to provide the micro semiconductor structure 50 that was not previously bonded in batch, or another plurality of micro semiconductor structures 50a is provided, approaching the target substrate 10. In this embodiment, another batch of micro semiconductor structures 50a is taken as an example, and the micro contact protrusions 22a of the target substrate 10 are used to bond the micro semiconductor structures 50a again in batch. At this time, the carrier 40 does not interfere with the micro semiconductor structure 50 patterned on the target substrate 10.
Fifth embodiment
In this embodiment, step S40 is performed after the fourth embodiment is completed; see also fig. 1E, and fig. 5D. Other steps that are identical in designation and functionally similar to the third and fourth embodiments are identified by the same reference numerals.
Step S40: as shown in fig. 5D, the present embodiment is to perform a predetermined means on the target substrate 10 on which the micro semiconductor structures 50, 50a are completely arranged in the fourth embodiment. Eutectic bonding is performed between each conductive portion 14 and each corresponding electrode 54, 54a, so that first bonding elements 62, 62a are respectively formed; each of the microcontact protrusions 22, 22a constitutes a second contact member 64, 64a, respectively.
Sixth embodiment
In this embodiment, step S10, step S20, step S30, and step S40 are repeated after the third embodiment is completed; see also fig. 1F. Other steps that are identical in designation and functionally similar to the first, second, and third embodiments are identified by the same reference numerals.
The embodiment is to repeat the patterning process of bonding the micro semiconductor structure on the target substrate with the eutectic bonding micro semiconductor structure and a predetermined means thereof to form the eutectic bonding process.
The flow chart of fig. 1F: after step S20, step S30, and step S40 are completed, the patterned micro semiconductor structures on the target substrate are all eutectic bonded with the target substrate; then, in step S50, it is selected whether to return to step S10; if yes, go back to step S10 to perform subsequent steps S20, S30, S40; if not, the process is ended.
Seventh embodiment
This embodiment provides a different adhesive surface according to the fourth embodiment; see also fig. 1D, and fig. 6A-6D. Other steps that are identical in designation and functionally similar to the first, second, and fourth embodiments are identified by the same reference numerals.
Referring to fig. 1D, in the present embodiment, after step S10, step S20, and step S30 in the first and second embodiments are completed, the micro semiconductor structure 50 is patterned and mass-glued, and then in step S50, it is selected whether to return to step S10; if yes, go back to step S10 to perform the process of patterning and batch bonding other micro semiconductor structures 50b; if not, the process is ended.
Step S10 is entered: referring to fig. 6A, a next batch of micro-contact protrusions 22b is formed on the target substrate 10 having the patterned micro-semiconductor structures 50; at this time, the micro-contact protrusions 22 patterned on the target substrate 10 are already mass-adhered to the corresponding micro-semiconductor structures 50. In the present embodiment, the micro-contact protrusion 22b is allowed to be lower than the micro-semiconductor structure 50 positioned to the target substrate 10, and the height difference is defined as d d 。
Meanwhile, a carrier device 40b is defined with bonding surfaces S1, S2, S3 having different depths, wherein the bonding surfaces S2, S3 have a depth difference g, and each bonding surface S1, S2, S3 is pre-bonded with the micro semiconductor structure 50b of the pattern array. Typically, the different bonding coplanarity S1, S2, S3 individually prepares the desired pattern array to bond a group or a type of micro semiconductor structure; for example, the first paste co-planar S1 pastes the blue micro-led structure, the second paste co-planar S2 pastes the red micro-led structure, and the third paste co-planar S3 pastes the green micro-led structure. In this embodiment, the bonding surfaces S2 and S3 are bonded to the same micro semiconductor structure 50b.
Step S20 is entered: referring to fig. 6B, the micro-semiconductor structures 50B on the attaching surface S2 of the carrying device 40B are contacted and mass-adhered to the carrying device 40B, which is close to the target substrate 10, so that the micro-contact protrusions 22B patterned on the target substrate 10 are contacted and adhered to the micro-semiconductor structures 50B; at this time, the micro semiconductor structure 50b on the attaching surface S3 of the carrier device 40 is not contacted with the micro contact protrusion 22b on the target substrate 10.
Step S30 is entered: removing the carrier 40b. The micro semiconductor structure 50b stuck by the micro contact protrusion 22b remains patterned and positioned on the target substrate 10; the micro semiconductor structure 50b on the attaching surface S3 is separated from the target substrate 10 along with the carrier device 40.
Step S50 is entered: selecting whether to return to step S10; if yes, go back to step S10 to perform the process of patterning and batch bonding other micro semiconductor structures 50b; if not, the process is ended.
Repeating the step S10: referring to fig. 6C, a next batch of micro-contact protrusions 22C is formed on the target substrate 10 having the patterned micro-semiconductor structures 50, 50b; at this time, the micro-contact protrusions 22, 22b patterned on the target substrate 10 are already mass-adhered to the corresponding micro-semiconductor structures 50, 50b. In the present embodiment, the micro-contact protrusion 22c is allowed to be higher than the micro-semiconductor structure 50b that has been positioned to the target substrate 10, and the height difference is defined as d u To correspond to the carrier 40c having an adhesive surface 42c that remains uniformly flat; the plurality of micro semiconductor structures 50c are disposed on the attaching surface 42c of the carrier 40 c.
Repeating the steps S20 and S30: as shown in fig. 6D, the carrier 40c is removed; the micro semiconductor structure 50b stuck by the micro contact protrusion 22b remains patterned and positioned on the target substrate 10; the micro semiconductor structure 50c, which is stuck by the micro contact protrusion 22c, also remains patterned and positioned on the target substrate 10.
It should be noted that the term "next batch" in the present invention is not particularly limited to the term "previous batch" in the same step, but is defined by the meaning of "equal or inferior", "same or other kinds".
It should be noted that, in all the drawings of the present invention, the micro-contact protrusion, compared with the ratio of the micro-semiconductor structure to the target substrate, is provided for illustration and understanding only, and is not meant to limit the present invention.
Eighth embodiment
In this embodiment, step S40 is performed after the seventh embodiment is completed; see also fig. 1E, and fig. 6E. Other steps that are identical in designation and functionally similar to the seventh embodiment are identified by the same reference numerals.
Step S40: as shown in fig. 6E, the present embodiment is to perform a predetermined means on the target substrate 10 on which the micro semiconductor structures 50, 50b, 50c are completely arranged in the seventh embodiment. Eutectic bonding is performed between each conductive portion 14 and each corresponding electrode 54, 54b, 54c, so that first bonding means 62, 62b, 62c are respectively formed; each of the microcontact protrusions 22, 22b, 22c constitutes a second contact member 64, 64b, 64c, respectively.
Ninth embodiment
In this embodiment, according to the first to eighth embodiments, another aspect of the carrying device is at least one adhesive roller 40d; with reference to fig. 7. Other steps that are identical in terms of indication and that are functionally similar to those of the first to eighth embodiments are given the same reference numerals.
As shown in fig. 7, an adhesive surface 42d is disposed on an adhesive roller 40d, and the adhesive surface 42d is only selected to be uniformly flat in the present embodiment, but not limited thereto. The bonding roller 40d approaches the micro semiconductor structure 50 to the target substrate 10, so that the micro contact protrusions 22 patterned on the target substrate 10 are mass-bonded to the micro semiconductor structure 50 on the bonding roller 40 d.
Tenth embodiment
The present embodiment is a micro semiconductor structure 50d according to the first to eighth embodiments, replacing the vertical electrode, as shown in fig. 8A to 8C. Other steps that are identical in terms of indication and that are functionally similar to those of the first to eighth embodiments are given the same reference numerals.
As shown in fig. 8A, a carrier device 40 carries a plurality of micro semiconductor structures 50d, which includes a body 52d, and a single electrode 54d disposed on the body 52 d. The target substrate 10a defines a plurality of conductive portions 14a, each corresponding to a single electrode 54d of the micro semiconductor structure 50d. A plurality of microcontact protrusions 22 patterned on the target substrate 10a are disposed adjacent to each of the conductive portions 14 a.
As shown in fig. 8B, the micro-semiconductor structures 50d on the carrier 40 are mass-adhered to the micro-contact protrusions 22 patterned on the target substrate 10 a.
As shown in fig. 8C, a first bonding element 62d is formed by eutectic bonding between each of the conductive portions 14 and each of the corresponding electrodes 54 d; each of the microcontact protrusions 22d constitutes a second bonding element 64d. Thereafter, the micro semiconductor structure 50d may be further provided with a further side electrode 54d (as shown by the dashed line).
"bulk transfer" herein, which may select at least a portion of at least one row of micro semiconductor structures 20; or a plurality of rows of micro semiconductor structures 20; or a portion of the micro semiconductor structure 20 in a row of micro semiconductor structures 20; or a portion of the micro semiconductor structure 20 in a plurality of rows of micro semiconductor structures 20; or any combination and variation of the foregoing. The illustrations herein are for ease of description and are not intended to be limiting to the explanation of "batch transfer" or "batch sticky".
The invention patterns a plurality of micro-contact convex parts on the target substrate so as to selectively carry out batch adhesion on a plurality of micro-semiconductor structures. By adjusting the height of the micro-contact convex part, the carrying device can only keep a uniform and flat sticking surface without providing a plurality of sticking surfaces with different depths, thereby avoiding the cost which cannot be reduced due to the precision requirement of the carrying device; however, this provides the benefit of the present invention and is not intended to limit the applicability of the present invention. In other words, the present invention is also applicable to a carrier device having a plurality of adhesive surfaces with different depths according to practical requirements.
In addition, according to the manufacturing process or the working requirement, when the target substrate is a film substrate, the micro semiconductor structure is further transferred to the film substrate by a preset means, so that a bonding structure is formed between the target substrate and the micro semiconductor structure, and the bonding structure at least comprises a first bonding component and a second bonding component. The first bonding assembly is formed by eutectic bonding of the electrodes of the micro semiconductor structures and the conductive part of the target substrate; the second bonding assembly is formed by thermally hardening the micro-contact protrusions.
Thus, the method for bulk transfer of micro semiconductor structures of the present invention is employed to effectively and efficiently allow for array selection and integration of bulk or bulk pick-up of micro semiconductor structures 50 (micro-scale structures/devices) on a target substrate 10 (non-native substrate). The method can be applied to different micro light emitting diode crystal grains or devices or semi-finished products, and can be widely applied to the field of batch or mass transfer of various micro semiconductor structures; further, when the target substrate is a thin film substrate, a more stable bonding structure between the micro semiconductor structure and the thin film substrate can be provided.
In summary, the method for transferring micro semiconductor structures in batch and the target substrate with micro semiconductor structures according to the present invention have the following effects, but are not limited to the present invention:
1. the time point of batch selection is caused to occur in the step of transferring to the target substrate, so that the accuracy requirement for the carrying device can be reduced, and the batch transfer of the semiconductor component (including the micro semiconductor structure) is more flexible.
2. At least two bonding elements are formed between each semiconductor element (including a micro semiconductor structure) and the target substrate, wherein one of the bonding elements is micro-contact convex bonding, and the other bonding element is eutectic bonding, so that the bonding can be more firmly performed.
3. When the micro-contact protrusions are distributed between two electrodes of a single semiconductor device (including a micro-semiconductor structure), an insulating effect can be provided between the two electrodes.
4. Allowing the selection and application of such ultra-thin, fragile and/or small devices without causing damage to the devices themselves.
5. The method can effectively and efficiently transfer semiconductor components (including micro semiconductor structures) onto a target substrate in batches or in large quantities, and can be widely applied to the field of batch or large-quantity transfer of various semiconductor components (including micro semiconductor structures).
The foregoing is by way of example only and is not intended as limiting. Any equivalent modifications or variations to the present invention without departing from the spirit and scope of the present invention are intended to be included in the following claims.
Claims (31)
1. A thin film transistor substrate comprising:
a substrate having a plurality of thin film transistors;
a plurality of conductive portions disposed on the substrate;
a plurality of microcontact protrusions disposed on the substrate; and
a plurality of micro semiconductor structures disposed on the micro-contact bumps,
wherein each of said micro semiconductor structures comprises at least one electrode eutectic bonded to at least one of said plurality of conductive portions,
wherein the micro-contact protrusion comprises a photoresist material.
2. The thin film transistor substrate of claim 1, wherein the micro-contact protrusion has an adhesion.
3. The thin film transistor substrate of claim 1, wherein the photoresist material is hardened.
4. The thin film transistor substrate of claim 1, wherein the plurality of micro-contact protrusions comprise first and second micro-contact protrusions having different heights,
wherein the plurality of micro semiconductor structures includes a first micro semiconductor structure disposed on the first micro contact protrusion and a second micro semiconductor structure disposed on the second micro contact protrusion.
5. The thin film transistor substrate of claim 1, wherein the micro-contact protrusion comprises a continuity pattern surrounding at least a portion of one of the plurality of conductive portions.
6. The thin film transistor substrate of claim 1, wherein the micro-contact protrusion comprises a plurality of non-continuous patterns surrounding at least a portion of one of the plurality of conductive portions.
7. The thin film transistor substrate of claim 1, wherein each of the micro semiconductor structures comprises a pair of electrodes eutectic bonded to a pair of conductive portions,
wherein each of the micro-contact protrusions is disposed in a region between the pair of electrodes.
8. The thin film transistor substrate of claim 7, wherein each of the micro-contact protrusions is further disposed outside of a region between the pair of electrodes.
9. The thin film transistor substrate of claim 1, wherein each of the micro semiconductor structures comprises a pair of electrodes eutectic bonded to a pair of conductive portions,
wherein each of the micro-contact protrusions is disposed outside a region between the pair of electrodes.
10. The thin film transistor substrate of claim 1, wherein each of the micro-contact protrusions has a pillar shape.
11. The thin film transistor substrate of claim 1, wherein the micro semiconductor structure is a micro light emitting diode die.
12. The thin film transistor substrate of claim 1, wherein the substrate comprises a polymer, a metal, glass, or sapphire.
13. The thin film transistor substrate of claim 1, wherein the micro semiconductor structure comprises a combined semiconductor material.
14. The thin film transistor substrate of claim 1, wherein each of the micro semiconductor structures comprises a horizontal electrode or a flip-chip electrode.
15. A method for bulk transfer of micro semiconductor structures, comprising:
forming a plurality of microcontact protrusions on a target substrate;
moving a carrier device carrying a plurality of micro semiconductor structures toward the target substrate so that the micro contact protrusions adhere a batch of micro semiconductor structures; and
the carrier is moved away from the target substrate so that the batch of micro semiconductor structures stuck by the micro contact bumps are separated from the carrier and positioned on the target substrate.
16. The method of claim 15, wherein the microcontact protrusion has tackiness.
17. The method of claim 16, wherein the adhesion between the micro-contact protrusion and the micro-semiconductor structure is greater than the adhesion between the carrier and the micro-semiconductor structure.
18. The method of claim 15, wherein the carrying device employs a vacuum nozzle or electrostatically carries the plurality of micro-semiconductor structures.
19. The method according to claim 8, wherein:
each micro semiconductor structure has a body, and at least one electrode disposed on the body,
the micro-contact protrusions adhere to the body of the corresponding micro-semiconductor structure.
20. The method of claim 19, wherein the target substrate has a plate body and a plurality of conductive portions disposed on the plate body.
21. The method of claim 20, wherein each of the microcontact protrusions is adjacent to at least one conductive portion.
22. The method of claim 20, wherein the height of each micro-contact protrusion is higher than the height of each conductive portion.
23. The method of claim 15, wherein the plurality of microcontact protrusions are formed by patterning a photoresist layer.
24. The method of claim 20, further comprising:
heat is applied to cause eutectic bonding of the electrodes of the batch of micro semiconductor structures and the corresponding conductor portions, and hardening of the micro contact protrusions occurs.
25. The method of claim 15, wherein the carrier has a planar surface on which the plurality of micro semiconductor structures are carried.
26. The method of claim 25, further comprising:
forming a plurality of micro-contact protrusions again on the target substrate, the height of the micro-contact protrusions formed again being higher than the height of the micro-semiconductor structure already positioned on the target substrate;
moving the carrier toward the target substrate so that the re-formed microcontact protrusions bond to another batch of microconductor structures on the carrier; and
the carrier device is moved away from the target substrate so that the another batch of micro semiconductor structures stuck by the micro contact bumps are disengaged from the carrier device and positioned on the target substrate.
27. The method of claim 15, wherein the carrier has a plurality of surfaces of different depths, the plurality of micro semiconductor structures being carried on respective surfaces according to a transfer batch.
28. The method of claim 27, further comprising:
forming a plurality of micro-contact protrusions again on the target substrate, the height of the re-formed micro-contact protrusions being lower than the height of the micro-semiconductor structure already positioned on the target substrate;
moving the carrier toward the target substrate so that the re-formed microcontact protrusions adhere to another batch of microconductors on the carrier; and
the carrier device is moved away from the target substrate so that the another batch of micro semiconductor structures stuck by the micro contact bumps are disengaged from the carrier device and positioned on the target substrate.
29. A target substrate having micro semiconductor structures transferred in bulk by the method of any one of claims 15 to 28.
30. The target substrate of claim 29, wherein the target substrate comprises a thin film transistor substrate.
31. The target substrate of claim 29, wherein the micro semiconductor structure comprises a micro light emitting diode die.
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| TW106130516A TWI735645B (en) | 2017-09-06 | 2017-09-06 | Method for batch transfer of micro-semiconductor structure and target substrate with micro-semiconductor structure |
| CN201810787206.1A CN109461752B (en) | 2017-09-06 | 2018-07-16 | Target substrate with micro semiconductor structure |
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| CN202311152826.5A Pending CN117374063A (en) | 2017-09-06 | 2018-07-16 | Target substrate with micro semiconductor structure |
| CN202311152715.4A Pending CN117374062A (en) | 2017-09-06 | 2018-07-16 | Target substrate with micro semiconductor structure |
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| CN202311152715.4A Pending CN117374062A (en) | 2017-09-06 | 2018-07-16 | Target substrate with micro semiconductor structure |
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| US11538785B2 (en) * | 2017-12-19 | 2022-12-27 | Ultra Display Technology Corp. | Method of using optoelectronic semiconductor stamp to manufacture optoelectronic semiconductor device |
| CN109920815B (en) * | 2019-03-20 | 2021-09-21 | 京东方科技集团股份有限公司 | Circuit substrate, manufacturing method thereof and micro light-emitting diode display substrate |
| US11355686B2 (en) | 2019-03-29 | 2022-06-07 | Seoul Semiconductor Co., Ltd. | Unit pixel having light emitting device, pixel module and displaying apparatus |
| CN110190170B (en) * | 2019-04-15 | 2020-09-04 | 南京中电熊猫平板显示科技有限公司 | Backboard of micro light-emitting diode display and manufacturing method thereof |
| CN110429089B (en) * | 2019-08-15 | 2023-02-03 | 京东方科技集团股份有限公司 | Driving backboard, manufacturing method thereof and display device |
| CN110690244B (en) * | 2019-10-15 | 2021-11-05 | 京东方科技集团股份有限公司 | Back plate, display panel and micro light emitting diode transfer method |
| US11302561B2 (en) * | 2019-11-12 | 2022-04-12 | Palo Alto Research Center Incorporated | Transfer elements that selectably hold and release objects based on changes in stiffness |
| CN111613714A (en) * | 2020-05-25 | 2020-09-01 | 深圳市华星光电半导体显示技术有限公司 | Micro light-emitting diode and manufacturing method thereof |
| CN117355933A (en) * | 2021-05-27 | 2024-01-05 | 苹果公司 | Single pick multiple print micro LED batch transfer with elastomeric stamp |
| TWI775552B (en) * | 2021-08-02 | 2022-08-21 | 鴻海精密工業股份有限公司 | Display panel and manufacture method of the display panel |
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| US20170207193A1 (en) * | 2014-07-20 | 2017-07-20 | X-Celeprint Limited | Apparatus and methods for micro-transfer-printing |
| US10516084B2 (en) * | 2014-10-31 | 2019-12-24 | eLux, Inc. | Encapsulated fluid assembly emissive elements |
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| US10468361B2 (en) * | 2015-08-27 | 2019-11-05 | Mikro Mesa Technology Co., Ltd. | Method of manufacturing light emitting diodes having a supporting layer attached to temporary adhesive |
| KR20170059068A (en) * | 2015-11-19 | 2017-05-30 | 삼성전자주식회사 | Lighting source module, display panel and display apparatus |
| US10153256B2 (en) * | 2016-03-03 | 2018-12-11 | X-Celeprint Limited | Micro-transfer printable electronic component |
| KR101800367B1 (en) * | 2016-08-24 | 2017-11-28 | 한국기계연구원 | Method of transferring a micro-device and Micro-device substrate manufactured by the same |
| US20180286734A1 (en) * | 2017-03-28 | 2018-10-04 | X-Celeprint Limited | Micro-device pockets for transfer printing |
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| CN117374063A (en) | 2024-01-09 |
| CN109461752A (en) | 2019-03-12 |
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