CN1173219C - Panel structure and making process of planar film transistor display - Google Patents
Panel structure and making process of planar film transistor display Download PDFInfo
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- CN1173219C CN1173219C CNB021230870A CN02123087A CN1173219C CN 1173219 C CN1173219 C CN 1173219C CN B021230870 A CNB021230870 A CN B021230870A CN 02123087 A CN02123087 A CN 02123087A CN 1173219 C CN1173219 C CN 1173219C
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Abstract
The present invention discloses the structure of a planar display panel of a thin film transistor and a manufacture method thereof. The structure comprises a transparent base plate, a buffering layer, a thin film transistor structure of a grid electrode at the top, and a light shielding structure. The method comprises the following procedures: providing a transparent base plate and orderly forming the buffering layer and the thin film transistor structure of the grid electrode at the top above the transparent base plate; forming the light shielding structure above the transparent base plate so that the buffering layer is arranged between the light shielding structure and the thin film transistor structure of the grid electrode at the top. One part area of the light shielding structure is formed at a area below a channel area of the thin film transistor structure of the grid electrode at the top so as to prevent the channel area from being irradiated by a backlight light source of the planar display panel.
Description
Technical field
The present invention relates to a kind of flat display panel and manufacture method thereof, particularly relate to a kind of film transistor plane indicator panel and manufacture method thereof.
Background technology
Along with manufacture technology progress, (Liquid Crystal Display LCD) has replaced the trend that traditional kinescope display becomes following display main flow to LCD, wherein again based on Thin Film Transistor-LCD (TFT-LCD).See also Fig. 1, it is the circuit diagram of a pixel unit in the Thin Film Transistor-LCD, the switch unit that it is mainly finished by a thin film transistor (TFT) 11, and a liquid crystal display 12 and a storage capacitors 13 (Storage Capacitor) constitute.And wherein storage capacitors 13 is connected in parallel to this liquid crystal display 12 (it also is an electric capacity), in order to strengthen the not enough originally charge storage capacity of liquid crystal display 12, and then when improving thin film transistor (TFT) 11 and closing, the magnitude of voltage of the liquid crystal display 12 too fast phenomenon that descends.
See also Fig. 2, it is a low-temperature polysilicon film transistor (Low Temperature PolySilicon Thin Film Transistor, LTPS-TFT) grow up a manufacturing technology steps synoptic diagram on a glass substrate.Fig. 2 (a) expression is for forming buffer zone a 21 (butter layer on this glass substrate 20, usually finish with silicon dioxide) and an essential amorphous silicon (i-a-Si) layer after, utilize a laser crystallization (laser crystallization) manufacturing process again, convert essential amorphous silicon (i-a-Si) layer to an essential polysilicon (i-poly-Si) layer 22, after utilizing the little shadow manufacturing process of a light shield to form a photoresistance cover curtain structure 23 then in these essence polysilicon (i-poly-Si) layer 22 tops, the part of exposing is carried out the implantation manufacturing process (finishing with As or P ion) of a N type admixture, and then form the source/drain electrode structure 221 of N channel thin-film transistor.
See also Fig. 2 (b), it is after removing photoresistance cover curtain structure 23, above whole base plate, cover last layer insulation material (finishing with silicon dioxide usually), in order to form a gate insulator 24, then behind sputter (sputtering) last layer gate conductor layer on the gate insulator 24, form required gate conductor structure 221 with another light shield lithography manufacturing process again, utilize this gate conductor structure 221 to make the cover curtain then, carry out the implantation manufacturing process of a micro-N type admixture, and then in the N channel thin-film transistor, form a ldd structure (Lightly Doped Drain) 222.
And above-mentioned structure is again through follow-up manufacturing process, just form the structure shown in Fig. 2 (c), after wherein forming a core dielectric material layer (inter-layer dielectrics layer) 26 in the whole base plate top, define required contact hole (contact hole) in the appropriate location, form the layer of metal conductor layer in sputter (sputtering) mode more at last and define required source/drain connection structure 27.
Because above-mentioned low-temperature polycrystalline silicon thin film transistor structure changes top grid structure (top gate structure) into by traditional bottom grid structure (bottomgate structure), therefore can have preferable element characteristic, but when closing the state of (OFF) when low-temperature polysilicon film transistor is in, the raceway groove of thin film transistor (TFT) (channel) still can be subjected to the irradiation of back light and produce a large amount of photocurrent (shown in Fig. 2 (c)), the leakage current of element is significantly risen, this will make the gray scale variation of liquid crystal be easy to generate error, and has a strong impact on the quality of display.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of film transistor plane indicator panel, to overcome the defective of above-mentioned known technology.
Above-mentioned purpose of the present invention is achieved in that a kind of film transistor plane indicator panel, and it comprises: a transparent substrates; One cushion is formed on this transparent substrates; One top grid thin-film transistor structure is formed on this cushion, and it comprises a channel region; An and light-shielding structure, the subregion of this light-shielding structure is formed at the lower zone of this channel region, avoiding this channel region shone by a back light of this flat display panel, and this cushion is between this light-shielding structure and this top grid thin-film transistor structure.
According to above-mentioned conception, this transparent substrates is a glass substrate.
According to above-mentioned conception, this cushion is selected from silicon nitride, monox or its combination and finishes.
According to above-mentioned conception, this light-shielding structure is finished to be selected from the high and light tight material of fusing points such as chromium, molybdenum, tungsten.
According to above-mentioned conception, this top grid thin-film transistor structure comprises: semi-conductor layer, be formed on this cushion, and it comprises this channel layer and one source/drain electrode structure; One gate insulator structure is formed on this semiconductor layer; One gate conductor structure is formed on this gate insulator structure, and is covered in the upper area of this channel region; One dielectric layer is formed on this gate conductor structure and this gate insulator structure; One conductor wiring construction is formed on this dielectric layer, and pass through the part this insulation course contact with this source/drain electrode with this gate insulator structure.
According to above-mentioned conception, this semiconductor layer also comprises a ldd structure, and it is formed at the outer peripheral areas of this channel region, and this source/drain electrode structure is formed at the outer peripheral areas of this ldd structure.
According to above-mentioned conception, this semiconductor layer is a polysilicon layer.
According to above-mentioned conception, this gate conductor structure is finished one of to be selected from the materials such as chromium, molybdenum tungsten, tantalum, aluminium or copper.
According to above-mentioned conception, this gate insulator structure is finished with monox.
Another object of the present invention is to provide a kind of manufacture method of film transistor plane indicator panel, it comprises the following step: a transparent substrates is provided; Form a cushion and a top grid thin-film transistor structure in regular turn in this transparent substrates top; Form a light-shielding structure in this transparent substrates top, make this cushion between this light-shielding structure and this top grid thin-film transistor structure, and the subregion of this light-shielding structure is formed at the lower zone of the channel region of this top grid thin-film transistor structure, and a back light of display pannel shines to avoid this channel region put down by this.
According to above-mentioned conception, this transparent substrates is a glass substrate in the manufacture method of the present invention.
According to above-mentioned conception, this cushion is selected from silicon nitride, monox or its combination institute finishes in the manufacture method of the present invention.
According to above-mentioned conception, this light-shielding structure is finished to be selected from the high and light tight material of fusing points such as chromium, molybdenum, tungsten in the manufacture method of the present invention.
According to above-mentioned conception, the manufacture method of this top grid thin-film transistor structure in the manufacture method of the present invention, comprise the following step: on this cushion, form a semi-conductor layer and a photoresist layer in regular turn, utilize this light-shielding structure from bottom to top to see through this photoresist layer that this transparent substrates exposes to this photoresist layer and removes the light that exposed to the sun for light shield; With unexposed this photoresist layer is cover curtain, and this semiconductor layer is carried out that a heavy doping ion cloth is planted manufacturing process and source/drain electrode structure of forming a thin film transistor (TFT); After forming a gate insulator and one first conductor layer on this semiconductor layer in regular turn, this first conductor layer is defined the gate conductor structure of a thin film transistor (TFT) with one second road light shield lithography manufacturing process; Form a dielectric layer in this gate insulator top, this gate insulator and this dielectric layer are defined a contact hole with one the 3rd road light shield lithography manufacturing process with this gate conductor structure; And on this dielectric layer, form one second conductor layer and define one source/drain connection structure with one the 4th light shield lithography manufacturing process with this contact hole.
According to above-mentioned conception, the manufacture method of this top grid thin-film transistor structure further comprises the following step in the manufacture method of the present invention: with this gate conductor structure is the cover curtain, and this gate insulator is carried out a light dope ion implantation process and forms a ldd structure (Lightly Doped Drain).
According to above-mentioned conception, this semiconductor layer is a polysilicon layer in the manufacture method of the present invention.
According to above-mentioned conception, this gate conductor structure is finished one of to select in the materials such as white chromium, molybdenum tungsten, tantalum, aluminium or copper in the manufacture method of the present invention.
According to above-mentioned conception, this gate insulator structure is finished with monox in the manufacture method of the present invention.
According to above-mentioned conception, the subregion of this light-shielding structure is as a black matrix" (black matrix) in the manufacture method of the present invention.
According to above-mentioned conception, this top grid transistor is a low-temperature polysilicon film transistor in the manufacture method of the present invention.
Below, in conjunction with specific embodiments and accompanying drawing, the present invention is described in further detail.
Description of drawings
Fig. 1 is the circuit diagram of a pixel unit in the Thin Film Transistor-LCD;
Fig. 2 (a), Fig. 2 (b) and Fig. 2 (c) are respectively grow up manufacturing technology steps synoptic diagram on a glass substrate of a low-temperature polysilicon film transistor;
Fig. 3 (a)～Fig. 3 (f) is respectively the first preferred embodiment step synoptic diagram of film transistor plane indicator method for producing panel of the present invention;
Fig. 4 (a)～Fig. 4 (f) is respectively the second preferred embodiment step synoptic diagram of film transistor plane indicator method for producing panel of the present invention.
Embodiment
The present invention is film transistor plane indicator panel and the manufacture method thereof that known technology developed out that is subjected to the irradiation of back light that leakage current is significantly risen for the channel region that improves low-temperature polysilicon film transistor, mainly by a transparent substrates, one cushion, an one top grid thin-film transistor structure and a light-shielding structure constitute, the subregion of this light-shielding structure is formed at the lower zone of this channel region, the back light that can utilize this light-shielding structure to cover this flat display panel shines the excessive problem of leakage current when being in closed condition to improve low-temperature polysilicon film transistor.
See also Fig. 3 (a)～Fig. 3 (f), it is respectively the first preferred embodiment step synoptic diagram of film transistor plane indicator method for producing panel of the present invention, wherein Fig. 3 (a) expresses after forming a light shield layer on the transparent substrates 300, define light-shielding structure 301 with the first road light shield lithography manufacturing process, then shown in Fig. 3 (b), form a cushion 302 and an amorphous silicon layer (a-Si:H) in regular turn in the top of transparent substrates 300 with light-shielding structure 301, use the laser crystallization manufacturing process to convert amorphous silicon (a-Si) layer to a polysilicon (poly-Si) layer afterwards, on this polysilicon layer 304, form a photoresist layer then and utilize this light-shielding structure 301 from bottom to top to see through this photoresist layer (shown in Fig. 3 (c)) that 300 pairs of these photoresist layers of this transparent substrates expose and remove the light that exposed to the sun for light shield, serve as that the cover curtain carries out a heavy doping ion cloth to this polysilicon layer 304 and plants source/drain electrode structure 306 (shown in Fig. 3 (d)) that manufacturing process forms a thin film transistor (TFT) then with this photoresistance cover curtain structure 305 of end exposure, then be after removing this photoresistance cover curtain structure 305 shown in Fig. 3 (e), forming a gate insulator 307 on this polysilicon layer 301 in regular turn reaches with a conductor layer, with the second road light shield lithography manufacturing process this conductor layer is defined a gate conductor structure 308 then, then utilize this gate conductor structure 308 to make the cover curtain, carry out the implantation manufacturing process of a micro-N type admixture, and then in the N channel thin-film transistor, form a ldd structure (Lightly Doped Drain) 309, then be after forming a core dielectric material layer (inter-layerdielectrics layer) 3 10 in these gate insulator 307 tops shown in Fig. 3 (f) with this gate conductor structure 308, define required contact hole in the appropriate location with the 3rd road light shield lithography manufacturing process, last on this core dielectric material layer, form the layer of metal conductor layer and define one source/drain conductor wiring construction 311 and finish manufacturing with the 4th light shield lithography manufacturing process with this contact hole.
See also Fig. 4 (a)～Fig. 4 (f), it is respectively the second preferred embodiment step synoptic diagram of film transistor plane indicator method for producing panel of the present invention, wherein Fig. 4 (a) expresses after forming one first cushion 4021 and a light shield layer on the transparent substrates 400 in regular turn, define light-shielding structure 401 with the first road light shield lithography manufacturing process, then shown in Fig. 4 (b), form one second cushion 4022 and an amorphous silicon layer (a-Si:H) in regular turn in the top of first cushion 4021 with light-shielding structure 401, use the laser crystallization manufacturing process to convert amorphous silicon (a-Si) layer to a polysilicon (poly-Si) layer then, on this polysilicon layer 404, form a photoresist layer then and utilize this light-shielding structure 401 from bottom to top to see through this photoresist layer (shown in Fig. 4 (c)) that 400 pairs of these photoresist layers of this transparent substrates expose and remove the light that exposed to the sun for light shield, serve as that the cover curtain carries out source/drain electrode structure 406 (shown in Fig. 4 (d)) that a heavy doping ion cloth value manufacturing process forms a thin film transistor (TFT) to this polysilicon layer 404 then with unexposed this photoresistance cover curtain structure 405, then be after removing this photoresistance cover curtain structure 405 shown in Fig. 4 (e), on this polysilicon layer 401, form a gate insulator 407 and a conductor layer in regular turn, with the second road light shield lithography manufacturing process this conductor layer is defined a gate conductor structure 408 then, then utilize this gate conductor structure 408 to make the cover curtain, carry out the implantation manufacturing process of a micro-N type admixture, and then in the N channel thin-film transistor, form a ldd structure (Lightly Doped Drain) 409, then be after forming a core dielectric material layer (inter-layer dielectrics layer) 410 in these gate insulator 407 tops shown in Fig. 4 (f) with this gate conductor structure 408, define required contact hole in the appropriate location with the 3rd road light shield lithography manufacturing process, last on this core dielectric material layer, form the layer of metal conductor layer and define one source/drain conductor wiring construction 411 and finish manufacturing with the 4th light shield lithography manufacturing process with this contact hole.
And the transparent substrates in above-mentioned each preferred embodiment can be finished with transparent glass, and conductor layer (the about 200nm of thickness) can use sputtering way to form, and it one of is selected from the materials such as chromium, molybdenum tungsten, tantalum, aluminium or copper finishes.Cushion (the about 600nm of thickness) forms with plasma chemical vapor deposition (PECVD), can be selected from silicon nitride, monox or both combinations and finish.Light shield layer (the about 100nm of thickness) can use sputtering way to form, and can be selected from the high and light tight material of fusing points such as chromium, molybdenum, tungsten as for its material and finish.Wherein amorphous silicon layer (the about 100nm of thickness) uses high temperature furnace to return fiery dehydrogenation 30 minutes in 400 degree in the preceding elder generation that needs that uses the laser crystallization manufacturing process, and the energy of laser crystallization manufacturing process needs at 300mJ/cm
2Under carry out 100 times the shooting (shots).This heavy doping ion cloth is planted manufacturing process can As or the P ion mixes and its doping content (doping concentration) is about 5 * 10
15Cm
-2, the doping content of the implantation manufacturing process of this trace N type admixture is about 1 * 10
13Cm
-2Gate insulator (the about 100nm of thickness) is to form with plasma chemical vapor deposition (PECVD), is finished with monox usually.
In addition, this light-shielding structure can also be used as other zone one black matrix" (black matrix) except can be used to cover the irradiation of back light, can save the puzzlement and the alignment issues of making black matrix" in the follow-up manufacturing process separately.
In sum, the back light that the present invention utilizes this light-shielding structure to cover this flat display panel shines, and improves the leakage problem of element to reduce photocurrent.And the present invention also proposes the mode of back-exposure, and finishes this low-temperature polysilicon film transistor flat display panel under the prerequisite that does not increase the light shield number.Execute the craftsman and think and carry out modifying as all so the present invention can be appointed by the person skilled in the art, but all do not break away from the scope of the desired protection of claim.
Claims (10)
1, a kind of film transistor plane indicator panel is characterized in that, comprises:
One transparent substrates;
One cushion is formed on this transparent substrates;
One top grid thin-film transistor structure is formed on this cushion, and it comprises a channel region; And
One light-shielding structure, the subregion of this light-shielding structure is formed at the lower zone of this channel region, avoiding this channel region shone by a back light of this flat display panel, and this cushion is between this light-shielding structure and this top grid thin-film transistor structure.
2, film transistor plane indicator panel as claimed in claim 1 is characterized in that, this transparent substrates is a glass substrate.
3, film transistor plane indicator panel as claimed in claim 1 is characterized in that, this cushion is selected from silicon nitride, monox or its combination and finishes.
4, film transistor plane indicator panel as claimed in claim 1 is characterized in that, this light-shielding structure is finished to be selected from the high and light tight material of fusing points such as chromium, molybdenum, tungsten.
5, film transistor plane indicator panel as claimed in claim 1 is characterized in that, this top grid thin-film transistor structure comprises:
Semi-conductor layer is formed on this cushion, and it comprises this channel layer and one source/drain electrode structure;
One gate insulator structure is formed on this semiconductor layer;
One gate conductor structure is formed on this gate insulator structure, and is covered in the upper area of this channel region;
One dielectric layer is formed on this gate conductor structure and this gate insulator structure;
One conductor wiring construction is formed on this dielectric layer, and pass through the part this insulation course contact with this source/drain electrode with this gate insulator structure;
Wherein this semiconductor layer also comprises a ldd structure, and it is formed at the outer peripheral areas of this channel region, and this source/drain electrode structure is formed at the outer peripheral areas of this ldd structure.
6, film transistor plane indicator panel as claimed in claim 5 is characterized in that, this semiconductor layer is a polysilicon layer.
7, a kind of manufacture method of film transistor plane indicator panel is characterized in that, comprises the following step:
One transparent substrates is provided;
Form a cushion and a top grid thin-film transistor structure in regular turn in this transparent substrates top;
Form a light-shielding structure in this transparent substrates top, make this cushion between this light-shielding structure and this top grid thin-film transistor structure, and the subregion of this light-shielding structure is formed at the lower zone of the channel region of this top grid thin-film transistor structure, shone by a back light of this flat display panel to avoid this channel region.
8, the manufacture method of film transistor plane indicator panel as claimed in claim 7 is characterized in that, the manufacture method of this top grid thin-film transistor structure comprises the following step:
On this cushion, form a semi-conductor layer and a photoresist layer in regular turn, utilize this light-shielding structure from bottom to top to see through this photoresist layer that this transparent substrates exposes to this photoresist layer and removes the light that exposed to the sun for light shield;
With unexposed this photoresist layer is cover curtain, and this semiconductor layer is carried out that a heavy doping ion cloth is planted manufacturing process and source/drain electrode structure of forming a thin film transistor (TFT);
After forming a gate insulator and one first conductor layer on this semiconductor layer in regular turn, this first conductor layer is defined the gate conductor structure of a thin film transistor (TFT) with one second road light shield lithography manufacturing process;
Form a dielectric layer in this gate insulator top, this gate insulator and this dielectric layer are defined a contact hole with one the 3rd road light shield lithography manufacturing process with this gate conductor structure; And
On this dielectric layer, form one second conductor layer and define one source/drain connection structure with one the 4th light shield lithography manufacturing process with this contact hole.
9, the manufacture method of film transistor plane indicator panel as claimed in claim 8 is characterized in that, the manufacture method of this top grid thin-film transistor structure further comprises the following step:
With this gate conductor structure is the cover curtain, and this gate insulator is carried out a light dope ion implantation process and forms a ldd structure.
10, the manufacture method of film transistor plane indicator panel as claimed in claim 7 is characterized in that, the subregion of this light-shielding structure is as a black matrix".
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021230870A CN1173219C (en) | 2002-06-13 | 2002-06-13 | Panel structure and making process of planar film transistor display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021230870A CN1173219C (en) | 2002-06-13 | 2002-06-13 | Panel structure and making process of planar film transistor display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1388406A CN1388406A (en) | 2003-01-01 |
| CN1173219C true CN1173219C (en) | 2004-10-27 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB021230870A Expired - Lifetime CN1173219C (en) | 2002-06-13 | 2002-06-13 | Panel structure and making process of planar film transistor display |
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| Country | Link |
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| CN (1) | CN1173219C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100419514C (en) * | 2006-10-13 | 2008-09-17 | 友达光电股份有限公司 | Method for producing liquid crystal display device substrate |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1317735C (en) * | 2003-01-23 | 2007-05-23 | 友达光电股份有限公司 | Buffer layer capable of promoting electron mobility raising and thin film transistor containing the buffer layer |
| TWI307171B (en) | 2006-07-03 | 2009-03-01 | Au Optronics Corp | Method for manufacturing bottom substrate of liquid crystal display device |
| KR102012854B1 (en) * | 2012-11-12 | 2019-10-22 | 엘지디스플레이 주식회사 | Array substrate for liquid crystal display and method for fabricating the same |
| CN105355590B (en) * | 2015-10-12 | 2018-04-20 | 武汉华星光电技术有限公司 | Array base palte and preparation method thereof |
| CN106526999B (en) * | 2016-12-15 | 2020-02-04 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, substrate and liquid crystal display |
| CN109256397B (en) * | 2018-09-20 | 2021-09-21 | 合肥鑫晟光电科技有限公司 | Display substrate, preparation method thereof and display device |
-
2002
- 2002-06-13 CN CNB021230870A patent/CN1173219C/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100419514C (en) * | 2006-10-13 | 2008-09-17 | 友达光电股份有限公司 | Method for producing liquid crystal display device substrate |
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| Publication number | Publication date |
|---|---|
| CN1388406A (en) | 2003-01-01 |
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