CN117305979A - Silicon-based monocrystalline two-dimensional material epitaxial wafer based on alumina buffer layer and preparation method thereof - Google Patents

Silicon-based monocrystalline two-dimensional material epitaxial wafer based on alumina buffer layer and preparation method thereof Download PDF

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CN117305979A
CN117305979A CN202311309773.3A CN202311309773A CN117305979A CN 117305979 A CN117305979 A CN 117305979A CN 202311309773 A CN202311309773 A CN 202311309773A CN 117305979 A CN117305979 A CN 117305979A
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silicon
alumina
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刘洋博文
沈晓安
杨冰
黄�俊
刘兴林
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Hubei Jiufengshan Laboratory
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Abstract

The invention provides a silicon-based monocrystalline two-dimensional material epitaxial wafer based on an alumina buffer layer and a preparation method thereof, and belongs to the technical field of semiconductors. The method comprises the following steps: preparing an alumina substrate with an active layer; bonding a pre-cleaned silicon-based substrate and the alumina substrate; stripping the alumina active layer to obtain a composite substrate; and depositing a two-dimensional material on the composite substrate to obtain the silicon-based monocrystalline two-dimensional material based on the alumina buffer layer. The method can directly epitaxially grow the two-dimensional semiconductor material on the silicon-based substrate, avoids the transfer process of the two-dimensional semiconductor material, reduces the production cost of the two-dimensional semiconductor material and improves the quality of the two-dimensional semiconductor material.

Description

Silicon-based monocrystalline two-dimensional material epitaxial wafer based on alumina buffer layer and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductors, in particular relates to the technical field of two-dimensional semiconductor material epitaxial wafers, and particularly relates to a silicon-based monocrystalline two-dimensional material epitaxial wafer based on an alumina buffer layer and a preparation method thereof.
Background
Two-dimensional semiconductors are considered to be the most competitive channel material that continues to scale down to the 1nm node, but the high quality growth of two-dimensional semiconductor materials is very limited to the substrate. The large-scale preparation of currently mature single crystal two-dimensional semiconductor materials is usually carried out by using metal or Al 2 O 3 As a substrate, epitaxy is performed by a chemical vapor deposition method (CVD). The two substrates can be used for preparing large-area single crystals, the currently reported single crystal graphene can reach 6 inches and even 8 inches, and the single crystals h-BN (hexagonal boron nitride) and molybdenum disulfide can reach 2-4 inches. However, it is very difficult to realize the preparation of a single crystal two-dimensional semiconductor material using silicon as a substrate. The silicon-based substrate is usually provided with an oxide layer of amorphous SiO 2 It is difficult to directly grow monocrystalline two-dimensional materials on the surface of the semiconductor material because it is not possible to provide a suitable lattice for nucleation and directional epitaxy of the two-dimensional semiconductor material. The larger lattice mismatch between the silicon-based substrate and the two-dimensional material and the amorphous oxide layer both lead to the difficulty of forming a wafer-level single crystal on the surface of the two-dimensional atomic layer, and further lead to the serious limitation of the application and development of the two-dimensional material in the semiconductor field.
In order to apply the two-dimensional graphene and the two-dimensional transition metal sulfide to the silicon-based integration field, two-dimensional materials are required to be prepared on other substrates, and then transferred to the silicon-based substrate, so that the preparation of the device with high integration level is realized through a mature CMOS (complementary metal oxide semiconductor) process. For two-dimensional materials grown on metal substrates, the more mature process of transferring them to silicon-based substrates is currently wet transfer. Etching a metal substrate through a metal etching liquid, and cleaning the etched surface through acid and alkali solution for a plurality of times to achieve the effect of completely removing metal; transferring the two-dimensional material onto a target silicon-based substrate; and then cleaning, drying, annealing and other process links are carried out on the surface of the material, and finally the aim of transferring the two-dimensional material to the silicon-based substrate is fulfilled. As the two-dimensional material has the thickness of only a few atomic layers, defects such as wrinkles, cracks and the like can be easily generated in the wet transfer process, so that the material performance is seriously affected.
A bonding apparatus supporting two-dimensional materials is disclosed in Larget-area integration of two-dimensional materials and their heterostructures by wafer bonding (https:// doi. Org/10.1038/s 41467-021-21136-0) for bonding two-dimensional materials directly to Si substrates using an adhesive. And different bonding parameters are changed for different two-dimensional materials to realize silicon-based integration of a plurality of two-dimensional materials. In the document, by carrying out material analysis on the whole wafer transferred, the conclusion is that the method can realize the integration of the silicon-based two-dimensional material at the wafer level under the condition of ensuring that the material is not damaged; transistor arrays of whole wafers were also prepared to verify material properties and uniformity. Wafer-level two-dimensional material transfer by a bonding method keeps the excellent properties of the material to a great extent; however, the problems of impurity introduction and wrinkling in the original substrate removal process still exist, and the precision requirement of the two-dimensional material on the automation equipment is very strict, so that the cost for developing the high-integration and automatic transfer equipment is very high.
The non-insulating substrate such as a sapphire substrate can realize large-area single crystal two-dimensional material epitaxial growth, and further III-V group semiconductors can be continuously grown on the two-dimensional material through van der Waals epitaxy, so that high-performance LED devices can be manufactured. Or transferring the grown two-dimensional material from the sapphire substrate to the silicon-based substrate by a transfer method, so as to realize the integrated application of some photoelectric devices. However, the heat dissipation performance of the sapphire substrate is much worse than that of the silicon substrate or the silicon carbide substrate, and the heat dissipation performance directly affects the performance exertion and the service life of the device and even the whole chip, so that the technical scheme cannot be adopted in many power devices or video devices.
In view of the above, it is necessary to develop a technique for epitaxially growing a two-dimensional semiconductor material directly on a silicon-based substrate having good heat dissipation performance.
Disclosure of Invention
In order to solve the problems, the invention provides a preparation method of a silicon-based monocrystalline two-dimensional material epitaxial wafer based on an alumina buffer layer. The method can realize direct epitaxial growth of the two-dimensional semiconductor material on the silicon-based substrate, avoids using a material transfer process, and greatly improves the quality of the two-dimensional semiconductor material.
Specifically, the invention adopts the following technical scheme to realize the aim:
a preparation method of a silicon-based monocrystalline two-dimensional material epitaxial wafer based on an alumina buffer layer comprises the following steps:
s1, preparing an alumina substrate with an active layer: activating the surface of the aluminum oxide by a high-energy ion implantation technology to form an easily-stripped active layer on the surface of the aluminum oxide; the crystal form of the alumina is single crystal, and the surface crystal face is C face;
s2, bonding a silicon substrate and an alumina substrate: bonding the alumina substrate with the active layer prepared in the step S1 with a pre-cleaned silicon-based substrate;
s3, stripping the alumina active layer: stripping the alumina substrate with the active layer along the active layer by adopting a heat treatment mode, and then annealing and polishing to obtain a composite substrate bonded by alumina and silicon;
s4, preparing a single crystal two-dimensional material: and depositing a two-dimensional material on the surface of the composite substrate to obtain the silicon-based monocrystal two-dimensional material epitaxial wafer based on the alumina buffer layer.
In a preferred embodiment, the distance between the active layer and the surface of the alumina substrate for bonding with the silicon-based substrate in step S1 is 100 to 300nm.
In a preferred embodiment, the bonding in step S2 employs a surface activated bonding technique or a polymer wafer bonding technique.
In a further preferred embodiment, the surface-activated bonding technique employs rapid atom bombardment of the active layer-bearing oxidationActivating the surfaces of an aluminum substrate and the silicon-based substrate, wherein the specific parameters are as follows: vacuum degree of 1X 10 -6 Pa, bombardment voltage of 1.5kV, current of 100mA, argon flow of 10-15 sccm and irradiation time of 20-40 s.
In a further preferred embodiment, the polymeric wafer bonding technique employs benzocyclobutene as the bonding material, baked at 100 ℃ for 5 minutes, and then heated to 150-300 ℃ in an inert atmosphere for 20-60 minutes; the pressure in the bonding process is 300-400 kPa, and the vacuum degree is 10 -3 mbar。
In a still further preferred embodiment, the adhesive material is coated to a thickness of 30 to 50nm.
In a still further preferred embodiment, the heating rate upon heating is from 1 to 10 ℃/min.
In a preferred embodiment, the high energy ion implantation technique employs hydrogen ion and helium ion implantation.
In a further preferred embodiment, the implantation energy of the hydrogen ions is 60keV and the implantation dose is 1X 10 17 cm -2
In a further preferred embodiment, the implantation energy of helium ions is 75keV and the implantation dose is 3.5X10 17 cm -2
In a preferred embodiment, the heat treatment in step S3 means that the structure obtained after bonding in step S2 is kept in an inert atmosphere at 500 to 550 ℃ for 2 hours; the annealing refers to annealing the aluminum oxide substrate after the active layer is stripped for 2-3 hours in an inert atmosphere at 800 ℃.
In a preferred embodiment, the two-dimensional material is one of graphene, hexagonal boron nitride, transition metal sulfide. The transition metal sulfide is preferably molybdenum disulfide.
The invention also provides a silicon-based monocrystalline two-dimensional material epitaxial wafer based on the alumina buffer layer, which is prepared by the method. When the single crystal two-dimensional material is graphene or hexagonal boron nitride, the thickness of the single crystal two-dimensional material is 0.34nm; when the single crystal two-dimensional material is transition metal sulfide, the thickness of the single crystal two-dimensional material is 0.65-0.66 nm.
Compared with the prior art, the invention has the following beneficial effects: (1) The method for compounding the alumina substrate and the silicon substrate is adopted, the purpose of directly epitaxially growing the two-dimensional material on the silicon substrate is realized, the process of transferring the two-dimensional material is avoided, the technical path is simpler, the industrialization difficulty is lower, the production cost of the two-dimensional material is reduced, and the quality of the two-dimensional material is improved. (2) Since the heat dissipation performance of the silicon-based substrate is superior to that of the sapphire substrate, the thermal conductivity of the composite substrate is also superior to that of a single sapphire substrate. (3) According to the invention, the alumina substrate is cut into a plurality of alumina thin layers, so that the utilization rate of the sapphire substrate is greatly improved, the consumption of the sapphire substrate is reduced, and the cost of raw materials is reduced on the other hand.
Drawings
FIG. 1 is a flow chart of preparing a silicon-based single crystal two-dimensional material epitaxial wafer based on an alumina buffer layer in example 1;
FIG. 2 is a flow chart of preparing a silicon-based single crystal two-dimensional material epitaxial wafer based on an alumina buffer layer in example 4;
FIG. 3 is a schematic structural diagram of a silicon-based single crystal two-dimensional material epitaxial wafer based on an alumina buffer layer prepared in examples 1 to 3;
fig. 4 is a schematic structural diagram of a silicon-based single crystal two-dimensional material epitaxial wafer based on an alumina buffer layer prepared in examples 4 to 6.
In the figure: 11. an alumina substrate; 12. an alumina substrate having an active layer; 13. an alumina substrate from which the active layer is peeled; 2. an active layer; 3. a silicon-based substrate; 31. a silicon dioxide layer; 32. silicon-based; 4. a single crystal two-dimensional material layer; 5. an adhesive layer.
Detailed Description
The following description sets forth a clear and complete description of the present invention, in connection with embodiments, so that those skilled in the art will fully understand the present invention. It will be apparent that the described embodiments are only some, but not all, of the preferred embodiments of the present invention. Any equivalent alterations or substitutions for the following embodiments without any inventive effort by those of ordinary skill in the art are intended to be within the scope of the present invention.
Example 1
As shown in fig. 1, the embodiment provides a method for preparing a silicon-based monocrystalline graphene epitaxial wafer based on an alumina buffer layer, which comprises the following steps:
s1, preparing an alumina substrate with an active layer
Preparing an alumina substrate 11 having the same size as the silicon-based substrate and a crystal form of alpha-Al 2 O 3 The surface crystal plane is C plane. High energy ion implantation techniques are used to implant H/He ions into the surface of the alumina substrate 11. Wherein the implantation energy of hydrogen ions is 60keV and the implantation dosage is 1×10 17 cm -2 The method comprises the steps of carrying out a first treatment on the surface of the Helium ion implantation energy of 75keV and implantation dose of 3.5X10 17 cm -2 . And forming a releasable active layer 2 at a depth of 200nm from the surface of the alumina substrate 11 for bonding with the silicon substrate 3 to obtain an alumina substrate 12 with an active layer.
S2, bonding silicon substrate and alumina substrate
The silicon substrate 3 is cleaned, and acetone, isopropanol and deionized water are used for cleaning the surface of the silicon substrate respectively, so that pollutant residues on the surface are removed. After washing, use N 2 And purging the surface of the silicon-based substrate to dry and clean the silicon-based substrate. The silicon-based substrate 3 has a structure of a composite structure in which a silicon oxide layer 31 is deposited on a silicon base 32.
And (3) bonding the aluminum oxide substrate with the active layer obtained in the step (S1) and the cleaned silicon-based substrate by adopting a Surface Activated Bonding (SAB) wafer bonding process. The specific process comprises the following steps: the surface of the alumina substrate 12 having an active layer and the surface of the silicon-based substrate 3 are irradiated with Ar fast atomic bombardment (Ar-FAB), and ions are generated on both surfaces. The technological parameters are as follows: vacuum degree of 1X 10 -6 Pa, bombardment voltage of 1.5kV, current of 100mA, argon flow of 12sccm, and irradiation time of 30s. After bombardment, the activated surface of the alumina substrate 12 having the active layer is immediately contacted with the activated surface of the silicon substrate 3 in full contact and applied 10 5 N pressure bonding for 10s, finishingBonding.
S3, stripping the alumina active layer
And (3) placing the structure obtained in the step (S2) in a nitrogen atmosphere, annealing at 530 ℃ for 2 hours, and peeling the alumina substrate 12 with the active layer along the active layer (2) to obtain an alumina substrate 13 with the peeled active layer. Then annealed at 800℃in a nitrogen atmosphere for 2.5h. Polishing the stripped surface by standard Chemical Mechanical Polishing (CMP) process, reducing roughness of the stripped surface, and completing the C-side single crystal Al on the silicon-based substrate 3 2 O 3 Bonding of the thin films gives a composite substrate in which the alumina substrate 13 and the silicon-based substrate 3 are bonded after the active layer is peeled off.
S4, preparing a monocrystal two-dimensional material
The Chemical Vapor Deposition (CVD) method is adopted, methane is used as a precursor, hydrogen/argon is used as carrier gas, the air pressure before growth is kept at 100mtorr, the temperature is raised to 1080 ℃, and the inflow rates of the argon and the hydrogen are respectively kept at 300sccm and 10sccm. At 1080℃20sccm methane was introduced and maintained for 10 minutes. And then stopping introducing methane and hydrogen, rapidly cooling (100 ℃/min) to 300 ℃, and finally slowly cooling to room temperature to finish the deposition of the monocrystalline two-dimensional material layer 4 (monocrystalline graphene layer), thereby obtaining the silicon-based monocrystalline two-dimensional material epitaxial wafer (graphene wafer) based on the alumina buffer layer shown in fig. 3, wherein the thickness of the monocrystalline two-dimensional material layer 4 is 0.34nm.
Example 2
The method for preparing a silicon-based single crystal hexagonal boron nitride epitaxial wafer based on an alumina buffer layer in this example is basically the same as that in example 1, except that:
in step S1, a releasable active layer 2 (fig. 1) is formed at a depth of 100nm from the surface of the alumina substrate 11 for bonding with the silicon substrate 3, to obtain an alumina substrate 12 having an active layer.
The process parameters in step S2 are as follows: vacuum degree of 1X 10 -6 Pa, bombardment voltage of 1.5kV, current of 100mA, argon flow of 10sccm, and irradiation time of 40s.
And step S3, placing the structure obtained in the step S2 in a nitrogen atmosphere, annealing at 500 ℃ for 2 hours, and stripping the alumina substrate with the active layer along the active ion implantation layer. Then annealed at 800℃in a nitrogen atmosphere for 3 hours.
In the step S4, borane ammonia powder is used as a precursor, 300sccm argon is used as carrier gas, 30sccm hydrogen is used as protective gas, the growth is carried out for 40 minutes at 1050 ℃, then the temperature is rapidly reduced (100 ℃/min) to 300 ℃, finally the temperature is naturally reduced to room temperature, and the deposition of the monocrystal two-dimensional material layer 4 (monocrystal hexagonal boron nitride layer) is completed, so that the silicon-based monocrystal two-dimensional material epitaxial wafer (hexagonal boron nitride wafer) based on the alumina buffer layer shown in FIG. 3 is obtained, and the thickness of the monocrystal two-dimensional material layer 4 is 0.34nm.
Example 3
The method for preparing the silicon-based monocrystalline molybdenum disulfide epitaxial wafer based on the alumina buffer layer in the present embodiment is basically the same as that in embodiment 1, except that:
in step S1, a releasable active layer 2 (fig. 1) is formed at a depth of 300nm from the surface of the alumina substrate 11 for bonding with the silicon-based substrate 3, to obtain an alumina substrate 12 having an active layer.
The process parameters in step S2 are as follows: vacuum degree of 1X 10 -6 Pa, bombardment voltage of 1.5kV, current of 100mA, argon flow of 15sccm, and irradiation time of 20s.
And step S3, placing the structure obtained in the step S2 in a nitrogen atmosphere, annealing at 550 ℃ for 2 hours, and stripping the alumina substrate with the active layer along the active ion implantation layer. Then annealed at 800℃in a nitrogen atmosphere for 2 hours.
In the step S4, sulfur powder is used as a sulfur source, moO 3 As a molybdenum source. The sulfur powder was heated to 200 c and brought into the reaction chamber by a 300sccm argon carrier gas. MoO (MoO) 3 3sccm oxygen and 100sccm argon carrier gas are brought into a reaction cavity, the temperature is raised to 950 ℃, the growth is carried out for 60 minutes at the temperature, then the temperature is slowly reduced to room temperature (50 ℃/min), the deposition of the single crystal two-dimensional material layer 4 (single crystal molybdenum disulfide layer) is completed, and the silicon-based single crystal two-dimensional material epitaxial wafer (molybdenum disulfide wafer) based on the aluminum oxide buffer layer shown in figure 3 is obtained, wherein the thickness of the single crystal two-dimensional material layer 4 is 0.65-0.66 nm.
Example 4
As shown in fig. 2, the preparation method of the silicon-based single crystal graphene epitaxial wafer based on the alumina buffer layer in this embodiment is different from that of embodiment 1 in that:
s2, bonding silicon substrate and alumina buffer material
The silicon substrate 3 is cleaned, and acetone, isopropanol and deionized water are used for cleaning the surface of the silicon substrate respectively, so that pollutant residues on the surface are removed. After washing, use N 2 And purging the surface of the silicon-based substrate to dry and clean the silicon-based substrate.
The alumina substrate 12 with an active layer obtained in step S1 is bonded to the cleaned silicon-based substrate 3 by a polymer wafer bonding process. The specific process comprises the following steps: a 40nm thick adhesive layer 5 was spin-coated on a silicon-based substrate 3 using a polymer benzocyclobutene (BCB) as an adhesive material. The solvent evaporation and curing of the adhesive layer 5 were completed by baking at 100 ℃ for 5 minutes. And then heating in nitrogen atmosphere, wherein the heating rate is 5 ℃/min, the temperature is raised to 200 ℃ and kept for 50 minutes, and the bonding is completed after cooling. Bonding pressure in the bonding process is 350kPa, and vacuum degree of the chamber is 10 -3 mbar。
The structure of the silicon-based single crystal two-dimensional material epitaxial wafer based on the alumina buffer layer obtained in the embodiment is shown in fig. 4.
Example 5
The method for preparing the silicon-based single crystal graphene epitaxial wafer based on the alumina buffer layer in this embodiment is basically the same as that in embodiment 4, except that:
the thickness of the adhesive layer 5 in step S2 was 30nm. The temperature rising rate is 1 ℃/min, and the temperature is raised to 150 ℃ and kept for 60 minutes. The bonding pressure during the bonding process was 300kPa.
Example 6
The method for preparing the silicon-based single crystal graphene epitaxial wafer based on the alumina buffer layer in this embodiment is basically the same as that in embodiment 4, except that:
the thickness of the adhesive layer 5 in step S2 was 50nm. The temperature rising rate is 10 ℃/min, and the temperature is raised to 300 ℃ and kept for 20 minutes. The bonding pressure during the bonding process was 400kPa.
The foregoing description is only of the preferred embodiments of the invention and is not intended to limit the scope of the invention. Various modifications and alterations of this invention will occur to those skilled in the art. Any and all such simple and equivalent variations and modifications are intended to be included within the scope of this invention.

Claims (10)

1. The preparation method of the silicon-based monocrystalline two-dimensional material epitaxial wafer based on the alumina buffer layer is characterized by comprising the following steps of:
s1, preparing an alumina substrate with an active layer: activating the surface of the aluminum oxide by a high-energy ion implantation technology to form an easily-stripped active layer on the surface of the aluminum oxide; the crystal form of the alumina is single crystal, and the surface crystal face is C face;
s2, bonding a silicon substrate and an alumina substrate: bonding the alumina substrate with the active layer prepared in the step S1 with a pre-cleaned silicon-based substrate;
s3, stripping the alumina active layer: stripping the alumina substrate with the active layer along the active layer by adopting a heat treatment mode, and then annealing and polishing to obtain a composite substrate bonded by alumina and silicon;
s4, preparing a single crystal two-dimensional material: and depositing a two-dimensional material on the surface of the composite substrate to obtain the silicon-based monocrystal two-dimensional material epitaxial wafer based on the alumina buffer layer.
2. The method of claim 1, wherein the bonding in step S2 is performed using a surface activated bonding technique or a polymer wafer bonding technique.
3. The method of claim 2, wherein the surface-activated bonding technique uses fast atom bombardment to activate the surfaces of the alumina substrate and the silicon-based substrate with the active layer, and the specific parameters are: vacuum degree of 1X 10 -6 Pa, bombarding voltage of 1.5kV, current of 100mA, argon flow of 10-15 sccmThe irradiation time is 20-40 s.
4. The method of claim 2, wherein the polymer wafer bonding technique uses benzocyclobutene as a bonding material, baked at 100 ℃ for 5 minutes, and then heated to 150-300 ℃ in an inert atmosphere for 20-60 minutes; the pressure in the bonding process is 300-400 kPa, and the vacuum degree is 10 -3 mbar。
5. The method according to claim 4, wherein the heating rate is 1 to 10 ℃/min.
6. The method of claim 1, wherein the high energy ion implantation technique employs hydrogen ion and helium ion implantation.
7. The method according to claim 6, wherein the implantation energy of hydrogen ions is 60keV and the implantation dose is 1X 10 17 cm -2 The method comprises the steps of carrying out a first treatment on the surface of the Or/and helium ion with implantation energy of 75keV and implantation dosage of 3.5X10 17 cm -2
8. The method according to claim 1, wherein the heat treatment in step S3 means that the structure obtained after bonding in step S2 is kept in an inert atmosphere at 500 to 550 ℃ for 2 hours; the annealing refers to annealing the aluminum oxide substrate after the active layer is stripped for 2-3 hours in an inert atmosphere at 800 ℃.
9. The method of claim 1, wherein the two-dimensional material is one of graphene, hexagonal boron nitride, and transition metal sulfide.
10. A silicon-based single crystal two-dimensional material epitaxial wafer based on an alumina buffer layer prepared by the preparation method of any one of claims 1 to 9.
CN202311309773.3A 2023-10-10 2023-10-10 Silicon-based monocrystalline two-dimensional material epitaxial wafer based on alumina buffer layer and preparation method thereof Pending CN117305979A (en)

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