CN117293028A - 一种基于电极和介电层共同转移的二维晶闸管构筑方法 - Google Patents
一种基于电极和介电层共同转移的二维晶闸管构筑方法 Download PDFInfo
- Publication number
- CN117293028A CN117293028A CN202311273341.1A CN202311273341A CN117293028A CN 117293028 A CN117293028 A CN 117293028A CN 202311273341 A CN202311273341 A CN 202311273341A CN 117293028 A CN117293028 A CN 117293028A
- Authority
- CN
- China
- Prior art keywords
- layer
- dimensional
- substrate
- dielectric layer
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012546 transfer Methods 0.000 title claims abstract description 25
- 238000010276 construction Methods 0.000 title claims abstract description 9
- 239000010410 layer Substances 0.000 claims abstract description 134
- 239000000758 substrate Substances 0.000 claims abstract description 64
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000012790 adhesive layer Substances 0.000 claims abstract description 25
- 239000000463 material Substances 0.000 claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000011889 copper foil Substances 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 238000012360 testing method Methods 0.000 claims abstract description 9
- 238000002360 preparation method Methods 0.000 claims abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 30
- 238000001035 drying Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 16
- 238000005516 engineering process Methods 0.000 claims description 13
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000004528 spin coating Methods 0.000 claims description 9
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 7
- 235000013870 dimethyl polysiloxane Nutrition 0.000 claims description 7
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 claims description 7
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 claims description 7
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 7
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 6
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 6
- 238000000231 atomic layer deposition Methods 0.000 claims description 5
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 238000002791 soaking Methods 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000006059 cover glass Substances 0.000 claims description 3
- 239000007772 electrode material Substances 0.000 claims description 3
- 238000005566 electron beam evaporation Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000013461 design Methods 0.000 abstract description 2
- 238000005457 optimization Methods 0.000 abstract description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000000609 electron-beam lithography Methods 0.000 description 2
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- -1 transition metal chalcogenides Chemical class 0.000 description 2
- 206010020751 Hypersensitivity Diseases 0.000 description 1
- 239000002156 adsorbate Substances 0.000 description 1
- 208000026935 allergic disease Diseases 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009396 hybridization Methods 0.000 description 1
- 230000009610 hypersensitivity Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001988 toxicity Effects 0.000 description 1
- 231100000419 toxicity Toxicity 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66015—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
- H01L29/66037—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1606—Graphene
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
本发明公开了一种基于电极和介电层共同转移的二维晶闸管构筑方法,包括以下步骤:选取实验衬底,将铜箔基底上的石墨烯转移至所述实验衬底上,获得石墨烯薄膜;在所述石墨烯薄膜上依次制备介电层、金属电极层、粘附层和支撑层,获得层叠结构;利用水的张力,将所述层叠结构从所述实验衬底的表面剥离;构筑二维晶闸管的衬底,作为目标衬底;将剥离的层叠结构贴合到所述目标衬底上,并将所述粘附层和支撑层去除,进而完成二维晶闸管的制备。本发明利用水的张力进行金属电极和介电层共同转移方法,保证了二维材料界面的平坦、清洁,且具有普适性,有助于基于二维半导体的晶闸管结构设计和优化,扩展新型半导体材料应用。
Description
技术领域
本发明属于范德华转移与集成技术领域,特别是涉及一种基于电极和介电层共同转移的二维晶闸管构筑方法。
背景技术
半导体材料的出现以及相关特性的研究是20世纪初的一项重大科学突破,极大推动了电子技术的发展,开启了电子时代的序幕。电力电子器件通常使用硅作为半导体材料制造。然而,对于新设备小型化和灵活集成的需求推动了新材料对传统硅基的替代研究,二维半导体是新材料的一种,超薄结构和丰富能带使其具有易于栅控,低关态低能耗的优势。利用二维过渡金属硫族化合物(TMDC)构筑的晶闸管有助于提高电学性能。
然而,二维材料的原子薄性质使得它们的晶体结构在标准器件制造过程中很容易被破坏,例如电子束光刻(EBL)和金属的物理气相沉积(PVD)加工工艺过程会导致二维材料/金属电极接触处明显的肖特基势垒和界面状态,原子层沉积技术(ALD)等加工工艺过程会导致不均匀的氧化物轮廓和有缺陷的二维材料/介电层界面。此外,在硅器件中广泛用于实现欧姆接触的替代掺杂技术,例如离子注入和热扩散,并不适用于二维材料,因为这会破坏晶格或引入重大缺陷。此外,由于二维材料对表面吸附物或环境的超敏感性,在二维材料/金属接触处和二维材料/介电层界面也容易形成由缺陷、轨道杂化或化学紊乱引起的复杂界面状态,严重限制了二维器件中最佳的触点和介电层的实现。
为了避免在传统工艺中制造金属电极和介电层过程中对二维材料界面的损伤,发展出了电极和介电层的转移方案。现有的电极转移方案中制作待转移电极的衬底一般是单晶硅,单晶硅的表面存在大量悬挂键,导致在其表面上蒸镀的电极以及粘附层难以剥离,需要经过HMDS蒸气处理,单晶硅表面和粘附层之间的粘附力可显著降低,但是HMDS具有较强的毒性。因此,亟需提出一种基于电极和介电层共同转移的二维晶闸管构筑方法以解决现有技术中存在的问题。
发明内容
本发明的目的是提供一种基于电极和介电层共同转移的二维晶闸管构筑方法,利用水的张力进行金属电极和介电层共同转移,解决了电极和介电层难剥离的问题,保证了二维材料/金属接触处和二维材料/介电层界面的洁净和平坦,促进基于二维半导体的电子学以扩展新型半导体材料应用及摩尔定律,以解决上述现有技术存在的问题。
为实现上述目的,本发明提供了一种基于电极和介电层共同转移的二维晶闸管构筑方法,包括以下步骤:
选取实验衬底,将铜箔基底上的石墨烯转移至所述实验衬底上,获得石墨烯薄膜;
在所述石墨烯薄膜上依次制备介电层、金属电极层、粘附层和支撑层,获得层叠结构;
利用水的张力,将所述层叠结构从所述实验衬底的表面剥离;
构筑二维晶闸管的衬底,作为目标衬底;
将剥离的层叠结构贴合到所述目标衬底上,并将所述粘附层和支撑层去除,进而完成二维晶闸管的制备。
可选地,将铜箔基底上的石墨烯转移至所述实验衬底之前的过程还包括:对所述实验衬底依次经过丙酮和异丙醇清洗并吹干,然后进行亲水处理。
可选地,将铜箔基底上的石墨烯转移至所述实验衬底上的过程包括:基于氧等离子体轰击去除铜箔基底上的石墨烯,然后放入1mol·L-1的FeCl3溶液中溶解铜箔,用盖玻片捞取液面上的石墨烯层,对所述石墨烯层进行清洗和吹干,并转移到实验衬底上,获得实验衬底上的石墨烯薄膜。
可选地,制备介电层的过程包括:在所述石墨烯薄膜的表面旋涂光刻胶并烘干,获得光刻胶层;利用光刻技术在所述光刻胶层上制作图案化的开口,然后利用原子层沉积技术在所述光刻胶层表面沉积介电层材料,最后将所述光刻胶层去除,获得图案化的介电层。
可选地,制备金属电极层的过程包括:在所述介电层表面旋涂光刻胶并烘干,获得光刻胶层,利用光刻技术在所述光刻胶层上制作图案化的开口,然后利用电子束蒸发镀膜技术在所述光刻胶层表面沉积金属电极材料,最后将所述光刻胶层去除,获得图案化的金属电极层。
可选地,制备粘附层的过程包括:在所述金属电极层的表面旋涂PMMA并烘干,获得粘附层。
可选地,制备支撑层的过程包括:将100微米厚的PDMS薄膜贴合在200微米厚的玻璃薄板上组成的结构作为支撑层,并将支撑层的PDMS薄膜一侧贴合在粘附层上。
可选地,将所述层叠结构从所述实验衬底的表面剥离的过程包括:利用注射器抽取去离子水,并沿着实验衬底的边缘进行注水,直至层叠结构从所述实验衬底的表面剥离。
可选地,所述目标衬底表面预制有全二维半导体材料构筑的晶闸管异质结结构的氧化硅/单晶硅衬底。
可选地,将所述层叠结构贴合在目标衬底及粘附层、支撑层去除的过程包括:首先将支撑层从层叠结构上剥离,然后将剥离支撑层的层叠结构放入丙酮溶液中浸泡,直至粘附层溶解;最后将溶解了粘附层的层叠结构进行冲洗和吹干。
本发明的技术效果为:
本发明利用水的张力进行金属电极和介电层共同转移方法,保证了二维材料界面的平坦、清洁,且具有普适性,有助于基于二维半导体的晶闸管结构设计和优化,扩展新型半导体材料应用。
附图说明
构成本申请的一部分的附图用来提供对本申请的进一步理解,本申请的示意性实施例及其说明用于解释本申请,并不构成对本申请的不当限定。在附图中:
图1为本发明实施例中的制作金属电极和介电层的流程示意图;
图2为本发明实施例中的金属电极和介电层共同转移的方法示意图。
具体实施方式
需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本申请。
需要说明的是,在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行,并且,虽然在流程图中示出了逻辑顺序,但是在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤。
实施例一
根据图1、图2所示,本实施例提供了一种基于电极和介电层共同转移的二维晶闸管构筑方法,包括如下工艺步骤:
步骤1:SiO2/Si衬底依次经过丙酮和异丙醇清洗并吹干,然后进行亲水处理,全过程保证衬底界面的清洁。
步骤2:将生长有石墨烯的铜箔一面上匀PMMA作支撑层,用氧等离子体轰击去除另一面的石墨烯,然后放入1mol·L-1的FeCl3溶液中以溶解铜箔,用盖玻片捞取液面上的PMMA/石墨烯层,用去离子水对其进行多次冲洗,之后使用氮气吹干,最后一次用步骤1中的衬底捞取,从而得到转移至SiO2/Si衬底上的石墨烯薄膜。
步骤3:在衬底/石墨烯表面旋涂光刻胶并烘干,得到光刻胶层,利用光刻技术在所述光刻胶层上得到图形化的开口,然后利用原子层沉积技术在所述光刻胶层表面沉积介电层材料,然后将所述光刻胶层去除,得到图案化的介电层。
步骤4:在衬底/石墨烯/介电层表面旋涂光刻胶并烘干,得到光刻胶层,利用光刻技术在所述光刻胶层上得到图形化的开口,然后利用电子束蒸发镀膜技术在所述光刻胶层表面沉积金属电极材料,然后将所述光刻胶层去除,得到图案化的金属电极层。
步骤5:在衬底/石墨烯/介电层/电极表面旋涂PMMA并烘干,得到粘附层。
步骤6:将100微米厚的PDMS薄膜贴合在200微米厚的玻璃薄板上组成的叠层结构作为支撑层,然后将支撑层的PDMS薄膜一侧贴合在粘附层上;贴合时只需要将支撑层轻置于粘附层上,由于PDMS和光滑平面的贴合特性,支撑层会和粘附层自发地全面贴合;若在支撑层和粘附层过程中施加过大的压力,可能会在步骤7的剥离过程中,由于应力释放导致剥离的电极层/粘附层撕裂。支撑层和粘附层贴合之后可以加热到60摄氏度保持10分钟,然后自然冷却到室温,以使支撑层和粘附层贴合得更牢固。
步骤7:用洁净的注射器抽取去离子水,沿着衬底的边缘注水,利用水的张力剥离下衬底。
步骤8:用氧等离子体轰击去除叠层结构最上面的石墨烯。
步骤9:介电层/电极层/粘附层/支撑层组成的叠层结构的支撑层一侧贴到玻璃片上,利用转移台将所述叠层结构贴合到目标衬底上;贴合状态下施加一定的压力,同时加热到75摄氏度,维持5分钟,使得介电层/电极层/粘附层和目标衬底贴合得更牢固;目标衬底为表面预制有全二维半导体材料构筑的晶闸管异质结结构的氧化硅/单晶硅衬底。
步骤10:首先将支撑层从目标衬底/介电层/电极层/粘附层组成的叠层结构上剥离,然后将目标衬底/介电层/电极层/粘附层组成的叠层结构放入丙酮溶液中浸泡5分钟,以将粘附层溶解;最后将目标衬底/电极层组成的叠层结构在去离子水中冲洗干净,并用氮气流吹干;需要注意的是,浸泡时间过长可能会导致电极层从目标衬底上剥离。
以上对于利用水的张力进行金属电极和介电层共同转移方法进行了详细介绍。以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的一般技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。
以上所述,仅为本申请较佳的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应该以权利要求的保护范围为准。
Claims (10)
1.一种基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,包括以下步骤:
选取实验衬底,将铜箔基底上的石墨烯转移至所述实验衬底上,获得石墨烯薄膜;
在所述石墨烯薄膜上依次制备介电层、金属电极层、粘附层和支撑层,获得层叠结构;
利用水的张力,将所述层叠结构从所述实验衬底的表面剥离;
构筑二维晶闸管的衬底,作为目标衬底;
将剥离的层叠结构贴合到所述目标衬底上,并将所述粘附层和支撑层去除,进而完成二维晶闸管的制备。
2.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
将铜箔基底上的石墨烯转移至所述实验衬底之前的过程还包括:对所述实验衬底依次经过丙酮和异丙醇清洗并吹干,然后进行亲水处理。
3.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
将铜箔基底上的石墨烯转移至所述实验衬底上的过程包括:基于氧等离子体轰击去除铜箔基底上的石墨烯,然后放入1mol·L-1的FeCl3溶液中溶解铜箔,用盖玻片捞取液面上的石墨烯层,对所述石墨烯层进行清洗和吹干,并转移到实验衬底上,获得实验衬底上的石墨烯薄膜。
4.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
制备介电层的过程包括:在所述石墨烯薄膜的表面旋涂光刻胶并烘干,获得光刻胶层;利用光刻技术在所述光刻胶层上制作图案化的开口,然后利用原子层沉积技术在所述光刻胶层表面沉积介电层材料,最后将所述光刻胶层去除,获得图案化的介电层。
5.根据权利要求4所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
制备金属电极层的过程包括:在所述介电层表面旋涂光刻胶并烘干,获得光刻胶层,利用光刻技术在所述光刻胶层上制作图案化的开口,然后利用电子束蒸发镀膜技术在所述光刻胶层表面沉积金属电极材料,最后将所述光刻胶层去除,获得图案化的金属电极层。
6.根据权利要求5所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
制备粘附层的过程包括:在所述金属电极层的表面旋涂PMMA并烘干,获得粘附层。
7.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
制备支撑层的过程包括:将100微米厚的PDMS薄膜贴合在200微米厚的玻璃薄板上组成的结构作为支撑层,并将支撑层的PDMS薄膜一侧贴合在粘附层上。
8.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
将所述层叠结构从所述实验衬底的表面剥离的过程包括:利用注射器抽取去离子水,并沿着实验衬底的边缘进行注水,直至层叠结构从所述实验衬底的表面剥离。
9.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
所述目标衬底表面预制有全二维半导体材料构筑的晶闸管异质结结构的氧化硅/单晶硅衬底。
10.根据权利要求1所述的基于电极和介电层共同转移的二维晶闸管构筑方法,其特征在于,
将所述层叠结构贴合在目标衬底及粘附层、支撑层去除的过程包括:首先将支撑层从层叠结构上剥离,然后将剥离支撑层的层叠结构放入丙酮溶液中浸泡,直至粘附层溶解;最后将溶解了粘附层的层叠结构进行冲洗和吹干。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311273341.1A CN117293028A (zh) | 2023-09-28 | 2023-09-28 | 一种基于电极和介电层共同转移的二维晶闸管构筑方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311273341.1A CN117293028A (zh) | 2023-09-28 | 2023-09-28 | 一种基于电极和介电层共同转移的二维晶闸管构筑方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN117293028A true CN117293028A (zh) | 2023-12-26 |
Family
ID=89253160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202311273341.1A Pending CN117293028A (zh) | 2023-09-28 | 2023-09-28 | 一种基于电极和介电层共同转移的二维晶闸管构筑方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117293028A (zh) |
-
2023
- 2023-09-28 CN CN202311273341.1A patent/CN117293028A/zh active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3819954B2 (ja) | 基板上に半導体薄膜を有する構造の製造方法 | |
CN110880920B (zh) | 异质薄膜结构的制备方法 | |
CN108517555B (zh) | 基于范德华外延获得大面积高质量柔性自支撑单晶氧化物薄膜的方法 | |
CN108615700A (zh) | 一种薄型太阳电池刚性-柔性衬底有机键合转移工艺方法 | |
CN106847681B (zh) | 利用非晶锗薄膜实现低温Si-Si键合的方法 | |
CN110120438B (zh) | 基于金属柔性基底的太阳能电池的制备方法 | |
WO2020199299A1 (zh) | 一种在非硅基底上制造压电薄膜谐振器的方法 | |
US10083850B2 (en) | Method of forming a flexible semiconductor layer and devices on a flexible carrier | |
CN117293028A (zh) | 一种基于电极和介电层共同转移的二维晶闸管构筑方法 | |
KR101476746B1 (ko) | 내부식성 모기판을 이용한 플렉서블 금속 기판과 전자소자의 제조방법, 플렉서블 전자소자 및 플렉서블 금속 기판 | |
CN116613058A (zh) | 一种复合基底、复合薄膜及其制备方法 | |
CN116313762A (zh) | 一种金属电极的转移方法 | |
JP4186502B2 (ja) | 薄膜デバイスの製造方法、薄膜デバイスおよび表示装置 | |
US10957538B2 (en) | Method of forming and transferring thin film using SOI wafer and heat treatment process | |
CN112768345A (zh) | 一种基于石墨烯的二维异质结的制备方法 | |
KR101813763B1 (ko) | 부착식 유기 태양전지 및 이의 제조 방법 | |
JP2017507486A (ja) | 基板から剥離可能な薄膜積層体を製造するための方法 | |
CN113078053B (zh) | 一种顶栅结构的制备方法及半导体结构 | |
JP2983717B2 (ja) | 光起電力装置の製造方法 | |
CN111834279B (zh) | 一种临时键合和解键合方法、载片结构及应用 | |
CN117416103A (zh) | 一种层数可控的石墨烯薄膜修饰金属介质及其制备方法 | |
CN116581021A (zh) | 一种利用氟晶云母进行电极转移的方法 | |
JP5103607B2 (ja) | 剥離層除去方法 | |
CN113078044A (zh) | 一种介电材料的制备方法及半导体结构 | |
CN114975084A (zh) | 一种薄膜材料集成方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |