CN117277974A - High-bandwidth transimpedance amplifier based on current buffer - Google Patents
High-bandwidth transimpedance amplifier based on current buffer Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
- H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/36—Indexing scheme relating to amplifiers the amplifier comprising means for increasing the bandwidth
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Abstract
The invention discloses a high-bandwidth transimpedance amplifier based on a current buffer, which comprises the following components: the current buffer unit adopts an adjustable type cascode structure and comprises a voltage signal input end, a current signal input end and a current signal output end, wherein the voltage signal input end is used for being electrically connected with a power supply voltage signal end of a power supply voltage and a reference voltage signal end of a reference voltage source, the current signal input end is used for being electrically connected with a current signal end of an external device, and the current signal output end is electrically connected with a signal input end of the core amplifier unit; the core amplifier unit comprises N amplifying stages, a signal input end and a signal output end, wherein the input end of the 1 st amplifying stage is the signal input end, and the output end of the N amplifying stage is the signal output end; n is an odd number; the first end of the feedback unit is electrically connected with the signal input end, and the second end of the feedback unit is electrically connected with the signal output end. The invention can be used for isolating the large capacitance of the output end of the silicon photomultiplier and improving the bandwidth of the transimpedance amplifier.
Description
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a high-bandwidth transimpedance amplifier based on a current buffer.
Background
With the development of laser technology and integrated circuit technology, lidar is gradually applied to the fields of automatic driving, consumer electronics and the like. At present, lidar based on the direct time of flight method is most widely used, and referring to fig. 1, fig. 1 is a schematic diagram of a typical lidar system based on the direct time of flight method, which is generally composed of three parts, namely, laser emission, front-end reception and back-end signal processing, wherein the front-end reception is generally a main factor limiting the performance of the lidar system.
Since the linear mode avalanche photodiode is typically fabricated using special processes, it is difficult to monolithically integrate with front-end receive circuitry, while the analog silicon photomultiplier has a larger gain than the linear mode avalanche photodiode and can be designed for full integration with later circuitry, as well as a larger dynamic range and sensitivity for longer range detection. Therefore, the analog silicon photomultiplier is often used as a photoelectric detection device and is cascaded with a trans-impedance amplifier circuit at a later stage in a direct coupling mode, but the large parasitic capacitance at the output end of the silicon photomultiplier reduces the bandwidth of the trans-impedance amplifier, so that the measuring speed and the measuring precision of a laser radar system are severely limited.
Disclosure of Invention
In order to solve the above problems in the related art, the present invention provides a high bandwidth transimpedance amplifier based on a current buffer. The technical problems to be solved by the invention are realized by the following technical scheme:
the invention provides a high-bandwidth transimpedance amplifier based on a current buffer, comprising:
the current buffer unit adopts an adjustable type cascode structure and comprises a voltage signal input end, a current signal input end and a current signal output end, wherein the voltage signal input end is used for being electrically connected with a power supply voltage signal end of a power supply voltage and a reference voltage signal end of a reference voltage source, the current signal input end is used for being electrically connected with a current signal end of an external device, and the current signal output end is electrically connected with a signal input end of the core amplifier unit;
the core amplifier unit comprises N amplifying stages, a signal input end and a signal output end, wherein the input end of the 1 st amplifying stage is the signal input end, and the output end of the N th amplifying stage is the signal output end; n is an odd number;
the feedback unit comprises a first end and a second end, wherein the first end is electrically connected with the signal input end, and the second end is electrically connected with the signal output end.
The invention has the following beneficial technical effects:
the current buffer unit adopts an adjustable type cascode structure, can isolate a large capacitance at the output end of the silicon photomultiplier, and can improve the influence of the large capacitance output by the silicon photomultiplier on the bandwidth of the transimpedance amplifier while not affecting the dynamic range and linearity of the circuit, thereby improving the bandwidth of the transimpedance amplifier; the feedback unit introduces a left half plane zero point, so that the loop stability can be improved, and the conversion and amplification functions from input current to output voltage can be realized; the core amplifier unit comprises an odd number of amplifying stages, so that the input resistance of the core amplifier can be reduced while the gain of the core amplifier is improved, and the bandwidth of the transimpedance amplifier is improved. Therefore, the invention can improve the bandwidth of the transimpedance amplifier and obviously improve the measurement distance and the ranging accuracy of the laser radar system.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
FIG. 1 is a schematic diagram of a typical direct time-of-flight based lidar system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a high-bandwidth transimpedance amplifier based on a current buffer according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a circuit topology of an exemplary current buffer unit provided by an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a feedback unit according to an embodiment of the present invention;
fig. 5 is a schematic circuit topology diagram of a high-bandwidth transimpedance amplifier based on a current buffer according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but embodiments of the present invention are not limited thereto.
In the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
Although the invention is described herein in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
Fig. 2 is a circuit configuration diagram of a high-bandwidth transimpedance amplifier based on a current buffer according to an embodiment of the present invention, and as shown in fig. 2, the transimpedance amplifier includes: a current buffer unit 100, a feedback unit 200, and a core amplifier unit 300. The current buffer unit 100 adopts an adjustable cascode structure, and comprises a voltage signal input end, a current signal input end and a current signal output end, wherein the voltage signal input end is used for being electrically connected with a power supply voltage signal end of a power supply voltage VDD and a reference voltage signal end of a reference voltage source V1, and the current signal input end I IN For electrical connection with the current signal terminals of the external device, and the current signal output terminals are electrically connected with the signal input terminals of the core amplifier unit 300. The core amplifier unit 300 includes N amplifying stages, a signal input terminal and a signal output terminal V OUT The input end of the 1 st amplifying stage is a signal input end, the output end of the N-th amplifying stage is a signal output end, and N is an odd number. The feedback unit 200 includes a first end and a second end, wherein the first end is electrically connected to the signal input end, and the second end is electrically connected to the signal output end.
Specifically, the transfer functions of the current buffer unit 100 are expressed as formulas (1-1), (1-2) and (1-3):
a＝{[1+(1+g mB R B )g m2 r o2 ]+r o2 /r o1 }(1-2)；
b＝[r o2 C in +(r o2 /r o1 +1+g m2 r o2 )R B C B +(r o2 /r o1 +r o2 /R B +1+g mB r o2 )R B C Z ]
(1-3)；
wherein g mB ＝g m4 +g m5 ；R B ＝r o4 //r o5 //(1/g m6 )；C z ＝C gs2 +C gd4 +C gd5 ；C B ＝C db4 +C db5 +C gs6 +C db6 +C gb6 ；C in ＝C PD +C sb2 +C gs4 +C gs5 ；C gs2 、C gs4 、C gs5 And C gs6 Parasitic capacitances of gate sources of transistors M2, M4, M5 and M6, C gd4 And C gd5 Parasitic capacitance of gate and drain of transistors M4 and M5, respectively, C db4 、C db5 And C db6 Drain-to-liner parasitic capacitances, C, of transistors M4, M5 and M6, respectively gb6 Parasitic capacitance of gate line of transistor M6, C sb2 Parasitic capacitance r is the source line of transistor M2 o1 、r o2 、r o4 And r o5 Output resistors g of transistors M1, M2, M4 and M5, respectively m2 、g m4 、g m5 And g m6 Transconductance, C, of transistors M2, M4, M5 and M6, respectively PD Is the large capacitance of the output end of the silicon photomultiplier, I' IN Is the input current of the current buffer unit, I' OUT S represents a laplace variation, s=jw, w is an angular frequency, j is an imaginary unit, and// represents a parallel connection.
In some embodiments, the reference voltage signal terminal comprises: a first reference voltage signal terminal VB1 and a second reference voltage signal terminal VB2. The voltage signal input terminal of the current buffer unit 100 includes: a first signal input terminal for electrically connecting to the power supply voltage VDD, a second signal input terminal for electrically connecting to the first reference voltage signal terminal VB1, and a third signal input terminal for electrically connecting to the second reference voltage signal terminal VB2. Electric currentThe buffer unit includes: transistor M1, transistor M2, transistor M3, transistor M4, transistor M5, and transistor M6. The second poles of the transistor M1, the transistor M4 and the transistor M6 are electrically connected with a power supply voltage signal terminal; the third pole of the transistor M1 is electrically connected with the first pole of the transistor M4, and the first pole is electrically connected with the second reference voltage signal end VB 2; the third electrode of the transistor M4 is electrically connected to the first and third electrodes of the transistor M6; the first pole of the transistor M5 is electrically connected with the first pole of the transistor M4, the third pole is electrically connected with the third pole of the transistor M4, and the second pole is electrically connected with the grounding end CND; the second pole of the transistor M2 is electrically connected with the first pole of the transistor M4 after being short-circuited with the substrate, the first pole is electrically connected with the third pole of the transistor M4, and the third pole is electrically connected with the third pole of the transistor M3; the second pole of the transistor M3 is electrically connected with the grounding end CND, and the first pole is electrically connected with the first reference voltage signal end VB 1; wherein the third electrode of the transistor M1 is used as a power signal input terminal, and the third electrode of the transistor M3 is used as a power signal output terminal I OUT The method comprises the steps of carrying out a first treatment on the surface of the The second pole of the transistor M1, the second pole of the transistor M4 and the second pole of the transistor M6 are used as the first signal input terminals; the first pole of the transistor M3 serves as the second signal input terminal, and the first pole of the transistor M1 serves as the third signal input terminal.
Specifically, the first electrode is a grid electrode, the second electrode is a source electrode, and the third electrode is a drain electrode; the transistor M1, the transistor M2, the transistor M4 and the transistor M6 are PMOS transistors; the transistors M3 and M5 are NMOS transistors, and an exemplary circuit topology of the current buffer unit 100 is shown in fig. 3. The structure is based on a common gate amplifier, and introduces an active feedback common source tube M4 at the source electrode and the gate electrode of an input tube M2; the structure adopting gain bootstrap improves the loop gain of the circuit, provides stable self-bias for the circuit, and simultaneously, the added active feedback path greatly reduces the equivalent input impedance of the circuit, thereby increasing the main pole frequency of the circuit and improving the bandwidth of the circuit. The following formula (1-4) is an equivalent input impedance expression, and the formula (1-5) is a main pole expression of the circuit:
since the output node voltage of the current buffer unit 100 is determined by the feedback of the core amplifier unit 300 of the next stage, the current source tube M3 is adopted to replace the resistor of the traditional regulated cascode structure at the position, the drain electrode of the current source tube M3 is connected with the output node to provide a larger dynamic range of the output voltage, and the VB1 provides bias for the current source tube M3 to control the current of the branch. For the branch circuit consisting of M4, M5 and M6, a relation between the currents of M4 and M5 controlled by the source voltage of M2 and the current of M6 controlled by the gate voltage of M2 can be established, and the difference value of the gate-source voltage of M2 is determined because the current of the input tube M2 is determined, so that a unique circuit static working point can be solved, and the voltage value of each node of the circuit is determined. The invention adopts a current source tube M5 to replace the resistance of the traditional regulation type common-source common-gate structure at the position, and the grid electrode of the M5 is connected with the source electrode of an input tube M2 to control the maximum current of the branch. Here, the input tube M2 adopts a source-liner short-circuited structure, so that the threshold voltage of the input tube can be reduced, and the voltage margin of the circuit can be improved, so as to ensure that all transistors operate in a saturation region. Compared with the traditional regulation type cascode structure, the invention has the advantages that the drain electrode of the active feedback tube M4 is connected with the PMOS tube M6 in parallel in a diode connection type, so that the equivalent impedance of the drain electrode node of the M4 is reduced, the pole frequency at the node is further increased, and the stability of the circuit is improved. Referring specifically to equations (1-6), (1-7), (1-8) and (1-9), equations (1-6), (1-7), (1-8) and (1-9) are circuit feedback loop transfer function expressions.
a＝C B R B r o1 (C in +C Z )(r o2 +r o3 )(1-7)；
b＝r o1 (r o2 +r o3 )(C in +C Z )+(r o1 +r o2 +r o3 )C B R B (1-8)；
c＝r o1 +r o2 +r o3 +g m2 r o2 r o1 g mB R B (1-9)；
Wherein r is o3 The output resistance of M3.
In some embodiments, among the N amplification stages, an output of the nth amplification stage is electrically connected to an input of the n+1th amplification stage; n is any integer from 1 to N.
Specifically, the n+1th amplification stage includes: a first transistor, a second transistor, and a third transistor; the first electrode of the first transistor is electrically connected with the output end of the nth amplifying stage, and the second electrode is electrically connected with the power voltage signal end; the first electrode of the second transistor is electrically connected with the first electrode of the first transistor, the third electrode is electrically connected with the third electrode of the first transistor, and the second electrode is electrically connected with the grounding end GND; the first pole and the third pole of the third transistor are respectively and electrically connected with the third pole of the second transistor and the input end of the n+2th amplifying stage, and the second pole is electrically connected with the grounding end GND. The first transistor is a PMOS transistor, and the second and third transistors are NMOS transistors.
In some embodiments, as shown in fig. 4, the feedback unit 200 includes a feedback resistance unit 220 and a feedback capacitance unit 210, and the feedback resistance unit 220 and the feedback capacitance unit 210 are connected in parallel.
The circuit topology of the high bandwidth transimpedance amplifier is shown in FIG. 5, where transistors M1-M6 form the current buffer unit 100, transistors M7-M9 form the first amplification stage in the core amplifier unit 300, transistors M10-M12 form the second amplification stage in the core amplifier unit 300, transistors M13-M15 form the third amplification stage in the core amplifier unit 300, and capacitor C F And R is F A feedback unit 200 is constituted, and a capacitor C F For feeding back the capacitor unit, the resistor R F Is a feedback resistor unit.
The feedback capacitor and the feedback resistor are connected in parallel to introduce a left half plane zero point, so that the loop stability is improved, and the formula (2-1) is a left half plane zero point expression introduced by the feedback capacitor and the feedback resistor in parallel, wherein the formula (2-1) is shown in the specification:
the core amplifier unit in fig. 5 adopts a classical three-stage push-pull amplifier structure, so that the function of a push-pull output stage can be realized while the gain of the amplifier is improved, and the transimpedance amplifier can drive the maximum output current of the silicon photomultiplier under lower static power consumption. Meanwhile, as the load of each stage of the circuit adopts diode connection type NMOS (N-channel metal oxide semiconductor) tubes, namely M9, M12 and M15, the output node of each corresponding stage belongs to a low-impedance node (equivalent impedance is about 1/gm), namely the pole frequency at the output node of each stage is increased, and for the main pole of the circuit at the input end, the overall bandwidth of the circuit is effectively improved, and the stability of the circuit is ensured.
The high-bandwidth transimpedance amplifier based on the circuit buffer provided by the embodiment adopts the structure that the current buffer unit is used for isolating a large capacitor at the output end of the silicon photomultiplier, improves the bandwidth of the transimpedance amplifier, adopts the feedback unit comprising the feedback capacitor and the feedback resistor, introduces a left half plane zero point in parallel with the feedback capacitor and the feedback resistor, improves the loop stability, and simultaneously the feedback resistor is used for realizing the conversion and amplification function from input current to output voltage.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (8)
1. A high bandwidth transimpedance amplifier based on a current buffer, comprising:
the current buffer unit adopts an adjustable type cascode structure and comprises a voltage signal input end, a current signal input end and a current signal output end, wherein the voltage signal input end is used for being electrically connected with a power supply voltage signal end of a power supply voltage and a reference voltage signal end of a reference voltage source, the current signal input end is used for being electrically connected with a current signal end of an external device, and the current signal output end is electrically connected with a signal input end of the core amplifier unit;
the core amplifier unit comprises N amplifying stages, a signal input end and a signal output end, wherein the input end of the 1 st amplifying stage is the signal input end, and the output end of the N th amplifying stage is the signal output end; n is an odd number;
the feedback unit comprises a first end and a second end, wherein the first end is electrically connected with the signal input end, and the second end is electrically connected with the signal output end.
2. The current buffer-based high bandwidth transimpedance amplifier according to claim 1, wherein the reference voltage signal terminal comprises: a first reference voltage signal terminal and a second reference voltage signal terminal; the current buffer unit includes: transistor M1, transistor M2, transistor M3, transistor M4, transistor M5, and transistor M6;
the second pole of the transistor M1, the second pole of the transistor M4 and the second pole of the transistor M6 are electrically connected with the power supply voltage signal terminal; a third electrode of the transistor M1 is electrically connected to a first electrode of the transistor M4, and the first electrode is electrically connected to the second reference voltage signal terminal; the third electrode of the transistor M4 is electrically connected with the first electrode and the third electrode of the transistor M6; a first pole of the transistor M5 is electrically connected to the first pole of the transistor M4, a third pole is electrically connected to a third pole of the transistor M4, and a second pole is electrically connected to the ground terminal CND; the second pole of the transistor M2 is electrically connected with the first pole of the transistor M4 after being in short circuit with the substrate, the first pole is electrically connected with the third pole of the transistor M4, and the third pole is electrically connected with the third pole of the transistor M3; a second pole of the transistor M3 is electrically connected to the ground terminal CND, and a first pole is electrically connected to the first reference voltage signal terminal;
the third electrode of the transistor M1 is used as the power signal input end, and the third electrode of the transistor M3 is used as the power signal output end.
3. The high bandwidth transimpedance amplifier according to claim 2, wherein the first electrode is a gate electrode, the second electrode is a source electrode, and the third electrode is a drain electrode; the transistor M1, the transistor M2, the transistor M4 and the transistor M6 are PMOS transistors; the transistor M3 and the transistor M5 are NMOS transistors.
4. The high bandwidth transimpedance amplifier based on a current buffer according to claim 1, wherein the output of the nth amplification stage is electrically connected to the input of the n+1th amplification stage; n is any integer from 1 to N.
5. The current buffer-based high bandwidth transimpedance amplifier according to claim 4, wherein the n+1th amplification stage comprises: a first transistor, a second transistor, and a third transistor; a first pole of the first transistor is electrically connected with the output end of the nth amplifying stage, and a second pole of the first transistor is electrically connected with the power supply voltage signal end; a first electrode of the second transistor is electrically connected with a first electrode of the first transistor, a third electrode of the second transistor is electrically connected with a third electrode of the first transistor, and a second electrode of the second transistor is electrically connected with a ground end GND; the first pole and the third pole of the third transistor are respectively and electrically connected with the third pole of the second transistor and the input end of the n+2th amplifying stage, and the second pole is electrically connected with the grounding end GND.
6. The high bandwidth transimpedance amplifier based on a current buffer according to claim 5, wherein the first transistor is a PMOS transistor, and the second and third transistors are NMOS transistors.
7. The high bandwidth transimpedance amplifier based on a current buffer according to claim 1, wherein the feedback unit comprises: a capacitor and a resistor connected in parallel; one end of the resistor and one end of the capacitor are electrically connected with the signal input end, and the other end of the resistor and the other end of the capacitor are electrically connected with the signal output end.
8. The high bandwidth transimpedance amplifier based on a current buffer according to claim 2, wherein the transfer function of the current buffer unit has the expression:
a＝{[1+(1+g mB R B )g m2 r o2 ]+r o2 /r o1 }；
b＝[r o2 C in +(r o2 /r o1 +1+g m2 r o2 )R B C B +(r o2 /r o1 +r o2 /R B +1+g mB r o2 )R B C Z ]；
g mB ＝g m4 +g m5 ；
R B ＝r o4 //r o5 //(1/g m6 )；
C z ＝C gs2 +C gd4 +C gd5 ；
C B ＝C db4 +C db5 +C gs6 +C db6 +C gb6 ；
C in ＝C PD +C sb2 +C gs4 +C gs5 ；
wherein C is gs2 、C gs4 、C gs5 And C gs6 Parasitic capacitances of gate sources of transistors M2, M4, M5 and M6, C gd4 And C gd5 Parasitic capacitance of gate and drain of transistors M4 and M5, respectively, C db4 、C db5 And C db6 Drain-to-liner parasitic capacitances, C, of transistors M4, M5 and M6, respectively gb6 Parasitic capacitance of gate line of transistor M6, C sb2 Parasitic capacitance r is the source line of transistor M2 o1 、r o2 、r o4 And r o5 Output resistors g of transistors M1, M2, M4 and M5, respectively m2 、g m4 、g m5 And g m6 Transconductance, C, of transistors M2, M4, M5 and M6, respectively PD Is the large capacitance of the output end of the silicon photomultiplier, I' IN For the input current of the current buffer unit, I' OUT For the output current of the current buffer unit, s represents the laplace variation, s=jw, w is the angular frequency, j is the imaginary unit, and// represents the parallel connection.
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