CN117276236A - 半导体装置与其形成方法 - Google Patents

半导体装置与其形成方法 Download PDF

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Publication number
CN117276236A
CN117276236A CN202311030792.2A CN202311030792A CN117276236A CN 117276236 A CN117276236 A CN 117276236A CN 202311030792 A CN202311030792 A CN 202311030792A CN 117276236 A CN117276236 A CN 117276236A
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China
Prior art keywords
die
layer
semiconductor device
coefficient
thermal expansion
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Pending
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CN202311030792.2A
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English (en)
Inventor
赖杰隆
林孟良
陈宪伟
郑心圃
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of CN117276236A publication Critical patent/CN117276236A/zh
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Abstract

半导体装置包括：裸片，具有多个裸片连接物于裸片的前侧上；成型化合物，围绕裸片；以及重布线结构，其中裸片的裸片连接物贴合至重布线结构的第一侧，其中重布线结构包括：介电层；导线，沿着面向裸片的介电层的第一表面延伸；以及翘曲调整层，沿着面向裸片的导线的第一表面延伸并接触导线的第一表面，其中导线的第一热膨胀系数小于翘曲调整层的第二热膨胀系数。

Description

半导体装置与其形成方法
技术领域
本公开实施例关于半导体装置，更特别关于其采用的翘曲调整层。
背景技术
由于多种电子构件(如晶体管、二极管、电阻、电容器、或类似物)的集成密度持续改善，半导体产业经历快速成长。集成密度的主要改善来自于重复缩小最小结构尺寸，使更多构件可整合至给定面积中。
随着缩小的电子装置的需求成长，需要更小且更创意的半导体裸片封装技术。这些封装系统的一例为封装上封装技术。在封装上封装(PoP，Package on Package)装置中，顶部半导体封装堆叠于底部半导体封装的顶部上，以提供高集成度与高构件密度。另一例为基板上晶圆上芯片(CoW，Chip on Wafer)结构。在一些实施例中，为了形成基板上晶圆上芯片结构，可贴合多个半导体裸片至晶圆，接着进行切割制程以将晶圆分割成多个中介层，其中每一中介层具有一或多个半导体裸片贴合至中介层。贴合半导体裸片的中介层可视作晶圆上芯片结构。接着将晶圆上芯片结构贴合至基板(如印刷电路板)以形成基板上晶圆上芯片结构。这些与其他先进的封装技术所产生的半导体装置具有增进的功能与小引脚。
发明内容
在一实施例中，半导体装置包括：裸片，具有多个裸片连接物于裸片的前侧上；成型化合物，围绕裸片；以及重布线结构，其中裸片的裸片连接物贴合至重布线结构的第一侧，其中重布线结构包括：介电层；导线，沿着面向裸片的介电层的第一表面延伸；以及翘曲调整层，沿着面向裸片的导线的第一表面延伸并接触导线的第一表面，其中导线的第一热膨胀系数小于翘曲调整层的第二热膨胀系数。
在一实施例中，半导体装置包括：裸片，埋置于成型材料中；以及重布线结构，接合至裸片的多个裸片连接物，且重布线结构包括：介电层；多金属化层，沿着面向裸片的介电层的第一表面延伸，其中多金属化层包括具有第一热膨胀系数的第一金属层，并包括具有第二热膨胀系数的第二金属层，其中第二金属层位于第一金属层与裸片之间，且第一热膨胀系数与第二热膨胀系数不同；以及通孔，位于多金属化层上以电性耦接至多金属化层。
在一实施例中，半导体装置的形成方法包括：形成重布线结构于载板上，包括：形成介电层于载板上；形成第一导电材料于远离载板的介电层的上表面上；以及形成第二导电材料以接触远离载板的第一导电材料的上表面并沿着第一导电材料的上表面延伸，其中第一导电材料的第一热膨胀系数小于第二导电材料的第二热膨胀系数。方法更包括形成多个导电凸块于重布线结构上以电性耦接至重布线结构；以及接合裸片至导电凸块。
附图说明
图1、图2A、图2B、及图3至图5是一实施例中，半导体装置于多种制造阶段的剖视图。
图6是一实施例中，半导体装置的剖视图。
图7是一实施例中，半导体装置的剖视图。
图8是一些实施例中，形成半导体装置的方法的流程图。
其中，附图标记说明如下：
D：横向偏离
H1，H2，H3：厚度
W1，W2：宽度
100，100A，200：半导体装置
101：载板
103：粘着层
105，105A，105B，105C，141：介电层
105T：顶部介电层
107，143：导线
108：金属间化合物层
109，145：通孔
110：区域
111：翘曲调整层
111SA，111SB：侧壁
112：双金属化层
113：导电结构
114：重布线结构
116：凸块下金属化结构
118，125：外部连接物
121，155：底填材料
123：成型材料
127：焊料区
131A，131B：裸片
133：裸片连接物
142：基板
147：导电垫
151：环
153：粘着材料
1000：方法
1010，1020，1030：步骤
具体实施方式
下述详细描述可搭配图式说明，以利理解本公开的各方面。值得注意的是，各种结构仅用于说明目的而未按比例绘制，如本业常态。实际上为了清楚说明，可任意增加或减少各种结构的尺寸。
下述内容提供的不同实施例或实例可实施本公开的不同结构。下述特定构件与排列的实施例是用以简化本公开内容而非局限本公开。举例来说，形成第一构件于第二构件上的叙述包含两者直接接触的实施例，或两者之间隔有其他额外构件而非直接接触的实施例。此外，本公开的多个实例可重复采用相同标号以求简洁，但多种实施例及/或设置中具有相同标号的元件并不必然具有相同的对应关系。除非另外说明，否则具有相同标号的单元具有相同材料组成与相同范围的厚度。
此外，空间相对用语如“在…下方”、“下方”、“较低的”、“上方”、“较高的”、或类似用词，用于描述图式中一些元件或结构与另一元件或结构之间的关系。这些空间相对用语包括使用中或操作中的装置的不同方向，以及图式中所描述的方向。当装置转向不同方向时(旋转90度或其他方向)，则使用的空间相对形容词也将依转向后的方向来解释。
在一些实施例中，形成重布线结构于载板上。重布线结构的形成方法为形成介电层于载板上、形成导线于介电层的上表面上、以及形成翘曲调整层以接触远离载板的导线的上表面并沿着远离载板的导线的上表面延伸。翘曲调整层的组成材料(如金属)与导线的热膨胀系数不同。含有导线与翘曲调整层的双金属化层，可调整含有载板与重布线结构的结构的翘曲轮廓，以在室温下达到平坦轮廓。结构的平坦轮廓有利于轻易处理载板、在后续形成晶圆上芯片结构的裸片贴合制程中避免冷接面问题、以及改善产品可信度。
图1、图2A、图2B、及图3至图5是一实施例中，半导体装置100于多种制造阶段的剖视图。半导体装置100具有晶圆上芯片结构，且可视作晶圆上芯片装置。值得注意的是与现有的晶圆上芯片结构不同，一或多个裸片贴合至晶圆(如硅晶圆)，且重布线结构(见图3中的重布线结构114)而非晶圆(如硅晶圆)用于贴合半导体装置100中的裸片。因此半导体装置100亦可视作晶圆上芯片-重布线结构(CoW-R，其中R为重布线结构)装置，或具有晶圆上芯片-重布线结构。
如图1所示，粘着层103形成于载板101上。载板101的组成材料可为玻璃、硅、聚合物、聚合物复合物、金属箔、陶瓷、玻璃-环氧树脂、氧化铍、带状物、或结构支撑所用的其他合适材料。在一些实施例中，粘着层103(亦可视作离型层)沉积或层积于载板101上。粘着层103可为光敏性，且可在后续载板分离制程时照射紫外光于载板101上以自载板101轻易分离粘着层103。举例来说，粘着层可为光热转换涂层。
接着形成介电层105A于粘着层103上。在一些实施例中，介电层105A的组成为聚合物如聚苯并恶唑、聚酰亚胺、苯并环丁烯、或类似物。在其他实施例中，介电层105A的组成为氮化物(如氮化硅)、氧化物(如氧化硅、磷硅酸盐玻璃、硼硅酸盐玻璃、硼磷硅酸盐玻璃、或类似物)、或类似物。介电层105A的形成方法可为任何可接受的沉积制程，比如旋转涂布、化学气相沉积、层积、类似方法、或上述的组合。
接着形成介电层105B于介电层105A上。在一些实施例中，介电层105B与介电层105A的组成材料与形成方法可相同或类似，在此不重述。如此处所述，介电层105A及105B与额外介电层形成于重布线结构114中(见图3)，可一起视作重布线结构114的介电层105。
接着形成导电结构如导线107与通孔109于介电层105B之上或之中。在一些实施例中，导电结构(107/109)的组成为合适的导电材料如铜、钛、钨、铝、或类似物。导线107与通孔109的形成方法可为形成开口于介电层105B中，形成晶种层于介电层105B之上与开口之中、形成具有设计图案(如开口)的图案化光阻于晶种层上、电镀(电镀或无电镀)导电材料于设计图案之中与晶种层之上、以及移除导电结构未形成其上的光阻与晶种层的部分。除了上述方法，形成导电结构(107/109)的其他方法亦属可能且完全包含于本公开实施例的范畴中。
接着在图2中，形成翘曲调整层111于导线107上。在一些实施例中，翘曲调整层111的组成为导电材料(如金属材料)，其热膨胀系数不同于导线107的热膨胀系数。在一实施例中，翘曲调整层111的热膨胀系数大于导线107的热膨胀系数。举例来说，导线107(与通孔109)的组成为铜(其热膨胀系数为16.5)，而翘曲调整层111的组成为铝(其热膨胀系数为23.2)。除了铝以外，亦可采用热膨胀系数高于导线107的其他合适金属如银、锡、或类似物。在一些实施例中，选择翘曲调整层111的热膨胀系数，使翘曲调整层111的热膨胀系数与导线107的热膨胀系数之间的差异(可视作热膨胀系数差异)大于预定值(如6)。在一实施例中，导线107的组成为铜(其杨氏系数为124GPa)，且翘曲调整层111的组成为铝(其杨氏系数为69GPa)。可调整热膨胀系数差异与其他设计参数如导线107与翘曲调整层111的厚度与硬度(如杨氏系数)，以达目标的翘曲轮廓，如详述于下的内容。
在一些实施例中，翘曲调整层111的形成方法可采用合适方法如物理气相沉积、电镀、或类似方法。在一实施例中，采用形成导电结构(107/109)所用的相同遮罩层(如图案化光阻)以形成翘曲调整层111，因此翘曲调整层111可覆盖(如完全覆盖)下方导线107。接着可移除翘曲调整层111的部分以露出导线107的上表面的区域。可采用另一遮罩层并进行非等向蚀刻制程，以移除翘曲调整层111的部分。
如图2A所示，移除翘曲调整层111的部分之后，翘曲调整层111的宽度(介于翘曲调整层111的两侧侧壁之间，沿着图2A的水平方向测量)小于下方的导线107的宽度(介于导线107的两侧侧壁之间，沿着图2A的水平方向测量)，使翘曲调整层111的侧壁111SB自下方导线107的个别侧壁凹陷。在图2A的例子中，翘曲调整层111的侧壁111SA齐平(如垂直对准)下方导线107的个别侧壁(如图2A中的左侧侧壁)，而翘曲调整层111的侧壁111SB自下方导线107的个别侧壁(如图2A中的右侧侧壁)凹陷，使两个侧壁之间具有横向偏离D。横向偏离D造成导线107的上表面的区域露出，使后续形成的通孔109可接触(如物理接触)导线107的上表面。
在图2A中，翘曲调整层111接触(如物理接触)导线107的上表面并沿着导线107的上表面延伸。在此处所述的内容中，翘曲调整层111与其对应的下方导线107可一起视作双金属化层112。
图2B显示图2A的区域110中的半导体装置100的部分放大图。如图2B所示，翘曲调整层111的宽度W2与导线107的宽度W1之间的比例R1可介于0.2至1.0之间(比如0.2≤W2/W1≤1.0)。翘曲调整层111的厚度H2可介于0.5微米至5微米之间。导线107的厚度H1可介于0.05微米至50微米之间，比如介于2微米至5微米之间。翘曲调整层111的厚度H2与导线107的厚度H1之间的比例R2可介于0至100之间(比如0<H2/H1≤100)，如介于0至1.5之间，或介于0至10之间。在一些实施例中，若比例R2过大(比如大于1.5)，则双金属化层112的总高度(如H1+H2)与不具有翘曲调整层111的参考设计相比可能过大。由于后续形成的介电层105的厚度可能增加以容纳双金属化层112的厚度，重布线结构114可能过厚而降低半导体装置100的集成密度。
在一些实施例中，金属间化合物层108形成于导线107与翘曲调整层111之间的界面两侧上的区域中。举例来说，金属间化合物层108的厚度H3可介于0微米至5微米之间(比如0<H3≤5微米)。
接着在图3中，介电层105C形成于图2A的双金属化层112上，而另一双金属化层112形成于介电层105C上，其形成方法可采用与上述相同或类似的制程。可重复制程直到形成目标数目的双金属化层112于重布线结构114中。在形成最顶部(如最远离载板101)的双金属化层112之后，形成顶部介电层105T于最顶部的双金属化层112上。图3更显示导电结构113(如铜垫或铜通孔)形成于最顶部介电层105T中，以电性耦接至最顶部的双金属化层112。在一些实施例中，介电层105、导电结构(107/109/113)、与翘曲调整层111可一起视作重布线结构114。图3所示的介电层105的层数与双金属化层112的层数仅为非限制性的例子，其他层数亦属可能且完全包含于本公开实施例的范畴中。
接着形成凸块下金属化结构116于顶部介电层105T上，以电性连接至重布线结构114的导电结构113。凸块下金属化结构116提供电性连接，其上可放置电性连接物如焊料球/凸块、导电柱、或类似物。在一实施例中，凸块下金属化结构116包括扩散阻障层、晶种层、或上述的组合。扩散阻障层可包括钛、氮化钛、钽、氮化钽、或上述的组合。晶种层可包括铜或铜合金。然而亦可包括其他金属如镍、钯、银、金、铝、上述的组合、或上述的多层。在一实施例中，凸块下金属化结构116的形成方法可采用溅镀。在其他实施例中，可采用电镀。
接着形成外部连接物118(亦可视作导电凸块)于凸块下金属化结构116。在一实施例中，外部连接物118为导电凸块如微凸块，且其材料可包括锡或其他合适材料如铝或铜。在一实施例中，外部连接物118为锡焊料凸块，其形成方法可为先经由任何合适方法如蒸镀、电镀、印刷、焊料转移、放置球、或类似方法以形成锡层。一旦形成锡层于结构上，可进行再流动使材料成形为凸块状。
虽然上述的外部连接物118可为控制塌陷芯片连接凸块，其仅用于说明而非局限实施例。相反地，可改用任何合适种类的外部接点如球格阵列、微凸块、铜柱、铜层、镍层、无铅层、无电镍-无电钯-浸润金层、铜/无铅层、锡/银层、锡/铅层、上述的组合、或类似物。可采用任何合适的外部连接物与形成外部连接物的任何合适方法以用于外部连接物118，且所有的这些外部连接物完全包含于本公开实施例的范畴中。
在后续制程中，贴合一或多个裸片(见图4中的裸片131)至重布线结构114，以形成晶圆上芯片-重布线结构。随着越来越多不同功能的裸片贴合至重布线结构114以达晶圆上芯片-重布线结构封装(如半导体装置100)中的高集成度，重布线结构114的尺寸(如表面积)与载板101的尺寸可能增加以容纳大量裸片。由于重布线结构114/载板101的尺寸增加，因此难以使图3中的结构维持平坦(如具有平坦的上表面/下表面)，且半导体装置100的翘曲控制越来越重要。半导体装置中的翘曲通常来自于半导体装置中采用的不同材料的热膨胀系数差异。由于不同材料在温度变化下的膨胀或收缩的速率不同，半导体装置的多种区域中产生的应力造成半导体装置翘曲。
重布线结构114中的不同材料层的热膨胀系数与载板101的热膨胀系数以及其他因素(如不同材料层的厚度或硬度)，可一起作用而决定图3中的结构平坦性(如翘曲量)。本公开实施例可采用翘曲调整层111以调整图3中的结构翘曲。在一些实施例中，可调整翘曲调整层111的热膨胀系数、厚度H2、及/或硬度(如杨氏系数)，以达图3的半导体结构所用的目标翘曲量。举例来说，为了达到给定的翘曲轮廓，较高热膨胀系数的翘曲调整层111需要较薄(如较小厚度H2)的翘曲调整层111，或较软(如较低杨氏系数)的翘曲调整层111。相反地，低热膨胀系数的翘曲调整层111需要较厚(如较大厚度H2)的翘曲调整层111，或较硬(如较高杨氏系数)的翘曲调整层111。
为了方便理解本公开实施例的优点，以类似于图3的参考设计说明，但移除翘曲调整层111。在一些实施例中，重布线结构114与载板101之间的作用可使高温下的参考设计(比如形成重布线结构114时)达到良好平坦性(如载板101具有平坦的上表面/下表面)。然而在形成重布线结构114且参考设计冷却至室温之后，由于重布线结构114中采用的材料具有高热膨胀系数，重布线结构114收缩的比载板101多，造成“笑脸”型态的翘曲于参考设计中。举例来说，参考设计中的载板101(或重布线结构114)的中间部分低于载板101(或重布线结构114)的左端部分与右端部分。参考设计中的翘曲可能造成制造问题。举例来说，由于载板101不平坦，因此难以由机械手臂固定载板101并转移参考设计于制造工具的不同制程腔室之间。此外，重布线结构114中的翘曲可能难以贴合裸片131至外部连接物118，造成冷接面与产品缺陷。
相反地，本公开实施例采用翘曲调整层111(具有高热膨胀系数)可预扭曲高温下的图3中的结构朝向“哭脸”形态的翘曲轮廓，以弥补(或抵消)室温下的“笑脸”型态的翘曲，而改善室温下的图3中的结构平坦性。举例来说，翘曲调整层111的高热膨胀系数可能使图3中的结构在高温下具有“哭脸”形态的翘曲(比如形成重布线结构114时)，其中载板101(或重布线结构114)的中间部分高于载板101(或重布线结构114)的左端部分与右端部分。在形成重布线结构114与冷却图3中的结构至室温之后，由于重布线结构114中所用的材料的高热膨胀系数，重布线结构114可能比载板101收缩更多，其可减少或修正“哭脸”形态的翘曲，并造成图3的半导体结构所用的实质上平坦轮廓。载板101与重布线结构114的平坦表面有利于轻易处理载板101、避免冷接面问题、并改善产品可信度。
接着在图4中，贴合一或多个裸片131(如裸片131A及131B)至外部连接物118，比如经由再流动制程。焊料区可形成于裸片131的裸片连接物133与外部连接物118之间。图4更显示底填材料121位于裸片131与重布线结构114之间，以及成型材料123位于裸片131与底填材料121周围。
在此处所述的内容中，裸片131A及131B可一起视作裸片。裸片131亦可视作半导体裸片、芯片、或集成电路裸片。在一些实施例中，裸片131可为相同种类的裸片(如存储器裸片或逻辑裸片)。在其他实施例中，裸片131为不同种类。举例来说，裸片131A可为芯片上系统裸片，其可包括中央处理器、存储器界面、输入/输出装置、与输入/输出界面。裸片131B可为存储器裸片如高带宽存储器裸片，或含有明确定义的功能子集以与裸片131A整合的小芯片。图4所示的裸片131的数目与种类仅为非限制性的例子。裸片的其他数目、种类、或配置(如位置)亦属可能，其完全包含于本公开实施例的范畴中。
在一些实施例中，每一裸片131包括基板、电性构件(如晶体管、电阻、电容器、二极管、或类似物)形成于基板之中或之上、以及内连线结构位于基板上以连接电性构件而形成裸片131的功能电路。裸片131亦可包括导电柱(亦可视作裸片连接物133)以提供电性连接至裸片131的电路。
裸片131的基板可为掺杂或未掺杂的半导体基板，或绝缘层上半导体基板的主动层。一般而言，绝缘层上半导体基板包括半导体材料层如硅、锗、硅锗(如绝缘层上硅锗)、或上述的组合。其他可用的基板包括多层基板、组成渐变基板、或混合取向基板。
裸片131的电性构件包括多种主动装置(如晶体管)、被动装置(如电容器、电阻、或电感)、或类似物。形成裸片131的电性构件于裸片131的基板之中或之上的方法可采用任何合适方法。裸片131的内连线结构包括一或多个金属化层(如铜层)于一或多个介电层中，且可用于连接多种电性构件以形成功能电路。在一实施例中，内连线结构形成微介电材料与导电材料(如铜)的交错层，且其形成方法可为任何合适制程(如沉积、镶嵌、双镶嵌、或类似方法)。
可形成一或多个钝化层(未图示)于裸片131的内连线结构上，以提供一定程度的保护于裸片131的下方结构。钝化层的组成可为一或多种合适的介电材料，比如氧化硅、氮化硅、低介电常数的介电层(如掺杂碳的氧化物)、极低介电常数的介电层(如多孔的掺杂碳的氧化硅)、上述的组合、或类似物。钝化层的形成制程可为化学气相沉积，但亦可采用任何合适制程。
导电垫(未图示)可形成于钝化层上，且可延伸穿过钝化层以电性接触裸片131的内连线结构。导电垫可包括铝，但亦可采用其他材料如铜。
裸片131的导电柱如裸片连接物133形成于导电垫上，以提供电性连接至裸片131的电路所用的导电区。导电柱如裸片连接物133可为铜柱、接点凸块如微凸块、或类似物，且其材料可包括铜、锡、银、或其他合适材料。
经由外部连接物接合裸片131至重布线结构114之后，形成底填材料121于裸片131与重布线结构114之间。举例来说，底填材料121可包括液态环氧树脂，其可经由点胶针或其他合适的施加工具施加于裸片131与重布线结构114之间的间隙中，接着固化底填材料使其硬化。如图4所示，底填材料121填入裸片131与重布线结构114之间的间隙，且可填入相邻裸片131之间的间隙。此外，底填材料121可沿着裸片131的侧壁延伸。在其他实施例中，可省略底填材料121。
接着形成成型材料123于重布线结构114之上与裸片131周围。在形成底填材料121的实施例中，成型材料123亦围绕底填材料121。举例来说，成型材料123可包括环氧树脂、有机聚合物、具有或不具有氧化硅为主的填料或玻璃填料添加的聚合物、或其他材料。在一些实施例中，成型材料123包括液态成型化合物，其于施加时为胶态。成型材料123在施加时亦可为液态或固态。成型材料123可改为包括其他绝缘及/或密封材料。在一些实施例中，成型材料123的施加方法可采用晶圆级成型制程。举例来说，成型材料123的成型方法可采用压缩成型、转移成型、成型的底填法、或其他方法。
在一些实施例中，接着采用固化制程固化成型材料123。固化制程可包括采用退火制程或其他加热制程，以加热成型材料123至预定温度一段预定时间。固化制程亦可包括紫外光曝光制程、红外线能量曝光制程、上述的组合、或上述与加热制程的组合。可改用其他方法固化成型材料123。在一些实施例中，不含固化制程。
在形成成型材料123之后，可进行平坦化制程如化学机械平坦化，以自裸片131上移除成型材料123的多余部分。使成型材料123与裸片131的背侧具有共平面的上表面。
接着在图5中，贴合裸片131的背侧至载板(未图示)，比如经由粘着层。载板与粘着层可分别与图1中的载板101与粘着层103相同或类似，因此不重述其细节。接着形成外部连接物125(亦可视作导电连接物)于图5中的重布线结构114的下侧，以电性耦接至重布线结构114。外部连接物125可为控制塌陷芯片连接(C4)凸块、铜柱、铜层、镍层、无铅层、无电镍-无电钯-浸润金层、铜/无铅层、锡/银层、锡/铅层、上述的组合、或类似物。焊料区127可形成于外部连接物125上。
图5所示的半导体装置100具有晶圆上芯片-重布线结构。本技术领域中具有通常知识者应理解在制造时，形成于图3中的载板101上的重布线结构114可包括多个区域，且多个区域各自用于贴合裸片131以形成个别的晶圆上芯片-重布线结构。因此可同时形成多个晶圆上芯片-重布线结构，接着可进行切割制程以分开多个晶圆上芯片-重布线结构，以形成多个独立的晶圆上芯片-重布线结构，如图5所示。切割制程的细节不重述于此。
图6是一实施例中，半导体装置100A的剖视图。半导体装置100A(如晶圆上芯片-重布线结构)与图5的半导体装置100类似，但半导体装置100A的翘曲调整层111覆盖(如完全覆盖)下方导线107的上表面。
在一些实施例中，半导体装置100A的形成方法与半导体装置100所用的制程类似，但无额外的蚀刻制程移除翘曲调整层111的部分以露出导线107的上表面的区域。举例来说，图2A的制程采用采用形成导电结构(107/109)所用的相同遮罩层(如图案化光阻)形成翘曲调整层111，但省略图2A中形成横向偏离D的蚀刻制程。因此翘曲调整层111覆盖(如完全覆盖)下方导线107的上表面。举例来说，翘曲调整层111的相对侧表面齐平(如垂直对准)下方导线107的个别侧壁。这可简化制程，因为可省略蚀刻制程以及蚀刻制程所用的新遮罩层。如此一来，形成通孔109于翘曲调整层111上以接触(如物理接触)翘曲调整层111，如图6所示。然而若翘曲调整层111(如铝)的导电性低于导线107(如铜)的导电性，半导体装置100A的重布线结构114的电阻可能大于半导体装置100的电阻。
图7是一实施例中，半导体装置200的剖视图。半导体装置200的形成方法为接合图5中的半导体装置100(如晶圆上芯片封装)至基板142，以形成基板上晶圆上芯片结构。
在一些实施例中的基板142为多层电路板(如印刷电路板)。举例来说，基板142可包括一或多个介电层141，其组成可为双马来酰亚胺三嗪树脂、编织玻璃纤维布与环氧树脂粘结剂的防火复合材料FR-4、陶瓷、玻璃、塑胶、带、膜、或其他支撑材料。基板142可包括导电结构(如导线143与通孔145)形成于基板142之中或之上。如图7所示，基板142具有导电垫147形成于基板142的上表面与下表面之上，而导电垫147可电性耦接至基板142的导电结构。
在一些实施例中，为了形成半导体装置200，半导体装置100的外部连接物125对准基板142的上表面之上的个别导电垫147，且可进行再流动制程以接合外部连接物125至导电垫147(比如经由焊料区127)。接着形成底填材料155于重布线结构114与基板142之间。底填材料155与底填材料121的材料组成与形成方法可相同或类似，因此不重述细节。
接着以粘着材料153贴合环151至基板142的上表面，以改善基板142的平坦性(如平面性)。在一些实施例中，环151的组成为刚性材料如钢、铜、玻璃、或类似物。在一些实施例中，环151为矩形环(其于上视图中为中空的矩形)并贴合至基板142，使环151围绕半导体装置100。一些实施例在形成基板上晶圆上芯片结构之后，可贴合环151至基板142的上表面。在其他实施例中，先贴合环151至基板142的上表面，之后贴合半导体装置100至环151之内的基板142的上表面。本技术领域中具有通常知识者应理解图6的半导体装置100A亦可接合至基板142以形成基板上晶圆上芯片结构，其细节不重述于此。在一些实施例中，环151可置换为盖，以达相同或类似功能。盖可具有垂直延伸部分以与环151类似，且可包含水平部分于半导体装置100上(如覆盖半导体装置100)。热界面材料可用于盖的水平部分与半导体装置100之间并与其接触以利散热。
本公开实施例的变化具有可能性且完全包含于本公开实施例的范畴中。举例来说，虽然所述实施例中的翘曲调整层111的组成为金属材料如铝，但半导体装置100亦可实施非金属材料或导电材料的翘曲调整层(与金属翘曲调整层具有相同或类似的热膨胀系数)。由于上方通孔109耦接至半导体装置100中的导线107其露出的上表面，非金属材料(或非导电材料)亦可使重布线结构114适当作用。在另一例中，虽然图式中的翘曲调整层111形成于每一导线107的层状物上，但可形成翘曲调整层111于一些而非全部的导线107的层状物上。再又一例中，虽然所述实施例为双金属化层，但具有依序增加的热膨胀系数的两个或更多翘曲调整层可形成于导线107上，以形成调整翘曲所用的多金属化层。举例来说，翘曲调整层所用的多金属化层可包括第一翘曲调整层(如金属层)形成于导线107上且具有第一热膨胀系数大于导线107的热膨胀系数，且可包括第二翘曲调整层(如另一金属层)形成于第一翘曲调整层上且具有第二热膨胀系数大于第一热膨胀系数，以此类推。因此双金属化层可视作多金属化层的特例，且可指形成一个翘曲调整层111于导线107上。其他变化亦完全包含于本公开实施例的范畴中。
实施例可达许多优点。举例来说，翘曲调整层111可调整半导体装置100(或图3中的结构)的翘曲轮廓为目标轮廓，以减少室温下的翘曲。在一些实施例中，翘曲调整层111在高温下预扭曲图3中的结构，以弥补或抵消室温下的预期翘曲。如此一来，可达室温下的半导体装置100与载板101所用的平坦轮廓(如平坦的上表面/下表面)，以利轻易处理载板101、避免冷接面问题、并改善产品可信度。
图8是一些实施例中，形成半导体装置的方法1000的流程图。应理解图8所示的方法1000的实施例仅用于说明许多可能方法的实施例的一例。本技术领域中具有通常知识者应理解许多变化、改变、与调整。举例来说，可添加、移除、取代、重排、与重复图8所示的多种步骤。
如图8所示，步骤1010形成重布线结构于载板上，包括形成介电层于载板上、形成第一导电材料于远离载板的介电层的上表面上、并形成第二导电材料以沿着远离载板的第一导电材料的上表面延伸并接触第一导电材料的上表面，其中第一导电材料的热膨胀系数小于第二导电材料的第二热膨胀系数。步骤1020形成导电凸块于重布线结构上以电性耦接至重布线结构。步骤1030接合裸片至导电凸块。
在一实施例中，半导体装置包括：裸片，具有多个裸片连接物于裸片的前侧上；成型化合物，围绕裸片；以及重布线结构，其中裸片的裸片连接物贴合至重布线结构的第一侧，其中重布线结构包括：介电层；导线，沿着面向裸片的介电层的第一表面延伸；以及翘曲调整层，沿着面向裸片的导线的第一表面延伸并接触导线的第一表面，其中导线的第一热膨胀系数小于翘曲调整层的第二热膨胀系数。
在一些实施例中，翘曲调整层与导线具有相同宽度，使翘曲调整层的侧壁齐平导线的个别侧壁。
在一些实施例中，翘曲调整层为金属材料。
在一些实施例中，重布线结构更包括通孔位于翘曲调整层上并接触翘曲调整层。
在一些实施例中，翘曲调整层覆盖导线的第一表面的第一区，并露出导线的第一表面的第二区。
在一些实施例中，重布线结构更包括通孔位于导线的第一表面的第二区上并接触导线的第一表面的第二区。
在一些实施例中，通孔与翘曲调整层横向分开。
在一些实施例中，导线具有自导线的两侧侧壁之间测量的第一宽度，翘曲调整层具有自翘曲调整层的两侧侧壁之间测量的第二宽度，其中第二宽度与第一宽度之间的比例介于0.2至1之间。
在一些实施例中，导线具有第一厚度，翘曲调整层具有第二厚度，其中第二厚度与第一厚度之间的比例介于0至100之间。
在一些实施例中，第二热膨胀系数与第一热膨胀系数之间的差异大于预定值。
在一些实施例中，半导体装置更包括多个外部连接物贴合至重布线结构的第二侧上，且重布线结构的第一侧与第二侧相对。
在一实施例中，半导体装置包括：裸片，埋置于成型材料中；以及重布线结构，接合至裸片的多个裸片连接物，且重布线结构包括：介电层；多金属化层，沿着面向裸片的介电层的第一表面延伸，其中多金属化层包括具有第一热膨胀系数的第一金属层，并包括具有第二热膨胀系数的第二金属层，其中第二金属层位于第一金属层与裸片之间，且第一热膨胀系数与第二热膨胀系数不同；以及通孔，位于多金属化层上以电性耦接至多金属化层。
在一些实施例中，第二热膨胀系数大于第一热膨胀系数。
在一些实施例中，第二金属层沿着第一金属层延伸并接触第一金属层。
在一些实施例中，通孔接触面向裸片的第一金属层的第一表面，且与第二金属层横向分开。
在一些实施例中，通孔接触面向裸片的第二金属层的第二表面。
在一些实施例中，半导体装置更包括：基板，经由多个焊料区接合至重布线结构，其中重布线结构位于裸片与基板之间；以及环或盖，贴合至重布线结构与裸片周围的基板。
在一实施例中，半导体装置的形成方法包括：形成重布线结构于载板上，包括：形成介电层于载板上；形成第一导电材料于远离载板的介电层的上表面上；以及形成第二导电材料以接触远离载板的第一导电材料的上表面并沿着第一导电材料的上表面延伸，其中第一导电材料的第一热膨胀系数小于第二导电材料的第二热膨胀系数。方法更包括形成多个导电凸块于重布线结构上以电性耦接至重布线结构；以及接合裸片至导电凸块。
在一些实施例中，形成重布线结构的步骤更包括：在形成第二导电材料之后，移除第二导电材料的一部分以露出第一导电材料的上表面；以及在移除第二导电材料的部分之后，形成通孔于第一导电材料其露出的上表面之上以接触第一导电材料其露出的上表面。
在一些实施例中，形成重布线结构的步骤更包括在形成第二导电材料之后，形成通孔于第二导电材料上以接触第二导电材料。
上述实施例的特征有利于本技术领域中具有通常知识者理解本公开。本技术领域中具有通常知识者应理解可采用本公开作基础，设计并变化其他制程与结构以完成上述实施例的相同目的及/或相同优点。本技术领域中具有通常知识者亦应理解，这些等效置换并未脱离本公开精神与范畴，并可在未脱离本公开的精神与范畴的前提下进行改变、替换、或更动。

Claims (10)

1.一种半导体装置，包括：
一裸片，具有多个裸片连接物于该裸片的前侧上；
一成型化合物，围绕该裸片；以及
一重布线结构，其中该裸片的所述多个裸片连接物贴合至该重布线结构的第一侧，其中该重布线结构包括：
一介电层；
一导线，沿着面向该裸片的该介电层的第一表面延伸；以及
一翘曲调整层，沿着面向该裸片的该导线的第一表面延伸并接触该导线的第一表面，其中该导线的一第一热膨胀系数小于该翘曲调整层的一第二热膨胀系数。
2.如权利要求1所述的半导体装置，其中该翘曲调整层与该导线具有相同宽度，使该翘曲调整层的侧壁齐平该导线的个别侧壁。
3.如权利要求2所述的半导体装置，其中该翘曲调整层为金属材料。
4.如权利要求3所述的半导体装置，其中该重布线结构更包括一通孔位于该翘曲调整层上并接触该翘曲调整层。
5.一种半导体装置，包括：
一裸片，埋置于一成型材料中；以及
一重布线结构，接合至该裸片的多个裸片连接物，且该重布线结构包括：
一介电层；
一多金属化层，沿着面向该裸片的该介电层的第一表面延伸，其中该多金属化层包括具有一第一热膨胀系数的一第一金属层，并包括具有一第二热膨胀系数的一第二金属层，其中该第二金属层位于该第一金属层与该裸片之间，且该第一热膨胀系数与该第二热膨胀系数不同；以及
一通孔，位于该多金属化层上以电性耦接至该多金属化层。
6.如权利要求5所述的半导体装置，其中该第二热膨胀系数大于该第一热膨胀系数。
7.如权利要求6所述的半导体装置，其中该第二金属层沿着该第一金属层延伸并接触该第一金属层。
8.一种半导体装置的形成方法，包括：
形成一重布线结构于一载板上，包括：
形成一介电层于该载板上；
形成一第一导电材料于远离该载板的该介电层的上表面上；以及
形成一第二导电材料以接触远离该载板的该第一导电材料的上表面并沿着该第一导电材料的上表面延伸，其中该第一导电材料的一第一热膨胀系数小于该第二导电材料的一第二热膨胀系数；
形成多个导电凸块于该重布线结构上以电性耦接至该重布线结构；以及
接合一裸片至所述多个导电凸块。
9.如权利要求8所述的半导体装置的形成方法，其中形成该重布线结构的步骤更包括：
在形成该第二导电材料之后，移除该第二导电材料的一部分以露出该第一导电材料的上表面；以及
在移除该第二导电材料的该部分之后，形成一通孔于该第一导电材料其露出的上表面之上以接触该第一导电材料其露出的上表面。
10.如权利要求8所述的半导体装置的形成方法，其中形成该重布线结构的步骤更包括：在形成该第二导电材料之后，形成一通孔于该第二导电材料上以接触该第二导电材料。
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