CN117221036A - Serial bus double-link redundancy communication module, system and method - Google Patents
Serial bus double-link redundancy communication module, system and method Download PDFInfo
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Abstract
A serial bus double-link redundancy communication module, a system and a method belong to the technical field of communication, and the serial bus double-link redundancy communication module comprises: a first I/O interface, a processing unit, and a second I/O interface; the processing unit is configured to receive first data from the first I/O interface, receive second data from the second I/O interface, and select one of the first data and the second data for processing according to a predetermined rule when the first data and the second data are received to belong to the same timing sequence, where payloads of the first data and the second data belonging to the same timing sequence are the same, so that reliability of data transmission in serial bus communication can be improved.
Description
Technical Field
The present disclosure relates to serial bus communication technology, and more particularly, to a serial bus dual-link redundancy communication module, system, and method.
Background
With the rapid development of aerospace technology, the conventional bus cannot meet the technical overall design requirements of novel aviation and aerospace electronic systems, so that the conventional bus technology is gradually replaced by new generation aviation data bus technology, and the electronic system bus in the novel foreign commercial and military aerospace projects is started to be turned to FC, AFDX, TTE, IEEE1394. Compared with the traditional bus, the new-generation bus technology can provide higher bandwidth, better reliability and low delay, and can well meet the technical design requirements of the new-generation aerospace electronic system.
However, in the new generation of bus technology, the communication module, the bus system and the transmission method of the serial bus still cannot meet the requirement of the aerospace field on the reliability of data transmission when the critical tasks are executed.
Disclosure of Invention
The application provides a serial bus double-link redundancy communication module, a system and a method, which can improve the reliability of data transmission in serial bus communication.
In one aspect, an embodiment of the present application provides a serial bus dual link redundancy communication module, including a first I/O interface and a processing unit, further including: a second I/O interface;
the processing unit is used for receiving first data from the first I/O interface and second data from the second I/O interface; under the condition that the first data and the second data are received to belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule;
wherein payloads of the first data and the second data belonging to the same timing sequence are the same.
Optionally, the processing unit is further configured to encapsulate the data to be sent in each time sequence into the first data and the second data with the same payload, and send the first data and the second data synchronously through the first I/O interface and the second I/O interface respectively.
Optionally, the first I/O interface and the second I/O interface are dual optical ports, or dual electrical ports, or one optical port and one electrical port, for an IEEE1394 bus or other serial bus.
Optionally, the first I/O interface is further configured to add a first timestamp to the received first data, where the first timestamp is used to indicate a time of reception; the second I/O interface is further configured to add a second timestamp to the received second data for indicating a time of receipt.
Optionally, when the first data and the second data received belong to the same time sequence, the processing unit selects one of the first data and the second data for processing according to a predetermined rule, where the processing unit includes:
and the processing unit determines the receiving sequence of the first data and the second data according to the first time stamp and the second time stamp under the condition that the received first data and the received second data belong to the same time sequence, and selects the data received first to process.
Optionally, the processing unit selects one of the first data and the second data for processing according to a predetermined rule, including:
the processing unit determines the receiving sequence of the first data and the second data according to the first timestamp and the second timestamp under the condition that the received first data and the received second data belong to the same time sequence; and selecting one of the first data and the second data for processing according to the verification result of the first data and the second data and the receiving sequence.
On the other hand, the embodiment of the application also provides a serial bus double-link redundancy communication system, which comprises a first communication link, a second communication link and at least two serial bus double-link redundancy communication modules;
the serial bus double-link redundancy communication modules are connected with each other through the first communication links, and the first communication links are used for transmitting first data;
the serial bus double-link redundancy communication modules are connected with each other through the second communication links, and the second communication links are used for transmitting second data;
wherein the first data and the second data belonging to the same time sequence are synchronously transmitted and the payloads are the same.
On the other hand, the embodiment of the application also provides a serial bus double-link redundancy communication method which is applied to the serial bus double-link redundancy communication system and comprises the following steps:
at each time sequence, synchronously transmitting first data and second data with the same payload through a first communication link and a second communication link respectively;
and under the condition that the first data and the second data are received to belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule.
Optionally, in the case that the received first data and the received second data belong to the same time sequence, selecting one of the first data and the second data for processing according to a predetermined rule, where the processing includes:
and under the condition that the received first data and the received second data belong to the same time sequence, the processing unit determines the receiving sequence of the first data and the received second data according to the first time stamp and the second time stamp, and selects the data received first to process.
Optionally, in the case that the received first data and the received second data belong to the same time sequence, selecting one of the first data and the second data for processing according to a predetermined rule, where the processing includes:
the processing unit is used for receiving the first data and the second data according to the receiving sequence of the first data and the second data under the condition that the first data and the second data belong to the same time sequence; and selecting one of the first data and the second data for processing according to the verification result of the first data and the second data and the receiving sequence.
Compared with the related art, the serial bus double-link redundancy communication module, the system and the method can synchronously transmit the data with the same payload in two communication links, realize double-link redundancy communication of the serial bus, improve the reliability of data transmission in the serial bus communication, and are more suitable for occasions with high requirements on communication reliability and severe communication environments.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. Other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The accompanying drawings are included to provide an understanding of the principles of the application, and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain, without limitation, the principles of the application.
FIG. 1 is a schematic diagram of a serial bus dual link redundancy communication module according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a serial bus dual link redundancy communication system in accordance with an embodiment of the present application;
FIG. 3 is a schematic diagram of a serial bus dual link redundancy communication method according to an embodiment of the present application;
FIG. 4 is a flow chart of a method for receiving data in a serial bus dual link redundancy communication method according to an embodiment of the present application;
FIG. 5 is a second flowchart of a method for receiving data in a serial bus dual link redundancy communication method according to an embodiment of the present application;
FIG. 6 is a diagram of received data for a serial bus dual link redundancy communication method of example one;
fig. 7 is a diagram of received data of a serial bus dual link redundancy communication method according to example two of the present application.
Detailed Description
The present application has been described in terms of several embodiments, but the description is illustrative and not restrictive, and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the described embodiments. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or in place of any other feature or element of any other embodiment unless specifically limited.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The disclosed embodiments, features and elements of the present application may also be combined with any conventional features or elements to form a unique inventive arrangement as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive arrangements to form another unique inventive arrangement as defined in the claims. It is therefore to be understood that any of the features shown and/or discussed in the present application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not to be restricted except in light of the attached claims and their equivalents. Further, various modifications and changes may be made within the scope of the appended claims.
Furthermore, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other sequences of steps are possible as will be appreciated by those of ordinary skill in the art. Accordingly, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Furthermore, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
With the rapid development of aerospace technology, the conventional bus cannot meet the technical overall design requirements of novel aviation and aerospace electronic systems, so that the conventional bus technology is gradually replaced by new generation aviation data bus technology, and the electronic system bus in the novel foreign commercial and military aerospace projects is started to be turned to FC, AFDX, TTE, IEEE1394. Compared with the traditional bus, the new-generation bus technology can provide higher bandwidth, better reliability and low delay, and can well meet the technical design requirements of the new-generation aerospace electronic system. For example, IEEE1394 has been successfully used in the aerospace field as a new type of high-speed serial data bus. The IEEE1394 bus can provide a transmission speed of up to 3.2Gbps, which is very useful for applications requiring a large amount of data transmission, while supporting real-time transmission, and can be accurately transmitted and processed in applications with high real-time requirements, and the IEEE1394 bus can also support chained connections between multiple devices, so that a complex multi-device system becomes more flexible and convenient to construct, and is constrained and enhanced for military and aircraft applications by adopting the a5643 standard, but cannot meet requirements on critical tasks with high reliability.
The embodiment of the application provides a serial bus double-link redundancy communication module, which is shown in fig. 1, and comprises a first I/O interface 11, a processing unit 13 and a second I/O interface 12;
a processing unit 13 for receiving first data from the first I/O interface 11 and second data from the second I/O interface 12; under the condition that the received first data and the received second data belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule; wherein payloads of the first data and the second data belonging to the same timing sequence are the same.
In this embodiment, the first data of the first communication link and the second data of the second communication link are received through the first I/O interface 11 and the second I/O interface 12 respectively, so that double-link redundancy communication of the same payload data in the serial bus can be realized, the reliability of data transmission in the serial bus communication is improved, and the method is more suitable for occasions with high requirements on communication reliability and severe communication environments;
the processing unit may receive N first data from the first I/O interface and N second data from the second I/O interface in N consecutive timings.
In an exemplary embodiment, the processing unit 13 may be further configured to encapsulate the data to be sent at each timing sequence into first data and second data with the same payload, and send the first data and the second data synchronously through the first I/O interface 11 and the second I/O interface 12, respectively.
In this embodiment, the data to be sent may be encapsulated according to a communication protocol adopted for transmission, and the encapsulation manners of the first data and the second data may be the same or different; for example, the data to be transmitted may be encapsulated into N first data frames and N second data frames, where the N first data frames and the N second data frames are transmitted in N consecutive timings, and each of the first data frames and the second data frames having the same payload (the payload may be regarded as the data to be transmitted in the timing) are transmitted in each timing, where N is a positive integer greater than 1.
In one implementation of this embodiment, the first I/O interface 11 and the second I/O interface 12 may also use the same clock signal CLK to control the transmission time synchronization of the first data and the second data; the first data and the second data with the same time sequence are provided with the same transmission time offset, so that the synchronization of the transmission time is ensured; for the first data and the second data which are synchronously transmitted, the same transmission time stamp is added, and it can be determined that the received first data and second data belong to the same time sequence through the same transmission time stamp.
In another implementation manner of this embodiment, N first data may sequentially carry sequence numbers 1, 2, and 3 … … N indicating a transmission sequence, and similarly N second data may sequentially carry sequence numbers 1, 2, and 3 … … N indicating a transmission sequence, where first data and second data payloads with the same sequence numbers are identical; controlling the first data and the second data with the same serial number to be synchronous in transmission time by using the same clock signal CLK; it can be determined that the received first data and second data belong to the same timing sequence by the same sequence number.
In an exemplary embodiment, the first I/O interface 11 and the second I/O interface 12 may be dual optical ports, dual electrical ports, or one optical port and one electrical port, and have great freedom in hardware adaptability, and may be used for an IEEE1394 bus or other serial buses.
In an exemplary embodiment, the first I/O interface 11 may also be configured to add a first timestamp to the received first data for indicating the time of receipt; the second I/O interface 12 may also be used to add a second timestamp to the received second data indicating the time of receipt.
In an exemplary embodiment, the processing unit 13 selects one of the first data and the second data to process according to a predetermined rule in a case where the received first data and the received second data belong to the same timing, including: and the processing unit determines the receiving sequence of the first data and the second data according to the first time stamp and the second time stamp under the condition that the received first data and the received second data belong to the same time sequence, and selects the data received first to process.
In an exemplary embodiment, the processing unit 13 selects one of the first data and the second data for processing according to a predetermined rule, including: the processing unit determines the receiving sequence of the first data and the second data according to the first timestamp and the second timestamp under the condition that the received first data and the received second data belong to the same time sequence; and selecting one of the first data and the second data for processing according to the verification result of the first data and the second data and the receiving sequence.
In this embodiment, the predetermined rule may include a first-come-first-come rule and a check-correct rule.
In one implementation manner of this embodiment, a first-come first-get principle is adopted, then a correct verification principle is adopted, at each time sequence, the processing unit 13 determines the first received data according to the first timestamp and the second timestamp, verifies the first received data, if the first received data is correct, the processing unit 13 takes the first received data as a receipt of the time sequence, and discards the later received data; if the received data is erroneous, the processing unit 13 checks the received data later, if the received data later is correct, the processing unit 13 regards the received data later as the received data of the timing sequence, and if the received data later is also erroneous, discards all the data of the timing sequence.
In another implementation manner of this embodiment, a principle of checking correctness is first adopted, and then a principle of first-come is adopted, the processing unit 13 checks, at each time sequence, the first data received by the first I/O interface 11 and the second data received by the second I/O interface 12, if both the first data and the second data are correct, the processing unit determines the first-received data according to the first timestamp and the second timestamp, takes the first-received data as the received data of the time sequence, and discards the received data; if one of the first data and the second data is correct and one of the first data and the second data is wrong, the two time stamps are not needed to be judged, the correct data is received as the time sequence received data, and the wrong data is discarded; if both the first data and the second data are erroneous, the two time stamps are not judged and all the time series data are discarded.
The embodiment of the present application further provides a serial bus dual link redundancy communication system, as shown in fig. 2, including a first communication link 21 and a second communication link 22, and further including: at least two serial bus double-link redundancy communication modules provided in any of the above embodiments;
the first I/O interfaces 11 of the serial bus double-link redundancy communication modules are connected through a first communication link 21, and the first communication link 21 is used for transmitting first data;
the respective second I/O interfaces 12 of the serial bus dual-link redundancy communication modules are connected by a second communication link 22, and the second communication link 22 is used for transmitting second data;
wherein the first data and the second data belonging to the same time sequence are synchronously transmitted and the payloads are the same.
In this embodiment, one of the two serial bus double-link redundancy communication modules is used as a sender, the other serial bus double-link redundancy communication module is used as a receiver, and the serial bus double-link redundancy communication module used as the sender encapsulates the data to be sent of each time sequence into the first data and the second data with the same payload, and the first data and the second data are synchronously sent through a first I/O interface and a second I/O interface respectively; the serial bus double-link redundancy communication module as a receiving party receives first data from the first I/O interface and receives second data from the second I/O interface; under the condition that the received first data and the received second data belong to the same time sequence, selecting one of the first data and the second data for processing according to a first-come principle and a verification correct principle.
In an exemplary embodiment, the serial bus dual link redundancy communication system is a dual optical port link, and the first I/O interface 11 and the second I/O interface 12 of the two serial bus dual link redundancy communication modules are both optical ports, where the first I/O interface 11 is connected by an optical fiber, and the second I/O interface 12 is also connected by an optical fiber.
In an exemplary embodiment, the serial bus dual link redundancy communication system is a dual electrical port link, and the first I/O interface 11 and the second I/O interface 12 of the two serial bus dual link redundancy communication modules are both electrical ports, and the first I/O interface 11 is connected by a cable, and the second I/O interface 12 is also connected by a cable.
In an exemplary embodiment, one of the serial bus dual link redundancy communication systems is an electrical port link and one is an optical port link, and the first I/O interface 11 and the second I/O interface 12 of the two serial bus dual link redundancy communication modules are one of the electrical ports, the other is an optical port, the optical ports are connected by an optical fiber, and the electrical ports are connected by a cable.
The embodiment of the application also provides a serial bus dual-link redundancy communication method, which comprises the following steps of S310-S320 as shown in FIG. 3:
s310: at each time sequence, synchronously transmitting first data and second data with the same payload through a first communication link and a second communication link respectively;
s320: and under the condition that the first data and the second data are received to belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule.
The serial bus double-link redundancy communication method of the present embodiment may be applied, but not limited to, to the serial bus double-link redundancy communication system provided in the above embodiment.
In an exemplary embodiment, step S310 includes:
s311: the processing unit of the sending node encapsulates the data to be sent of each time sequence into first data and second data, and the payloads of the first data and the second data are the same under the same time sequence;
s312: the processing unit of the transmitting node controls the transmission time synchronization of the first data at the first I/O interface of the transmitting node and the second data at the second I/O interface of the transmitting node in the same time sequence;
s313: the first data is sequentially transmitted by the first communication link in time sequence, and the second data is sequentially transmitted by the second communication link in time sequence.
In an exemplary embodiment, step S320 includes: under the condition that the received first data and the received second data belong to the same time sequence, the processing unit selects the data received first to process according to the receiving sequence of the first data and the second data, namely, adopts a first data receiving method: the first-come first-get principle is adopted, and then the correct verification principle is adopted, as shown in fig. 4, and the method comprises the following steps of S401-S408:
s401: according to the first time stamp and the second time stamp, the receiving node processing unit determines data received first at the same time sequence;
s402: the receiving node processing unit checks the data received first, if S403 is executed correctly, if S404 is executed incorrectly;
s403: receiving the first received data as the time sequence data, discarding the last received data, and executing S407;
s404: the receiving node processing unit checks the received data, if S405 is executed correctly, S406 is executed incorrectly;
s405: the received data is used as the time sequence data, the data received first is discarded, and S407 is executed;
s406: discarding the time series data, and executing S407;
s407: the timing ends, if there is a next timing to be processed, the steps S401-S407 are circularly executed, and if all the timings end, S408 are executed;
s408: and (5) ending.
In an exemplary embodiment, step S320 includes: under the condition that the received first data and the received second data belong to the same time sequence, the processing unit determines the receiving sequence of the first data and the second data according to the first time stamp and the second time stamp; selecting one of the first data and the second data to process according to the verification result of the first data and the second data and the receiving sequence, namely adopting a second data receiving method: the verification correctness principle is adopted first, and the first-come first-get principle is adopted later, as shown in fig. 5, and the method comprises the steps of S501-S507:
s501: the receiving node processing unit checks the first data and the second data of the same time sequence, and if the first data and the second data are both correct, S502 is executed; if the first data is correct, the second data is incorrect, S503 is performed; if the first data is wrong, the second data is correct, S504 is performed; if both the first data and the second data are erroneous, S505 is performed;
s502: the receiving node processing unit determines the first received data according to the first time stamp and the second time stamp, and if the first data is received first, S503 is executed; if the second data is received first, S504 is performed;
s503: receiving the first data as the time series data, discarding the second data, and executing S506;
s504: receiving the second data as the time series data, discarding the first data, and executing S506;
s505: discarding the time-series data, and executing S506;
s506: the timing ends, if there is a next timing to be processed, S501-S406 are executed in a loop, and if all the timings end, S507 is executed;
s507: and (5) ending.
The above-described embodiments are specifically described below with two examples.
Example one
The data is transmitted between two nodes through a serial bus double-link redundancy communication system, the transmitting node is provided with a serial bus double-link redundancy communication module T1, the receiving node is provided with a serial bus double-link redundancy communication module R1, the first communication link 41 transmits first data A, the second communication link 42 transmits second data B, and under the same time sequence, the first data A and the second data B are simultaneously transmitted, the first-come-first-come principle and the correct verification principle are adopted for receiving the data, and the first-come-first-come principle and the correct verification principle is adopted later, as shown in fig. 6 and table 1.
In one timing sequence, the sequence in which R1 receives A and B is determined according to the first timestamp and the second timestamp, and R1 receives data A of the first I/O interface 11 first and then receives data B of the second I/O interface 12, which is divided into the following three cases:
first time sequence: firstly, data A1 of a first I/O interface 11 is received, then data B1 of a second I/O interface 12 is received, A1 is checked to be correct, A1 is received at a first time sequence as the time sequence data, whether B1 is correct or not is not checked, and B1 is discarded;
second timing: firstly, receiving data A2 of a first I/O interface 11, then receiving data B2 of a second I/O interface 12, checking A2, checking B2 and B2 to be correct if the A2 is checked to be wrong, receiving B2 at a second time sequence as the time sequence data, and discarding A2;
third timing: the data A3 of the first I/O interface 11 is received first, then the data B3 of the second I/O interface 12 is received, the A3 is checked, the B3 is checked after the A3 is checked to be wrong, the A3 and the B3 are discarded, and the data is not received at the third time sequence.
In one timing sequence, the sequence in which R1 receives A and B is determined according to the first timestamp and the second timestamp, and R1 receives data B of the second I/O interface 12 first and then receives data A of the first I/O interface 11, which is divided into the following three cases:
fourth timing: firstly, receiving data B4 of a second I/O interface 12, then receiving data A4 of a first I/O interface 11, checking B4, and receiving B4 as the time sequence data in a fourth time sequence after checking B4 to be correct, and discarding A4 without checking whether A4 is correct or not;
fifth timing: firstly, receiving data B5 of a second I/O interface 12, then receiving data A5 of a first I/O interface 11, checking B5, checking A5 and A5 to be correct after checking B5 to be incorrect, and then receiving A5 as the time sequence data at a fifth time sequence and discarding B5;
sixth timing: the data B6 of the second I/O interface 12 is received first, then the data A6 of the first I/O interface 11 is received, the data A6 is checked, if the data A6 is checked, the data A6 is checked if the data A6 is checked, the data B6 and the data A6 are discarded, and the data is not received at the sixth timing sequence.
Table 1 illustrates a received data statistics table for a serial bus dual link redundancy communication method
Example two
The data is transmitted between two nodes through a serial bus double-link redundancy communication system, the transmitting node is provided with a serial bus double-link redundancy communication module T2, the receiving node is provided with a serial bus double-link redundancy communication module R2, the first communication link 41 transmits first data A, the second communication link 42 transmits second data B, and under the same time sequence, the first data A and the second data B are simultaneously transmitted, the data is received by adopting a first-come-first-come principle and a correct-check principle, and the data is received by adopting a correct-check principle and then adopting a first-come-first-come principle, as shown in fig. 7 and table 2.
In one timing sequence, the data a received by the first I/O interface 11 and the data B received by the second I/O interface 12 of R2 are both correct through verification, and the following two cases are classified:
first time sequence: respectively judging the sequence of receiving A1 and B1 by R2 according to a first time stamp and a second time stamp, firstly receiving data A1 of a first I/O interface 11, then receiving data B1 of a second I/O interface 12, receiving data A1 which is the time sequence at a first time sequence, and discarding B1;
second timing: and respectively judging the sequence of receiving A2 and B2 by R2 according to the first timestamp and the second timestamp, firstly receiving the data B2 of the second I/O interface 12, then receiving the data A2 of the first I/O interface 11, receiving the data B2 at the second time sequence as the time sequence, and discarding the A2.
In addition, according to the verification result, the following three cases exist:
third timing: through verification, the data A3 received by the first I/O interface 11 of R2 is correct, the data B3 received by the second I/O interface 12 is incorrect, the receiving time sequence is not required to be judged, the data A3 is received at the third time sequence, and the data B3 is discarded.
Fourth timing: through verification, the data A4 received by the first I/O interface 11 of R2 is incorrect, the data B4 received by the second I/O interface 12 is correct, the receiving time sequence is not required to be judged, the data B4 is received at the fourth time sequence, and the data A4 is discarded.
Fifth timing: through verification, the data A5 received by the first I/O interface 11 of R2 is wrong, the data B5 received by the second I/O interface 12 is wrong, the receiving time sequence is not needed to be judged, the A5 and the B5 are discarded, and the data are not received at the fifth time sequence.
Table 2 illustrates a received data statistics table for a two serial bus dual link redundancy communication method
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Claims (10)
1. A serial bus dual link redundancy communication module comprising a first I/O interface and a processing unit, further comprising: a second I/O interface;
the processing unit is used for receiving first data from the first I/O interface and second data from the second I/O interface; under the condition that the first data and the second data are received to belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule;
wherein payloads of the first data and the second data belonging to the same timing sequence are the same.
2. The serial bus dual link redundancy communication module of claim 1, wherein:
the processing unit is further configured to encapsulate data to be sent in each time sequence into the first data and the second data with the same payload, and send the first data and the second data synchronously through the first I/O interface and the second I/O interface respectively.
3. The serial bus dual link redundancy communication module of claim 1, wherein:
the first I/O interface and the second I/O interface are dual optical ports, dual electrical ports, or one optical port and one electrical port, and are used for IEEE1394 buses or other serial buses.
4. The serial bus dual link redundancy communication module of claim 1, wherein:
the first I/O interface is further configured to add a first timestamp to the received first data, where the first timestamp is used to indicate a time of reception;
the second I/O interface is further configured to add a second timestamp to the received second data for indicating a time of receipt.
5. The serial bus dual link redundancy communication module according to claim 4, wherein the processing unit selects one of the first data and the second data to process according to a predetermined rule in a case where the received first data and the received second data belong to the same timing, comprising:
and the processing unit determines the receiving sequence of the first data and the second data according to the first time stamp and the second time stamp under the condition that the received first data and the received second data belong to the same time sequence, and selects the data received first to process.
6. The serial bus dual link redundancy communication module of claim 4, wherein: the processing unit selects one of the first data and the second data for processing according to a predetermined rule, including:
the processing unit determines the receiving sequence of the first data and the second data according to the first timestamp and the second timestamp under the condition that the received first data and the received second data belong to the same time sequence; and selecting one of the first data and the second data for processing according to the verification result of the first data and the second data and the receiving sequence.
7. A serial bus duplex link redundancy communication system comprising a first communication link and a second communication link, and at least two serial bus duplex link redundancy communication modules according to any of claims 1-6;
the serial bus double-link redundancy communication modules are connected with each other through the first communication links, and the first communication links are used for transmitting first data;
the serial bus double-link redundancy communication modules are connected with each other through the second communication links, and the second communication links are used for transmitting second data;
wherein the first data and the second data belonging to the same time sequence are synchronously transmitted and the payloads are the same.
8. A serial bus dual link redundancy communication method, applied in the serial bus dual link redundancy communication system according to claim 7, comprising:
at each time sequence, synchronously transmitting first data and second data with the same payload through a first communication link and a second communication link respectively;
and under the condition that the first data and the second data are received to belong to the same time sequence, selecting one of the first data and the second data for processing according to a preset rule.
9. The serial bus dual link redundancy communication method of claim 8, wherein:
and when the first data and the second data are received in the same time sequence, selecting one of the first data and the second data for processing according to a preset rule, wherein the processing comprises the following steps:
and under the condition that the received first data and the received second data belong to the same time sequence, the processing unit selects the data received first to process according to the receiving sequence of the first data and the second data.
10. The serial bus dual link redundancy communication method of claim 8, wherein:
and when the first data and the second data are received in the same time sequence, selecting one of the first data and the second data for processing according to a preset rule, wherein the processing comprises the following steps:
the processing unit determines the receiving sequence of the first data and the second data under the condition that the first data and the second data are received in the same time sequence; and selecting one of the first data and the second data for processing according to the verification result of the first data and the second data and the receiving sequence.
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