CN117202514A - Processing method for producing intelligent wearable FPC and intelligent wearable FPC - Google Patents
Processing method for producing intelligent wearable FPC and intelligent wearable FPC Download PDFInfo
- Publication number
- CN117202514A CN117202514A CN202311465557.8A CN202311465557A CN117202514A CN 117202514 A CN117202514 A CN 117202514A CN 202311465557 A CN202311465557 A CN 202311465557A CN 117202514 A CN117202514 A CN 117202514A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- fpc circuit
- fpc
- lamination
- pressing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 19
- 238000003475 lamination Methods 0.000 claims abstract description 150
- 238000000034 method Methods 0.000 claims abstract description 47
- 238000001514 detection method Methods 0.000 claims abstract description 4
- 238000003825 pressing Methods 0.000 claims description 126
- 238000010030 laminating Methods 0.000 claims description 41
- 239000010408 film Substances 0.000 claims description 16
- 230000002159 abnormal effect Effects 0.000 claims description 15
- 238000005516 engineering process Methods 0.000 claims description 13
- 108010075226 adenovirus factor PL Proteins 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 8
- 229910000859 α-Fe Inorganic materials 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 6
- 238000007689 inspection Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011889 copper foil Substances 0.000 claims description 4
- 239000013039 cover film Substances 0.000 claims description 4
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 230000007704 transition Effects 0.000 description 5
- 239000002699 waste material Substances 0.000 description 5
- 230000009191 jumping Effects 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920006267 polyester film Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Abstract
The invention belongs to the technical field of FPC circuit board processing, and particularly discloses a processing method for producing intelligent wearable FPC and the intelligent wearable FPC, wherein the processing process of forming an FPC circuit board stack after lamination, baking and curing is performed; collecting the lamination state data, and obtaining lamination factors of the FPC circuit board lamination through the lamination state data; obtaining an effective value of the FPC circuit board stacking based on the lamination factor; comparing the effective value of the FPC circuit board stacking with the effective value threshold of the FPC circuit board stacking; if the effective value of the FPC circuit board stacking structure is smaller than or equal to the effective value threshold value of the FPC circuit board stacking structure, the initial detection of the lamination of the FPC circuit board stacking structure is normal, and if the effective value of the FPC circuit board stacking structure is larger than the effective value threshold value of the FPC circuit board stacking structure, the lamination precision of the FPC circuit board stacking structure is analyzed, and the lamination processing yield of the FPC circuit board stacking structure is effectively improved.
Description
Technical Field
The invention relates to the technical field of FPC circuit board processing, in particular to a processing method for producing intelligent wearable FPC and the intelligent wearable FPC.
Background
A flexible printed circuit board (FPC), one of the important branches of a Printed Circuit Board (PCB), is a flexible printed circuit board having high reliability and excellent properties, which is made of polyimide or polyester film as an insulating substrate.
At present, the application of the FPC almost relates to all electronic information products, including consumer electronics, communication equipment, automobile carriers and other wide fields, in particular to a multi-layer flexible printed circuit board (FPC), which can realize the advantages of folding and high assembly flexibility of a common single-sided or double-sided flexible printed circuit board (FPC), has the characteristics of bearing capacity of a hard Printed Circuit Board (PCB) and the like, can replace a part of traditional hard Printed Circuit Boards (PCB), and has wider application fields.
The patent application number CN202210991635.7 discloses a processing method of an FPC circuit board applied to a smart watch, which comprises the following steps: a copper foil material is adopted to manufacture a circuit; processing a photosensitive film, attaching ferrite, pressing, baking and solidifying to form an FPC circuit board stack structure of the intelligent watch; a single-sided board is tightly adhered with the upper dry film by adopting a vacuum film pressing technology; transferring the circuit pattern precise exposure of the designed GERBER to a dry film on a single panel by adopting a single panel precise LDI exposure technology; etching and forming the circuit by adopting a single-sided board precise etching technology; and then, the FPC circuit board of the intelligent watch is realized through the production processes of laminating a cover film, baking, exposing and developing printing ink, laminating ferrite and electroless nickel gold, so that the requirements of the current intelligent watch are met.
However, in the technology, the identification of laminating data of the FPC circuit board is lacking, namely the processing of laminating temperature and laminating pressure in the laminating and laminating process of the FPC circuit board is lacking, the laminating quality of the FPC circuit board cannot be effectively identified, and the continuous processing of abnormal FPC circuit board lamination is easy to cause the waste of processing time and materials.
Disclosure of Invention
The invention aims to provide a processing method for producing an intelligent wearable FPC and the intelligent wearable FPC, which are characterized in that pressing state data are collected in the pressing process of the FPC circuit board lamination, namely pressing temperature data and pressing pressure data in the pressing state are processed to obtain an effective value of the FPC circuit board lamination in the FPC circuit board lamination pressing state, the effective value of the FPC circuit board lamination is compared with an effective value threshold of the FPC circuit board lamination, the FPC circuit board lamination with the effective value larger than the effective value threshold of the FPC circuit board lamination is subjected to pressing precision identification, the FPC circuit board lamination which does not accord with the pressing precision is marked as a scrapped FPC circuit board lamination, and subsequent FPC circuit board processing is not performed, so that the waste of processing time caused by continuous processing of abnormal FPC circuit board lamination is effectively prevented, and the scrapping rate of FPC circuit board processing is reduced.
The aim of the invention can be achieved by the following technical scheme:
a processing method for producing intelligent wearing FPC includes the following steps:
s1: a copper foil material is adopted to manufacture a circuit;
s2: processing the photosensitive film, attaching ferrite, and pressing, baking and solidifying to form an FPC circuit board stack;
the method comprises the steps of collecting lamination state data, and obtaining lamination factors of the FPC circuit board lamination through the lamination state data; the method comprises the steps of processing a lamination factor of the FPC circuit board lamination to obtain an effective value of the FPC circuit board lamination;
comparing the effective value of the FPC circuit board stacking with the effective value threshold of the FPC circuit board stacking;
if the effective value of the FPC circuit board stacking structure is smaller than or equal to the effective value threshold value of the FPC circuit board stacking structure, the initial detection of the FPC circuit board stacking structure is normal, and S3 is entered;
if the effective value of the FPC circuit board stacking structure is larger than the effective value threshold value of the FPC circuit board stacking structure, analyzing the pressing precision of the FPC circuit board stacking structure, and entering the FPC circuit board stacking structure corresponding to the initial check normal signal into S3;
s3: a single-sided board is tightly adhered with the upper dry film by adopting a vacuum film pressing technology;
s4: transferring the circuit pattern precise exposure of the designed GERBER to a dry film on a single panel by adopting a single panel precise LDI exposure technology;
s5: etching and forming the circuit by adopting a single-sided board precise etching technology;
s6: and then, laminating the cover film, baking, exposing and developing the printing ink, laminating ferrite and producing electroless nickel gold to obtain the FPC circuit board.
As a further scheme of the invention: the press-fit state data includes press-fit temperature data and press-fit pressure data.
As a further scheme of the invention: processing the pressing temperature data to obtain a temperature factor of the FPC circuit board stacked in pressing time and marking the temperature factor as Wd;
processing the pressing pressure data to obtain a pressure factor of the FPC circuit board stacked in the pressing duration and marking the pressure factor as PL;
processing a temperature factor Wd of the FPC circuit board stacked in the pressing duration and a pressure factor PL of the FPC circuit board stacked in the pressing duration, namely, processing the temperature factor Wd and the pressure factor PL of the FPC circuit board stacked in the pressing duration according to a formulaAnd calculating to obtain an effective value WL of the FPC circuit board stack.
As a further scheme of the invention: presetting an effective value threshold value WL of the FPC circuit board lamination, and comparing the effective value WL of the FPC circuit board lamination with the effective value threshold value WL of the FPC circuit board lamination;
if WL is less than or equal to WL, the lamination and initial inspection of the FPC circuit board is normal, and a normal signal is generated, and S3 is performed;
when WL > WL, it indicates that the lamination of FPC circuit board is abnormal, and generates abnormal signal.
As a further scheme of the invention: based on the FPC circuit board lamination abnormal signal, marking the FPC circuit board lamination corresponding to the FPC circuit board lamination abnormal signal as the FPC circuit board lamination to be monitored;
and analyzing the lamination precision of the FPC circuit board to be monitored.
As a further scheme of the invention: the method comprises the steps that the pressing precision of the FPC circuit board to be monitored is obtained, wherein the pressing precision comprises actual size data, and the actual size data comprises the actual length size, the actual width size and the actual thickness size of the FPC circuit board to be monitored;
wherein,
comparing the actual length dimension of the FPC circuit board stack to be monitored with the preset length dimension of the FPC circuit board stack;
comparing the actual width dimension of the FPC circuit board stack to be monitored with the preset width dimension of the FPC circuit board stack;
comparing the actual thickness dimension of the FPC circuit board stack to be monitored with the preset thickness dimension of the FPC circuit board stack;
when three of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a first-stage scrapped FPC circuit board stack;
when two of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a secondary scrapped FPC circuit board stack;
when one of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored is larger than a preset dimension, the FPC circuit board stack to be monitored is marked as a three-stage scrapped FPC circuit board stack;
and when the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board to be monitored are smaller than the preset dimension, the FPC circuit board to be monitored is recorded as a problem-free FPC circuit board to be monitored, and the initial check normal signal is obtained.
As a further scheme of the invention: the temperature factor obtaining process comprises the following steps:
dividing the laminating duration of the FPC circuit board lamination into a plurality of continuous independent time subunits with equal duration, respectively obtaining the maximum temperature value in each time subunit, and recording the maximum temperature value in each time subunit as the target temperature value of the time subunit;
sorting the target temperature values of the time subunits according to time sequence to obtain a target temperature value group in the pressing duration;
and processing the average temperature and the temperature jump ratio of the target temperature value group in the pressing duration to obtain the temperature factor.
As a further scheme of the invention: the average temperature of the FPC circuit board stacked in the pressing duration is marked as Wp, and the temperature jumping ratio of the FPC circuit board stacked in the pressing duration is marked as Wt;
by the formulaAnd obtaining a temperature factor Wd of the FPC circuit board lamination in the lamination time, wherein Wb is the optimal temperature of the FPC circuit board lamination in the lamination time.
As a further scheme of the invention: the process for obtaining the pressure factor comprises the following steps:
acquiring a pressure constant value in the initial pressing process of the FPC circuit board lamination, and acquiring a pressure base number of the initial pressing of the FPC circuit board lamination based on the pressure constant value in the initial pressing process;
acquiring a pressure constant value in the laminating section pressing process of the FPC circuit board, and based on the pressure constant value in the laminating section pressing process, obtaining a pressure base of the laminating section pressing of the FPC circuit board;
acquiring a pressure constant value in the pressing-back process of the FPC circuit board lamination, and acquiring a pressure base number of the pressing-back of the FPC circuit board lamination based on the pressure constant value in the pressing-back process;
and carrying out weighting treatment on the pressure base number of the initial pressure of the FPC circuit board lamination, the pressure base number of the section pressure of the FPC circuit board lamination and the pressure base number of the back pressure of the FPC circuit board lamination to obtain the pressure factor.
The invention also provides an intelligent wearing FPC, which is prepared by the processing method.
The invention has the beneficial effects that:
(1) According to the invention, press-fit state data are collected in the laminating process of the FPC circuit board, namely, press-fit temperature data and press-fit pressure data in the press-fit state are processed, the press-fit time is divided into a plurality of continuous independent time subunits with equal time length in the processing process of the press-fit temperature data, a target temperature value group is obtained by obtaining the maximum temperature value in each time subunit, the target temperature value group is processed to obtain a temperature factor, namely, the smaller the temperature factor is, the smaller the temperature fluctuation in the target temperature value group is, the closer the temperature fluctuation is, the optimal temperature of the FPC circuit board in the laminating time length is, meanwhile, the pressure base of the initial press-fit pressure of the FPC circuit board in the laminating time length, the pressure base of the press-fit section of the FPC circuit board and the pressure base of the back-fit pressure of the FPC circuit board are processed in the processing process of the press-fit pressure data, so that the pressure factor of the FPC circuit board in the laminating time length is obtained, namely, the smaller the pressure factor is, the closer the stages in the laminating process are to the optimal pressure of the FPC circuit board in the laminating time length, so that the FPC circuit board in the laminating time length is represented by the pressure factor and the lower the temperature factor is, and the reliability of the state of the FPC circuit board in the laminating process is high;
(2) According to the invention, the effective value of the FPC circuit board lamination is processed in the lamination state of the FPC circuit board lamination, the effective value of the FPC circuit board lamination is compared with the effective value threshold of the FPC circuit board lamination, the lamination precision of the FPC circuit board lamination with the effective value of the FPC circuit board lamination being larger than the effective value threshold of the FPC circuit board lamination is identified, the FPC circuit board lamination which does not accord with the lamination precision is marked as a scrapped FPC circuit board lamination, and the subsequent FPC circuit board processing is not performed, so that the waste of processing time caused by the continuous processing of the abnormal FPC circuit board lamination is effectively prevented, and the scrapping rate of the FPC circuit board processing is reduced;
(3) According to the invention, by analyzing the pressing precision and carrying out the tracing processing on the pressing state data based on the problem-free FPC circuit board lamination, the obtained pressing temperature data and the obtained pressing pressure data are verified through the tracing processing, so that the erroneous judgment on the FPC circuit board lamination caused by inaccurate pressing state data is prevented.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a flow chart of the present invention;
FIG. 2 is a flow chart of the initial inspection of the lamination of the FPC board;
FIG. 3 is a press-fit accuracy analysis flow chart of the FPC board stack to be monitored;
fig. 4 is a flow chart of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Examples
Referring to fig. 1-3, the invention discloses a processing method for producing an intelligent wearable FPC, which comprises the following steps:
s1: a copper foil material is adopted to manufacture a circuit;
s2: processing the photosensitive film, attaching ferrite, and pressing, baking and solidifying to form an FPC circuit board stack;
the method comprises the steps of collecting lamination state data, and obtaining lamination factors of the FPC circuit board lamination through the lamination state data; the method comprises the steps of processing a lamination factor of the FPC circuit board lamination to obtain an effective value of the FPC circuit board lamination;
comparing the effective value of the FPC circuit board stacking with the effective value threshold of the FPC circuit board stacking;
if the effective value of the FPC circuit board stacking structure is smaller than or equal to the effective value threshold value of the FPC circuit board stacking structure, the initial detection of the FPC circuit board stacking structure is normal, and S3 is entered;
if the effective value of the FPC circuit board stacking structure is larger than the effective value threshold value of the FPC circuit board stacking structure, analyzing the pressing precision of the FPC circuit board stacking structure, and entering the FPC circuit board stacking structure corresponding to the initial check normal signal into S3;
s3: a single-sided board is tightly adhered with the upper dry film by adopting a vacuum film pressing technology;
s4: transferring the circuit pattern precise exposure of the designed GERBER to a dry film on a single panel by adopting a single panel precise LDI exposure technology;
s5: etching and forming the circuit by adopting a single-sided board precise etching technology;
s6: and then, laminating the cover film, baking, exposing and developing the printing ink, laminating ferrite and producing electroless nickel gold to obtain the FPC circuit board.
The pressing state data comprise pressing temperature data and pressing pressure data;
wherein,
the pressing temperature data is obtained by processing the average temperature of the FPC circuit board stacked in the pressing time and the temperature jumping ratio in the pressing time;
the average temperature of the FPC circuit board lamination in the lamination duration is obtained by the following steps:
dividing the laminating duration of the FPC circuit board lamination into a plurality of continuous independent time subunits with equal duration, respectively obtaining the maximum temperature value in each time subunit, and recording the maximum temperature value in each time subunit as the target temperature value of the time subunit;
sorting the target temperature values of the time subunits according to time sequence to obtain a target temperature value group in the pressing duration;
summing the target temperature value groups in the pressing duration, and taking an average value to obtain the average temperature of the FPC circuit board lamination in the pressing duration, and marking the average temperature of the FPC circuit board lamination in the pressing duration as Wp;
calculating to obtain standard deviation alpha of the target temperature value group according to a standard deviation calculation formula;
obtaining the maximum target temperature value in the target temperature value group in the pressing duration and marking the maximum target temperature value as Wmax;
obtaining a minimum target temperature value in a target temperature value group in the pressing duration and marking the minimum target temperature value as Wmin;
calculating to obtain the amplitude ratio Wf of the target temperature value group by using a formula wf= (Wmax-Wmin)/Wmin;
by the formulaObtaining a temperature jumping ratio Wt of the FPC circuit board in the lamination duration, wherein b1 and b2 are preset scale factors, and b1 and b2 are both larger than 0;
processing the average temperature Wp of the FPC circuit board lamination in the lamination duration and the temperature jumping ratio Wt of the FPC circuit board lamination in the lamination duration;
by the formulaObtaining a temperature factor Wd of the FPC circuit board lamination in the lamination time, wherein Wb is the optimal temperature of the FPC circuit board lamination in the lamination time;
the pressing pressure data are obtained by processing the pressure base number of the initial pressing of the FPC circuit board lamination, the pressure base number of the pressing of the FPC circuit board lamination section and the pressure base number of the back pressing of the FPC circuit board lamination in the pressing duration;
the pressure is used for driving volatile matters and residual gas, the section pressure is used for smoothly filling glue solution, driving bubbles in the glue, preventing buckling and stress caused by overhigh primary pressure, generating polymerization reaction, hardening materials, and the pressure relief is used for keeping proper pressure in a cooling section, so that internal stress caused by cooling is reduced.
Specific:
marking the constant pressure value in the initial pressing process of the FPC circuit board lamination as P1;
marking the constant pressure value in the laminating section pressing process of the FPC circuit board as P2;
marking the constant pressure value in the stacking and decompressing process of the FPC circuit board as P3;
acquiring time from zero transition of pressure in the initial pressing process of the FPC circuit board lamination to taking a constant value P1 of the pressure in the initial pressing process of the FPC circuit board lamination, and marking the time as a first transition time and t1;
acquiring time from a constant pressure P1 in the initial pressing process of the FPC circuit board lamination to a constant pressure P2 in the section pressing process of the FPC circuit board lamination, and marking the time as second transition time and t2;
acquiring time from transition of a constant pressure value P2 in the laminating section pressing process of the FPC circuit board to a constant pressure value P3 in the laminating and de-pressing process of the FPC circuit board, and marking the time as a third transition time and t3;
by the formulaCalculating to obtain a pressure base Py1 of the initial pressure of the FPC circuit board lamination in the lamination duration, wherein Pb1 is the optimal pressure of the FPC circuit board lamination in the initial pressure duration;
by the formulaCalculating to obtain a pressure base Py2 of the laminating section pressure of the FPC circuit board in the laminating time, wherein Pb2 is the optimal pressure of the laminating section pressure of the FPC circuit board in the laminating time;
by the formulaCalculating to obtain a pressure base Py3 of the FPC circuit board lamination pressure relief in the lamination duration, wherein Pb3 is the optimal pressure of the FPC circuit board lamination pressure relief duration;
carrying out weight treatment on a pressure base Py1 of the initial pressure of the FPC circuit board lamination, a pressure base Py2 of the section pressure of the FPC circuit board lamination and a pressure base Py3 of the back pressure of the FPC circuit board lamination in the lamination duration, distributing a weight ratio of the pressure base Py1 of the initial pressure of the FPC circuit board lamination as a1, distributing a weight ratio of the pressure base Py2 of the section pressure of the FPC circuit board lamination as a2, and distributing a weight ratio of the pressure base Py3 of the back pressure of the FPC circuit board lamination as a3, wherein a1+a2+a3=1, a2> a1> a3;
according to the formulaObtaining a pressure factor PL of the FPC circuit board stacked in the pressing duration;
processing a temperature factor Wd of the FPC circuit board stacked in the pressing duration and a pressure factor PL of the FPC circuit board stacked in the pressing duration, namely, processing the temperature factor Wd and the pressure factor PL of the FPC circuit board stacked in the pressing duration according to a formulaCalculating to obtain an effective value WL of the FPC circuit board stack, wherein->Is a preset proportionality coefficient;
wherein,the acquisition process of (1) is as follows: m groups of historical data exist, wherein each group of historical data comprises a temperature factor Wd of the FPC circuit board stacked in the pressing duration, a pressure factor PL of the FPC circuit board stacked in the pressing duration and an effective value WL of the FPC circuit board stacked;
fitting m groups of historical data by adopting a linear model, taking the prepared historical data into a selected fitting model for fitting to obtain the average value of fitting coefficients as a preset proportionality coefficient,greater than 0.
Presetting an effective value threshold value WL of the FPC circuit board lamination, and comparing the effective value WL of the FPC circuit board lamination with the effective value threshold value WL of the FPC circuit board lamination;
if WL is less than or equal to WL, the lamination and initial inspection of the FPC circuit board is normal, and a normal signal is generated, and S3 is performed;
when WL > WL, it indicates that the lamination of FPC circuit board is abnormal, and generates abnormal signal.
Based on the FPC circuit board lamination abnormal signal, marking the FPC circuit board lamination corresponding to the FPC circuit board lamination abnormal signal as the FPC circuit board lamination to be monitored;
analyzing the lamination precision of the FPC circuit board lamination to be monitored;
the method comprises the steps that the pressing precision of the FPC circuit board to be monitored is obtained, wherein the pressing precision comprises actual size data, and the actual size data comprises the actual length size, the actual width size and the actual thickness size of the FPC circuit board to be monitored;
wherein,
comparing the actual length dimension of the FPC circuit board stack to be monitored with the preset length dimension of the FPC circuit board stack;
comparing the actual width dimension of the FPC circuit board stack to be monitored with the preset width dimension of the FPC circuit board stack;
comparing the actual thickness dimension of the FPC circuit board stack to be monitored with the preset thickness dimension of the FPC circuit board stack;
when three of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a first-stage scrapped FPC circuit board stack;
when two of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a secondary scrapped FPC circuit board stack;
when one of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored is larger than a preset dimension, the FPC circuit board stack to be monitored is marked as a three-stage scrapped FPC circuit board stack;
when the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board to be monitored are smaller than the preset dimension, the FPC circuit board to be monitored is recorded as a problem-free FPC circuit board to be monitored, and a primary check normal signal is obtained;
when the FPC circuit board to be monitored is stacked to obtain a primary check normal signal, continuing to carry out the step S3, and carrying out the processing of the FPC circuit board;
the waste degree of the first-stage scrapped FPC circuit board stacking structure is higher than that of the second-stage scrapped FPC circuit board stacking structure, and the waste degree of the second-stage scrapped FPC circuit board stacking structure is three-stage scrapped FPC circuit board stacking structure.
In a specific embodiment, when the FPC board to be monitored is stacked to obtain the primary check normal signal, performing the trace back processing on the pressing state data, including:
1. processing a target temperature value group in the pressing duration in the pressing temperature data, namely verifying the maximum temperature value of each time subunit in the target temperature value group to determine that the maximum temperature value of each time subunit is accurately obtained, including but not limited to verifying a temperature sensor for obtaining the temperature value and verifying the pressing temperature of pressing equipment;
2. and (3) verifying the pressure constant value in the initial pressing process of the FPC circuit board lamination, the pressure constant value in the section pressing process of the FPC circuit board lamination and the pressure constant value P3 in the back pressing process of the FPC circuit board lamination in the pressing pressure data in the pressing duration so as to determine that the pressure value in each pressing stage is accurate, including but not limited to verifying a pressure sensor for acquiring the pressure value and verifying the pressing pressure of pressing equipment.
Examples
Referring to fig. 4, the present invention is a processing system for producing an intelligent wearable FPC, where the processing system is used for laminating an FPC circuit board in a processing process of the wearable FPC, and specifically includes:
press fit data acquisition module
The pressing data acquisition module is used for acquiring pressing state data, wherein the pressing data acquisition module comprises a pressing temperature acquisition unit and a pressing pressure acquisition unit; the pressing data acquisition module sends pressing state data to the cloud management and control platform;
the pressing temperature acquisition unit is used for acquiring pressing temperature data;
the pressing pressure acquisition unit is used for acquiring pressing pressure data;
press fit data processing module
The pressing data processing module receives pressing state data sent by the cloud control platform, processes the pressing state data to obtain pressing factors of the FPC circuit board lamination, and obtains effective values of the FPC circuit board lamination based on the pressing factors;
comparing the effective value of the FPC circuit board stacking with the effective value threshold of the FPC circuit board stacking;
if the effective value of the FPC circuit board lamination is smaller than or equal to the effective value threshold of the FPC circuit board lamination, the lamination initial inspection of the FPC circuit board lamination is normal;
if the effective value of the FPC circuit board stacking structure is larger than the effective value threshold value of the FPC circuit board stacking structure, analyzing the lamination precision of the FPC circuit board stacking structure, and marking the corresponding FPC circuit board stacking structure as the FPC circuit board stacking structure to be monitored;
the pressing factor comprises a temperature factor of the FPC circuit board laminated in a pressing time period and a pressure factor of the FPC circuit board laminated in the pressing time period;
pressing precision analysis module
The pressing precision analysis module acquires pressing precision including actual size data of the FPC circuit board to be monitored, compares the actual size data with preset size data, and identifies the type of the FPC circuit board to be monitored;
the actual size data comprise the actual length size, the actual width size and the actual thickness size of the FPC circuit board to be monitored;
the type of the FPC circuit board to be monitored comprises a first-stage scrapped FPC circuit board stacking structure, a second-stage scrapped FPC circuit board stacking structure, a third-stage scrapped FPC circuit board stacking structure and a problem-free FPC circuit board stacking structure;
stitching data tracing module
And the stitching data tracing module traces stitching state data based on that the effective value of the FPC circuit board structure generated by the problem-free FPC circuit board structure is larger than the effective value threshold of the FPC circuit board structure, and validates stitching temperature data and stitching pressure data in the stitching state data.
Examples
The invention relates to an intelligent wearing FPC prepared by a processing method for producing the intelligent wearing FPC.
The foregoing describes one embodiment of the present invention in detail, but the description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All equivalent changes and modifications within the scope of the present invention are intended to be covered by the present invention.
Claims (10)
1. A processing method for producing intelligent wearing FPC, which is characterized by comprising the following steps:
s1: a copper foil material is adopted to manufacture a circuit;
s2: processing the photosensitive film, attaching ferrite, and pressing, baking and solidifying to form an FPC circuit board stack;
the method comprises the steps of collecting lamination state data, and obtaining lamination factors of the FPC circuit board lamination through the lamination state data; processing the lamination factor of the FPC circuit board lamination to obtain an effective value of the FPC circuit board lamination;
comparing the effective value of the FPC circuit board stacking with the effective value threshold of the FPC circuit board stacking;
if the effective value of the FPC circuit board stacking structure is smaller than or equal to the effective value threshold value of the FPC circuit board stacking structure, the initial detection of the FPC circuit board stacking structure is normal, and S3 is entered;
if the effective value of the FPC circuit board stacking structure is larger than the effective value threshold value of the FPC circuit board stacking structure, analyzing the pressing precision of the FPC circuit board stacking structure, and entering the FPC circuit board stacking structure corresponding to the initial check normal signal into S3;
s3: a single-sided board is tightly adhered with the upper dry film by adopting a vacuum film pressing technology;
s4: transferring the circuit pattern precise exposure of the designed GERBER to a dry film on a single panel by adopting a single panel precise LDI exposure technology;
s5: etching and forming the circuit by adopting a single-sided board precise etching technology;
s6: and then, laminating the cover film, baking, exposing and developing the printing ink, laminating ferrite and producing electroless nickel gold to obtain the FPC circuit board.
2. The processing method for producing a smart wearable FPC of claim 1, wherein the nip state data includes nip temperature data and nip pressure data.
3. The processing method for producing the intelligent wearable FPC according to claim 2, wherein the pressing temperature data is processed to obtain a temperature factor of the FPC circuit board lamination within a pressing duration and marked as Wd;
processing the pressing pressure data to obtain a pressure factor of the FPC circuit board stacked in the pressing duration and marking the pressure factor as PL;
processing a temperature factor Wd of the FPC circuit board stacked in the pressing duration and a pressure factor PL of the FPC circuit board stacked in the pressing duration, namely, processing the temperature factor Wd and the pressure factor PL of the FPC circuit board stacked in the pressing duration according to a formulaAnd calculating to obtain an effective value WL of the FPC circuit board stack.
4. A processing method for producing an intelligent wearable FPC according to claim 3, characterized in that an effective value threshold of the FPC wiring board stack is preset to WL, and the effective value WL of the FPC wiring board stack is compared with the effective value threshold WL of the FPC wiring board stack;
if WL is less than or equal to WL, the lamination and initial inspection of the FPC circuit board is normal, and a normal signal is generated, and S3 is performed;
when WL > WL, it indicates that the lamination of FPC circuit board is abnormal, and generates abnormal signal.
5. The processing method for producing the intelligent wearable FPC according to claim 4, wherein the FPC circuit board stacking corresponding to the FPC circuit board stacking abnormal signal is marked as the FPC circuit board stacking to be monitored based on the FPC circuit board stacking abnormal signal;
and analyzing the lamination precision of the FPC circuit board to be monitored.
6. The processing method for producing the intelligent wearable FPC according to claim 5, wherein the obtaining of the lamination accuracy of the FPC board stack to be monitored includes actual size data including an actual length size, an actual width size, and an actual thickness size of the FPC board stack to be monitored;
wherein,
comparing the actual length dimension of the FPC circuit board stack to be monitored with the preset length dimension of the FPC circuit board stack;
comparing the actual width dimension of the FPC circuit board stack to be monitored with the preset width dimension of the FPC circuit board stack;
comparing the actual thickness dimension of the FPC circuit board stack to be monitored with the preset thickness dimension of the FPC circuit board stack;
when three of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a first-stage scrapped FPC circuit board stack;
when two of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored are larger than the preset dimension, the FPC circuit board stack to be monitored is marked as a secondary scrapped FPC circuit board stack;
when one of the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board stack to be monitored is larger than a preset dimension, the FPC circuit board stack to be monitored is marked as a three-stage scrapped FPC circuit board stack;
and when the actual length dimension, the actual width dimension and the actual thickness dimension of the FPC circuit board to be monitored are smaller than the preset dimension, the FPC circuit board to be monitored is recorded as a problem-free FPC circuit board to be monitored, and the initial check normal signal is obtained.
7. A process for producing an intelligent wearable FPC according to claim 3, wherein the temperature factor acquisition process includes:
dividing the laminating duration of the FPC circuit board lamination into a plurality of continuous independent time subunits with equal duration, respectively obtaining the maximum temperature value in each time subunit, and recording the maximum temperature value in each time subunit as the target temperature value of the time subunit;
sorting the target temperature values of the time subunits according to time sequence to obtain a target temperature value group in the pressing duration;
and processing the average temperature and the temperature jump ratio of the target temperature value group in the pressing duration to obtain the temperature factor.
8. The processing method for producing the intelligent wearable FPC according to claim 7, wherein an average temperature of the FPC wiring board stack in the press-fit period is denoted as Wp, and a temperature run-out ratio of the FPC wiring board stack in the press-fit period is denoted as Wt;
by the formulaObtaining the FPC circuit board lamination pressingAnd a temperature factor Wd in the laminating time, wherein Wb is the optimal temperature of the FPC circuit board lamination in the laminating time.
9. The processing method for producing an intelligent wearable FPC according to claim 1, wherein the process of obtaining the pressure factor includes:
acquiring a pressure constant value in the initial pressing process of the FPC circuit board lamination, and acquiring a pressure base number of the initial pressing of the FPC circuit board lamination based on the pressure constant value in the initial pressing process;
acquiring a pressure constant value in the laminating section pressing process of the FPC circuit board, and based on the pressure constant value in the laminating section pressing process, obtaining a pressure base of the laminating section pressing of the FPC circuit board;
acquiring a pressure constant value in the pressing-back process of the FPC circuit board lamination, and acquiring a pressure base number of the pressing-back of the FPC circuit board lamination based on the pressure constant value in the pressing-back process;
and carrying out weighting treatment on the pressure base number of the initial pressure of the FPC circuit board lamination, the pressure base number of the section pressure of the FPC circuit board lamination and the pressure base number of the back pressure of the FPC circuit board lamination to obtain the pressure factor.
10. An intelligent wearable FPC, characterized in that it is prepared by the processing method of any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311465557.8A CN117202514B (en) | 2023-11-07 | 2023-11-07 | Processing method for producing intelligent wearable FPC and intelligent wearable FPC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311465557.8A CN117202514B (en) | 2023-11-07 | 2023-11-07 | Processing method for producing intelligent wearable FPC and intelligent wearable FPC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN117202514A true CN117202514A (en) | 2023-12-08 |
| CN117202514B CN117202514B (en) | 2024-01-16 |
Family
ID=88987292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311465557.8A Active CN117202514B (en) | 2023-11-07 | 2023-11-07 | Processing method for producing intelligent wearable FPC and intelligent wearable FPC |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117202514B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008192720A (en) * | 2007-02-02 | 2008-08-21 | Hitachi Communication Technologies Ltd | Method of manufacturing multilayer printed wiring board |
| CN115397112A (en) * | 2022-08-18 | 2022-11-25 | 厦门弘信电子科技集团股份有限公司 | Processing method of FPC (flexible printed circuit) circuit board applied to smart watch |
-
2023
- 2023-11-07 CN CN202311465557.8A patent/CN117202514B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008192720A (en) * | 2007-02-02 | 2008-08-21 | Hitachi Communication Technologies Ltd | Method of manufacturing multilayer printed wiring board |
| CN115397112A (en) * | 2022-08-18 | 2022-11-25 | 厦门弘信电子科技集团股份有限公司 | Processing method of FPC (flexible printed circuit) circuit board applied to smart watch |
Also Published As
| Publication number | Publication date |
|---|---|
| CN117202514B (en) | 2024-01-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103918355B (en) | Surface treatment copper foil and its plywood of use | |
| CN105611746B (en) | The assembly circuit plate replacement method and assembly substrate of assembly substrate | |
| CN110267437B (en) | Printed circuit board expansion and shrinkage control method and device | |
| CN117202514B (en) | Processing method for producing intelligent wearable FPC and intelligent wearable FPC | |
| CN111405781A (en) | Multilayer circuit board positioning and laminating method | |
| CN110400152A (en) | Quality traceability system for printed circuit board | |
| CN108668444B (en) | Collapsible control method, machining method and system, computer storage medium and device | |
| US10187984B1 (en) | Circuit board and method for making the same | |
| CN106793583A (en) | A kind of pcb board local electric thick gold with it is non local electricity gold wiring preparation method | |
| CN211429638U (en) | Double-sided riveting structure of multilayer circuit board | |
| Li et al. | Fine pitch stencil printing process modeling and optimization | |
| CN106576428B (en) | The manufacturing method of flexible copper wiring plate and its flexible copper-clad laminate used with support membrane | |
| CN108282968A (en) | A kind of substrate of printed circuit board and preparation method thereof | |
| CN102129062A (en) | Electric energy small-signal measuring and calibrating method and device | |
| CN101684999A (en) | Conversion method of data format | |
| CN103722869B (en) | The resolver and analytic method of silk-screen printing device, silk-screen printing poor prognostic cause | |
| Salzano et al. | Environmental qualification testing and failure analysis of embedded resistors | |
| CN109815609B (en) | Automatic analysis and optimization method and system for impedance big data | |
| Stetco et al. | Simulation model of a GMR based current sensor | |
| KR20050086860A (en) | Laminate for hdd suspension using thin copper foil and its manufacturing method | |
| CN110418495A (en) | A kind of printed wiring board BGA method for preparing solder pad | |
| JP5788225B2 (en) | Rolled copper foil, copper-clad laminate, flexible printed wiring board, and electronic equipment | |
| JP6360760B2 (en) | Copper-clad laminate and circuit board | |
| KR20190131431A (en) | Copper foil for flexible printed substrate, and copper clad laminate using the same, flexible printed substrate and electronic equipment | |
| Froš et al. | Investigation of Impacts on Printed Circuit Board Laminated Composites Caused by Surface Finish Application |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |