CN117175927B - Self-adaptive soft start circuit for relieving discharge overshoot and reference voltage source circuit - Google Patents
Self-adaptive soft start circuit for relieving discharge overshoot and reference voltage source circuit Download PDFInfo
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- CN117175927B CN117175927B CN202311454432.5A CN202311454432A CN117175927B CN 117175927 B CN117175927 B CN 117175927B CN 202311454432 A CN202311454432 A CN 202311454432A CN 117175927 B CN117175927 B CN 117175927B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention provides a self-adaptive soft start circuit for relieving discharge overshoot and a reference voltage source circuit, wherein the self-adaptive soft start circuit comprises a comparison unit and a switch unit; the comparison unit is used for comparing the reference voltage of the reference voltage source with the detection voltage to obtain a comparison result; the comparison result includes a high level and a low level; the reference voltage is a threshold starting voltage of the diode, and the detection voltage is a voltage value capable of controlling whether the reference voltage source works normally or not; the switch unit is connected with the comparison unit; and when the comparison result is high level, the switching unit is started to drive the reference voltage source to output voltage, and when the comparison result is low level after the reference voltage source stably works, the self-adaptive soft start circuit is closed. The invention can ensure that the starting circuit detects that the reference voltage source circuit needs to be started and takes action to control the starting circuit to work under the weak degeneracy state, and simultaneously has the effect of slowing down the discharge overshoot.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a self-adaptive soft start circuit for relieving discharge overshoot and a reference voltage source circuit.
Background
In circuit design, degenerate states often occur, and in fact, when a circuit starts to operate, there may be a concentrated static operating point, and for a bandgap reference circuit, two or more degenerate points (degenerate points are direct current static operating points where a circuit can self-stabilize) often occur, so as to prevent and eliminate the circuit from entering into a degenerate state or degenerate point which is not desired by a designer, and start the circuit.
For circuits with low requirements, the circuit can be brought into a normal operating state by only starting the circuit to provide a corresponding charge or discharge loop for the degenerate state. However, for circuits with relatively high requirements, not only to remove unwanted degeneracy but also to prevent overshoot that may occur during power-up.
It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an objective of the present invention is to provide an adaptive soft start circuit and a reference voltage source circuit for alleviating discharge overshoot, which are used for solving the problem that the discharge overshoot is caused by removing degeneracy in the soft start process of the circuit in the prior art.
To achieve the above and other related objects, the present invention provides an adaptive soft start circuit for alleviating discharge overshoot, comprising a comparing unit and a switching unit;
the comparison unit is used for comparing the reference voltage of the reference voltage source with the detection voltage to obtain a comparison result; the comparison result includes a high level and a low level; the reference voltage is a threshold starting voltage of the diode, and the detection voltage is a voltage value capable of controlling whether the reference voltage source works normally or not;
the switch unit is connected with the comparison unit; and when the comparison result is high level, the switching unit is started to drive the reference voltage source to output voltage, and when the comparison result is low level after the reference voltage source stably works, the self-adaptive soft start circuit is closed.
Optionally, the comparing unit comprises a first auxiliary branch, a second auxiliary branch and a comparing subunit;
the first input end of the comparison subunit is connected with the reference voltage, the second input end of the comparison subunit is connected with the detection voltage, and the comparison subunit compares the reference voltage with the detection voltage to obtain a comparison result;
the first auxiliary branch is connected with the comparison subunit and is used for regulating and controlling the conduction of the comparison subunit;
the second auxiliary branch is connected with the comparison subunit, and the second auxiliary branch is used for providing the reference voltage.
Optionally, the comparing subunit includes a first PMOS transistor, a second PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor;
the grid electrode of the third NMOS tube is used for being connected with the reference voltage of the reference voltage source, and the grid electrode of the fourth NMOS tube is used for being connected with the detection voltage of the reference voltage source; the source electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube and the drain electrode of the fifth NMOS tube; the source electrode of the fifth NMOS tube is grounded;
the source electrodes of the first PMOS tube and the second PMOS tube are connected with a power supply end, the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube, the grid electrode of the second PMOS tube and the drain electrode of the third NMOS tube, and the drain electrode of the second PMOS tube is connected with the drain electrode of the fourth NMOS tube; and the connection point of the drain electrode of the second PMOS tube and the drain electrode of the fourth NMOS tube is an output end of the comparison unit and is used for outputting the comparison result.
Optionally, the first auxiliary branch comprises a first resistor and a sixth NMOS tube; one end of the first resistor is connected with a power supply, and the other end of the first resistor is connected with the drain electrode of the sixth NMOS tube, the grid electrode of the sixth NMOS tube and the grid electrode of the fifth NMOS tube; and the source electrode of the sixth NMOS tube is grounded.
Optionally, the second auxiliary branch comprises a second resistor and a first diode; one end of the second resistor is connected with a power supply, and the other end of the second resistor is connected with the anode of the first diode; the cathode of the first diode is grounded; wherein, the connection point of the second resistor and the anode of the first diode provides a reference voltage.
Optionally, the switching unit includes an inverting module, a first control module, and a second control module;
the input end of the inversion module is connected with the output end of the comparison unit, the output end of the inversion module is connected with the input end of the first control module, and the output end of the first control module is connected with the input end of the second control module;
the first control module and the second control module are connected with a reference voltage source; the first control module is used for controlling the grid voltage of the reference voltage source; the second control module is used for controlling the in-phase voltage source of the reference voltage source.
Optionally, the inverting module includes an inverter, an input end of the inverter is connected to the output end of the comparing unit, and an output end of the inverter is connected to the input end of the first control module.
Optionally, the first control module includes a first NMOS, a gate of the first NMOS is connected to the output end of the inverting module, a source of the first NMOS is grounded, and a drain of the first NMOS is connected to a reference voltage source and is used for controlling a gate voltage of the reference voltage source.
Optionally, the second control module includes a second NMOS, a gate of the second NMOS is connected to the output end of the inverting module, a source of the second NMOS is grounded, and a drain of the second NMOS is connected to a reference voltage source and is used for controlling an in-phase voltage source of the reference voltage source.
To achieve the above and other related objects, the present invention also provides a reference voltage source circuit, including a start-up circuit and a reference voltage source;
the starting circuit is electrically connected with the reference voltage source, and is used for driving the reference voltage source to output voltage and is self-closed after the reference voltage source works stably;
the starting circuit is the self-adaptive soft starting circuit for relieving the discharge overshoot.
As described above, the self-adaptive soft start circuit and the reference voltage source circuit for relieving the discharge overshoot have the following beneficial effects:
the invention compares the reference voltage and the detection voltage in the reference voltage source through the comparison unit to obtain a comparison result of high level and low level, and starts the self-adaptive soft start circuit to drive the output voltage of the reference voltage source when the comparison result is high voltage, and then closes the self-adaptive soft start circuit to reduce the energy consumption of the self-adaptive soft start circuit when the comparison result becomes low level after the reference voltage source stably works.
Drawings
Fig. 1 shows a schematic structure of a power-up circuit.
Fig. 2 is a schematic diagram of an adaptive soft start circuit for alleviating discharge overshoot according to an embodiment of the present invention.
FIG. 3 is a schematic diagram of a reference voltage source circuit according to an embodiment of the invention.
Fig. 4 is a schematic diagram of an operational amplifier according to an embodiment of the invention.
Description of element reference numerals
| 1 1 | Comparison unit |
| 111 | A first auxiliary branch |
| 112 | A second auxiliary branch |
| 113 | Comparison subunit |
| 121 | Reverse phase module |
| 122 | First control module |
| 123 | Second control module |
| 13 | Core unit |
| 131 | Common grid module |
| 132 | A first opening branch |
| 133 | Second opening |
| 14 | Bias unit |
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1-4. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
The invention considers that the reference band gap output voltage which can generate larger fluctuation due to the action of the starting circuit when the band gap reference circuit is just powered on, and gradually tends to be fluctuation-reduced. For example, in the structure schematic diagram of a power-on circuit shown in fig. 1, the degeneracy is removed by directly releasing a charge path from a high potential of a PMOS gate, and because the release of the high potential path is too direct and intense, a discharge overshoot is very likely to occur, and then the output result of the circuit is affected to cause a certain degree of fluctuation, especially the influence on a low-voltage bandgap reference circuit is larger, so the following specific embodiments are provided for removing degeneracy and preventing the discharge overshoot in the power-on process:
example 1
The embodiment of the invention provides an adaptive soft start circuit for relieving discharge overshoot, which comprises a comparison unit and a switch unit;
the comparison unit is used for comparing the reference voltage of the reference voltage source with the detection voltage to obtain a comparison result; the comparison result includes a high level and a low level; the reference voltage is a threshold starting voltage of the diode, and the detection voltage is a voltage value capable of controlling whether the reference voltage source works normally or not;
the switch unit is connected with the comparison unit; and when the comparison result is high level, the switching unit is started to drive the reference voltage source to output voltage, and when the comparison result is low level after the reference voltage source stably works, the self-adaptive soft start circuit is closed.
As shown in fig. 2, the comparing unit 11 compares the reference voltage Vth and the detection voltage Vrt in the reference voltage source to obtain a comparison result of high level and low level (wherein, when the detection voltage is greater than the reference voltage, the comparison result is high level, and when the detection voltage is less than the reference voltage, the comparison result is low level), and when the comparison result is high voltage, the adaptive soft start circuit is turned on to drive the output voltage of the reference voltage source, and then when the comparison result becomes low level after the reference voltage source stably works, the adaptive soft start circuit is turned off to reduce the energy consumption of the adaptive soft start circuit.
Specifically, in an embodiment of the present invention, as shown in fig. 2, the comparing unit 11 includes a first auxiliary branch 111, a second auxiliary branch 112, and a comparing subunit 113;
a first input end of the comparing subunit 113 is connected to the reference voltage Vth, a second input end of the comparing subunit 113 is connected to the detection voltage Vrt, and the comparing subunit compares the reference voltage Vth with the detection voltage Vrt to obtain the comparison result;
the first auxiliary branch 111 is connected to the comparing subunit, and the first auxiliary branch 111 is used for regulating and controlling the conduction of the comparing subunit;
the second auxiliary branch 112 is connected to the comparing subunit, and the second auxiliary branch 112 is configured to provide the reference voltage Vth.
According to the invention, the reference voltage Vth is provided through the second auxiliary branch 112, the comparison subunit 113 is regulated and controlled through the first auxiliary branch 111 to form a normal and stable passage, the comparison subunit 113 compares the reference voltage Vth with the detection voltage Vrt, and a comparison result of high level or low level is output after comparison and judgment.
It should be noted that the specific implementation circuit of the comparing unit is not limited to the specific embodiment of the present invention, and any circuit structure can be used to compare the reference voltage and the detection voltage.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the comparing subunit 113 includes a first PMOS transistor P1, a second PMOS transistor P2, a third NMOS transistor N3, a fourth NMOS transistor N4, and a fifth NMOS transistor N5;
the grid electrode of the third NMOS tube N3 is used for being connected with a reference voltage Vth of a reference voltage source, and the grid electrode of the fourth NMOS tube N4 is used for being connected with a detection voltage Vrt of the reference voltage source; the source electrode of the third NMOS tube N3 is connected with the source electrode of the fourth NMOS tube N4 and the drain electrode of the fifth NMOS tube N5; the source electrode of the fifth NMOS tube N5 is grounded;
the sources of the first PMOS transistor P1 and the second PMOS transistor P2 are connected to the power supply terminal vdd, the gate of the first PMOS transistor P1 is connected to the drain of the first PMOS transistor P1, the gate of the second PMOS transistor P2 and the drain of the third NMOS transistor N3, and the drain of the second PMOS transistor P2 is connected to the drain of the fourth NMOS transistor N4; the connection point of the drain electrode of the second PMOS transistor P2 and the drain electrode of the fourth NMOS transistor N4 is the output end of the comparing unit, and is used for outputting the comparison result.
In a specific embodiment of the present invention, the third NMOS transistor N3 and the fourth NMOS transistor N4 form a differential input pair of the comparing subunit 113, so that the differential pair comparison is conveniently implemented directly by hardware, and the comparison result is output. It should be noted that, the comparing subunit realizes the comparison output through the duplication and the inversion of the differential pair and the potential, and specifically, a circuit structure with a common-source common-gate multi-tube differential equivalent similar function may also be adopted, which is not limited by the specific embodiment of the present invention.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the first auxiliary branch 111 includes a first resistor R1 and a sixth NMOS transistor N6; one end of the first resistor R1 is connected with a power supply vdd, and the other end of the first resistor R1 is connected with the drain electrode of the sixth NMOS transistor N6, the gate electrode of the sixth NMOS transistor N6 and the gate electrode of the fifth NMOS transistor N5; the source electrode of the sixth NMOS tube N6 is grounded.
In a specific embodiment of the present invention, the first auxiliary branch 111 can regulate and control the voltage of the gate of the fifth NMOS transistor N5 in the comparing subunit by controlling the magnitude of the first resistor R1, so as to ensure that the comparing subunit forms a complete and stable loop.
In the embodiment of the invention, the voltage output to the grid electrode of the fifth NMOS tube N5 is regulated and controlled by controlling the size of the first resistor R1, and in other implementation modes, the voltage can also be realized by adopting a resistor-capacitor connection mode or a mode of connecting a plurality of resistors, so long as the comparison subunit has a stable loop, and the voltage regulator is not limited by the specific embodiment of the invention.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the second auxiliary branch 112 includes a second resistor R2 and a first diode D1; one end of the second resistor R2 is connected with a power supply vdd, and the other end of the second resistor R2 is connected with the anode of the first diode D1; the cathode of the first diode D1 is grounded; wherein, the connection point of the second resistor R2 and the anode of the first diode D1 provides a reference voltage Vth.
In a specific embodiment of the present invention, the second auxiliary branch 112 uses the terminal voltage of the anode of the first diode D1 as the reference voltage, so as to meet the requirement that the reference voltage is the threshold turn-on voltage of the diode.
According to the embodiment of the invention, the voltage of the anode of the first diode D1 is larger than the threshold starting voltage by controlling the size of the second resistor R2, and the starting of the first diode D1 is ensured, so that the comparison circuit takes the threshold starting voltage of the first diode D1 as the reference voltage, and as other realization modes, the second resistor R2 can also adopt the connection modes of other components, and the requirement that the comparison circuit can acquire the threshold starting voltage capable of starting the first diode D1 can be met; in addition, the diode may also be in the form of a diode equivalent to a triode, which is not limited by the specific embodiment of the present invention.
Specifically, in an embodiment of the present invention, as shown in fig. 2, the switching unit 12 includes an inverting module 121, a first control module 122, and a second control module 123;
the input end of the inverting module 121 is connected with the output end of the comparing unit, the output end of the inverting module 121 is connected with the input end of the first control module 122, and the output end of the first control module 122 is connected with the input end of the second control module 123;
the first control module 122 and the second control module 123 are connected to a reference voltage source; the first control module 122 is configured to control a gate voltage vamp of the reference voltage source; the second control module 123 is configured to control the in-phase voltage source vpc of the reference voltage source.
In the embodiment of the invention, when the reference voltage Vth is greater than the detection voltage Vrt, the first PMOS transistor P1 and the second PMOS transistor P2 are in a degenerate non-working state, that is, the gate voltage vamp of the reference voltage source and the in-phase voltage vpc of the reference voltage source are in a high potential, and the detection voltage Vrt input by differential is set to have an instantaneous upward trend by adopting the instantaneous polarity method for analysis, vth is set to be unchanged, the input end of the inverting module 121 has an instantaneous downward trend, and the output end of the inverting module 121 has an instantaneous upward trend, so that the first control module 122 and the second control module 123 are turned on instantaneously again, the trend of the high potential of the gate voltage vamp of the reference voltage source and the in-phase voltage vpc of the reference voltage source is reduced, and the reduced trend promotes the instantaneous upward trend of the detection voltage Vrt to slow down by feedback. When the comparison result of the comparison unit is at the high level, the input ends of the first control module 122 and the second control module 123 are at the low level under the action of the inverting module 121, so that the first control module 122 and the second control module 123 are gradually turned off, the gate voltage vamp of the reference voltage source and the in-phase voltage source vpc of the reference voltage source are at the low potential, and the reference voltage source can be in the normal working state.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the inverting module 121 includes an inverter INV1, an input end of the inverter INV1 is connected to the output end of the comparing unit 11, and an output end of the inverter INV1 is connected to the input end of the first control module 122.
The invention is provided with the inverter to slow down overshoot, and can be further adjusted by adjusting the size of the inverter INV1 or adding the number of the inverters; as another embodiment, the number of inverters is required to satisfy an odd number of 3, 5, or 7 inverters.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the first control module 122 includes a first NMOS transistor N1, a gate of the first NMOS transistor N1 is connected to the output end of the inverting module 121, a source of the first NMOS transistor N1 is grounded, and a drain of the first NMOS transistor N1 is connected to a reference voltage source and is used for controlling a gate voltage vamp of the reference voltage source.
More specifically, in the embodiment of the present invention, as shown in fig. 2, the second control module 123 includes a second NMOS transistor N2, a gate of the second NMOS transistor N2 is connected to the output end of the inverting module 121, a source of the second NMOS transistor N2 is grounded, and a drain of the second NMOS transistor N2 is connected to a reference voltage source and is used for controlling an in-phase voltage source vpc of the reference voltage source.
Example two
Still another embodiment of the present invention provides a reference voltage source circuit, including a start-up circuit and a reference voltage source;
the starting circuit is electrically connected with the reference voltage source, and is used for driving the reference voltage source and self-closing after the reference voltage source works stably.
The starting circuit is an adaptive soft starting circuit for relieving discharge overshoot; the adaptive soft start circuit for alleviating the discharge overshoot has been described in detail above, and for avoiding redundancy of description, the present embodiment will not be described in detail.
The self-adaptive soft start circuit of the invention realizes the output voltage Vout of the self-starting drive reference voltage source according to the comparison result of the reference voltage Vth of the reference voltage source and the detection voltage Vrt of the reference voltage source.
As shown in fig. 3, the reference voltage source includes a bias unit 14 and a core unit 13 as shown in fig. 3;
the bias unit 14 is connected with the core unit 13, and the bias unit 14 provides bias current for the core unit 13;
the core unit 13 is electrically connected with the starting circuit; the core unit 13 is based on the bias current and driven by a start-up circuit to realize a reference voltage source output voltage.
Specifically, the core unit 13 includes a common gate module 131, an operational amplifier, a first turn-on branch 132, and a second turn-on branch 133;
the common gate end of the common gate module 131 is the gate voltage vamp of the reference voltage source;
the in-phase input end vin+ of the operational amplifier is connected with the first drain electrode of the common-gate module 131 and the input end of the second opening branch 132, the inverting input end Vin-of the operational amplifier is connected with the second drain electrode of the common-gate module 131 and the input end of the second opening branch 133, and the output end of the operational amplifier is connected with the common-gate end of the common-gate module 131;
the output end of the first opening branch 132 and the output end of the second opening branch 133 are grounded.
As shown in fig. 3, the common gate module 131 includes a third PMOS transistor P3, a fourth PMOS transistor P4, a fifth PMOS transistor P5, and a sixth PMOS transistor P6;
the grid electrode of the third PMOS tube P3 is connected with the grid electrode of the fifth PMOS tube P5 to form a common grid end; the source electrode of the third PMOS tube P3 and the source electrode of the fifth PMOS tube P5 are both connected with a power supply vdd;
the drain electrode of the third PMOS tube P3 is connected with the source electrode of the fourth PMOS tube P4, and the drain electrode of the fourth PMOS tube P4 is the second output end of the common-gate module 131;
the drain electrode of the fifth PMOS tube P5 is connected with the source electrode of the sixth PMOS tube P6, and the drain electrode of the sixth PMOS tube P6 is the first output end of the common-gate module 131;
the grid electrode of the fourth PMOS tube P4 and the grid electrode of the sixth PMOS tube P6 are both connected with the second bias current I2 of the bias unit 14;
the common gate end formed by the connection of the gate of the third PMOS transistor P3 and the gate of the fifth PMOS transistor P5 is connected to the first bias current I1 of the bias unit 14.
As shown in fig. 4, the operational amplifier of the embodiment of the invention includes a differential input pair formed by PMOS transistors, and a plurality of PMOS transistors and NMOS transistors. The present invention is not limited to the specific structure of the operational amplifier.
As shown in fig. 3, the first turn-on branch 132 includes a third resistor R3 and a third diode D3; one end of the third resistor R3 is an input end of the first opening branch, the other end of the third resistor R3 is connected with an anode of the third diode D3, and a cathode of the third diode D3 is grounded.
As shown in fig. 3, the second turn-on branch 133 includes a second diode D2, an anode of the second diode D2 is an input end of the second turn-on branch, and a cathode of the second diode D2 is grounded.
In the embodiment of the present invention, as shown in fig. 3, the core unit 13 further includes a sixth resistor R6 and a seventh resistor R7; a sixth resistor R6 is connected in parallel with the second open branch 133, and a seventh resistor R7 is connected in parallel with the first open branch 132.
In the embodiment of the present invention, as shown in fig. 3, the core unit 13 further includes a seventh PMOS transistor P7, an eighth PMOS transistor P8, an eighth resistor R8, a ninth resistor R9, and a capacitor C;
the grid electrode of the seventh PMOS tube P7 is connected with the common-gate end of the common-gate module, and the grid electrode of the eighth PMOS tube P8 is connected with the grid electrode of the sixth PMOS tube P6;
the drain electrode of the seventh PMOS tube P7 is connected with the source electrode of the eighth PMOS tube P8, and the drain electrode of the eighth PMOS tube P8 is connected with one end of the eighth resistor R8 and one end of the ninth resistor R9; the other end of the eighth resistor R8 is grounded, and the other end of the ninth resistor R9 is grounded through a capacitor C.
It should be noted that the structures and the number of the common gate modules 131 of the core units and other MOS transistors, resistors and capacitors in the reference voltage source of the present invention can be adjusted according to the actual implementation, and the embodiment of the present invention is not limited thereto.
Specifically, as shown in fig. 3, the bias unit 14 of the embodiment of the present invention is connected to the operational amplifier (vpc, vnc, vnb), and outputs the first bias current and the second bias current to the core unit 13. The embodiment of the invention only provides an exemplary implementation manner of the bias unit, and as other implementation manners, the bias unit with other electric connection structures can be adopted, so long as the bias unit can provide bias current with the required current, and the electric connection structure of the bias unit is not limited.
In summary, the present invention can achieve the following advantages:
(1) The invention reduces the overshoot phenomenon by a differential pair self-adaptive feedback regulation mode, and particularly utilizes the threshold starting voltage Vth of the diode and Vrt which is slightly larger than the threshold starting voltage of the diode under normal operation as reference voltage and detection voltage respectively, so that the self-adaptive soft start circuit can be ensured to detect and take action under the weak degeneracy state. The detection voltage Vrt is slightly larger than the reference voltage Vth, so that the detection voltage Vrt can detect and take action.
(2) The invention adopts a negative feedback mechanism to adaptively slow down the discharge overshoot, forms a 'milder' feedback loop to soft start the discharge, and plays a role of gentle discharge.
(3) According to the invention, the negative feedback loop is provided with the odd number of inverters, so that the delay of the feedback loop is increased, the buffering time is regulated, and the overshoot is slowed down.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (9)
1. An adaptive soft start circuit for relieving discharge overshoot is characterized by comprising a comparison unit and a switch unit;
the comparison unit is used for comparing the reference voltage of the reference voltage source with the detection voltage to obtain a comparison result; the comparison result includes a high level and a low level; the reference voltage is a threshold starting voltage of the diode, and the detection voltage is a voltage value capable of controlling whether the reference voltage source works normally or not;
the switch unit is connected with the comparison unit; the self-adaptive soft start circuit can detect and take action in a weak degeneracy state, and when the comparison result is high level, the switch unit is started to drive the reference voltage source to output voltage, and when the comparison result is low level after the reference voltage source stably works, the self-adaptive soft start circuit is closed; the comparison unit comprises a first auxiliary branch, a second auxiliary branch and a comparison subunit;
the first input end of the comparison subunit is connected with the reference voltage, the second input end of the comparison subunit is connected with the detection voltage, and the comparison subunit compares the reference voltage with the detection voltage to obtain a comparison result;
the first auxiliary branch is connected with the comparison subunit and is used for regulating and controlling the conduction of the comparison subunit;
the second auxiliary branch is connected with the comparison subunit, and the second auxiliary branch is used for providing the reference voltage.
2. The adaptive soft start circuit for mitigating discharge overshoot of claim 1, wherein the comparison subunit comprises a first PMOS transistor, a second PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor;
the grid electrode of the third NMOS tube is used for being connected with the reference voltage of the reference voltage source, and the grid electrode of the fourth NMOS tube is used for being connected with the detection voltage of the reference voltage source; the source electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube and the drain electrode of the fifth NMOS tube; the source electrode of the fifth NMOS tube is grounded;
the source electrodes of the first PMOS tube and the second PMOS tube are connected with a power supply end, the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube, the grid electrode of the second PMOS tube and the drain electrode of the third NMOS tube, and the drain electrode of the second PMOS tube is connected with the drain electrode of the fourth NMOS tube; and the connection point of the drain electrode of the second PMOS tube and the drain electrode of the fourth NMOS tube is an output end of the comparison unit and is used for outputting the comparison result.
3. The adaptive soft start circuit for mitigating discharge overshoot of claim 2, wherein said first auxiliary branch includes a first resistor and a sixth NMOS transistor; one end of the first resistor is connected with a power supply, and the other end of the first resistor is connected with the drain electrode of the sixth NMOS tube, the grid electrode of the sixth NMOS tube and the grid electrode of the fifth NMOS tube; and the source electrode of the sixth NMOS tube is grounded.
4. The adaptive soft start circuit for mitigating discharge overshoot of claim 1, wherein said second auxiliary branch includes a second resistor and a first diode; one end of the second resistor is connected with a power supply, and the other end of the second resistor is connected with the anode of the first diode; the cathode of the first diode is grounded; wherein, the connection point of the second resistor and the anode of the first diode provides a reference voltage.
5. The adaptive soft start circuit of claim 1, wherein the switching unit comprises an inverting module, a first control module, and a second control module;
the input end of the inversion module is connected with the output end of the comparison unit, the output end of the inversion module is connected with the input end of the first control module, and the output end of the first control module is connected with the input end of the second control module;
the first control module and the second control module are connected with a reference voltage source; the first control module is used for controlling the grid voltage of the reference voltage source; the second control module is used for controlling the in-phase voltage source of the reference voltage source.
6. The adaptive soft start circuit of claim 5, wherein the inverting module comprises an inverter, an input of the inverter is connected to the output of the comparing unit, and an output of the inverter is connected to the input of the first control module.
7. The adaptive soft start circuit of claim 5, wherein the first control module comprises a first NMOS transistor having a gate connected to the output of the inverting module, a source connected to ground, and a drain connected to a reference voltage source and configured to control a gate voltage of the reference voltage source.
8. The adaptive soft start circuit of claim 5, wherein the second control module comprises a second NMOS transistor having a gate connected to the output of the inverting module, a source connected to ground, and a drain connected to a reference voltage source and used to control an in-phase voltage source of the reference voltage source.
9. A reference voltage source circuit, comprising a start-up circuit and a reference voltage source;
the starting circuit is electrically connected with the reference voltage source, and is used for driving the reference voltage source to output voltage and is self-closed after the reference voltage source works stably;
the starting circuit is an adaptive soft start circuit for alleviating discharge overshoot according to any one of claims 1-8.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311454432.5A CN117175927B (en) | 2023-11-03 | 2023-11-03 | Self-adaptive soft start circuit for relieving discharge overshoot and reference voltage source circuit |
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| CN202311454432.5A CN117175927B (en) | 2023-11-03 | 2023-11-03 | Self-adaptive soft start circuit for relieving discharge overshoot and reference voltage source circuit |
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| CN117175927B true CN117175927B (en) | 2024-02-09 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100815189B1 (en) * | 2006-12-27 | 2008-03-19 | 주식회사 하이닉스반도체 | Reference voltage generator in semiconductor memory device |
| CN101568893A (en) * | 2005-09-19 | 2009-10-28 | 德克萨斯仪器股份有限公司 | Soft-start circuit and method for power-up of an amplifier circuit |
| CN103647440A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Soft-start circuit and DC-DC circuit including soft-start circuit |
| CN113359931A (en) * | 2021-07-23 | 2021-09-07 | 上海艾为电子技术股份有限公司 | Linear voltage regulator and soft start method |
| CN116578150A (en) * | 2023-04-21 | 2023-08-11 | 无锡艾为集成电路技术有限公司 | Linear voltage stabilizer |
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2023
- 2023-11-03 CN CN202311454432.5A patent/CN117175927B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101568893A (en) * | 2005-09-19 | 2009-10-28 | 德克萨斯仪器股份有限公司 | Soft-start circuit and method for power-up of an amplifier circuit |
| KR100815189B1 (en) * | 2006-12-27 | 2008-03-19 | 주식회사 하이닉스반도체 | Reference voltage generator in semiconductor memory device |
| CN103647440A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Soft-start circuit and DC-DC circuit including soft-start circuit |
| CN113359931A (en) * | 2021-07-23 | 2021-09-07 | 上海艾为电子技术股份有限公司 | Linear voltage regulator and soft start method |
| CN116578150A (en) * | 2023-04-21 | 2023-08-11 | 无锡艾为集成电路技术有限公司 | Linear voltage stabilizer |
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| CN117175927A (en) | 2023-12-05 |
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