CN117153971B - High-brightness micro LED and preparation method thereof - Google Patents

High-brightness micro LED and preparation method thereof Download PDF

Info

Publication number
CN117153971B
CN117153971B CN202311416410.XA CN202311416410A CN117153971B CN 117153971 B CN117153971 B CN 117153971B CN 202311416410 A CN202311416410 A CN 202311416410A CN 117153971 B CN117153971 B CN 117153971B
Authority
CN
China
Prior art keywords
layer
light
emitting
bonding
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311416410.XA
Other languages
Chinese (zh)
Other versions
CN117153971A (en
Inventor
蔡溢
南海
高德寅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yancheng Hongshi Intelligent Technology Co ltd
Original Assignee
Yancheng Hongshi Intelligent Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yancheng Hongshi Intelligent Technology Co ltd filed Critical Yancheng Hongshi Intelligent Technology Co ltd
Priority to CN202311416410.XA priority Critical patent/CN117153971B/en
Publication of CN117153971A publication Critical patent/CN117153971A/en
Application granted granted Critical
Publication of CN117153971B publication Critical patent/CN117153971B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/08Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Devices (AREA)

Abstract

The invention relates to the technical field of display chips and discloses a high-brightness micro LED and a preparation method thereof, wherein the high-brightness micro LED comprises a driving substrate, a plurality of light-emitting units arranged in a rectangular array are arranged on the driving substrate, each light-emitting unit comprises a bonding metal layer, the bottom of each bonding metal layer is connected with the driving substrate, a first light-emitting layer is arranged above each bonding metal layer, a first passivation layer is deposited on the outer wall of each first light-emitting layer, a transparent bonding layer is arranged at the top of each first light-emitting layer, a second light-emitting layer is arranged above each transparent bonding layer, a second passivation layer is deposited on the outer wall of each second light-emitting layer, a leveling layer is filled between the light-emitting units, and an N electrode layer is arranged at the top of each leveling layer. According to the invention, by superposing the double-layer or multi-layer light-emitting structures, the same light-emitting unit has two or even more layers of light-emitting structures, so that the superposition of brightness is realized, and the light-emitting brightness is greatly improved.

Description

High-brightness micro LED and preparation method thereof
Technical Field
The invention belongs to the technical field of display chips, and particularly relates to a high-brightness micro LED and a preparation method thereof.
Background
The Micro LED has the full English name of Micro Light Emitting Diode, chinese called Micro LED, and can be written as mu LED, generally refers to a technology of forming a display array by using LED light emitting units with the size of 1-60 um, the size of the Micro LED is 1/10 of that of human hair, and the Micro LED has the characteristics of no need of backlight, high photoelectric conversion efficiency, ns-level response time and the like, and is a technology of thinning, microminiaturizing and arraying the LEDs to ensure that the volume of the LEDs reaches 1% of that of main stream LEDs, and the pixel point distance reaches micrometers from millimeter.
The Micro LED substrate is manufactured into an LED display driving circuit by using a normal CMOS integrated circuit manufacturing process, and then an LED array is manufactured on the integrated circuit by using an MOCVD machine, so that a Micro display screen, namely a reduced version of the LED display screen, is realized, and the Micro display screen is the next generation display technology after OLED.
The Micro LED display panel generally includes a plurality of LED pixels (i.e., light emitting units), and at present, all the Micro LEDs obtain a plurality of completely isolated functional pixels by etching away continuous functional epitaxial layers, but the side surface of the pixels emits light, which has structural problems, such as size effects, side wall defects, light crosstalk and the like, so that the light emitting brightness is far less than the theoretical effect.
Disclosure of Invention
In order to solve the defects in the background art, the invention aims to provide a high-brightness micro LED and a preparation method thereof, wherein two epitaxial layers are bonded together through a transparent bonding layer by superposing a double-layer or multi-layer light-emitting structure, and a P electrode and an N electrode are respectively and electrically connected to realize a common cathode structure, so that the same light-emitting unit has two or more layers of light-emitting structures, thereby realizing superposition of brightness and greatly improving the light-emitting brightness.
The aim of the invention can be achieved by the following technical scheme:
the high-brightness micro LED comprises a driving substrate, wherein a plurality of light emitting units arranged in a rectangular array are arranged on the driving substrate, the light emitting units comprise bonding metal layers, the bottoms of the bonding metal layers are connected with the driving substrate, a first light emitting layer is arranged above the bonding metal layers, a first passivation layer is deposited on the outer wall of the first light emitting layer, a transparent bonding layer is arranged at the top of the first light emitting layer, a second light emitting layer is arranged above the transparent bonding layer, a second passivation layer is deposited on the outer wall of the second light emitting layer, a leveling layer is filled between the light emitting units, and an N electrode layer is arranged at the top of the leveling layer;
the area of the bottom of the first luminescent layer is smaller than that of the top of the bonding metal layer, one side of the first passivation layer covers the bonding metal layer, the other side of the first passivation layer is exposed, the lower end of the P electrode connecting layer is connected with the exposed part of the bonding metal layer, the upper end of the P electrode connecting layer is connected with the bottom of the second luminescent layer, one side of the second luminescent layer is provided with an N electrode connecting layer, the top end of the N electrode connecting layer is connected with the N electrode layer, the area of the bottom of the transparent bonding layer is smaller than that of the top of the first luminescent layer, one side of the top of the first luminescent layer is exposed, and the lower end of the N electrode connecting layer is connected with the exposed part of the top of the first luminescent layer.
Preferably, the drive substrate is a silicon-based CMOS backplate or TFT field effect transistor display substrate, the drive substrate having metal contacts for connection to internal circuitry.
Preferably, the bonding metal layer is a multilayer structure formed by compounding metal films or nonmetal films, the metal films and the nonmetal films are conductors, the metal films comprise Cr, ni, au, ag, sn, ti, pt and Pb, and the nonmetal films comprise ITO films.
Preferably, the first light-emitting layer and the second light-emitting layer are formed by etching an epitaxial layer of an epitaxial wafer, and the cross sections of the first light-emitting layer and the second light-emitting layer are trapezoidal.
Preferably, the first passivation layer and the first light-emitting layer have different refractive indexes, and the light formed by the first light-emitting layer is partially totally reflected into the first light-emitting layer by adjusting the inclination angle, and the first passivation layer material comprises SiO 2 、Al 2 O 3 SiN or polyimide, SU-8 photoresist, and other photopatternable polymers, the second passivation layer is the same structure and material as the first passivation layer.
Preferably, the leveling layer is an organic black matrix photoresist, a color filter photoresist, polyimide, a retaining wall photoresist, an OC photoresist, a SU8 photoresist, benzocyclobutene, al, cu, ag, siO 2 、Al 2 O 3 、ZrO 2 、TiO 2 、Si 3 N 4 Or HfO 2 One of the following;
preferably, the transparent bonding layer is transparent resin, siO 2 SOG spin-on glass.
The invention also discloses a preparation method of the high-brightness micro LED, which comprises the following steps:
s1, plating a first metal layer with a multilayer structure on the surface of an epitaxial layer of an epitaxial wafer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s2, plating a second metal layer on the surface of the driving substrate through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s3, bonding the coated epitaxial wafer and the driving substrate in a flip-chip bonding mode, bonding the first metal layer and the second metal layer to obtain a bonding metal layer, forming good ohmic contact, and removing the epitaxial wafer substrate and the buffer layer;
s4, etching the epitaxial layer through dry etching or wet etching to form a step structure to form a first light-emitting layer, and etching the bonding metal layer through IBE to make the bonding metal layer patterned;
s5, PECVD depositing a first passivation layer on the surface of the first light-emitting layer, and patterning through IBE to expose one side of the bonding metal layer and the top of the first light-emitting layer;
s6, coating a transparent bonding layer material on the top of the first light-emitting layer, and bonding the epitaxial layer of the other epitaxial wafer with the transparent bonding layer;
s7, removing the epitaxial wafer substrate and the buffer layer bonded in the step S6, and etching the epitaxial layer by dry etching or wet etching to form a step structure to form a second light-emitting layer;
s8, depositing a conductive material on one side of the first passivation layer, preparing a P electrode connecting layer, and connecting the second light-emitting layer and the bonding metal layer;
s9, PECVD depositing a second passivation layer on the surface of the second luminescent layer, and patterning by IBE
S10, filling flattening materials between the light emitting units, and processing the flattening layer through a photoetching process to expose the top surface of the second light emitting layer to obtain a flattening layer;
s11, etching the leveling layer to form an N electrode hole, connecting the bottom of the N electrode hole with the top of the first luminescent layer, filling a conductive material in the N electrode hole to prepare an N electrode connecting layer,
and S12, depositing and manufacturing an N electrode layer on the leveling layer in a photoetching, vapor plating or lift-off mode, and completing the patterning preparation of the N electrode.
Preferably, the epitaxial wafer comprises a substrate, a buffer layer and an epitaxial layer, wherein the epitaxial layer comprises a P-type semiconductor layer, a multiple quantum well layer and an N-type semiconductor layer, the substrate is a silicon-based substrate or a sapphire substrate, the substrate is removed through a laser stripping method when the substrate is a sapphire substrate, and the substrate removal is realized through physical polishing thinning, deep silicon etching and wet chemical etching when the substrate is a silicon-based substrate.
Preferably, the conductive material of the P electrode connection layer and the N electrode connection layer includes ITO, cr, ti, pt, au, al, cu, ge or Ni.
The invention has the beneficial effects that:
according to the invention, through overlapping the double-layer or multi-layer light-emitting structure, the two epitaxial layers are bonded together through the transparent bonding layer, and the P electrode and the N electrode are respectively and electrically connected, so that a common cathode structure is realized, the same light-emitting unit has two or even more layers of light-emitting structures, and therefore, the overlapping of brightness is realized, and the light-emitting brightness is greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to those skilled in the art that other drawings can be obtained according to these drawings without inventive effort.
FIG. 1 is a schematic diagram of the structure of a high brightness micro LED of the present invention;
FIG. 2 is a schematic process flow diagram of step S1 of the present invention;
FIG. 3 is a schematic process flow diagram of step S2 of the present invention;
FIG. 4 is a schematic process flow diagram of step S3 of the present invention;
FIG. 5 is a schematic illustration of the process flow of step S4 of the present invention;
FIG. 6 is a schematic illustration of the process flow of step S5 of the present invention;
FIG. 7 is a schematic illustration of the process flow of step S6 of the present invention;
FIG. 8 is a schematic process flow diagram of step S7 of the present invention;
FIG. 9 is a schematic process flow diagram of step S8 of the present invention;
FIG. 10 is a schematic illustration of the process flow of step S9 of the present invention;
FIG. 11 is a schematic process flow diagram of step S10 of the present invention;
FIG. 12 is a schematic process flow diagram of step S11 of the present invention;
fig. 13 is a schematic process flow diagram of step S12 of the present invention.
In the figure: the semiconductor device comprises a 1-epitaxial wafer, a 2-substrate, a 3-buffer layer, a 4-epitaxial layer, a 5-N type semiconductor layer, a 6-multiple quantum well layer, a 7-P type semiconductor layer, a 9-first metal layer, a 10-driving substrate, a 11-second metal layer, a 12-bond metal layer, a 13-first passivation layer, a 14-transparent bonding layer, a 15-P electrode connecting layer, a 16-second passivation layer, a 17-leveling layer, a 18-N electrode connecting layer and a 19-N electrode layer.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, a high-brightness micro led comprises a driving substrate 10, wherein a plurality of light emitting units arranged in a rectangular array are arranged on the driving substrate 10, each light emitting unit comprises a bonding metal layer 12, the bottom of each bonding metal layer 12 is connected with the driving substrate 10, a first light emitting layer 4a is arranged above each bonding metal layer 12, a first passivation layer 13 is deposited on the outer wall of each first light emitting layer 4a, a transparent bonding layer 14 is arranged on the top of each first light emitting layer 4a, a second light emitting layer 4b is arranged above each transparent bonding layer 14, a second passivation layer 16 is deposited on the outer wall of each second light emitting layer 4b, a leveling layer 17 is filled between the light emitting units, and an N electrode layer 19 is arranged on the top of each leveling layer 17;
the area of the bottom of the first luminescent layer 4a is smaller than the top of the bonding metal layer 12, one side of the first passivation layer 13 covers the bonding metal layer 12, the other side of the bonding metal layer 12 is partially exposed, the lower end of the P electrode connecting layer 15 is connected with the exposed part of the bonding metal layer 12, the upper end of the P electrode connecting layer 12 is connected with the bottom of the second luminescent layer 4b, an N electrode connecting layer 18 is arranged on one side of the second luminescent layer 4b, the top end of the N electrode connecting layer 18 is connected with an N electrode layer 19, the area of the bottom of the transparent bonding layer 14 is smaller than the top of the first luminescent layer 4a, one side of the top of the first luminescent layer 4a is exposed, and the lower end of the N electrode connecting layer 18 is connected with the exposed part of the top of the first luminescent layer 4 a.
The drive substrate 10 is a silicon-based CMOS backplate or TFT field effect transistor display substrate, and the drive substrate 10 has metal contacts for connecting internal circuits. The bonding metal layer 12 is a multilayer structure formed by compounding metal films or nonmetal films, both of which are conductors, the metal films include Cr, ni, au, ag, sn, ti, pt and Pb, and the nonmetal films include ITO films. The first light-emitting layer 4a and the second light-emitting layer 4b are formed by etching the epitaxial layer 4 of the epitaxial wafer 1, and the cross section of the first light-emitting layer 4a and the second light-emitting layer 4b is trapezoidal. The first passivation layer 13 and the first light emitting layer 4a have different refractive indexes, and the light formed by the first light emitting layer 4a is partially totally reflected into the first light emitting layer 4a by adjusting the inclination angle, and the first passivation layer 13 material comprises SiO 2 、Al 2 O 3 SiN or polyimide, SU-8 photoresist, and other photopatternable polymers, the second passivation layer 16 is the same structure and material as the first passivation layer 13. The leveling layer 17 is organic black matrix photoresist, color filter photoresist, polyimide, retaining wall photoresist, OC photoresist, SU8 photoresist, benzocyclobutene, al, cu, ag, siO 2 、Al 2 O 3 、ZrO 2 、TiO 2 、Si 3 N 4 Or HfO 2 One of the following; the transparent bonding layer 14 is transparent resin and SiO 2 SOG spin-on glass.
The preparation method of the high-brightness micro LED comprises the following steps:
s1, plating a first metal layer 9 with a multilayer structure on the surface of an epitaxial layer 4 of an epitaxial wafer 1 through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s2, plating a second metal layer 11 on the surface of the driving substrate 10 through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s3, bonding the coated epitaxial wafer 1 and the driving substrate 10 in a flip-chip bonding mode, and bonding the first metal layer 9 and the second metal layer 11 to obtain a bonding metal layer 12, so that good ohmic contact is formed, and the substrate 2 and the buffer layer 3 of the epitaxial wafer 1 are removed;
s4, etching the epitaxial layer 4 through dry etching or wet etching to form a step structure to form a first light-emitting layer 4a, and patterning the bonding metal layer 12 through IBE etching;
s5, PECVD depositing a first passivation layer 13 on the surface of the first light-emitting layer 4a, and patterning through IBE to expose one side of the bonding metal layer 12 and the top of the first light-emitting layer 4 a;
s6, coating a transparent bonding layer 14 material on the top of the first light-emitting layer 4a, and bonding the epitaxial layer 4 of the other epitaxial wafer 1 with the transparent bonding layer 14;
s7, removing the substrate 2 and the buffer layer 3 of the epitaxial wafer 1 bonded in the step S6, and etching the epitaxial layer 4 thereof by dry etching or wet etching to form a step structure to form a second light-emitting layer 4b;
s8, depositing a conductive material on one side of the first passivation layer 4a to prepare a P electrode connecting layer 15 for connecting the second light-emitting layer 4b and the bonding metal layer 12;
s9, PECVD depositing a second passivation layer 16 on the surface of the second light-emitting layer 4b, and patterning by IBE
S10, filling flattening materials between the light emitting units, and processing the flattening layer through a photolithography process to expose the top surface of the second light emitting layer to obtain a flattening layer 17;
s11, etching the leveling layer 17 to form an N electrode hole, connecting the bottom of the N electrode hole with the top of the first luminescent layer, filling conductive material in the N electrode hole to prepare an N electrode connecting layer 18,
and S12, depositing and manufacturing an N electrode layer 19 on the leveling layer 17 by means of photoetching, evaporation or lift-off, and completing the patterning preparation of the N electrode.
The epitaxial wafer 1 comprises a substrate 2, a buffer layer 3 and an epitaxial layer 4, wherein the epitaxial layer 4 comprises a P-type semiconductor layer 7, a multiple quantum well layer 6 and an N-type semiconductor layer 5, the substrate 2 is a silicon-based substrate or a sapphire substrate, the substrate 2 is removed through a laser stripping method when the substrate is a sapphire substrate, and the substrate 2 is removed through physical polishing thinning, deep silicon etching and wet chemical etching when the substrate is a silicon-based substrate. The conductive material of the P electrode connection layer 15 and the N electrode connection layer 18 includes ITO, cr, ti, pt, au, al, cu, ge or Ni.
It should be noted that, in the embodiment of the present invention, only an embodiment in which one light emitting unit includes the first light emitting layer and the second light emitting layer is provided, but in a practical application process, one light emitting unit may be further overlapped by two or more epitaxial layers, so as to further improve the brightness of the micro led.
In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims.

Claims (9)

1. The high-brightness micro LED is characterized by comprising a driving substrate, wherein a plurality of light-emitting units which are arranged in a rectangular array are arranged on the driving substrate, each light-emitting unit comprises a bonding metal layer, the bottom of each bonding metal layer is connected with the driving substrate, a first light-emitting layer is arranged above each bonding metal layer, a first passivation layer is deposited on the outer wall of each first light-emitting layer, a transparent bonding layer is arranged at the top of each first light-emitting layer, a second light-emitting layer is arranged above each transparent bonding layer, a second passivation layer is deposited on the outer wall of each second light-emitting layer, a leveling layer is filled between the light-emitting units, and an N electrode layer is arranged on the top of each leveling layer;
the light-emitting diode comprises a first light-emitting layer, a second light-emitting layer, a first passivation layer, a second passivation layer, a P electrode connecting layer, an N electrode connecting layer, a transparent bonding layer, a first light-emitting layer and a second light-emitting layer, wherein the area of the bottom of the first light-emitting layer is smaller than that of the top of the bonding metal layer;
the preparation method of the high-brightness micro LED comprises the following steps:
s1, plating a first metal layer with a multilayer structure on the surface of an epitaxial layer of an epitaxial wafer through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s2, plating a second metal layer on the surface of the driving substrate through vacuum evaporation coating, vacuum sputtering coating or vacuum ion coating;
s3, bonding the coated epitaxial wafer and the driving substrate in a flip-chip bonding mode, bonding the first metal layer and the second metal layer to obtain a bonding metal layer, forming good ohmic contact, and removing the epitaxial wafer substrate and the buffer layer;
s4, etching the epitaxial layer through dry etching or wet etching to form a step structure to form a first light-emitting layer, and etching the bonding metal layer through IBE to make the bonding metal layer patterned;
s5, PECVD depositing a first passivation layer on the surface of the first light-emitting layer, and patterning through IBE to expose one side of the bonding metal layer and the top of the first light-emitting layer;
s6, coating a transparent bonding layer material on the top of the first light-emitting layer, and bonding the epitaxial layer of the other epitaxial wafer with the transparent bonding layer;
s7, removing the epitaxial wafer substrate and the buffer layer bonded in the step S6, and etching the epitaxial layer by dry etching or wet etching to form a step structure to form a second light-emitting layer;
s8, depositing a conductive material on one side of the first passivation layer, preparing a P electrode connecting layer, and connecting the second light-emitting layer and the bonding metal layer;
s9, PECVD depositing a second passivation layer on the surface of the second luminescent layer, and patterning by IBE
S10, filling flattening materials between the light emitting units, and processing the flattening layer through a photoetching process to expose the top surface of the second light emitting layer to obtain a flattening layer;
s11, etching the leveling layer to form an N electrode hole, connecting the bottom of the N electrode hole with the top of the first luminescent layer, filling a conductive material in the N electrode hole to prepare an N electrode connecting layer,
and S12, depositing and manufacturing an N electrode layer on the leveling layer in a photoetching, vapor plating or lift-off mode, and completing the patterning preparation of the N electrode.
2. The high brightness micro led of claim 1, wherein the driving substrate is a silicon-based CMOS back plate or a TFT field effect transistor display substrate, the driving substrate having metal contacts connected to internal circuitry.
3. The high-luminance micro led according to claim 1, wherein the bonding metal layer is a multi-layered structure formed by compounding metal films and nonmetal films, both of which are conductors, the metal films include Cr, ni, au, ag, sn, ti, pt and Pb, and the nonmetal films include ITO films.
4. The high-brightness micro led according to claim 1, wherein the first light emitting layer and the second light emitting layer are formed by etching an epitaxial layer of an epitaxial wafer, and the cross section of the first light emitting layer and the second light emitting layer is trapezoidal.
5. The high-brightness micro led according to claim 1, wherein the first passivation layer and the first light emitting layer have different refractive indexes, and the light formed by the first light emitting layer is partially totally reflected into the first light emitting layer by adjusting the inclination angle, and the first passivation layer material comprises SiO 2 、Al 2 O 3 SiN or polyimide, SU-8 photoresist and other photopatternable polymers, prepared fromThe second passivation layer is the same structure and material as the first passivation layer.
6. The high brightness micro led according to claim 1, wherein the leveling layer is an organic black matrix photoresist, a color filter photoresist, polyimide, a barrier photoresist, an OC photoresist, SU8 photoresist, benzocyclobutene, al, cu, ag, siO 2 、Al 2 O 3 、ZrO 2 、TiO 2 、Si 3 N 4 Or HfO 2 One of them.
7. The high-brightness micro led according to claim 1, wherein the transparent bonding layer is transparent resin, siO 2 SOG spin-on glass.
8. The high-brightness micro led according to claim 1, wherein the epitaxial wafer comprises a substrate, a buffer layer and an epitaxial layer, the epitaxial layer comprises a P-type semiconductor layer, a multiple quantum well layer and an N-type semiconductor layer, the substrate is a silicon-based substrate or a sapphire substrate, the substrate is removed by a laser lift-off method in the case of the sapphire substrate, and the substrate removal is realized by physical polishing thinning, deep silicon etching and wet chemical etching in the case of the silicon-based substrate.
9. The high brightness micro led of claim 1, wherein the conductive material of the P electrode connection layer and the N electrode connection layer comprises ITO, cr, ti, pt, au, al, cu, ge or Ni.
CN202311416410.XA 2023-10-30 2023-10-30 High-brightness micro LED and preparation method thereof Active CN117153971B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311416410.XA CN117153971B (en) 2023-10-30 2023-10-30 High-brightness micro LED and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311416410.XA CN117153971B (en) 2023-10-30 2023-10-30 High-brightness micro LED and preparation method thereof

Publications (2)

Publication Number Publication Date
CN117153971A CN117153971A (en) 2023-12-01
CN117153971B true CN117153971B (en) 2024-01-23

Family

ID=88910445

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311416410.XA Active CN117153971B (en) 2023-10-30 2023-10-30 High-brightness micro LED and preparation method thereof

Country Status (1)

Country Link
CN (1) CN117153971B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112585768A (en) * 2018-08-17 2021-03-30 首尔伟傲世有限公司 Light emitting element
CN115810622A (en) * 2022-11-02 2023-03-17 上海芯元基半导体科技有限公司 LED chip and manufacturing method thereof, electronic device and manufacturing method thereof
CN115843393A (en) * 2020-06-03 2023-03-24 上海显耀显示科技有限公司 System and method for multi-color LED pixel cell with horizontal lighting
CN116314241A (en) * 2023-04-10 2023-06-23 厦门士兰明镓化合物半导体有限公司 Micro light emitting diode and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112585768A (en) * 2018-08-17 2021-03-30 首尔伟傲世有限公司 Light emitting element
CN115843393A (en) * 2020-06-03 2023-03-24 上海显耀显示科技有限公司 System and method for multi-color LED pixel cell with horizontal lighting
CN115810622A (en) * 2022-11-02 2023-03-17 上海芯元基半导体科技有限公司 LED chip and manufacturing method thereof, electronic device and manufacturing method thereof
CN116314241A (en) * 2023-04-10 2023-06-23 厦门士兰明镓化合物半导体有限公司 Micro light emitting diode and manufacturing method thereof

Also Published As

Publication number Publication date
CN117153971A (en) 2023-12-01

Similar Documents

Publication Publication Date Title
EP3410479B1 (en) Display device
TWI664711B (en) Display with surface mount emissive elements
JP2021529997A (en) Display device and its manufacturing method
CN112117356B (en) Full-color active addressing Micro-LED chip structure and manufacturing method thereof
CN113424314B (en) Light emitting element for display and display device having the same
US20220367771A1 (en) Display device using micro led, and manufacturing method therefor
CN213845268U (en) Light emitting element for display
US11581462B2 (en) Display device with metal layer with uneven surface
CN112689905B (en) Light-emitting element
CN113921556A (en) Micro LED device and manufacturing method thereof
JP7460650B2 (en) Light-emitting element for display and display device having same
CN117012770B (en) Micro LED capable of monitoring brightness and preparation method thereof
CN114899298A (en) Pixel unit and manufacturing method thereof, micro display screen and discrete device
CN114843317A (en) Inorganic-organic LED mixed color display device and preparation method thereof
CN116646441B (en) Micro display chip and preparation method thereof
CN116979012A (en) Micro display chip and preparation method thereof
CN117153971B (en) High-brightness micro LED and preparation method thereof
CN116960244A (en) Integrated LED chip structure and manufacturing method
US20230155062A1 (en) Package structure and forming method thereof
CN107689383A (en) Display device and its manufacture method
US20220131055A1 (en) Light source device, display device and manufacturing method of light source device
KR20200026666A (en) Display device using semiconductor light emitting diode
CN117253902B (en) Micro LED with adjustable brightness and preparation method thereof
WO2020220595A1 (en) Display panel and display device
CN211088273U (en) Light emitting element for display and display device having the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant