CN107689383A - Display device and its manufacture method - Google Patents

Display device and its manufacture method Download PDF

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Publication number
CN107689383A
CN107689383A CN201710159698.5A CN201710159698A CN107689383A CN 107689383 A CN107689383 A CN 107689383A CN 201710159698 A CN201710159698 A CN 201710159698A CN 107689383 A CN107689383 A CN 107689383A
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CN
China
Prior art keywords
layer
electrode
light emitting
emitting diode
type semiconductor
Prior art date
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Granted
Application number
CN201710159698.5A
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Chinese (zh)
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CN107689383B (en
Inventor
李冠锋
洪挺凯
吴昱娴
张嘉雄
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Innolux Corp
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Innolux Display Corp
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Application filed by Innolux Display Corp filed Critical Innolux Display Corp
Priority to US15/635,220 priority Critical patent/US10069041B2/en
Publication of CN107689383A publication Critical patent/CN107689383A/en
Priority to US16/053,786 priority patent/US10483436B2/en
Priority to US16/595,500 priority patent/US11031528B2/en
Priority to US17/246,722 priority patent/US11715816B2/en
Application granted granted Critical
Publication of CN107689383B publication Critical patent/CN107689383B/en
Priority to US18/332,769 priority patent/US20230327053A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Abstract

The present invention provides a kind of display device and its manufacture method, including substrate, transistor, metal level and light emitting diode.Transistor is configured on substrate.Metal level is configured on transistor and is electrically connected at transistor, wherein in a direction perpendicular to a substrate, having the first distance between the upper surface of metal level and substrate.Light emitting diode is configured on metal level, wherein light emitting diode includes light emitting diode main body and electrode, light emitting diode main body is electrically connected at metal level by electrode, light emitting diode main body has first surface and the second surface relative with first surface, first surface and second surface are parallel to substrate, and in said direction, there is second distance, wherein second distance and the ratio of the first distance is more than or equal to 0.25 and less than or equal to 6 between first surface and second surface.

Description

Display device and its manufacture method
Technical field
The present invention relates to a kind of device and its manufacture method, more particularly to a kind of display device and its manufacture method.
Background technology
Due to light emitting diode (light emitting diode, LED) display device have it is active luminous, highlighted The advantages such as degree, high contrast, low-power consumption, therefore turn into one of technology that new display is greatly developed in recent years.In order to meet height The demand of resolution, light emitting display device is just towards the micron-scale arranged by active component array base board and array The direction of light emitting diode composition is developed.
The content of the invention
The present invention provides a kind of display device, and it can have good luminous efficiency or satisfactory texture intensity.
The present invention provides a kind of manufacture method of display device, and the display device with good luminous efficiency can be made in it.
The display device of the present invention includes substrate, transistor, metal level and light emitting diode.Transistor is configured at substrate On.Metal level is configured on transistor and is electrically connected at transistor, wherein in a direction perpendicular to a substrate, metal level it is upper There is the first distance between surface and substrate.Light emitting diode is configured on metal level, and wherein light emitting diode includes luminous two Pole pipe main body and electrode, light emitting diode main body are electrically connected at metal level by electrode, and light emitting diode main body has the One surface and the second surface relative with first surface, first surface and second surface are parallel to substrate, and in said direction, There is second distance, wherein second distance and the ratio of the first distance is more than or equal to 0.25 between first surface and second surface And less than or equal to 6.
The manufacture method of the display device of the present invention comprises the following steps.Light emitting diode main body is formed on substrate. Catoptric arrangement is formed in the side wall of light emitting diode main body.
For features described above of the invention and advantage can be become apparent, embodiment cited below particularly, and coordinate accompanying drawing to make Describe in detail as follows.
Brief description of the drawings
Fig. 1 is the diagrammatic cross-section of the display device of one embodiment of the present invention.
Fig. 2 is the diagrammatic cross-section of the display device of another embodiment of the present invention.
Fig. 3 is the diagrammatic cross-section of the light emitting diode of another embodiment of the present invention.
Fig. 4 is the diagrammatic cross-section of the light emitting diode of another embodiment of the present invention.
Fig. 5 A to Fig. 5 M are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Fig. 6 A to Fig. 6 B are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Fig. 7 A to Fig. 7 C are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Fig. 8 A to Fig. 8 J are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Fig. 9 A to Fig. 9 E are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Figure 10 A to Figure 10 E are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Figure 11 A to Figure 11 G are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
Description of reference numerals
10、20、70：Display device
100、142、500、800：Substrate
110：Metal level
110a：The first metal layer
110b：Second metal layer
120、220、320、420、529、730、827、928、1027、1127：Light emitting diode
122a、222a、515、816、1116：First conductive-type semiconductor layer
122b、222b、517、818、1118：Second conductive-type semiconductor layer
124、224、516、817、1117：Active layers
126a、126b、226a、226b、525、528、728、813、820、927、1023、1120：Electrode
130：Conductive adhesive layer
140、729：Opposite substrate
144：Adhesion coating
250：Electrode pattern
360、460：Cushion
510、810：First conductive-type semiconductor material layer
511、811：Material of main part layer
512、812：Second conductive-type semiconductor material layer
513、520、620、814、1021、1122：Pattern photoresist layer
514、815：Patterning photoresist layer through hot-fluid
519a、519b、619a、619b：Material layer
521：Reflective metal layer
523、623、824、924、1025、1125：Catoptric arrangement
524、1024、1124：Conductor layer
526、826、926、1026、1126：Bearing substrate
527、727、825、925：Bonding layer
530：Grabbing device
726：Array base palte
821a、821b、1020、1121：Insulation material layer
822、922：Pattern organic layer
A1、A2、2A2、La、Lb：Distance
BK：Shielding pattern layer
CF：Chromatic filter layer
CH：Channel region
D：Direction
G：Grid
GI：Gate insulation layer
IL1、IL2、IL3、IL4、522、621、622、823a、823b、923a、923b、1022、1123：Insulating barrier
LB、2LB、518、819、1119：Light emitting diode main body
M、3M：Groove
O、P、Q、R、U：Opening
PL：Flatness layer
S1、S2、2S1、2S2：Surface
S3、S4：Top surface
S/D：Source/drain regions
SC：Semiconductor layer
T：Transistor
TS：Upper surface
Va、Vb：Contact window
WT：Wavelength conversion layer
θ：Angle
Embodiment
Herein, whenever possible, similar elements symbol is used for representing same or similar part in the accompanying drawings and the description.
Herein, description that is square in a structurally or forming another structure in a structurally may include the structure and institute The embodiment that another structure is formed as directly contacting is stated, and may also comprise between the structure and another structure can be formed with Supernumerary structure causes the embodiment that the structure and another structure can be not directly contacted with.
Hereinafter, the display device of the present invention is described in detail especially exemplified by various embodiments, using can be real according to this as the present invention The example applied, not limiting the present invention.
Fig. 1 is the diagrammatic cross-section of the display device of one embodiment of the present invention.For the sake of for convenience of explanation, in Fig. 1 One pixel cell is only shown, but technical staff is, it is to be appreciated that display device generally comprises array row in any art Multiple pixel cells of row.
Refer to Fig. 1, in the present embodiment, display device 10 include substrate 100, transistor T, metal level 110 and Light emitting diode 120.In addition, in the present embodiment, display device 10 may also include insulating barrier IL1, gate insulation layer GI, insulation Layer IL2, insulating barrier IL3, flatness layer PL, conductive adhesive layer 130, insulating barrier IL4 and opposite substrate 140.
The material of substrate 100 can be glass, quartz, organic polymer or metal material etc., wherein organic polymer E.g. (but being not restricted to)：Polyimides (polyimide, PI), PET (polyethylene Terephthalate, PET), makrolon (polycarbonate, PC) etc..
Transistor T is configured on substrate 100.In the present embodiment, transistor T includes semiconductor layer SC and positioned at partly leading Grid G above body layer SC.Specifically, semiconductor layer SC includes channel region CH and source/drain regions S/D, wherein grid G position Above channel region CH, and source/drain regions S/D is located at channel region CH both sides.In the present embodiment, semiconductor layer SC Material is low temperature polycrystalline silicon, namely transistor T is low-temperature polysilicon film transistor.In addition, considering based on electric conductivity, grid G material is usually metal material, such as aluminium, molybdenum, titanium, gold, indium, tin or its combination.However, the present invention is not limited thereto, In other embodiment, the material of grid G can also use such as (but not limited to)：Alloy, the nitride of metal material, metal Other conductive materials of the oxide of material, the nitrogen oxides of metal material etc., or metal material and foregoing other conduction materials The stack layer of material.
In addition, being provided with gate insulation layer GI between grid G and semiconductor layer SC, wherein gate insulation layer GI is conformally (conformally) formed on the substrate 100 and cover semiconductor layer SC.Gate insulation layer GI material for example can be (but unlimited In)：Inorganic material, organic material or its combination, wherein inorganic material is, for example, (but not limited to)：Silica, silicon nitride, nitrogen oxygen The stack layer of SiClx or above-mentioned at least two kinds materials；Organic material is, for example, (but not limited to)：Polyimides system resins, epoxy It is resin or acryl system resin Polymer material.
In addition, being provided with insulating barrier IL1 between substrate 100 and semiconductor layer SC, wherein insulating barrier IL1 is conformally formed On substrate 100.Insulating barrier IL1 material for example can be (but not limited to)：Silica, silicon nitride, silicon oxynitride or it is above-mentioned at least The stack layer of two kinds of materials.
In addition, insulating barrier IL2, IL3 are also covered with above grid G, to protect grid G.Insulating barrier IL3 is positioned at exhausted On edge layer IL2, and insulating barrier IL2, IL3 are conformally formed on the substrate 100 respectively.In addition, insulating barrier IL2, IL3 material can For (but not limited to)：Inorganic material, organic material or its combination, wherein inorganic material is, for example, (but not limited to)：Silica, nitrogen The stack layer of SiClx, silicon oxynitride or above-mentioned at least two kinds materials；Organic material is, for example, (but not limited to)：Polyimides system Resin, epoxy system resin or acryl system resin Polymer material.
Metal level 110 is configured on transistor T and is electrically connected at transistor T.Specifically, in the present embodiment, Metal level 110 includes the first metal layer 110a and second metal layer 110b above the first metal layer 110a.Namely Say, in the present embodiment, metal level 110 includes two film layers mutually stacked.However, the present invention is not limited thereto.At other In embodiment, metal level 110 can also only include single film layer.For example, metal level 110 can only include as source electrode/ The first metal layer 110a of drain electrode, without including second metal layer 110b.
In addition, in the present embodiment, on the direction D perpendicular to substrate 100, the upper surface TS and base of metal level 110 There is distance A1 between plate 100.In one embodiment, distance A1 can be more than or equal to 2um and be less than or equal to 8um.In another reality Apply in mode, distance A1 can be more than or equal to 2um and be less than or equal to 5um.In another embodiment, distance A1 can be more than or equal to 3um and it is less than or equal to 8um.In another embodiment, distance A1 can be more than or equal to 4um and be less than or equal to 8um.Special one carries It is that because metal level 110 includes the first metal layer 110a and second metal layer 110b, therefore upper surface TS is second metal layer 110b top surface.In addition, as it was noted above, because metal level 110 can also only include the first metal layer 110a, so when, on Surface TS is the first metal layer 110a top surface.
The first metal layer 110a is by forming the contact window in gate insulation layer GI, insulating barrier IL2, insulating barrier IL3 Va and with source/drain regions S/D be electrically connected with.That is, in the present embodiment, the first metal layer 110a as source electrode/ Drain electrode.In addition, the first metal layer 110a material includes but is not limited to：Aluminium, molybdenum, titanium, gold, indium, tin or its combination.
In addition, flatness layer PL is also covered with above the first metal layer 110a, to promote flatness.Flatness layer PL's Material can be (but not limited to)：Inorganic material, organic material or its combination, wherein inorganic material is, for example, (but not limited to)：Oxygen SiClx, silicon nitride, the stack layer of silicon oxynitride or above-mentioned at least two kinds materials；Organic material is, for example, (but not limited to)：Polyamides Imines system resin, epoxy system resin or acryl system resin Polymer material.
Second metal layer 110b is by forming the contact window Vb in flatness layer PL and electric with the first metal layer 110a Property connection.Second metal layer 110b material includes but is not limited to：Aluminium, molybdenum, titanium, gold, indium, tin or its combination.In addition, at this In embodiment, light emitting diode 120 is electrically connected at first as source/drain electrodes by second metal layer 110b Metal level 110a.That is, in the present embodiment, light emitting diode 120 and second metal layer 110b is electrically connected with, and the Two metal level 110b are as connection electrode.
Light emitting diode 120 is configured on metal level 110.In the present embodiment, light emitting diode 120 includes luminous two Pole pipe main body LB and electrode 126a.Specifically, in the present embodiment, the light emitting diode main body in light emitting diode 120 LB is the second metal layer 110b that metal level 110 is electrically connected at by electrode 126a.Equally, however, due to metal level 110 can also only include the first metal layer 110a, so when, light emitting diode main body LB is electrically connected with by electrode 126a In the first metal layer 110a.In addition, in the present embodiment, light emitting diode 120 also includes electrode 126b.In addition, in this reality Apply in mode, light emitting diode 120 is rectilinear micro-led.
In the present embodiment, light emitting diode main body LB has the surface S1 and surface S2 relative with surface S1, surface S1 and surface S2 have distance A2 all parallel to substrate 100, and in the directiond between surface S1 and surface S2.In an embodiment party In formula, distance A2 can be more than or equal to 2um and be less than or equal to 12um.In another embodiment, distance A2 can be more than or equal to 3um and Less than or equal to 10um.In another embodiment, distance A2 can be more than or equal to 4um and be less than or equal to 8um.
Special one is mentioned that, in one embodiment, distance A2 and distance A1 ratio may be greater than being equal to 0.25 and small In equal to 6.In another embodiment, distance A2 and distance A1 ratio may be greater than being equal to 0.6 and less than or equal to 5.Another In one embodiment, distance A2 and distance A1 ratio may be greater than being equal to 1 and less than or equal to 4.If distance A2 and distance A1's Ratio is less than 0.25, then may weaken the structural strength of display device 10；And if distance A2 and distance A1 ratio is more than 6, The luminous efficiency of display device 10 or the efficiency of its radiating etc. may be reduced.
In addition, in the present embodiment, in order to lift the luminous efficiency of display device 10, surface S2 can have multiple grooves M, i.e. surface S2 have high low head, the surface for out-of-flatness.Based on this, in the present embodiment, distance A2 be in fact from Surface S2 highest point is to the length between the S1 of surface.Specifically, in the present embodiment, groove M depth is about 0.25um to 1um.However, the present invention is not limited thereto.In other embodiments, surface S2 is alternatively even curface.Lift For one, surface S2 can not have multiple groove M, and distance A2 can directly measure directly from surface S2 to surface S1.Lift another For one, surface S2 can have depth be less than 0.2um groove M, and distance A2 from surface S2 highest point to surface S1 it Between length.
In the present embodiment, light emitting diode main body LB include the first conductive-type semiconductor layer 122a, active layers 124 and Second conductive-type semiconductor layer 122b.Active layers 124 are configured on the first conductive-type semiconductor layer 122a.Second conductivity type is partly led Body layer 122b is configured in active layers 124.First conductive-type semiconductor layer 122a material is, for example, (but not limited to)：Doped with The GaN or other suitable materials of first conductivity type admixture, such as GaN doped with magnesium.The material of active layers 124 is, for example, (but not limited to)：Multiple quantum well, its material are, for example, InGaN/GaN or other suitable materials.Second conductive-type semiconductor layer 122b material is, for example, (but not limited to)：Doped with the GaN or other suitable materials of the second conductivity type admixture, such as adulterate There is the GaN of silicon.In addition, in the present embodiment, the first conductive-type semiconductor layer 122a is, for example, p type semiconductor layer, second leads Electric type semiconductor layer 122b is, for example, n type semiconductor layer, and is based on this, the electrode contacted with the first conductive-type semiconductor layer 122a 126a is, for example, P-type electrode, is, for example, N-type electrode with the second conductive-type semiconductor layer 122b electrode 126b contacted.However, this Invention is not limited to this.In other embodiments, the first conductive-type semiconductor layer 122a is, for example, n type semiconductor layer, and second Conductive-type semiconductor layer 122b is, for example, p type semiconductor layer, and is based on this, the electricity contacted with the first conductive-type semiconductor layer 122a Pole 126a is, for example, N-type electrode, is, for example, P-type electrode with the second conductive-type semiconductor layer 122b electrode 126b contacted.
Special one is mentioned that, in the present embodiment, surface S1 is the first conductive-type semiconductor layer 122a bottom surface, and Surface S2 is the second conductive-type semiconductor layer 122b top surface.That is, in the present embodiment, distance A2 leads for first Electric type semiconductor layer 122a bottom surface is to the length between the second conductive-type semiconductor layer 122b top surface.In addition, such as institute above State, in order to lift the luminous efficiency of display device 10, light emitting diode main body LB surface S2 there can be multiple groove M, therefore In the present embodiment, the second conductive-type semiconductor layer 122b has multiple groove M.
In the present embodiment, conductive adhesive layer 130 is for electrically connecting to the electrode 126a and metal level of light emitting diode 120 110 second metal layer 110b.The material of conductive adhesive layer 130 is, for example, (but not limited to)：Anisotropic conductive adhesive paste (Anisotropic Conductive Adhesive, abbreviation ACA).Distinguished according to storage outward appearance, anisotropic conductive adhesive paste includes Anisotropy conductive paste (Anisotropic Conductive Paste, abbreviation ACP) and anisotropic conductive film (Anisotropic Conductive Film, abbreviation ACF) both types.However, the present invention is not limited thereto, Ren Hesuo Technical staff can be by any existing juncture come the electrode 126a of electrical connecting luminous diode 120 in category technical field With the second metal layer 110b of metal level 110.For example, the electrode 126a of light emitting diode 120 and the second of metal level 110 Metal level 110b can be also electrically connected to each other by way of eutectic (eutectic) engagement.On the other hand, as it was noted above, Because metal level 110 can also only include the first metal layer 110a, so when, conductive adhesive layer 130 is for electrically connecting to luminous two The electrode 126a and the first metal layer 110a of pole pipe 120.
In addition, it is also covered with insulating barrier IL4 in the top of conductive adhesive layer 130.Insulating barrier IL4 material can be (but unlimited In)：Inorganic material, organic material or its combination, wherein inorganic material is, for example, (but not limited to)：Silica, silicon nitride, nitrogen oxygen The stack layer of SiClx or above-mentioned at least two kinds materials；Organic material is, for example, (but not limited to)：Polyimides system resins, epoxy It is resin or acryl system resin Polymer material.
In the present embodiment, opposite substrate 140 include substrate 142, be configured on substrate 142 chromatic filter layer CF, Wavelength conversion layer WT, shielding pattern layer BK and adhesion coating 144.However, the present invention is not limited thereto.In other embodiments, Chromatic filter layer CF can be only configured with substrate 142 or can only be configured with wavelength conversion layer WT.
The material of substrate 142 can be glass, quartz, organic polymer or metal material etc., wherein organic polymer E.g. (but being not restricted to)：Polyimides, PET, makrolon etc..
Chromatic filter layer CF can be realized by any chromatic filter layer well known to technical staff in any art.Lift For example, chromatic filter layer CF may include red filter pattern, green filter pattern and blue filter pattern.
Wavelength conversion layer WT respective leds 120 and set.Wavelength conversion layer WT can be by skill in any art Any wavelength conversion layer well known to art personnel is realized.For example, wavelength conversion layer WT material may include (but unlimited In)：Quanta point material, phosphor powder material, phosphor powder materials or foregoing combination.
Shielding pattern layer BK corresponding wavelength conversion layer WT and set.Specifically, in the present embodiment, shielding pattern layer BK can be used to cover the element and cabling for being not intended to be watched in display device 10 by user, such as scan line (not shown), number According to line (not shown), transistor T etc..In addition, shielding pattern layer BK is, for example, black matrix" (black matrix, BM).In addition, Shielding pattern layer BK material for example includes but is not limited to：Black resin, other colouring resins, black photoresist, its The single or multiple lift structure of his coloured photoresist, metal or above-mentioned composition.
Adhesion coating 144 is configured between chromatic filter layer CF and wavelength conversion layer WT and shielding pattern layer BK, to be bonded Chromatic filter layer CF and wavelength conversion layer WT and shielding pattern layer BK.The material of adhesion coating 144 for example includes but is not limited to：Have The framework that the insulating materials that machine insulating materials, inorganic insulating material, organic-inorganic mix or more material stacks.
Special one is mentioned that, the opposite substrate 140 of present embodiment includes the chromatic filter layer being configured on substrate 142 CF, wavelength conversion layer WT, shielding pattern layer BK and adhesion coating 144, but the present invention is not limited thereto.In other embodiment In, opposite substrate 140 can be any opposite substrate well known to technical staff in any art.In addition, in this implementation In mode, display device 10 includes opposite substrate 140, but the present invention is not limited thereto.In other embodiments, display device 10 can not also include opposite substrate.
In addition, in the present embodiment, adhesion coating 144 is between chromatic filter layer CF and wavelength conversion layer WT, but sheet Invention is not limited to this.In other embodiments, chromatic filter layer CF can also be located at adhesion coating 144 and wavelength conversion layer Between WT, namely adhesion coating 144 can directly contact with substrate 142.
What deserves to be explained is as it was noted above, in the present embodiment, by the directiond, light emitting diode 120 The distance between the upper surface TS of the distance between surface S1 and surface S2 A2 and metal level 110 and substrate 100 A1 ratio is More than or equal to 0.25 and less than or equal to 6, it thereby may be such that display device 10 has good luminous efficiency or satisfactory texture intensity.
In addition, though in above-mentioned Fig. 1 embodiment, light emitting diode 120 is rectilinear micro-led, but The present invention is not limited thereto.In other embodiments, light emitting diode can also be that crystal covering type is micro-led.With Under, reference picture 2 is illustrated.It should be noted that, following embodiments have continued to use the element symbol of aforementioned embodiments herein Number and partial content, wherein representing same or analogous element using same or analogous symbol, and eliminate identical skill The explanation of art content.Explanation on clipped refers to aforementioned embodiments, and it is no longer repeated for following embodiments.
Fig. 2 is the diagrammatic cross-section of the display device of another embodiment of the present invention.Referring to Fig. 2 and Fig. 1, In display device 20, light emitting diode 220 is that crystal covering type is micro-led；And in display device 10, light emitting diode 120 be rectilinear micro-led.Hereinafter, by the difference between Fig. 2 embodiment and Fig. 1 embodiment Illustrate.
Fig. 2 is refer to, light emitting diode 220 includes light emitting diode main body 2LB, electrode 226a and electrode 226b, wherein Light emitting diode main body 2LB includes the first conductive-type semiconductor layer 222a, the conductive-type semiconductor layer of active layers 224 and second 222b.Specifically, in the present embodiment, the second conductive-type semiconductor layer 222b is configured at electrode 226a and electrode 226b On, the first conductive-type semiconductor layer 222a is configured between the second conductive-type semiconductor layer 222b and electrode 226b, and luminous two Light emitting diode main body 2LB in pole pipe 220 is electrically connected at the second metal layer of metal level 110 by electrode 226a 110b。
In the present embodiment, the first conductive-type semiconductor layer 222a material is, for example, (but not limited to)：Doped with The GaN or other suitable materials of one conductivity type admixture, such as GaN doped with magnesium.The material of active layers 224 be, for example, (but It is not limited to)：Multiple quantum well, its material are, for example, InGaN/GaN or other suitable materials.Second conductive-type semiconductor layer 222b Material be, for example, (but not limited to)：Doped with the GaN or other suitable materials of the second conductivity type admixture, such as doped with silicon GaN.In addition, in the present embodiment, the first conductive-type semiconductor layer 222a is, for example, p type semiconductor layer, the second conductivity type Semiconductor layer 222b is, for example, n type semiconductor layer, and is based on this, the electrode 226b contacted with the first conductive-type semiconductor layer 222a E.g. P-type electrode, it is, for example, N-type electrode with the second conductive-type semiconductor layer 222b electrode 226a contacted.It is however, of the invention It is not limited to this.In other embodiments, the first conductive-type semiconductor layer 222a is, for example, n type semiconductor layer, and second is conductive Type semiconductor layer 222b is, for example, p type semiconductor layer, and is based on this, the electrode contacted with the first conductive-type semiconductor layer 222a 226b is, for example, N-type electrode, is, for example, P-type electrode with the second conductive-type semiconductor layer 222b electrode 226a contacted.
In the present embodiment, light emitting diode main body 2LB has the surface 2S1 and surface 2S2 relative with surface 2S1, Surface 2S1 and surface 2S2 have distance 2A2 all parallel to substrate 100, and in the directiond between surface 2S1 and surface 2S2. In one embodiment, distance 2A2 can be more than or equal to 2um and be less than or equal to 12um.In another embodiment, distance 2A2 can More than or equal to 3um and it is less than or equal to 10um.In another embodiment, distance 2A2 can be more than or equal to 4um and be less than or equal to 8um.
Special one is mentioned that, in one embodiment, distance 2A2 and distance A1 ratio may be greater than being equal to 0.25 and small In equal to 6.In another embodiment, distance 2A2 and distance A1 ratio may be greater than being equal to 0.6 and less than or equal to 5.Another In one embodiment, distance 2A2 and distance A1 ratio may be greater than being equal to 1 and less than or equal to 4.If distance 2A2 and distance A1 Ratio be less than 0.35, then may weaken the structural strength of display device 20；And if distance 2A2 and distance A1 ratio is more than 6, The luminous efficiency of display device 20 or the efficiency of its radiating etc. may then be reduced.
Special one is mentioned that, in the present embodiment, surface 2S1 is the first conductive-type semiconductor layer 222a bottom surface, And surface 2S2 is the second conductive-type semiconductor layer 222b top surface.That is, in the present embodiment, distance 2A2 is the One conductive-type semiconductor layer 222a bottom surface is to the length between the second conductive-type semiconductor layer 222b top surface.In addition, in Fig. 2 In, although surface 2S2 is even curface, according to the above-mentioned description as described in Fig. 1, technical staff in any art , it is to be appreciated that in order to lift the luminous efficiency of display device 20, surface 2S2 can also have multiple grooves.This represents, now distance 2A2 is in fact from surface 2S2 highest point to the length between the 2S1 of surface, and the second conductive-type semiconductor layer 222b has Multiple grooves.
In the present embodiment, display device 20 also includes electrode pattern 250, is configured on flatness layer PL.Specifically, In the present embodiment, electrode pattern 250 and second metal layer 110b e.g. belongs to same film layer and has phase same material. That is in the present embodiment, electrode pattern 250 and second metal layer 110b is, for example, one in same micro image etching procedure Rise and formed.In the present embodiment, electrode pattern 250 and second metal layer 110b material is, for example, (but not limited to)：Aluminium, Molybdenum, titanium, gold, indium, tin or its combination.
In addition, in the present embodiment, light emitting diode main body 2LB is electrically connected at the second metal by electrode 226a Layer and is electrically connected at electrode pattern 250 at 110b by electrode 226b.Furthermore, in the present embodiment, electrode 226a and electrode 226b is to be electrically connected by conductive adhesive layer 130 in second metal layer 110b and electrode pattern 250.Together Sample, the present invention is not limited thereto, and technical staff can be sent a telegram here by any existing juncture in any art Property connection electrode 226a and second metal layer 110b and electrode 226b and electrode pattern 250.For example, electrode 226a and electricity Pole 226b can be also electrically connected by way of eutectic bonding in second metal layer 110b and electrode pattern 250.
What deserves to be explained is as it was noted above, in the present embodiment, by the directiond, light emitting diode 220 The distance between the upper surface TS and substrate 100 of the distance between surface 2S1 and surface 2S2 2A2 and metal level 110 A1 ratio More than or equal to 0.25 and less than or equal to 6, thereby to may be such that display device 20 has good luminous efficiency or satisfactory texture intensity.
In addition, in the embodiment of figure 1, light emitting diode 120 includes light emitting diode main body LB, electrode 126a and electricity Pole 126b, and in Fig. 2 embodiment, light emitting diode 220 includes light emitting diode main body 2LB, electrode 226a and electricity Pole 226b, but the present invention is not limited thereto.In other embodiments, light emitting diode also can also include configuration in light-emitting diodes Cushion in pipe main body.Hereinafter, reference picture 3 and Fig. 4 are described in detail.
Fig. 3 is the diagrammatic cross-section of the light emitting diode of another embodiment of the present invention.Referring to Fig. 3 and Fig. 1, Fig. 3 light emitting diode 320 is similar to Fig. 1 light emitting diode 120, therefore same or analogous element is with same or analogous Symbol represents, and related description repeats no more.Hereinafter, put up with and illustrated at difference between the two.
Refer to Fig. 3, cushion 360 is configured on the main LB of light emitting diode, and the top surface S3 of cushion 360 have it is multiple Groove 3M.Specifically, in the present embodiment, cushion 360 is located at the main LB of light emitting diode the second conductive-type semiconductor Between layer 122b and electrode 126b.In the present embodiment, the material of cushion 360 includes but is not limited to：Aluminum oxide (Al2O3), undoped gallium nitride (GaN), silicon nitride, the stacked structure of silica or previous materials.In addition, in this implementation In mode, groove 3M depth is about 0.25um to 1um.
It is noted that in the present embodiment, configuration is included in light emitting diode main body by light emitting diode 320 Cushion 360 on LB, and the top surface S3 of cushion 360 has multiple groove 3M so that light emitting diode main body LB surface S2 is not required to the luminous efficiency for setting groove M also to lift display device 10.Consequently, it is possible in the present embodiment, light-emitting diodes Pipe main body LB surface S2 is even curface, and distance A2 can directly measure directly from surface S2 to surface S1.
Fig. 4 is the diagrammatic cross-section of the light emitting diode of another embodiment of the present invention.Referring to Fig. 4 and Fig. 2, Fig. 4 light emitting diode 420 is similar to Fig. 2 light emitting diode 220, therefore same or analogous element is with same or analogous Symbol represents, and related description repeats no more.Hereinafter, put up with and illustrated at difference between the two.
Fig. 4 is refer to, cushion 460 is configured on light emitting diode main body 2LB, and the top surface S4 of cushion 460 has Multiple groove 4M.Specifically, in the present embodiment, cushion 460 is located at light emitting diode main body 2LB the second conductivity type On semiconductor layer 222b.In the present embodiment, the material of cushion 460 includes but is not limited to：Al2O3, undoped GaN, The stacked structure of silicon nitride, silica or previous materials.In addition, in the present embodiment, groove 4M depth is about 0.25um to 1um.
It is noted that in the present embodiment, configuration is included in light emitting diode main body by light emitting diode 420 Cushion 460 on 2LB, and the top surface S4 of cushion 460 has multiple groove 4M so that the luminous of display device 20 can be lifted Efficiency.Consequently, it is possible in the present embodiment, light emitting diode main body 2LB surface 2S2 is not required to set groove, it is smooth Surface, and distance 2A2 can directly measure directly from surface 2S2 to surface 2S1.
In addition, though it is low-temperature polysilicon film transistor that Fig. 1 to Fig. 2 embodiment, which discloses transistor T, although and Fig. 1 to Fig. 4 embodiment discloses light emitting diode 120,220,320,420, but the present invention is not limited thereto.In detail and Speech, display device of the invention may include any type of transistor well known to technical staff in any art, such as Metal oxide thin-film transistor, amorphous silicon film transistor, silicon substrate formula thin film transistor (TFT), micro- silicon thin film transistor or thin transparent Film transistor etc.；And the display device of the present invention may include any framework in any art well known to technical staff Light emitting diode, as long as the bottom surface of the first conductive-type semiconductor layer in light emitting diode main body is to the second conductive-type semiconductor layer The distance between top surface with substrate between the upper surface for the metal level being electrically connected with respectively with transistor and light emitting diode Distance ratio be more than or equal to 0.25 and less than or equal to 6 i.e. fall into the scope of the present invention.That is, the present invention is not special Xian Ding not the species of transistor and the framework of light emitting diode.For example, in the display device of an embodiment, luminous two Pole pipe also can also include catoptric arrangement of the configuration in the side wall of light emitting diode main body, use the luminous effect of lifting display device Rate.Hereinafter, by reference picture 5A to Fig. 5 M, Fig. 6 A to Fig. 6 B, Fig. 7 A to Fig. 7 C, Fig. 8 A to Fig. 8 J, Fig. 9 A to Fig. 9 E, Figure 10 A extremely Figure 10 E and Figure 11 A to Figure 11 G describe the manufacture method of the display device of several embodiments in detail.
Fig. 5 A to Fig. 5 M are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
First, Fig. 5 A are refer to, the first conductive-type semiconductor material layer 510, material of main part are sequentially formed on substrate 500 The conductive-type semiconductor material layer 512 of layer 511 and second.Substrate 500 be, for example, sapphire substrate, its thickness be, for example, be more than or Equal to 450 μm.The material of first conductive-type semiconductor material layer 510 is, for example, (but not limited to)：Mixed doped with the first conductivity type The GaN of matter or other suitable materials, such as GaN doped with silicon.The material of material of main part layer 511 is, for example, (but unlimited In)：Multiple quantum well, its material are, for example, InGaN/GaN or other suitable materials.Second conductive-type semiconductor material layer 512 Material be, for example, (but not limited to)：Doped with the GaN or other suitable materials of the second conductivity type admixture, such as doped with magnesium GaN.On the other hand, the first conductive-type semiconductor material layer 510 is, for example, N-type semiconductor material layer, and the second conductivity type is partly led Body material layer 512 is, for example, p-type semiconductor material layer.In addition, the first conductive-type semiconductor material layer 510, material of main part layer 511 And second the forming method of conductive-type semiconductor material layer 512 be, for example, (but not limited to)：Metal organic chemical vapor deposition Method (metal organic chemical vapor deposition, MOCVD), molecular beam epitaxy (molecular beam Epitaxial, MBE) or other appropriate epitaxy flop-in methods.
Then, Fig. 5 B are refer to, patterning photoresist layer is formed in the second conductive-type semiconductor material layer 512 513.Specifically, in the present embodiment, it is by technical staff in any art to pattern photoresist layer 513 Well known any half mode (half tone) processing procedure is formed.
Then, Fig. 5 C are refer to, hot-fluid (reflow) processing procedure are carried out to patterning photoresist layer 513, to form warp The patterning photoresist layer 514 of hot-fluid.Specifically, in the present embodiment, the patterning photoresist through hot-fluid Layer 514 has the profile of arc line shaped.In addition, in the present embodiment, any institute can be carried out to patterning photoresist layer 513 Any hot-fluid processing procedure in category field well known to technical staff.
Then, Fig. 5 D are refer to, is mask with the patterning photoresist layer 514 through hot-fluid, removes the first of part Conductive-type semiconductor material layer 510, the material of main part layer 511 of part and the second partial conductive-type semiconductor material layer 512, To form the first conductive-type semiconductor layer 515, the conductive-type semiconductor layer 517 of active layers 516 and second.Specifically, at this In embodiment, the first conductive-type semiconductor layer 515, the conductive-type semiconductor layer 517 of active layers 516 and second form hair together Optical diode main body 518, wherein light emitting diode main body 518 be a trapezium structure and have an angle theta, angle theta be about 30 degree extremely 85 degree, preferably about 60 degree.In addition, in the present embodiment, remove the first conductive-type semiconductor material layer 510, the portion of part The material of main part layer 511 and the method for the second partial conductive-type semiconductor material layer 512 divided is, for example, (but not limited to)：It is dry Formula etching method.In addition, in the present embodiment, the first conductive-type semiconductor layer 515 is, for example, n type semiconductor layer, second is conductive Type semiconductor layer 517 is, for example, p type semiconductor layer.
Followed by, the first conductive-type semiconductor layer 515, the conductive-type semiconductor layer 517 of active layers 516 and second are being formed Afterwards, the patterning photoresist layer 514 through hot-fluid is removed.In the present embodiment, it is photic anti-to remove the patterning through hot-fluid The method for losing oxidant layer 514 is, for example, (but not limited to)：Using the wet method for peeling off (stripper) solution or utilize plasma The dry method of body ashing (plasma ashing).
Then, Fig. 5 E are refer to, material layer 519a and material layer are sequentially formed in light emitting diode main body 518 519b.Specifically, in the present embodiment, material layer 519a and material layer 519b are conformally formed in light emitting diode master On body 518.In addition, in the present embodiment, material layer 519a material is insulating materials, and it is, for example, (but not limited to)：Oxygen SiClx or silicon nitride；The method for forming material layer 519a is, for example, (but not limited to)：Chemical vapour deposition technique (chemical Vapor deposition, CVD) or physical vaporous deposition (physical vapor deposition, PVD)；Material layer 519b material is metal material, and it is, for example, (but not limited to)：Aluminium or silver；The method for forming material layer 519b be, for example, (but It is not limited to)：Electrochemistry electroplates (electrochemical plating, ECP) or physical vaporous deposition (physical Vapor deposition, PVD).
Followed by, patterning photoresist layer 520 is formed on material layer 519b.Specifically, in the present embodiment, The method for forming patterning photoresist layer 520 is, for example, (but not limited to)：Micro-photographing process.
Then, Fig. 5 F are refer to, to pattern photoresist layer 520 as mask, the first erosion is carried out to material layer 519b Journey is scribed, to form the reflective metal layer 521 in the side wall of light emitting diode main body 518.Specifically, in this embodiment party In formula, above-mentioned first etch process is preferably wet etch process, so that the reflection gold of the lower section of patterning photoresist layer 520 Belong to the phenomenon that undercutting is presented in layer 521.That is, the edge of patterning photoresist layer 520 can protrude from reflective metal layer 521 edge.In addition, in the present embodiment, reflective metal layer 521 includes two patterns separated each other, and described two There is distance Lb between pattern.
Then, Fig. 5 G are refer to, to pattern photoresist layer 520 as mask, the second erosion is carried out to material layer 519a Journey is scribed, to form the insulating barrier 522 in the side wall of light emitting diode main body 518.Specifically, in present embodiment In, insulating barrier 522 and the reflective metal layer 521 being configured on insulating barrier 522 form catoptric arrangement 523 together, to reflect The light sent by light emitting diode main body 518.However, the present invention is not limited thereto.In other embodiments, reflect Structure 523 can only include reflective metal layer 521.
In the present embodiment, because reflective metal layer 521 and insulating barrier 522 are (to pattern light using same mask Cause resist layer 520) defined, therefore catoptric arrangement 523 is formed in same optical cover process.In addition, in the present embodiment, Above-mentioned second etch process is preferably dry etch process, so that the insulating barrier 522 of the lower section of patterning photoresist layer 520 is not Have the phenomenon of undercutting.Consequently, it is possible to the edge of insulating barrier 522 can protrude from the edge of reflective metal layer 521.On the other hand, In the present embodiment, insulating barrier 522 equally includes two patterns separated each other, and has distance between described two patterns La.As it was noted above, because the edge of insulating barrier 522 can protrude from the edge of reflective metal layer 521, therefore distance Lb is more than distance La。
It is noted that as it was noted above, because light emitting diode main body 518 has about 30 degree to 85 degree of angle θ, catoptric arrangement 523 of the configuration in the side wall of light emitting diode main body 518 is thereby caused to can control light emitting diode main body 518 The light sent is sent towards the same side of light emitting diode main body 518.
Then, Fig. 5 H are refer to, conductor layer 524 is formed on substrate 500, wherein conductor layer 524 is covered in patterning light Cause on the conductive-type semiconductor layer 517 of resist layer 520 and second.Specifically, in the present embodiment, conductor layer 524 is one Discontinuous film layer.That is, in the present embodiment, the conductor layer being covered in patterning photoresist layer 520 524th, be covered in the conductor layer 524 not being patterned on the substrate 500 that photoresist layer 520 is covered and be covered in not by The conductor layer 524 on the second conductive-type semiconductor layer 517 that patterning photoresist layer 520 is covered is separated each other Come.It is noted that as it was noted above, due to pattern photoresist layer 520 edge and insulating barrier 522 edge all The edge of reflective metal layer 521 is protruded from, therefore conductor layer 524 can turn into discontinuous film layer.In addition, in present embodiment In, the material of conductor layer 524 be, for example, (but not limited to) ni au (Ni/Au) overlapping shelf structure, titanium/aluminium (Ti/Al) overlapping shelf structure, Or meet other metal materials of contact resistance demand；The method for forming conductor layer 524 is, for example, (but not limited to)：Electrochemistry electricity Plating, physical vapour deposition (PVD) or evaporation.
On the other hand, in the present embodiment, be not patterned that photoresist layer 520 is covered second is covered in lead Conductor layer 524 in electric type semiconductor layer 517 is used as electrode 525.That is, in the present embodiment, electrode 525 is same It is to be defined by the patterning photoresist layer 520 for defining catoptric arrangement 523, this represents electrode 525 and catoptric arrangement 523 It is to be formed in same optical cover process.In addition, in the present embodiment, electrode 525 is, for example, P-type electrode.
Then, Fig. 5 I are refer to, patterning photoresist layer 520 is removed and is covered in patterning photoresist layer Conductor layer 524 on 520, and leave the conductor layer 524 (i.e. electrode 525) being covered on the second conductive-type semiconductor layer 517 and The conductor layer 524 being covered on substrate 500.Specifically, in the present embodiment, patterning photoresist layer 520 is removed Method be, for example, (but not limited to)：Wet method using stripping solution or the dry method using plasma ashing.Value One is obtained to be mentioned that, as it was noted above, because conductor layer 524 is discontinuous film layer, therefore can avoid patterning photoresist layer 520 formed with continuous film layer because can not remove the problem of thereon.
Then, Fig. 5 J be refer to, there is provided the bearing substrate 526 formed with bonding layer 527 thereon.In the present embodiment, The material of bearing substrate 526 is, for example, (but not limited to)：Glass, plastic cement or polyimides, PET, poly- carbon The substrate of the chemical materials such as acid esters composition.In addition, in the present embodiment, the material of bonding layer 527 is, for example, (but not limited to)： Tin indium (Sn/In) alloy, gold (Au), copper (Cu) or its alloy material；The method for forming bonding layer 527 is, for example, (but unlimited In)：Plating, evaporation or physical vapour deposition (PVD).
Followed by, bearing substrate 526 is engaged together with to organizing with substrate 500, and forms structure as indicated at figure 5j.In detail For, in the present embodiment, bonding layer 527 is in contact with catoptric arrangement 523, and bonding layer 527 connects with electrode 525 Touch.
Then, Fig. 5 K are refer to, remove substrate 500.Specifically, in the present embodiment, the method for removing substrate 500 E.g. (but not limited to)：Laser lift-off (laser lift-off).Other one is mentioned that, while substrate 500 are removed, The conductor layer 524 being covered on substrate 500 is also while removed, and the first conductive-type semiconductor layer 515 is exposed.
Then, Fig. 5 L are refer to, electrode 528 is formed on the first conductive-type semiconductor layer 515.In the present embodiment, The material of electrode 528 is, for example, (but not limited to)：Ni au (Ni/Au) overlapping shelf structure, titanium/aluminium (Ti/Al) overlapping shelf structure or other Metal material.In addition, in the present embodiment, electrode 528 is, for example, N-type electrode.
In one embodiment, the method for forming electrode 528 includes but is not limited to following steps：First, led first Patterning curtain layer of hard hood (not shown) is formed in electric type semiconductor layer 515；Then, electrode glue is formed on patterning curtain layer of hard hood Constituent (not shown)；Afterwards, electrode 528 is defined using the mode of impressing.In another embodiment, electrode 528 is formed Method include but is not limited to following steps：Patterning curtain layer of hard hood is formed on the first conductive-type semiconductor layer 515 (not show Go out) after, define electrode 528 using vapour deposition method.In addition, in the present embodiment, although electrode 528 include it is individually separated more Individual electrode pattern, but the present invention is not limited thereto.In other embodiments, electrode 528 can also be pellet electrode.
So far, it has been substantially completed the making of light emitting diode 529.Specifically, in the present embodiment, light emitting diode 529 include light emitting diode main body 518, catoptric arrangement 523, electrode 525 and electrode 528, and wherein catoptric arrangement 523 is configured at hair In the side wall of optical diode main body 518, and the reflective metal layer 521 including insulating barrier 522 and on insulating barrier 522, thereby Display device including light emitting diode 529 can have good luminous efficiency.In addition, in the present embodiment, light-emitting diodes Pipe 529 is rectilinear micro-led.
Then, Fig. 5 M are refer to, after carrying out heating processing to bearing substrate 526, are temporarily stored in by the crawl of grabbing device 530 Light emitting diode 529 on bearing substrate 526, some of bonding layers 527 can be attached on light emitting diode 529 and with it is anti- Penetrate structure 523, electrode 525 is in contact.Specifically, in the present embodiment, the process temperatures of heating processing are, for example, 200 DEG C To 700 DEG C, the processing time of heating processing is, for example, 0.5 minute to 5 minutes.
It is noted that after the operation of crawl light emitting diode 529 is completed, technology in any art Personnel, which should be understood that, to use any well known fabrication steps to be assembled in light emitting diode 529 according to different applications In display device.
In addition, in Fig. 5 A to Fig. 5 M embodiment, catoptric arrangement 523 is double-decker, that is, includes what is sequentially stacked Insulating barrier 522 and reflective metal layer 521, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 523 also may be used To be more than three layers of structure.For example, in one embodiment, catoptric arrangement 523 can also include between insulating barrier 522 with Another insulating barrier between reflective metal layer 521, the refractive index of another insulating barrier are different from the refractive index of insulating barrier 522.
In addition, in Fig. 5 A to Fig. 5 M embodiment, catoptric arrangement 523 includes the insulating barrier 522 sequentially stacked and anti- Metal level 521 is penetrated, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 523 can also include sequentially stacking And two insulating barriers that refractive index is different.Hereinafter, will be described in detail according to Fig. 6 A to Fig. 6 B.
Fig. 6 A to Fig. 6 B are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.Fig. 6 A The step of by being carried out after hookup 5D.In addition, in Fig. 6 A to Fig. 6 B embodiment and Fig. 5 A to Fig. 5 M embodiment Same or like component is able to carry out using identical material or method, therefore hereinafter for the reality with Fig. 5 A to Fig. 5 M The description of mode identical is applied to will not be described in great detail, and mainly to be illustrated at difference between the two.
First, Fig. 6 A are refer to, material layer 619a and material layer are sequentially formed in light emitting diode main body 518 619b.Specifically, in the present embodiment, material layer 619a and material layer 619b are conformally formed on substrate 500.Separately Outside, in the present embodiment, material layer 619a and material layer 619b material are insulating materials, and material layer 619a refraction Rate is different from material layer 619b refractive index.In the present embodiment, material layer 619b refractive index is, for example, to be more than material layer 619a refractive index.Specifically, in the present embodiment, between material layer 619b refractive index and material layer 619a refractive index Difference be, for example, between 0.4 to 0.9.For another viewpoint, in the present embodiment, material layer 619a material is, for example, Silica, material layer 619b material is, for example, silicon nitride, but the present invention is not limited thereto.In addition, in the present embodiment, shape Method into material layer 619a and material layer 619b is, for example, (but not limited to)：Chemical vapour deposition technique or physical vapor are sunk Product.
Followed by, patterning photoresist layer 620 is formed on material layer 619b.Specifically, in the present embodiment, The method for forming patterning photoresist layer 620 is, for example, (but not limited to)：Micro-photographing process.
Then, Fig. 6 B are refer to, to pattern photoresist layer 620 as mask, the first erosion is carried out to material layer 619b Journey is scribed, after forming the insulating barrier 621 in the side wall of light emitting diode main body 518, equally to pattern photoresist Oxidant layer 620 is mask, and the second etch process is carried out to material layer 619a, to form the side wall positioned at light emitting diode main body 518 On insulating barrier 622.Specifically, in the present embodiment, above-mentioned first etch process and the second etch process are preferably made Journey condition identical dry etch process.It is noted that in the present embodiment, in the dry etch process, material Bed of material 619a rate of etch is less than material layer 619b rate of etch.Consequently, it is possible to pattern the exhausted of the lower section of photoresist layer 620 The phenomenon of undercutting can be presented in edge layer 621, and causes the edge meeting at the edge and insulating barrier 622 of patterning photoresist layer 620 Protrude from the edge of insulating barrier 621.In addition, in the present embodiment, insulating barrier 621 and insulating barrier 622 are all included each other respectively Two patterns of separation, wherein have a distance Lb between the two of insulating barrier 621 pattern, between two patterns of insulating barrier 622 With distance La.As it was noted above, because the edge of insulating barrier 622 can protrude from the edge of insulating barrier 621, therefore distance Lb is more than Distance La.
More specifically, in the present embodiment, insulating barrier 622 and the insulating barrier 621 1 being configured on insulating barrier 622 Composition catoptric arrangement 623 is played, to reflect the light sent by light emitting diode main body 518.It is noted that in this reality Apply in mode, by insulating barrier 621 and insulating barrier 622 are determined using same mask (patterning photoresist layer 620) Justice, therefore catoptric arrangement 623 is formed in same optical cover process.Furthermore, as it was noted above, due to light emitting diode master Body 518 has about 30 degree to 85 degree of angle theta, thereby causes reflection of the configuration in the side wall of light emitting diode main body 518 Structure 623 can control the light that light emitting diode main body 518 is sent to be sent towards the same side of light emitting diode main body 518.
It is noted that the content of the embodiment of embodiment and Fig. 6 A to Fig. 6 B based on Fig. 5 A to Fig. 5 M, appoints Technical staff in what art is, it is to be appreciated that be configured at the reflection in the side wall of light emitting diode main body 518 in formation After structure 623, the making of light emitting diode can be completed using same technological means according to Fig. 5 H to Fig. 5 M description.
In addition, in Fig. 6 A to Fig. 6 B embodiment, catoptric arrangement 623 is double-decker, that is, includes what is sequentially stacked Insulating barrier 622 and insulating barrier 621, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 623 can also It is more than three layers of structure.For as an example, in one embodiment, catoptric arrangement 623 can also include another insulating barrier, described The refractive index of another insulating barrier may differ from the refractive index of insulating barrier 622 and the refractive index of insulating barrier 621.Come by way of further example Say, in one embodiment, catoptric arrangement 623 may also comprise the insulating barrier 622 and insulating barrier 621 of alternately repeatedly stacking.
In addition, in Fig. 5 A to Fig. 5 M embodiment, electrode 528 is formed directly into the first conductive-type semiconductor layer 515 On, but the present invention is not limited thereto.In other embodiments, electrode 528 also can be by forming on opposite substrate and passing through Group is formed on the first conductive-type semiconductor layer 515.Hereinafter, will be described in detail according to Fig. 7 A to Fig. 7 C.
Fig. 7 A to Fig. 7 C are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.Fig. 7 A The step of by being carried out after hookup 5I.In addition, in Fig. 7 A to Fig. 7 C embodiment and Fig. 5 A to Fig. 5 M embodiment Same or like component is able to carry out using identical material or method, therefore hereinafter for the reality with Fig. 5 A to Fig. 5 M The description of mode identical is applied to will not be described in great detail, and mainly to be illustrated at difference between the two.
First, Fig. 7 A be refer to, there is provided the array base palte 726 formed with bonding layer 727 thereon.Specifically, in this reality Apply in mode, array base palte 726 can be any array base palte well known to technical staff in any art.Citing comes Say, in one embodiment, array base palte 726 may include on the substrate by an at least insulating barrier or an at least conductive layer Or the element layer that both combinations are formed.Specifically, in one embodiment, the element layer for example may include a plurality of Scan line, a plurality of data lines, multiple transistors, multiple electrodes and multiple capacitors.For another viewpoint, in an embodiment party In formula, array base palte 726 is, for example, active component array base board.In another embodiment, array base palte 726 is, for example, film Transistor (TFT) array base palte.
In the present embodiment, the material of bonding layer 727 is, for example, (but not limited to)：Tin indium (Sn/In) alloy, Cu, Au Or its alloy material, the method for forming bonding layer 727 is, for example, (but not limited to)：Plating, physical vapour deposition (PVD) or evaporation.
Followed by, array base palte 726 is engaged together with to organizing with substrate 500, and forms structure as shown in Figure 7 A.In detail For, in the present embodiment, bonding layer 727 is in contact with catoptric arrangement 523, and bonding layer 727 is in contact with electrode 525
Then, Fig. 7 B are refer to, remove substrate 500.Due to removing the method for substrate 500 and the associated description of this step At large illustrated in Fig. 5 A to Fig. 5 M embodiment, therefore will not be repeated here.
Then, Fig. 7 C be refer to, there is provided the opposite substrate 729 formed with electrode 728 thereon.Specifically, in this implementation In mode, opposite substrate 729 can be any opposite substrate well known to technical staff in any art.For example, In one embodiment, opposite substrate 729 can for example be realized with opposite substrate 140 in Fig. 1 embodiment.
In the present embodiment, the material of electrode 728 is, for example, transparent electrode material, and it includes but is not limited to：Indium tin Oxide (ITO), indium-zinc oxide (IZO)；The method for forming electrode 728 is, for example, (but not limited to)：Physical vapour deposition (PVD), steaming Plating or plating.In addition, in the present embodiment, electrode 728 is, for example, N-type electrode.In addition, in the present embodiment, electrode 728 E.g. common electrode.
Followed by, by array base palte 726 and opposite substrate 729 to group together with, and structure as seen in figure 7 c is formed, with complete Into the making of the display device 70 including light emitting diode 730.Specifically, in the present embodiment, array base palte 726 with After opposite substrate 729 is to group, electrode 728 can be contacted with the first conductive-type semiconductor layer 515 of light emitting diode main body 518 and Formed on the first conductive-type semiconductor layer 515.
It is noted that in the present embodiment, light emitting diode 730 includes light emitting diode main body 518, reflection knot Structure 523, electrode 525 and electrode 728, wherein catoptric arrangement 523 are configured in the side wall of light emitting diode main body 518, and including The insulating barrier 522 and reflective metal layer 521 sequentially stacked, thereby display device 70 can have good luminous efficiency.Another In embodiment, catoptric arrangement 523 also can only include reflective metal layer 521.
In addition, in Fig. 7 A to Fig. 7 C embodiment, in order to lift the conductive-type semiconductor layer 515 of electrode 728 and first Between contact effect, content of the technical staff according to disclosed in Fig. 5 L is, it is to be appreciated that removing substrate in any art After 500 and by array base palte 726 and opposite substrate 729 to group before, can on the first conductive-type semiconductor layer 515 direct shape Into electrode 528.
In addition, though in above-mentioned Fig. 5 A to Fig. 5 M embodiment, light emitting diode 529 is rectilinear miniature luminous two Pole pipe, but the present invention is not limited thereto.In other embodiments, light emitting diode can also be the miniature light-emitting diodes of crystal covering type Pipe.Hereinafter, reference picture 8A to Fig. 8 J, Fig. 9 A to Fig. 9 E, Figure 10 A to Figure 10 E and Figure 11 A to Figure 11 G are illustrated.
Fig. 8 A to Fig. 8 J are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.
First, Fig. 8 A are refer to, the first conductive-type semiconductor material layer 810, material of main part are sequentially formed on substrate 800 The conductive-type semiconductor material layer 812 of layer 811 and second.Substrate 800 be, for example, sapphire substrate, its thickness be, for example, be more than or Equal to 450 μm.The material of first conductive-type semiconductor material layer 810 is, for example, (but not limited to)：Mixed doped with the first conductivity type The GaN of matter or other suitable materials, such as GaN doped with silicon.The material of material of main part layer 811 is, for example, (but unlimited In)：Multiple quantum well, its material are, for example, InGaN/GaN or other suitable materials.Second conductive-type semiconductor material layer 812 Material be, for example, (but not limited to)：Doped with the GaN or other suitable materials of the second conductivity type admixture, such as doped with magnesium GaN.On the other hand, the first conductive-type semiconductor material layer 810 is, for example, N-type semiconductor material layer, and the second conductivity type is partly led Body material layer 812 is, for example, p-type semiconductor material layer.In addition, the first conductive-type semiconductor material layer 810, material of main part layer 811 And second the forming method of conductive-type semiconductor material layer 812 be, for example, (but not limited to)：Metal organic chemical vapor deposition Method, molecular beam epitaxy or other appropriate epitaxy flop-in methods.
Followed by, electrode 813 is formed in the second conductive-type semiconductor material layer 812.Specifically, in present embodiment In, the material of electrode 813 be, for example, golden (Ni/Au) alloy of (but not limited to) nickel, Ni/ITO or meet contact impedance demand its His material, the method for forming electrode 813 is, for example, (but not limited to)：Micro image etching procedure.In addition, in the present embodiment, electricity Pole 813 is, for example, P-type electrode.
Then, Fig. 8 B are refer to, patterning photoresist layer is formed in the second conductive-type semiconductor material layer 812 814.Specifically, in the present embodiment, pattern photoresist layer 814 and cover electrode 813.In addition, patterning is photic Resist layer 814 is by any half mode (half tone) processing procedure institute shape well known to technical staff in any art Into.In addition, in the present embodiment, patterning photoresist layer 814 has stepped profile.
Then, Fig. 8 C are refer to, hot-fluid processing procedure are carried out to patterning photoresist layer 814, to form the figure through hot-fluid Case photoresist layer 815.Specifically, in the present embodiment, the patterning photoresist layer 815 through hot-fluid has The stepped profile of arc line shaped.In addition, in the present embodiment, patterning photoresist layer 814 can be carried out any affiliated Any hot-fluid processing procedure in field well known to technical staff.
Then, Fig. 8 D are refer to, is mask with the patterning photoresist layer 815 through hot-fluid, removes the first of part Conductive-type semiconductor material layer 810, the material of main part layer 811 of part and the second partial conductive-type semiconductor material layer 812, To form the first conductive-type semiconductor layer 816, the conductive-type semiconductor layer 818 of active layers 817 and second.Specifically, at this In embodiment, the first conductive-type semiconductor layer 816, the conductive-type semiconductor layer 818 of active layers 817 and second form hair together Optical diode main body 819, wherein light emitting diode main body 819 have angle theta, and angle theta is about 30 degree to 85 degree, preferably about 60 Degree.In addition, in the present embodiment, remove the first conductive-type semiconductor material layer 810, the material of main part layer of part of part 811 and the method for the second partial conductive-type semiconductor material layer 812 be, for example, (but not limited to)：Dry etching method.In addition, In the present embodiment, the first conductive-type semiconductor layer 816 e.g. n type semiconductor layer, the second conductive-type semiconductor layer 818 P type semiconductor layer in this way.
Followed by, the first conductive-type semiconductor layer 816, the conductive-type semiconductor layer 818 of active layers 817 and second are being formed Afterwards, the patterning photoresist layer 815 through hot-fluid is removed.In the present embodiment, it is photic anti-to remove the patterning through hot-fluid The method for losing oxidant layer 815 is, for example, (but not limited to)：Using stripping solution wet method or utilize plasma ashing) it is dry Formula method.
Then, Fig. 8 E are refer to, electrode 820 is formed on substrate 800.Specifically, in the present embodiment, electrode 820 contact with the first conductive-type semiconductor layer 816.In the present embodiment, the material of electrode 820 is, for example, (but not limited to)： Titanium aluminium (Ti/Al) alloy, titanium (Ti/Au) alloy or other metal materials, the method for forming electrode 820 are, for example, (but unlimited In)：Micro image etching procedure.In addition, in the present embodiment, electrode 820 is, for example, N-type electrode.
Then, Fig. 8 F are refer to, insulation material layer 821a and insulation material layer 821b is sequentially formed on substrate 800.In detail For thin, in the present embodiment, insulation material layer 821a and insulation material layer 821b are conformally formed on substrate 800. In present embodiment, the method for forming insulation material layer 821a and insulation material layer 821b is, for example, (but not limited to)：Chemistry Vapour deposition process or physical vapour deposition (PVD).
On the other hand, insulation material layer 821a refractive index is different from insulation material layer 821b refractive index.In this implementation In mode, insulation material layer 821b refractive index is, for example, the refractive index more than insulation material layer 821a.Specifically, in this reality Apply in mode, the difference between insulation material layer 821b refractive index and insulation material layer 821a refractive index is, for example, between 0.4 To 0.9.For another viewpoint, in the present embodiment, insulation material layer 821a material is, for example, silica, insulating materials Layer 821b material is, for example, silicon nitride, but the present invention is not limited thereto.
Then, Fig. 8 G be refer to, to pattern organic layer 822 as mask, remove part insulation material layer 821a and Partial insulation material layer 821b, to form insulating barrier 823a, insulating barrier 823b, the opening O for exposing electrode 813 and expose The opening P of electrode 820.In the present embodiment, the including but not limited to following step of forming method of organic layer 822 is patterned Suddenly：First, organic material layer (not shown) is conformally formed on substrate 800；Then, patterning is formed on organic material layer Photoresist layer (not shown), then to pattern photoresist layer as mask, processing procedure is etched to remove not by pattern Change the organic material layer of photoresist layer covering；Afterwards, it will be patterned into photoresist layer removal.In addition, in this embodiment party In formula, the material of patterning organic layer 822 is, for example, (but not limited to)：Organic insulation, inorganic insulating material or organic nothing The insulating materials of machine mixing.In the present embodiment, the insulation material layer 821a of part and partial insulation material layer are removed 821b method is, for example, (but not limited to)：Dry etching method.
In the present embodiment, insulating barrier 823b configurations are on insulating barrier 823a, and insulating barrier 823a and insulating barrier 823b Configuration is in the side wall of light emitting diode main body 819.In addition, in the present embodiment, insulating barrier 823a and insulating barrier 823b Catoptric arrangement 824 is formed together, to reflect the light sent by light emitting diode main body 819.It is noted that as before Described in text, because light emitting diode main body 819 has about 30 degree to 85 degree of angle theta, thereby cause configuration in light-emitting diodes Catoptric arrangement 824 in the side wall of pipe main body 819 can control the light that light emitting diode main body 819 is sent towards light emitting diode The same side of main body 819 is sent.
Then, Fig. 8 H are refer to, bonding layer 825 is formed in opening O and opening P.In the present embodiment, bonding layer 825 material is, for example, (but not limited to)：Copper, tin (Sn) or its alloy material.Forming the forming method of bonding layer 825 includes (but not limited to) following steps.First, opening O and the P that is open layer of bonding material (not shown) are filled in formation on substrate 800, Its forming method is, for example, (but not limited to)：Electrochemistry galvanoplastic or evaporation.Then, opening O and the engagement material being open outside P are removed The bed of material, to form bonding layer 825 in opening O and opening P, wherein the method for removing opening O and the layer of bonding material being open outside P E.g. (but not limited to)：Chemical mechanical milling method, chemical method for etching or physical etching methods.
Then, Fig. 8 I be refer to, there is provided bearing substrate 826.In the present embodiment, the material of bearing substrate 826 is for example It is (but not limited to)：Glass, plastic cement or other meet the baseplate material of demand.Then, bearing substrate 826 and substrate 800 are connect Close to organizing together, and form structure as shown in fig. 81.Specifically, in the present embodiment, bonding layer 825 and carrying base Plate 826 is in contact, and patterning organic layer 822 is in contact with bearing substrate 826.
Then, Fig. 8 J are refer to, remove substrate 800.In the present embodiment, remove substrate 800 method be, for example, (but It is not limited to)：Laser lift-off.So far, it has been substantially completed the making of light emitting diode 827.Specifically, in present embodiment In, light emitting diode 827 includes light emitting diode main body 819, catoptric arrangement 824, electrode 813, electrode 820 and bonding layer 825, Wherein catoptric arrangement 824 is configured in the side wall of light emitting diode main body 819, and the insulating barrier 823a including sequentially stacking and absolutely Edge layer 823b, the display device thereby including light emitting diode 827 can have good luminous efficiency.In addition, in this embodiment party In formula, light emitting diode 827 is that crystal covering type is micro-led.
It is noted that after substrate 800 is removed, it should be understood to the one skilled in the art that can root in any art Light emitting diode 827 is assembled in display device using any well known fabrication steps according to different applications.
In addition, in Fig. 8 A to Fig. 8 J embodiment, catoptric arrangement 824 is double-decker, that is, includes what is sequentially stacked Insulating barrier 823a and insulating barrier 823b, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 824 also may be used To be more than three layers of structure.For as an example, in one embodiment, catoptric arrangement 824 can also include another insulating barrier, institute The refractive index for stating another insulating barrier may differ from insulating barrier 823a refractive index and insulating barrier 823b refractive index.By way of further example For, in one embodiment, catoptric arrangement 824 may also comprise the insulating barrier 823a and insulating barrier of alternately repeatedly stacking 823b。
Fig. 9 A to Fig. 9 E are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.Fig. 9 A The step of by being carried out after hookup 8F.In addition, in Fig. 9 A to Fig. 9 E embodiment and Fig. 8 A to Fig. 8 J embodiment Same or like component is able to carry out using identical material or method, therefore hereinafter for the reality with Fig. 8 A to Fig. 8 J The description of mode identical is applied to will not be described in great detail, and mainly to be illustrated at difference between the two.
Refer to Fig. 9 A, to pattern organic layer 922 as mask, remove the insulation material layer 821a of part, part it is exhausted Edge material layer 821b and the first partial conductive-type semiconductor layer 816, to form insulating barrier 923a, insulating barrier 923b, exposure Go out the opening O of electrode 813 and expose the opening Q of electrode 820 and substrate 800.In the present embodiment, organic layer is patterned 922 forming method includes but is not limited to following steps：First, organic material layer is conformally formed on substrate 800 (not show Go out)；Then, patterning photoresist layer (not shown) is formed on organic material layer, then to pattern photoresist layer For mask, processing procedure is etched to remove the organic material layer for not being patterned photoresist layer and covering；Afterwards, will be patterned into Photoresist layer removes.In addition, in the present embodiment, the material of patterning organic layer 922 is, for example, (but not limited to)：Have The insulating materials of machine insulating materials, inorganic insulating material or organic-inorganic mixing.In the present embodiment, the exhausted of part is removed Edge material layer 821a, the insulation material layer 821b of part and the first partial conductive-type semiconductor layer 816 method is, for example, (but not limited to)：Dry etching method.
In the present embodiment, insulating barrier 923b configurations are on insulating barrier 923a, and insulating barrier 923a and insulating barrier 923b Configuration is in the side wall of light emitting diode main body 819.In addition, in the present embodiment, insulating barrier 923a and insulating barrier 923b mono- Composition catoptric arrangement 924 is played, to reflect the light sent by light emitting diode main body 819.It is noted that as above It is described, because light emitting diode main body 819 has about 30 degree to 85 degree of angle theta, thereby cause configuration in light emitting diode Catoptric arrangement 924 in the side wall of main body 819 can control the light that light emitting diode main body 819 is sent towards light emitting diode master The same side of body 819 is sent.
Then, Fig. 9 B are refer to, bonding layer 925 is formed in opening O and opening Q.In the present embodiment, bonding layer 925 material is, for example, (but not limited to)：Copper, tin or its alloy material.Forming the forming method of bonding layer 925 is included (but not It is limited to) following steps.First, filling opening O and the Q that is open layer of bonding material (not shown) are formed on substrate 900, it is formed Method is, for example, (but not limited to)：Electrochemistry galvanoplastic or evaporation.Then, opening O and the layer of bonding material being open outside Q are removed, To form bonding layer 925 in opening O and opening Q, wherein removing be open O and the layer of bonding material being open outside Q method for example It is (but not limited to)：Chemical mechanical milling method, chemical method for etching or physical etching methods.
Then, Fig. 9 C be refer to, there is provided bearing substrate 926.In the present embodiment, the material of bearing substrate 926 is for example It is (but not limited to)：Glass, plastic cement or the baseplate material for meeting demand.Then, bearing substrate 926 is engaged with substrate 800 pair Group together, and forms structure as shown in Figure 9 C.Specifically, in the present embodiment, bonding layer 925 and bearing substrate 926 are in contact, and patterning organic layer 922 is in contact with bearing substrate 926.
Then, Fig. 9 D are refer to, remove substrate 800.Due to remove substrate 800 method associated description in Fig. 8 A extremely At large illustrated in Fig. 8 J embodiment, therefore will not be repeated here.It is noted that in the present embodiment, lead to Removal substrate 800 is crossed, the bonding layer 925 of part can be exposed.
Then, Fig. 9 E are refer to, electrode 927 is formed on the bonding layer 925 being exposed through out.Specifically, in this implementation In mode, electrode 927 and electrode 820 are arranged respectively in the opposite sides of the first conductive-type semiconductor layer 816, and pass through engagement Layer 925 and be connected to each other.In the present embodiment, the material of electrode 927 is, for example, (but not limited to) titanium, aluminium or its alloy Material, the method for forming electrode 927 is, for example, (but not limited to)：Micro image etching procedure.It is noted that in present embodiment In, electrode 927 and electrode 820 are all, for example, N-type electrode, and the wherein conductive-type semiconductor layer 816 of electrode 820 and first has good Ohmic contact and act as Ohm contact electrode, electrode 927 act as connection electrode to be connected with outside line.
So far, it has been substantially completed the making of light emitting diode 928.Specifically, in the present embodiment, light emitting diode 928 include light emitting diode main body 819, catoptric arrangement 924, electrode 813, electrode 820, electrode 927 and bonding layer 925, wherein Catoptric arrangement 924 is configured in the side wall of light emitting diode main body 819, and including the insulating barrier 923a sequentially stacked and insulating barrier 923b, the display device thereby including light emitting diode 928 can have good luminous efficiency.In addition, in the present embodiment, Light emitting diode 928 is that crystal covering type is micro-led.
It is noted that after electrode 927 is formed, it should be understood to the one skilled in the art that can root in any art Light emitting diode 928 is assembled in display device using any well known fabrication steps according to different applications.
In addition, in Fig. 9 A to Fig. 9 E embodiment, catoptric arrangement 924 is double-decker, that is, includes what is sequentially stacked Insulating barrier 923a and insulating barrier 923b, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 924 also may be used To be more than three layers of structure.For as an example, in one embodiment, catoptric arrangement 924 can also include another insulating barrier, institute The refractive index for stating another insulating barrier may differ from insulating barrier 923a refractive index and insulating barrier 923b refractive index.By way of further example For, in one embodiment, catoptric arrangement 924 may also comprise the insulating barrier 923a and insulating barrier of alternately repeatedly stacking 923b。
In addition, earlier figures 8A to Fig. 8 J, Fig. 9 A to Fig. 9 E embodiment in, catoptric arrangement is by two insulating barrier institutes (catoptric arrangement 824 i.e. in Fig. 8 A to Fig. 8 J embodiment is made up of composition insulating barrier 823a and insulating barrier 823b, and Fig. 9 A are extremely Catoptric arrangement 924 in Fig. 9 E embodiment is made up of insulating barrier 923a and insulating barrier 923b), but the present invention is not limited to This.In other embodiments, catoptric arrangement can also be made up of an insulating barrier and a reflective metal layer.At other In embodiment, catoptric arrangement can also be made up of a reflective metal layer.Hereinafter, will be according to Figure 10 A to Figure 10 E, figure 11A to Figure 11 G is described in detail.
Figure 10 A to Figure 10 E are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.Figure The step of 10A after hookup 8D by carrying out.In addition, Figure 10 A to Figure 10 E embodiment and Fig. 8 A to Fig. 8 J embodiment party Same or like component is able to carry out using identical material or method in formula, therefore is hereinafter directed to and Fig. 8 A to Fig. 8 J The description of embodiment identical will not be described in great detail, and mainly to be illustrated at difference between the two.
Figure 10 A are refer to, first, insulation material layer 1020 are formed on substrate 800.Specifically, in present embodiment In, insulation material layer 1020 is conformally formed on substrate 800.In the present embodiment, the material example of insulation material layer 1020 (but not limited to) in this way：Silica or silicon nitride；The method for forming insulation material layer 1020 is, for example, (but not limited to)：Chemical gas Phase sedimentation or physical vapour deposition (PVD).
Then, Figure 10 B are refer to, to pattern photoresist layer 1021 as mask, remove the insulation material layer of part 1020, with the opening R for forming insulating barrier 1022 and exposing electrode 813.Specifically, in the present embodiment, insulating barrier 1022 configurations are in the side wall of light emitting diode main body 819.In the present embodiment, patterning photoresist layer 1021 is formed Method be, for example, (but not limited to)：Micro-photographing process.In the present embodiment, the method for removing the insulation material layer 1020 of part E.g. (but not limited to)：Dry etching method.
Then, Figure 10 C are refer to, remove patterning photoresist layer 1021.In the present embodiment, patterning is removed The method of photoresist layer 1021 is, for example, (but not limited to)：It is using the wet method of stripping solution or grey using plasma The dry method of change.
Followed by, electrode 1023 and conductor layer 1024 are formed, wherein electrode 1023 is covered on insulating barrier 1022 and with first Conductive-type semiconductor layer 816 contacts, and conductor layer 1024 is inserted opening R and contacted with electrode 813.Specifically, in this embodiment party In formula, electrode 1023 and conductor layer 1024 e.g. belong to same film layer and have phase same material.That is, in this embodiment party In formula, electrode 1023 and conductor layer 1024 are, for example, to be formed together in same micro image etching procedure.In the present embodiment, it is electric The material of pole 1023 and conductor layer 1024 is metal material, and it is, for example, (but not limited to)：Aluminium, silver or its alloy material.At this In embodiment, electrode 1023 is, for example, N-type electrode.
It is noted that in the present embodiment, insulating barrier 1022 and the electrode being configured on insulating barrier 1022 1023 form catoptric arrangement 1025 together, to reflect the light sent by light emitting diode main body 819.That is, In present embodiment, electrode 1023 has the function of transmission signal and reflection light simultaneously, therefore electrode 1023 also can be considered anti- Penetrate metal level.In addition, as it was noted above, because light emitting diode main body 819 has about 30 degree to 85 degree of angle theta, thereby So that catoptric arrangement 1025 of the configuration in the side wall of light emitting diode main body 819 can control light emitting diode main body 819 to be sent out The light gone out is sent towards the same side of light emitting diode main body 819.In addition, in the present embodiment, although insulating barrier 1022 with And electrode 1023 forms catoptric arrangement 1025 together, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 1025 can also only include electrode 1023.
Then, Figure 10 D be refer to, there is provided bearing substrate 1026.In the present embodiment, the material example of bearing substrate 1026 (but not limited to) in this way：Glass, plastic cement or other meet the baseplate material of demand.Then, by bearing substrate 1026 and substrate 800 Engagement forms structure as shown in figure 10e to organizing together.Specifically, in the present embodiment, electrode 1023 and carrying Substrate 1026 is in contact, and conductor layer 1024 is in contact with bearing substrate 1026.
Then, Figure 10 E are refer to, remove substrate 800.Due to remove substrate 800 method associated description in Fig. 8 A At large illustrated into Fig. 8 J embodiment, therefore will not be repeated here.So far, it has been substantially completed light emitting diode 1027 Making.Specifically, in the present embodiment, light emitting diode 1027 includes light emitting diode main body 819, catoptric arrangement 1025th, electrode 813 and conductor layer 1024, wherein catoptric arrangement 1025 are configured in the side wall of light emitting diode main body 819, and are wrapped The insulating barrier 1022 and electrode 1023 sequentially stacked is included, the display device thereby including light emitting diode 1027 can have good Luminous efficiency.In addition, in the present embodiment, light emitting diode 1027 is that crystal covering type is micro-led.
It is noted that after substrate 800 is removed, it should be understood to the one skilled in the art that can root in any art Light emitting diode 1027 is assembled in display device using any well known fabrication steps according to different applications.
In addition, in Figure 10 A to Figure 10 E embodiment, catoptric arrangement 1025 is double-decker, that is, includes sequentially stacking Insulating barrier 1022 and electrode 1023, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 1025 can also It is more than three layers of structure.For example, in one embodiment, catoptric arrangement 1025 can also include between insulating barrier 1022 with Another insulating barrier between electrode 1023, the refractive index of another insulating barrier are different from the refractive index of insulating barrier 1022.
Figure 11 A to Figure 11 G are the flow profiles of the manufacture method of the display device of another embodiment of the present invention.Figure The step of 11A after hookup 8C by carrying out.In addition, Figure 11 A to Figure 11 G embodiment and Fig. 8 A to Fig. 8 J embodiment party Same or like component is able to carry out using identical material or method in formula, therefore is hereinafter directed to and Fig. 8 A to Fig. 8 J The description of embodiment identical will not be described in great detail, and mainly to be illustrated at difference between the two.
Figure 11 A are refer to, first, is mask with the patterning photoresist layer 815 through hot-fluid, removes the first of part Conductive-type semiconductor material layer 810, the material of main part layer 811 of part and the second partial conductive-type semiconductor material layer 812, To form the first conductive-type semiconductor layer 1116, the conductive-type semiconductor layer 1118 of active layers 1117 and second.Specifically, exist In present embodiment, the first conductive-type semiconductor layer 1116, the conductive-type semiconductor layer 1118 of active layers 1117 and second are together Light emitting diode main body 1119 is formed, wherein light emitting diode main body 1119 has angle theta, and angle theta is about 30 degree to 85 degree, compared with Good about 60 degree.In addition, in the present embodiment, remove the first conductive-type semiconductor material layer 810, the main body of part of part The method of material layer 811 and the second partial conductive-type semiconductor material layer 812 is, for example, (but not limited to)：Dry-etching Method.In addition, in the present embodiment, the first conductive-type semiconductor layer 1116 is, for example, n type semiconductor layer, the second conductivity type is partly led Body layer 1118 is, for example, p type semiconductor layer.
Followed by, the first conductive-type semiconductor layer 1116, the conductive-type semiconductor layer of active layers 1117 and second are being formed After 1118, the patterning photoresist layer 815 through hot-fluid is removed.In the present embodiment, the patterning light through hot-fluid is removed The method for causing resist layer 815 is, for example, (but not limited to)：Using stripping solution wet method or utilize plasma ashing) Dry method.
Then, Figure 11 B are refer to, electrode 1120 is formed on substrate 800.Specifically, in the present embodiment, electrode 1120 contact with the first conductive-type semiconductor layer 1116.In addition, in the present embodiment, electrode 1120 contacts with substrate 800. In present embodiment, the material of electrode 1120 is, for example, (but not limited to)：Titanium aluminium (Ti/Al) alloy, Ti or Al, form electrode 1120 method is, for example, (but not limited to)：Micro image etching procedure.In addition, in the present embodiment, electrode 1120 is, for example, N-type Electrode.
Then, Figure 11 C are refer to, in formation insulation material layer 1121 on substrate 800.Specifically, in present embodiment In, insulation material layer 1121 is conformally formed on substrate 800.In the present embodiment, the material example of insulation material layer 1121 (but not limited to) in this way：Silica or silicon nitride；The method for forming insulation material layer 1121 is, for example, (but not limited to)：Chemical gas Phase sedimentation or physical vaporous deposition.
Then, Figure 11 D are refer to, to pattern photoresist layer 1122 as mask, remove the insulation material layer of part 1121, with the opening U for forming insulating barrier 1123 and exposing electrode 813.Specifically, in the present embodiment, insulating barrier 1123 configurations are in the side wall of light emitting diode main body 1119.In the present embodiment, patterning photoresist layer is formed 1122 method is, for example, (but not limited to)：Micro-photographing process.In the present embodiment, the insulation material layer 1121 of part is removed Method is, for example, (but not limited to)：Dry etching method.
Then, Figure 11 E are refer to, remove patterning photoresist layer 1122.In the present embodiment, patterning is removed The method of photoresist layer 1122 is, for example, (but not limited to)：It is using the wet method of stripping solution or grey using plasma The dry method of change.
Followed by, formed conductor layer 1124, wherein conductor layer 1124 be covered on insulating barrier 1123 and insert opening U and with electricity Pole 813 contacts.In the present embodiment, the material of conductor layer 1124 is metal material, and it is, for example, (but not limited to)：Aluminium, silver Or its alloy material.In the present embodiment, the method for forming conductor layer 1124 is, for example, (but not limited to)：Lithography system Journey.
It is noted that in the present embodiment, electrode 813 and conductor layer 1124 are all, for example, P-type electrode, wherein electricity The conductive-type semiconductor layer 1118 of pole 813 and second has good Ohmic contact and act as Ohm contact electrode, conductor layer 1124 act as connection electrode to be connected with outside line.On the other hand, in the present embodiment, insulating barrier 1123 and The conductor layer 1124 being configured on insulating barrier 1123 forms catoptric arrangement 1125 together, to reflect by light emitting diode main body 1119 light sent.That is, in the present embodiment, conductor layer 1124 has transmission signal and reflection light simultaneously Function, therefore conductor layer 1124 also can be considered reflective metal layer.In addition, as it was noted above, due to light emitting diode main body 1119 have about 30 degree to 85 degree of angle theta, thereby cause reflection of the configuration in the side wall of light emitting diode main body 1119 Structure 1125 can control the light that light emitting diode main body 1119 is sent to be sent towards the same side of light emitting diode main body 1119.
Then, Figure 11 F be refer to, there is provided bearing substrate 1126.In the present embodiment, the material example of bearing substrate 1126 (but not limited to) in this way：Glass, plastic cement or the baseplate material for meeting demand.Then, bearing substrate 1126 is engaged with substrate 800 To organizing together, and form structure as shown in fig. 11f.Specifically, in the present embodiment, conductor layer 1124 and carrying base Plate 1126 is in contact.
Then, Figure 11 G are refer to, remove substrate 800.Due to remove substrate 800 method associated description in Fig. 8 A At large illustrated into Fig. 8 J embodiment, therefore will not be repeated here.So far, it has been substantially completed light emitting diode 1127 Making.Specifically, in the present embodiment, light emitting diode 1127 includes light emitting diode main body 1119, catoptric arrangement 1125th, electrode 813 and electrode 1120, wherein catoptric arrangement 1125 are configured in the side wall of light emitting diode main body 1119, and are wrapped The insulating barrier 1123 sequentially stacked and conductor layer 1124 are included, the display device thereby including light emitting diode 1127 can have good Luminous efficiency.In addition, in the present embodiment, light emitting diode 1127 is that crystal covering type is micro-led.
It is noted that after substrate 800 is removed, it should be understood to the one skilled in the art that can root in any art Light emitting diode 1127 is assembled in display device using any well known fabrication steps according to different applications.
In addition, in Figure 11 A to Figure 11 G embodiment, catoptric arrangement 1125 is double-decker, that is, includes sequentially stacking Insulating barrier 1123 and conductor layer 1124, but the present invention is not limited thereto.In other embodiments, catoptric arrangement 1125 also may be used To be more than three layers of structure.For example, in one embodiment, catoptric arrangement 1125 can also include between insulating barrier 1123 Another insulating barrier between conductor layer 1124, the refractive index of another insulating barrier are different from the refractive index of insulating barrier 1123.
In summary, in the display device of the present invention, by a direction perpendicular to a substrate, the phase of light emitting diode Metal level of the distance between two surfaces to setting and parallel to substrate with being electrically connected at transistor and light emitting diode Upper surface and the ratio of the distance between substrate be more than or equal to 0.25 and less than or equal to 6, thereby may be such that display device has There are good luminous efficiency or satisfactory texture intensity.In addition, the display device obtained by the manufacture method of the display device of the present invention Including the catoptric arrangement being configured in the side wall of light emitting diode main body so that display device can have good luminous efficiency.
Although the present invention is disclosed as above with embodiment, so it is not limited to the present invention, any affiliated technology neck Technical staff in domain, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore the guarantor of the present invention Shield scope is worked as to be defined depending on as defined in claim.

Claims (20)

  1. A kind of 1. display device, it is characterised in that including：
    Substrate；
    Transistor, it is configured on the substrate；
    Metal level, it is configured on the transistor and is electrically connected at the transistor, wherein perpendicular to the side of the substrate Upwards, there is the first distance between the upper surface of the metal level and the substrate；And
    Light emitting diode, it is configured on the metal level, wherein the light emitting diode includes light emitting diode main body and electrode, The light emitting diode main body is electrically connected at the metal level by the electrode, and the light emitting diode main body has the One surface and the second surface relative with the first surface, the first surface and the second surface are parallel to the base Plate, and in said direction, there is second distance between the first surface and the second surface, wherein the second distance Ratio with first distance is more than or equal to 0.25 and less than or equal to 6.
  2. 2. display device according to claim 1, wherein the second distance and the ratio of first distance be more than Equal to 0.6 and less than or equal to 5.
  3. 3. display device according to claim 1, wherein the light emitting diode also includes cushion, it is configured at the hair In optical diode main body, wherein the top surface of the cushion has multiple grooves.
  4. 4. display device according to claim 1, wherein the light emitting diode main body includes：
    First conductive-type semiconductor layer；
    Active layers, it is configured on first conductive-type semiconductor layer；And
    Second conductive-type semiconductor layer, it is configured in the active layers.
  5. 5. display device according to claim 4, wherein second conductive-type semiconductor layer has the second surface, And the second surface has multiple grooves.
  6. 6. display device according to claim 1, wherein the light emitting diode also includes catoptric arrangement, it is configured at described In the side wall of light emitting diode main body.
  7. 7. display device according to claim 6, wherein the catoptric arrangement includes：
    First insulating barrier；And
    Second insulating barrier, it is configured on first insulating barrier, wherein the refractive index of first insulating barrier is different from described the The refractive index of two insulating barriers.
  8. 8. display device according to claim 6, wherein the catoptric arrangement includes reflective metal layer.
  9. A kind of 9. manufacture method of display device, it is characterised in that including：
    Light emitting diode main body is formed on substrate；And
    Catoptric arrangement is formed in the side wall of the light emitting diode main body.
  10. 10. the manufacture method of display device according to claim 9, wherein forming the method for the light emitting diode main body Including：
    The first conductive-type semiconductor material layer, active material layer and the second conductive-type semiconductor are sequentially formed on the substrate Material layer；
    The first patterning photoresist layer is formed in the second conductive-type semiconductor material layer, wherein first pattern Change photoresist layer to be formed by half mode (half tone) processing procedure；
    Hot-fluid (reflow) processing procedure is carried out to the described first patterning photoresist layer；And
    Using the first patterning photoresist layer through hot-fluid as mask, the first conductive-type semiconductor material of part is removed Layer, the active material layer of part and partial the second conductive-type semiconductor material layer, to form the first conductivity type Semiconductor layer, active layers and the second conductive-type semiconductor layer.
  11. 11. the manufacture method of display device according to claim 10, wherein forming the method for the catoptric arrangement includes：
    First material layer and second material layer are sequentially formed in the light emitting diode main body；
    Using the second patterning photoresist layer as mask, the first etch process is carried out to the second material layer；And
    Using the described second patterning photoresist layer as mask, the second etch process is carried out to the first material layer.
  12. 12. the manufacture method of display device according to claim 11, wherein the material of the first material layer is insulation Material, the material of the second material layer are metal material, and first etch process is wet etch process, and described second Etch process is dry etch process.
  13. 13. the manufacture method of display device according to claim 11, wherein the first material layer and second material The material of the bed of material is insulating materials, and the refractive index of the first material layer is different from the refractive index of the second material layer, and institute It is dry etch process to state the first etch process and second etch process, wherein in the dry etch process, it is described The rate of etch of first material layer is less than the rate of etch of the second material layer.
  14. 14. the manufacture method of display device according to claim 11, wherein after the catoptric arrangement is formed, also wrap Include：
    Form conductor layer on substrate, the conductor layer is covered in the second patterning photoresist layer and described second led In electric type semiconductor layer；And
    Remove the second patterning photoresist layer and be covered in described in the second patterning photoresist layer Conductor layer, and the conductor layer being covered on second conductive-type semiconductor layer is left, led wherein being covered in described second The conductor layer in electric type semiconductor layer is as first electrode.
  15. 15. the manufacture method of display device according to claim 14, wherein after the first electrode is formed, in addition to Second electrode is formed on first conductive-type semiconductor layer.
  16. 16. the manufacture method of display device according to claim 10, wherein before the light emitting diode main body is formed, Also include forming first electrode in the second conductive-type semiconductor material layer, wherein the first patterning photoresist Layer covers the first electrode.
  17. 17. the manufacture method of display device according to claim 16, wherein after the light emitting diode main body is formed, Also it is included on the substrate and forms second electrode, the second electrode contacts with first conductive-type semiconductor layer.
  18. 18. the manufacture method of display device according to claim 17, wherein forming the method for the catoptric arrangement includes：
    After the second electrode is formed, the first insulation material layer and the second insulation material layer are sequentially formed on substrate, wherein The refractive index of first insulation material layer is different from the refractive index of second insulation material layer；And
    To pattern organic layer as mask, first insulation material layer of part and partial second insulating materials are removed Layer, with the multiple openings for forming the catoptric arrangement and exposing the first electrode and the second electrode.
  19. 19. the manufacture method of display device according to claim 17, wherein forming the method for the catoptric arrangement includes：
    After the second electrode is formed, insulation material layer is formed on substrate；
    To pattern photoresist layer as mask, the insulation material layer of part is removed, to form insulating barrier and exposure Go out the opening of the first electrode；And
    Conductor layer is formed, the insulating barrier is covered and inserts the opening and contacted with the first electrode.
  20. 20. the manufacture method of display device according to claim 16, wherein forming the method for the catoptric arrangement includes：
    Insulation material layer is formed on substrate；
    To pattern photoresist layer as mask, the insulation material layer of part is removed, to form insulating barrier and exposure Go out the opening of the first electrode；And
    Form second electrode and conductor layer, wherein the second electrode cover the insulating barrier and with the first conductive-type semiconductor layer Contact, the conductor layer are inserted the opening and contacted with the first electrode.
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US16/053,786 US10483436B2 (en) 2016-08-05 2018-08-02 Display apparatus and manufacturing method thereof
US16/595,500 US11031528B2 (en) 2016-08-05 2019-10-08 Display apparatus and manufacturing method thereof
US17/246,722 US11715816B2 (en) 2016-08-05 2021-05-03 Display apparatus and manufacturing method thereof
US18/332,769 US20230327053A1 (en) 2016-08-05 2023-06-12 Display apparatus and manufacturing method thereof

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