CN117153792A - Packaging structure, processor and server - Google Patents
Packaging structure, processor and server Download PDFInfo
- Publication number
- CN117153792A CN117153792A CN202310575450.2A CN202310575450A CN117153792A CN 117153792 A CN117153792 A CN 117153792A CN 202310575450 A CN202310575450 A CN 202310575450A CN 117153792 A CN117153792 A CN 117153792A
- Authority
- CN
- China
- Prior art keywords
- chip
- material layer
- thermal interface
- interface material
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004806 packaging method and process Methods 0.000 title abstract description 13
- 239000000463 material Substances 0.000 claims abstract description 126
- 239000000758 substrate Substances 0.000 claims description 37
- 230000007704 transition Effects 0.000 claims description 13
- 238000010276 construction Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 25
- 230000017525 heat dissipation Effects 0.000 abstract description 20
- 239000002245 particle Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000032798 delamination Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000003292 glue Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 239000011236 particulate material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The package structure is used for packaging a chip and comprises a chip and a heat conducting sheet, wherein the chip and the heat conducting sheet are arranged in a stacked mode, a thermal interface material layer is filled between the chip and the heat conducting sheet, and the chip and the heat conducting sheet are in heat conduction connection through the thermal interface material layer. When the heat conducting fin is specifically arranged, one side of the heat conducting fin, which faces the chip, is provided with a smooth protruding structure, and the thermal interface material layer is at least partially filled between the protruding structure and the chip, so that the thermal interface material layer at least partially wraps the protruding structure. It can be seen from the above description that the bump structure is provided on the heat conductive sheet, the distance between the chip and the heat conductive sheet is reduced, so that the thermal interface material layer filled between the heat conductive sheet and the chip forms a structure with thin middle and thick edge, thereby improving the heat dissipation effect of the chip, and meanwhile, the connection strength of the thermal interface material layer when the chip is warped is improved through the structure with thicker edge, thereby improving the heat dissipation effect.
Description
Technical Field
The present application relates to the field of circuit boards, and in particular, to a packaging structure, a processor, and a server.
Background
Thermal interface materials (TIM, thermal Interface Material) are used to coat between heat dissipating devices and heat generating devices to reduce the thermal contact resistance therebetween. All the surfaces have roughness, when the two surfaces are contacted together, the two surfaces cannot be completely contacted together, some air gaps are always mixed in the surfaces, and the heat conductivity coefficient of air is very small, so that the interface contact thermal resistance is relatively large. The air gap can be filled by using the thermal interface material, so that the contact thermal resistance can be reduced, and the heat dissipation performance can be improved. Because of the feature that the thermal interface fills the interface gap, its overall thickness is typically relatively low. Reducing contact resistance is its primary application purpose. As shown in fig. 1, there is a very thin layer 2 of thermal interface material between the chip 3 and the heat sink 1, approximately between 25-100 microns. Both the heat sink 1 and the thermal interface material layer 2 are cured at a high temperature, and the thermal interface material layer 2 maintains a relatively uniform thickness when cured at a high temperature. In the large chip package, since the thermal expansion coefficient of the substrate 4 is higher than that of the chip 3, as shown in fig. 2, at room temperature or working temperature, the chip 3 and the substrate 4 form a bend, which causes the thermal interface material layer 2 to be in a pressed state at the middle position without causing delamination failure, while at the corner position, the pulling deformation of the thermal interface material layer 2 is large to cause delamination of the material itself, and the delamination of the corner thermal interface material layer 2 affects the heat transfer efficiency of the thermal interface material layer 2.
Disclosure of Invention
The application provides a packaging structure, a processor and a server, which are used for improving the heat dissipation effect of a chip.
In a first aspect, there is provided a package structure for packaging a chip, which includes a chip and a thermally conductive sheet, and is provided in a stacked arrangement between the chip and the thermally conductive sheet, and a thermal interface material layer is filled between the chip and the thermally conductive sheet, through which the chip and the thermally conductive sheet are thermally connected. When the heat conducting fin is specifically arranged, one side of the heat conducting fin, which faces the chip, is provided with a smooth protruding structure, and the thermal interface material layer is at least partially filled between the protruding structure and the chip, so that the thermal interface material layer at least partially wraps the protruding structure. It can be seen from the above description that the bump structure is provided on the heat conductive sheet, the distance between the chip and the heat conductive sheet is reduced, so that the thermal interface material layer filled between the heat conductive sheet and the chip forms a structure with thin middle and thick edge, thereby improving the heat dissipation effect of the chip, and meanwhile, the connection strength of the thermal interface material layer when the chip is warped is improved through the structure with thicker edge, thereby improving the heat dissipation effect.
When the smooth protruding structure is specifically arranged, the surface of the protruding structure facing the chip is a continuous curved surface or a continuous plane. The surface of the convex structure facing the chip can be a plurality of continuous curved surfaces or different combinations of curved surfaces and planes.
In a specific embodiment, the bump structure is an arcuate bump, and the face of the bump structure facing the chip is an arcuate face.
In a specific embodiment, the protruding structure is a table-shaped structure, and the side surface of the protruding structure is connected with the side connected with the heat conducting fin through a first arc-shaped transition surface, and the side surface of the protruding structure is connected with the side, facing the chip, of the protruding structure through a second arc-shaped transition surface. The first arc-shaped transition surface is a concave curved surface, the second arc-shaped transition surface is a convex curved surface, so that the convex structure faces the surface of the chip and the side wall of the convex structure, and the side wall of the convex structure and the heat conducting fin can be smoothly transited without inflection points, the probability of generating gaps is reduced when the thermal interface material layer is coated, and the coating effect is improved.
In a specific embodiment, a surface of the bump structure facing the chip is a first surface, and a surface of the chip facing the thermally conductive sheet is a second surface, wherein a ratio of the first surface to the second surface is not less than 1/2. The area of the thermal interface material layer is guaranteed through the proportion of the first surface to the second surface, and the heat dissipation effect is improved.
When a thermal interface material layer is specifically provided, the thermal interface material layer encapsulates the raised structures. Therefore, the thermal interface material layer forms a structure with a thin middle and a thick edge, and the heat dissipation effect and the connection strength are further improved.
When the thermal interface material layer is specifically arranged, the minimum thickness of the thermal interface material layer is d, and the maximum thickness of the thermal interface material layer is h, wherein d/h is between 1/4 and 1/10.
Wherein the thermal interface material layer has a minimum thickness d of 25 μm. Thereby improving the heat dissipation effect of the chip.
When the protruding structure is specifically arranged, the vertical projection of the protruding structure on the first surface is located in the vertical projection of the chip on the first surface, wherein the first surface is the arrangement surface of the chip. Thereby ensuring that when the thermal interface material layer is arranged, enough pressure can be provided to ensure that the thermal interface material layer is respectively connected with the chip and the heat conducting fin.
When the protruding structure is specifically arranged, the protruding structure and the heat conducting fin are of an integrated structure. The protruding structure is a protruding part extending out of the heat conducting fin. Of course, a structure in which the convex structure and the heat conductive sheet are separated may be adopted.
When the packaging structure is specifically arranged, the packaging structure further comprises a substrate, wherein the chip is fixed on the substrate, and the heat conducting fin is fixedly connected with the substrate and packages the chip.
When the heat conducting fin is fixedly connected with the substrate, the heat conducting fin is fixedly connected with the substrate through bonding glue.
When the chip is fixed on the substrate, the chip is connected with the substrate through welding balls.
In a second aspect, there is provided a processor comprising the package structure of any of the above. Through set up protruding structure on the conducting strip, reduced the interval distance between chip and the conducting strip to make the thermal interface material layer that fills between conducting strip and the chip form a middle thin, the thick structure in border, thereby improve the radiating effect of chip, simultaneously, improved the joint strength of thermal interface material layer when the chip warp through the thicker structure in border, and then improved the radiating effect.
A third aspect provides a server comprising the package structure of any one of the above. Through set up protruding structure on the conducting strip, reduced the interval distance between chip and the conducting strip to make the thermal interface material layer that fills between conducting strip and the chip form a middle thin, the thick structure in border, thereby improve the radiating effect of chip, simultaneously, improved the joint strength of thermal interface material layer when the chip warp through the thicker structure in border, and then improved the radiating effect.
Drawings
FIG. 1 is a schematic diagram of a prior art package structure;
FIG. 2 is a reference diagram of a prior art package structure;
fig. 3 is a schematic structural diagram of a package structure according to an embodiment of the present application;
fig. 4 is a schematic structural view of a bump structure of a package structure according to an embodiment of the present application;
fig. 5 is a schematic structural view of another bump structure of the package structure according to the embodiment of the present application;
fig. 6 is a schematic structural diagram of another bump structure of the package structure according to the embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings.
In order to facilitate understanding of the package structure provided by the embodiment of the present application, an application scenario of the package structure provided by the embodiment of the present application is first described, where the package structure is applied to a processor or a server. The package structure comprises a chip 40 and a heat conducting fin 10, and the heat conducting fin 10 is used for radiating heat of the chip 40. The following describes the package structure provided by the embodiment of the present application in detail with reference to the accompanying drawings.
As shown in fig. 3, the package structure provided in the embodiment of the present application includes a substrate 50, where the substrate 50 is used for carrying the chip 40. When the chip 40 is fixed on the substrate 50, the chip 40 is soldered on the substrate 50 by solder balls, and then the plastic package material is filled between the chip 40 and the substrate 50 to fix the chip 40 on the substrate 50.
It should be understood, of course, that the substrate 50 illustrated in fig. 3 is only a specific embodiment of the carrying chip 40, and other structures having a supporting function may be used to carry the chip 40 in the embodiment of the present application, such as a printed circuit board or a general circuit board.
With continued reference to fig. 3, in the package structure provided in the embodiment of the present application, a heat conducting sheet 10 is further provided, and the heat conducting sheet 10 is in heat conducting connection with the chip 40, and is used for reducing the temperature of the chip 40 during operation. The thermally conductive sheet 10 may take various forms, and in a specific embodiment, as shown in fig. 3, the thermally conductive sheet 10 may include a flat plate-like structure, and side walls connected to the flat plate-like structure, thereby forming a cap-like structure. With continued reference to fig. 3, the thermally conductive sheet 10 is fixedly connected to the substrate 50, and the thermally conductive sheet 10 covers the chip 40. When the heat conducting strip 10 is connected with the substrate 50, a fixed connection mode is adopted between the heat conducting strip 10 and the substrate 50, specifically, the side wall of the heat conducting strip 10 is adhered and fixed on the substrate 50 through adhesive glue, so that the heat conducting strip 10 is supported by the substrate 50 to form a relatively stable structure with the chip 40. It should be understood, of course, that the above-mentioned fixed connection of the heat conductive sheet 10 and the substrate 50 illustrated in fig. 3 is only a specific embodiment of the heat conductive sheet 10, and the heat conductive sheet 10 provided in the embodiment of the present application may be disposed in a manner not fixed to the substrate 50.
With continued reference to fig. 3, when the thermally conductive sheet 10 is fixed on the substrate 50, the flat plate-like structure of the thermally conductive sheet 10 is opposite to the position of the chip 40 with a certain gap therebetween, and in order to improve the thermally conductive effect of the thermally conductive sheet 10, a thermal interface material layer 30 is provided between the thermally conductive sheet 10 and the chip 40 as a thermally conductive medium to transfer the heat generated by the chip 40 to the thermally conductive sheet 10 for heat dissipation.
The thermal interface material layer 30 is capable of conducting heat and has a certain colloidal property in a normal state so that the thermal interface material layer 30 can fill up the gap between the chip 40 and the flat plate-like structure when the heat conducting sheet 10 is fixed.
The thermal interface material layer 30 provided in the embodiment of the present application may include two parts, and one part is nano good heat conductive particles, and the heat conductive particles are used as heat conductive materials to transfer the heat of the chip 40 to the heat conductive sheet 10. And the other part is a polymer layer which wraps the heat-conducting particles, has certain adhesive force and can be cured at high temperature. Therefore, when the thermal interface material layer 30 is pressed by the thermal conductive sheet 10 toward the chip 40, the thermal interface material layer 30 can fill up the gap between the thermal conductive sheet 10 and the chip 40 by the pressing force, and then the thermal interface material layer 30 can be cured by heating, thereby adhesively fixing the chip 40 and the thermal conductive sheet 10 together. The thermally conductive particles may be metal particles, or metal oxide particulate materials, for example. In alternative embodiments, the material of the thermally conductive particles may comprise alumina. The size of the heat conducting particles is as uniform as possible, the diameter is between 25 and 30 mu m, such as different spheres with diameters of 25 mu m, 26 mu m, 28 mu m, 30 mu m and the like, and the diameter of the heat conducting particles can be further reduced if the process is further improved. In the process of providing the heat conductive sheet 10 and the thermal interface material layer 30 on the chip 40, the thermal interface material layer 30 is first coated on the chip 40, and then the heat conductive sheet 10 is covered on the chip 40 and fixedly connected with the substrate 50, and when the heat conductive sheet 10 is pressed, the thermal interface material layer 30 is also pressed, thereby bonding the chip 40 and the heat conductive sheet 10 together.
As can be seen from the above description of the thermal interface material layer 30, when the thermal interface material layer 30 is used as a heat conducting medium, it is first required to connect with the chip 40 and the heat conducting sheet 10 to ensure that heat can be transferred to the heat conducting sheet 10 through the thermal interface material layer 30. In order to ensure the connection strength of the thermal interface material layer 30, it is necessary that the thermal interface material layer 30 has a certain thickness, and for the thermal interface material layer 30, the greater the thickness thereof, the greater the thermal resistance of the thermal interface material layer 30, which affects the heat conduction efficiency of the thermal interface material layer 30. In use, the package structure is configured such that the die 40 and the substrate 50 form a bend at room or operating temperature due to the higher thermal expansion coefficient of the substrate 50 than the die 40. For the thermal interface material layer 30, the thermal interface material layer 30 is pressed at the middle position, and the thermal interface material layer 30 at the edge position is pulled to deform, so that the thermal interface material layer 30 is layered with the heat conducting sheet 10 or the chip 40, thereby influencing the heat transfer efficiency of the thermal interface material layer 30.
To improve this, the package structure provided in the embodiment of the present application improves the thickness of the thermal interface material layer 30 disposed between the chip 40 and the thermally conductive sheet 10. In detail, a rounded convex structure 20 is disposed on the heat conducting strip 10 according to the embodiment of the present application, where the rounded refers to that the surface of the convex structure 20 is a rounded surface, and a continuous curved surface without corners is formed between the surfaces and on the surface of the convex structure 20 adjacent to the heat conducting strip 10 in an arc transition manner. The bump structure 20 is provided on the heat conductive sheet 10 on a side facing the chip 40, and in the structure shown with reference to fig. 3, the bump structure 20 is provided on a flat plate-like structure on a side facing the chip 40, and the bump structure 20 is opposed to the chip 40. The bump structure 20 protrudes from the surface of the heat conductive sheet 10 toward the chip 40, so that the distance between the chip 40 and the heat conductive sheet 10 can be reduced. When the thermal interface material layer 30 is disposed, the thermal interface material layer 30 is at least partially filled between the bump structure 20 and the chip 40, so that the thermal interface material layer 30 can at least partially encapsulate the bump structure 20 after being pressed by the bump structure 20, and when the thermal interface material layer 30 is cured, the thermal interface material layer 30 forms a layer structure with uneven thickness, more specifically, the thermal interface material layer 30 forms a structure with thick edges and thin centers.
In the embodiment of the present application, the surface of the rounded bump structure 20 facing the chip 40 is a continuous curved surface or a flat surface. In the case of specifically forming the above-described bump structure 20 having a continuous curved surface or plane surface, bump structures 20 having different shapes may be used, as shown in fig. 4, in which fig. 4, the bump structure 20 is shown as an arc-shaped bump structure 20, and the surface of the bump structure 20 facing the chip 40 is an arc-shaped surface. With continued reference to fig. 4, the bump structure 20 shown in fig. 4 is a half-ellipsoidal bump, and the thickness of the bump structure 20 in the direction toward the chip 40 is a short axial distance of an ellipsoid, and the face of the bump structure 20 toward the chip 40 is an ellipsoid. Of course, the arcuate raised structures 20 may also be less hemispherical structures or other raised structures 20 that form arcuate surfaces. In alternative embodiments, the raised structures 20 may also be spherical surfaces, such as hemispheres.
In addition to the structure shown in fig. 4, a structure shown in fig. 5 may be adopted, and in the structure shown in fig. 5, the rounded protrusion structure 20 is a polyhedral structure including a top surface and a side surface, wherein the top surface refers to a surface of the protrusion structure 20 facing the chip 40, the side surface refers to a surface connected to the top surface, and the side surface is connected to the heat conductive sheet 10. In specific implementation, the polyhedral structure may be a cuboid, a trapezoid, a mesa or other different structures, but no matter which structure is adopted, an arc transition is adopted between the side surface and the top surface of the protrusion structure 20, and between the side surface of the protrusion structure 20 and the surface of the heat conducting strip 10, specifically, one side of the protrusion structure 20 connected with the heat conducting strip 10 is connected with the side surface of the protrusion structure 20 through the first arc transition surface 23, and one side of the protrusion structure 20 facing the chip 40 is connected with the second arc transition surface 22. The first arc-shaped transition surface 23 is a concave curved surface, and the second arc-shaped transition surface 22 is a convex curved surface, so that the surface of the convex structure 20 facing the chip 40 and the side wall of the convex structure 20, and the side wall of the convex structure 20 and the heat conducting fin 10 have no inflection points, and can be smoothly transited. The side of the mesa-shaped structures 'bump structures 20 facing the chip 40 may be of various shapes, such as circular, square, or even triangular, but in alternative embodiments, the side of the mesa-shaped structures' bump structures 20 facing the chip 40 is considered to be rounded with rounded patterns without corners, or rounded with arcs on corners of shapes such as square or triangular. The sides of the mesa structure may not be perpendicular to its bottom or top surface, but rather may be of an angular design like that of a cone.
When the thermal interface material layer 30 is coated, the surface of the thermal interface material layer 30, which is in contact with the bump structure 20, is a smooth curved surface or a smooth plane, so that when the bump structure 20 is extruded, the thermal interface material layer 30 and the bump structure 20 can be tightly attached to each other, gaps are avoided, and the heat dissipation effect can be improved.
It should be understood that the above-described fig. 4 and 5 merely exemplify two specific bump structures 20, and any bump structure 20 having a continuous curved surface or plane may be used as the bump structure 20 in the embodiment of the present application. In addition, when the protrusion structure 20 is specifically provided, the protrusion structure 20 may be formed integrally with the heat conductive sheet 10 or may be formed as a separate structure. In the case of a split structure, the bump structure 20 may be thermally connected to the heat conducting sheet 10 through a thermal conductive adhesive, and the bump structure 20 may be made of the same material as the heat conducting sheet 10, or may be made of a material different from the heat conducting sheet 10 but having a similar or higher thermal conductivity. When the integral structure is adopted, the protrusion structure 20 is one protrusion integrally formed in preparing the heat conductive sheet 10, and the heat conductive sheet 10 with the protrusion can be directly formed by stamping or injection molding.
As can be seen from fig. 3, the bump structure 20 is opposite to the chip 40, and there is also a limit to the size of the bump structure 20 in the embodiment of the present application. In order to conveniently define the dimensions of the bump structure 20, a first surface a is introduced in the embodiment of the present application, which is the surface on which the chip 40 is disposed, i.e., the surface on which the chip 40 is disposed on the substrate 50, as shown in fig. 3. The position and size of the bump structure 20 are required to satisfy: the perpendicular projection of the bump structure 20 on the first side a is located within the perpendicular projection of the chip 40 on the first side a. When such a structure is employed, the dimension of the side of the bump structure 20 facing the chip 40 is smaller than the dimension of the top surface of the chip 40 (the side of the chip 40 facing the heat conductive sheet 10), and at this time, the thermal interface material layer 30 wraps around the bump structure 20 and can be connected to the heat conductive sheet 10. The thermal interface material at the edge can also be subjected to the pressing force when the thermal interface material layer 30 is pressed by the thermal conductive sheet 10, and the thermal interface material layer 30 can be made to sufficiently cover the upper surface of the chip 40 and cover a part of the bump structure 20 of the thermal conductive sheet 10 by the sufficient pressing force. Of course, it is also possible to use a manner that the vertical projection portion of the bump structure 20 on the first surface a is located outside the vertical projection of the chip 40 on the first surface a, for example, the vertical projection of the bump structure 20 is larger than the vertical projection of the chip 40 on the first surface a, and in this case, as shown in fig. 6, the dimension of the surface of the bump structure 20 facing the chip 50 is larger than the top surface of the chip 40. Since the entire surface of the bump structure 20 facing the chip 40 is an arc surface, even when the bump structure 20 is disposed in the above manner, it is possible to achieve that the thermal conductive sheet 10 provides a certain pressing force to press and connect the thermal interface material layer 30 with the chip 40 and the thermal conductive sheet 10, respectively. In addition to the above manner, a manner in which the perpendicular projection of the bump structure 20 on the first surface a overlaps with the perpendicular projection of the chip 40 on the first surface a may be adopted, and in this case, the dimension of the surface of the bump structure 20 facing the chip 40 is the same as the dimension of the top surface of the chip 40. When an arc-shaped convex structure is adopted, a thermal interface material layer with a thin middle and a thin edge can be formed.
In the specific limitation of the size of the thermal interface material layer 30, as shown in fig. 4 and 5, since the thickness of the thermal interface material layer 30 at the middle position is relatively thin due to the extrusion of the bump structure 20, the heat conduction efficiency is relatively high, and in order to improve the heat dissipation effect, the larger the area of the thermal interface material layer 30 is, the better, and therefore, in the bump structure 20 shown in fig. 4, the radian of the arc surface is relatively small; in the structure shown in fig. 5, the dimensions of the rectangular-shaped raised structures 20 are defined, specifically: the surface of the bump structure 20 facing the chip 40 is a first surface 21, and the surface of the chip 40 facing the heat conducting sheet 10 is a second surface 41, wherein the ratio of the first surface 21 to the second surface 41 is not less than 1/2, such as 1/2, 3/4, 4/5, etc. The ratio of the first surface 21 to the second surface 41 refers to the ratio of the length and the width, that is, the length of the first surface 21 is not less than 1/2 of the length of the second surface 41, and the width of the first surface 21 is not less than 1/2 of the width of the second surface 41. The area of the thermal interface material layer 30 is ensured by the ratio of the first surface 21 to the second surface 41, and the heat dissipation effect is improved.
The thermal interface material layer 30 encapsulates the raised structures 20 or partially encapsulates the raised structures 20 when the thermal interface material layer 30 is applied. In the structure shown in fig. 4 and 5, the thermal interface material layer 30 entirely surrounds the bump structure 20 and is partially connected to the heat conductive sheet 10. The thermal interface material layer 30 forms a layer structure of increasing thickness extending from the middle to the edges. When the thermal interface material layer 30 with the shape is adopted, the thermal interface material layer 30 contacting with the middle position of the chip 40 is thinner, and the thickness of the thermal interface material layer 30 contacting with the edge of the chip 40 is thicker, so that the heat transfer efficiency can be improved through the thinner thermal interface material layer 30 in the middle when conducting heat, and in the case that the thermal interface material layer 30 and the chip 40 are layered when the substrate 50 and the chip 40 are warped, the thickness of the edge of the thermal interface material layer 30 is thicker, the connection strength of the thermal interface material layer 30 is larger at the edge, and the layering situation is improved, so that the heat dissipation effect is further improved. It should be understood that the structures shown in fig. 4 and 5 are merely one specific example of the thermal interface material layer 30. The thermal interface material layer 30 may also be used to partially encapsulate the raised structures 20. As shown in FIG. 6 for the arcuate raised structures 20, the thermal interface material layer 30 may be used to partially encapsulate the raised structures 20 when the arcuate raised structures 20 are larger in size than the chip 40.
In specifically defining the thickness of the thermal interface material layer 30, the thickness of the thermal interface material layer 30 provided in the embodiment of the present application satisfies: the minimum thickness of the thermal interface material layer 30 is d, and the maximum thickness of the thermal interface material layer 30 is h, wherein d/h is between 1/4 and 1/10, such as 1/4, 1/5, 1/6, 1/7, 1/8, 1/9, and 1/10. In a specific example, the thermal interface material layer 30 has a minimum thickness d of 25 μm, thereby having a good heat conduction effect. The final thickness h of the thermal interface material layer 30 at the edge may be different thicknesses of 100 μm, 125 μm, 150 μm, 175 μm, 200 μm, 225 μm, 250 μm, etc., so that the edge of the thermal interface material layer 30 has a sufficient thickness to provide the connection strength, which reduces the probability of delamination of the thermal interface material layer 30 from the chip 40 due to warpage of the substrate 50 and the chip 40 when the package structure is heated.
In addition, with the package structure provided in the embodiment of the present application, since the bump structure 20 is disposed on the thermally conductive sheet 10, the distance between the chip 40 and the thermally conductive sheet 10 is reduced, so that when the thermally conductive sheet 10 is assembled, the thermally conductive sheet 10 can be directly pressed against the central position of the side wall of the thermally conductive sheet 10, so as to ensure that the thermally conductive sheet 10 contacts the chip 40 instead of the peripheral position of the substrate 50, and when the thermally conductive sheet 10 and the substrate 50 are connected in place by bonding and curing, the disposed bump structure 20 can press the thermal interface material layer 30, so that the thermal interface material layer 30 connects the thermally conductive sheet 10 and the chip 40, and the thickness of the thermal interface material is controlled by the processing precision of the bump structure 20. In the prior art, the heat conducting fin is first contacted with the periphery of the substrate, the heat conducting fin is connected with the chip in a floating mode, and the thickness of the heat interface material layer is ensured by the tolerance fit of the thickness of the side wall of the heat conducting fin, the thickness of the adhesive on the periphery of the substrate and the height of the chip. Compared with the prior art, the packaging structure provided by the embodiment of the application improves the control precision of the thickness of the thermal interface material layer 30.
For the package structure provided by the embodiment of the present application, besides the heat conducting strip 10, the thermal interface material layer 30 and the chip 40, the package structure is filled with a plastic package material, and the plastic package material wraps a part of the heat conducting strip 10, the chip 40 or the thermal interface material, so that the whole structure is packaged. The above-mentioned packaging is similar to the packaging structure in the prior art, and is not described herein.
As can be seen from the above description, in the package structure provided in the embodiment of the present application, by providing the bump structure 20 on the heat conductive sheet 10, the spacing distance between the chip 40 and the heat conductive sheet 10 is reduced, so that the thermal interface material layer 30 filled between the heat conductive sheet 10 and the chip 40 forms a layer structure with thin middle and thick edge, which improves the heat dissipation effect of the chip 40, and simultaneously, improves the connection strength of the thermal interface material layer 30 when the chip 40 is warped by the structure with thicker edge, thereby improving the heat dissipation effect.
The embodiment of the application also provides a processor, which comprises the packaging structure of any one of the above. By arranging the convex structures 20 on the heat conducting fin 10, the spacing distance between the chip 40 and the heat conducting fin 10 is reduced, so that the thermal interface material layer 30 filled between the heat conducting fin 10 and the chip 40 forms a structure with thin middle and thick edge, thereby improving the heat dissipation effect of the chip 40, and simultaneously, the structure with thicker edge improves the connection strength of the thermal interface material layer 30 when the chip 40 is warped, thereby improving the heat dissipation effect.
The embodiment of the application also provides a server, which comprises the packaging structure of any one of the above. By arranging the convex structures 20 on the heat conducting fin 10, the spacing distance between the chip 40 and the heat conducting fin 10 is reduced, so that the thermal interface material layer 30 filled between the heat conducting fin 10 and the chip 40 forms a structure with thin middle and thick edge, thereby improving the heat dissipation effect of the chip 40, and simultaneously, the structure with thicker edge improves the connection strength of the thermal interface material layer 30 when the chip 40 is warped, thereby improving the heat dissipation effect.
The foregoing is merely illustrative embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about variations or substitutions within the technical scope of the present application, and the application should be covered. Therefore, the protection scope of the application is subject to the protection scope of the claims.
Claims (10)
1. A package structure, comprising: the chip and the heat conducting fin are stacked, wherein a protruding structure is arranged on one side, facing the chip, of the heat conducting fin, a thermal interface material layer is arranged between the chip and the heat conducting fin, and the thermal interface material layer wraps the protruding structure;
the surface of the protruding structure and the surface of the protruding structure adjacent to the heat conducting fin form a curved surface in an arc transition mode.
2. The package structure of claim 1, wherein the bump structure is a mesa structure, and a side surface of the bump structure is connected to a side of the thermally conductive sheet through a first arc-shaped transition surface, and a side surface of the bump structure is connected to a side of the bump structure facing the chip through a second arc-shaped transition surface.
3. The package structure of claim 2, wherein a side of the bump structure facing the chip is a first side, and a side of the chip facing the thermally conductive sheet is a second side, wherein a ratio of the first side to the second side is not less than 1/2.
4. The package structure of claim 1, wherein the thermal interface material layer has a minimum thickness d and the thermal interface material layer has a maximum thickness h, wherein d/h is between 1/4 and 1/10.
5. The package structure of claim 1, wherein the thermal interface material layer has a minimum thickness d of 25 μm.
6. The package structure of claim 1 or 2, wherein a perpendicular projection of the bump structure on a first surface is located within a perpendicular projection of the chip on the first surface, wherein the first surface is a placement surface of the chip.
7. A package structure according to any one of claims 1 to 3, wherein the bump structure is of unitary construction with the thermally conductive sheet.
8. A package structure according to any one of claims 1 to 3, further comprising a substrate, wherein the chip is fixed on the substrate, and the thermally conductive sheet is fixedly connected to the substrate and encapsulates the chip.
9. A processor comprising a package structure as claimed in any one of claims 1 to 8.
10. A server comprising a package structure according to any one of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310575450.2A CN117153792A (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2018/117021 WO2020103104A1 (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
| CN202310575450.2A CN117153792A (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
| CN201880099678.6A CN113170593B (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201880099678.6A Division CN113170593B (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117153792A true CN117153792A (en) | 2023-12-01 |
Family
ID=70774336
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201880099678.6A Active CN113170593B (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
| CN202310575450.2A Pending CN117153792A (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201880099678.6A Active CN113170593B (en) | 2018-11-22 | 2018-11-22 | Packaging structure, processor and server |
Country Status (2)
| Country | Link |
|---|---|
| CN (2) | CN113170593B (en) |
| WO (1) | WO2020103104A1 (en) |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020015288A1 (en) * | 2000-07-20 | 2002-02-07 | Dibene Joseph T. | High performance thermal/mechanical interface for fixed-gap references for high heat flux and power semiconductor applications |
| CN2445431Y (en) * | 2000-08-15 | 2001-08-29 | 徐惠群 | Heat conduction contact interface |
| US6504723B1 (en) * | 2001-11-15 | 2003-01-07 | Intel Corporation | Electronic assembly having solder thermal interface between a die substrate and a heat spreader |
| US20050127500A1 (en) * | 2003-12-10 | 2005-06-16 | International Business Machines Corporation | Local reduction of compliant thermally conductive material layer thickness on chips |
| US7200006B2 (en) * | 2004-06-03 | 2007-04-03 | International Business Machines Corporation | Compliant thermal interface for electronic equipment |
| US7646608B2 (en) * | 2005-09-01 | 2010-01-12 | Gm Global Technology Operations, Inc. | Heat transfer plate |
| TWI355048B (en) * | 2006-12-13 | 2011-12-21 | Siliconware Precision Industries Co Ltd | Heat-dissipation semiconductor package and heat-di |
| US7995344B2 (en) * | 2007-01-09 | 2011-08-09 | Lockheed Martin Corporation | High performance large tolerance heat sink |
| CN102610737A (en) * | 2012-03-21 | 2012-07-25 | 广州市鸿利光电股份有限公司 | Heat-radiating device of high-power LED (Light Emitting Diode) |
| JP6294951B2 (en) * | 2016-01-26 | 2018-03-14 | デクセリアルズ株式会社 | HEAT CONDUCTIVE SHEET, HEAT CONDUCTIVE SHEET MANUFACTURING METHOD, HEAT DISSIBLING MEMBER AND SEMICONDUCTOR DEVICE |
| CN107946250B (en) * | 2017-12-20 | 2024-04-09 | 昆山微电子技术研究院 | Semiconductor chip and packaging method thereof |
-
2018
- 2018-11-22 WO PCT/CN2018/117021 patent/WO2020103104A1/en active Application Filing
- 2018-11-22 CN CN201880099678.6A patent/CN113170593B/en active Active
- 2018-11-22 CN CN202310575450.2A patent/CN117153792A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020103104A1 (en) | 2020-05-28 |
| CN113170593A (en) | 2021-07-23 |
| CN113170593B (en) | 2023-05-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5871076B2 (en) | Semiconductor device, method for attaching heat dissipation member to semiconductor device, and method for manufacturing semiconductor device | |
| JP5885690B2 (en) | Electronic components and equipment | |
| JP5171549B2 (en) | Electronic equipment | |
| JP4228753B2 (en) | Electronic control unit | |
| EP3343610A1 (en) | Chip package structure and manufacturing method thereof | |
| JP2004172489A (en) | Semiconductor device and its manufacturing method | |
| TWI521653B (en) | Semiconductor device | |
| JP2013098328A (en) | Semiconductor device | |
| JP2011082345A (en) | Semiconductor device | |
| JP2012015225A (en) | Semiconductor device | |
| US20240071859A1 (en) | Chip package structure and electronic device | |
| JP4430523B2 (en) | Thermal diffusion sheet | |
| CN113170593B (en) | Packaging structure, processor and server | |
| WO2022041010A1 (en) | Chip packaging structure and electronic device | |
| TWI317998B (en) | Package structure and heat sink module thereof | |
| US20130255878A1 (en) | Printed circuit board manufacturing method | |
| JP2001217359A (en) | Radiator fin, manufacturing method thereof, and semiconductor device | |
| JP2014135374A (en) | Heat transfer substrate | |
| TWI624217B (en) | Thermally diffusing electronic device | |
| JP7047721B2 (en) | Heat dissipation structure of semiconductor parts | |
| JP2005353956A (en) | Heat dissipating member, manufacturing method thereof, and semiconductor package | |
| JP5783865B2 (en) | Semiconductor device | |
| JP2001189582A (en) | Heat sink for electronic part | |
| JP6282883B2 (en) | Semiconductor device | |
| JP7375229B2 (en) | Circuit board and manufacturing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |