CN1171300C - Method for making wiring circuit board with convex point and method for forming convex point - Google Patents
Method for making wiring circuit board with convex point and method for forming convex point Download PDFInfo
- Publication number
- CN1171300C CN1171300C CNB001323911A CN00132391A CN1171300C CN 1171300 C CN1171300 C CN 1171300C CN B001323911 A CNB001323911 A CN B001323911A CN 00132391 A CN00132391 A CN 00132391A CN 1171300 C CN1171300 C CN 1171300C
- Authority
- CN
- China
- Prior art keywords
- wired circuit
- salient point
- etching mask
- metal forming
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
By utilizing a technique whereby a bump-formation etching mask 7 is formed on a bump-forming surface 3a of a metal foil 3 which has a thickness that is the sum of the thickness t1 of the wiring circuit 1 and the height t2 of the bumps 2 which are to be formed on the wiring circuit 1 (t1+t2), and then the bumps 2 are formed by half-etching the metal foil 3 to a depth corresponding to the desired bump height t2 from the bump-formation etching mask 7 side, wiring circuit boards with bumps can be manufactured such that stable bump connections are possible and plating pre-treatments or other complex processes are rendered unnecessary.
Description
Technical field
The present invention relates to have highly manufacture method for the wired circuit board of constant salient point.
Background technology
Under the situation of the electronic component that connects semiconductor element or liquid crystal display cells etc. and wired circuit board or be connected under the situation of interlayer of multi-layer wire substrate, carried out widely utilizing microscopic bumps (for example, the salient point diameter is 50 microns, and bump height is 30 microns) connection.
The representational method of the salient point of the size that formation shown in Figure 4 is such.
That is, at first, as shown in Fig. 4 (a), prepare Copper Foil 42 have been fitted to 2 layers of flexible base, board 43 on the polyimide film 41, utilize photoetching process that Copper Foil 42 is carried out composition, form wired circuit 44 (Fig. 4 (b)).
Utilize conventional method on wired circuit 44, to form seal coat 45 (Fig. 4 (c)).For example, on wired circuit 44, form the polyamic acid layer,, can form seal coat 45 by utilizing photoetching process to carry out composition and carrying out imidization.Perhaps, also can print resist printing ink.
Secondly; utilize laser radiation; on the zone of the polyimide film 41 corresponding, form salient point with hole 46 (Fig. 4 (d)) with wired circuit 44; then; as required after having covered seal coat 45 with diaphragm (not shown); by utilizing electrolytic plating method growing metal salient point 47 on the wired circuit 44 that has exposed on the bottom of salient point with hole 46, formed microscopic bumps (Fig. 4 (e)).
But, salient point has been carried out under the situation of opening with hole 46 utilizing laser radiation, aperture area produces discretely because of being attached to salient point with the discreteness of stain amount on the bottom in hole 46, also there is the big discrete problem that produces in its result aspect the height of metal salient point 47.Therefore, being difficult to carry out stable salient point connects.Particularly, being difficult to utilize ultrasonic wave to connect is connected to semiconductor element on the wired circuit together.In addition, in order to connect airtight intensity, the pre-treatment that must electroplate between the metal salient point 47 that improves wired circuit 44 and form thereon.
Summary of the invention
The present invention is intended to solve the problem of above existing technology and carries out, and its purpose is to provide the manufacture method of the wired circuit board that has salient point of the such loaded down with trivial details operation of a kind of pre-treatment that can realize that stable salient point connects and do not need to electroplate.
Found among the present invention, by to its thickness for the bed thickness of thickness suitable and wired circuit layer with the height of metal salient point and metal forming etch partially, till the degree of depth suitable with the thickness of metal salient point, the such loaded down with trivial details operation of pre-treatment that can make highly uniform salient point and can not electroplate, can realize that stable salient point connects, and has finished the present invention.
That is, the invention provides following a kind of manufacture method that on wired circuit, has formed the wired circuit board that has salient point of salient point, it is characterized in that, comprise following operation:
(a) on stacked diaphragm on the salient point formation face of metal forming and wired circuit formation face, form wired circuit and form the operation of using etching mask in metal forming, wherein, the thickness of above-mentioned metal forming be the thickness of wired circuit and the salient point that on wired circuit, should form height and;
(b) form with the etching mask side from wired circuit metal forming is etched partially operation with the wired circuit of formation desirable thickness;
(c) removing the operation that seal coat is set after wired circuit forms with etching mask on wired circuit;
(d) behind the diaphragm that is provided with on the salient point formation face of having removed in metal forming, on salient point formation face, form salient point and form the operation of using etching mask;
(e) form with the etching mask side from salient point metal forming is etched partially operation with the salient point that forms desired height;
(f) after forming with etching mask, salient point forms polyimide precursor layer having removed so that the operation of landfill salient point; And
(g) polyimide precursor layer is carried out etching and carry out the operation of imidization with the insulating barrier of formation desirable thickness.In this manufacture method, before forming salient point, form wired circuit.
In addition, the invention provides following a kind of manufacture method that on wired circuit, has formed the wired circuit board that has salient point of salient point, it is characterized in that, comprise following operation:
(aa) on stacked diaphragm on the wired circuit formation face of metal forming and salient point formation face, form salient point and form the operation of using etching mask in metal forming, wherein, the thickness of above-mentioned metal forming be the thickness of wired circuit and the salient point that on wired circuit, should form height and;
(bb) form with the etching mask side from salient point metal forming is etched partially operation with the salient point that forms desired height;
(cc) after forming with etching mask, salient point forms polyimide precursor layer having removed so that the operation of landfill salient point;
(dd) polyimide precursor layer is carried out etching and carry out the operation of imidization with the insulating barrier of formation desirable thickness;
(ee) behind the diaphragm that is provided with on the wired circuit formation face of having removed in metal forming, on wired circuit formation face, form wired circuit and form the operation of using etching mask
(ff) form with the etching mask side from wired circuit metal forming is etched partially operation with the wired circuit of formation desirable thickness; And
(gg) removing the operation that seal coat is set after wired circuit forms with etching mask on wired circuit.In this manufacture method, before forming wired circuit, form salient point.
In addition, the invention provides a kind of method for forming bump, it is characterized in that: on the salient point formation face of metal forming, form salient point formation etching mask, wherein, the thickness of above-mentioned metal forming be the thickness of wired circuit and the salient point that on wired circuit, should form height and, metal forming is etched partially with the etching mask side from salient point formation, till the degree of depth suitable with desired bump height.
Moreover, the invention provides a kind of wired circuit board that has salient point, wherein, on the single face of wired circuit, form seal coat, on another face, form insulating barrier, to form with the salient point of wired circuit conducting from this insulating barrier and give prominence to, it is characterized in that: formed wired circuit and salient point by a metal forming.At this, seal coat preferably has and can lead to the connector that wired circuit is used from the seal coat side.In addition, insulating barrier has preferably carried out the polyimide film of imidization to polyimide precursor layer.
Description of drawings
Fig. 1 is the specification figure of the manufacture method of the wired circuit board that has a salient point of the present invention.
Fig. 2 is the specification figure of the manufacture method of the wired circuit board that has a salient point of the present invention.
Fig. 3 is the specification figure of method for forming bump.
Fig. 4 is the specification figure of the manufacture method of the existing wired circuit board that has a salient point.
Embodiment
About the present invention, Yi Bian with reference to accompanying drawing, Yi Bian explain by each operation.
At first, on one side with reference to Fig. 1, formed the manufacture method (operation (a)～(g)) of wired circuit on one side by each specification before forming salient point, this manufacture method is the manufacture method that has formed the wired circuit board that has salient point of salient point on wired circuit.
Operation (a)
At first; forming wired circuit on stacked diaphragm 4 on the salient point formation face 3a of metal forming 3 and the wired circuit formation face 3b in metal forming 3 forms with etching mask 5 (Fig. 1 (a)); wherein; the thickness of above-mentioned metal forming 3 is that wired circuit 1 is (among the figure; with reference to dotted line) thickness t 1 and the height t 2 of the salient point 2 (among the figure) that on wired circuit, should form with reference to dotted line and.
About the thickness t 1 of wired circuit 1 and the height t 2 of salient point 2,, select optimal numerical value according to the application target of wired circuit board.For example, under the situation that wired circuit board is used as the installation base plate of semiconductor element, the thickness t 1 of wired circuit 1 can be set at 20 microns, the height t 2 of salient point 2 is set at 30 microns, the diameter of salient point 2 is set at 50 microns.
As metal forming 3, the material that can use the conductor layer as wired circuit board to be used comparatively it is desirable to enumerate Copper Foil.
Can utilize the silk screen printing of resist printing ink, on the wired circuit formation face 3b of metal forming 3, form wired circuit and form with etching mask 5.Perhaps, also photoresist or dry film can be set, utilize conventional method to expose, develop, form by composition.
Operation (b)
Secondly, metal forming 3 is etched partially to form the wired circuit 1 (Fig. 1 (b)) of desirable thickness t1 with etching mask 5 sides from wired circuit formation.
According to the material of metal forming 3 and answer the thickness etc. of etching, suitably select the condition (temperature, etching liquid composition etc.) that etches partially.
Operation (c)
Secondly, utilizing conventional method to remove wired circuit formation, seal coat 6 (Fig. 1 (c)) is set on wired circuit 1 with behind the etching mask 5.
Utilize silk screen print method coating seal coat coating, can form seal coat 6.Perhaps, also photoresist or dry film can be set, utilize conventional method to expose, develop, form by composition.In addition, also can utilize the conventional method setting, form by composition, imidization by the layer that the polyimide precursor layer 8 of polyamic acid etc. constitutes.
Operation (d)
Utilizing conventional method to remove after the salient point of metal forming 3 forms the diaphragm 4 that is provided with on the face 3a, forming at salient point and form salient point formation etching mask 7 (Fig. 1 (d)) on the face 3a.
Utilize the silk screen printing of resist printing ink, can form at the salient point of metal forming 3 and form salient point formation etching mask 7 on the face 3a.Perhaps, also photoresist or dry film can be set, utilize conventional method to expose, develop, form by composition.
Operation (e)
Form with etching mask 7 sides from salient point metal forming 3 is etched partially salient point 2 (Fig. 1 (e)) to form desired height t 2.
According to the material of metal forming 3 and answer the thickness etc. of etching, suitably select the condition (temperature, etching liquid composition etc.) that etches partially.
Have again, also can before etching partially, cover seal coat 6 (not shown) with diaphragm.
Operation (f)
Utilizing conventional method to remove salient point formation, form polyimide precursor layer 8 so that landfill salient point 2 (Fig. 1 (f)) with behind the etching mask 7.
When removing salient point formation, under the situation that has covered seal coat 6 with diaphragm, also can remove diaphragm simultaneously with etching mask 7.
Can utilize conventional method that polyamic acid etc. is carried out film forming and form polyimide precursor layer 8.Also can decide the imidization condition according to kind of employed polyimide precursor etc.
Operation (g)
Secondly, on one side with reference to Fig. 2, formed the manufacture method (operation (aa)～(gg)) of salient point on one side before forming wired circuit by each specification, this manufacture method is the manufacture method that has formed the wired circuit board that has salient point of salient point on wired circuit.Have, the inscape of symbolically is corresponding to the inscape identical with Fig. 1 symbol in Fig. 2 again.
Operation (aa)
At first; forming salient point on stacked diaphragm 4 on the wired circuit formation face 3b of metal forming 3 and the salient point formation face 3a in metal forming 3 forms with etching mask 7 (Fig. 2 (a)); wherein; the thickness of above-mentioned metal forming 3 is that wired circuit 1 is (among the figure; with reference to dotted line) thickness t 1 and the height t 2 of the salient point 2 (among the figure) that on wired circuit, should form with reference to dotted line and.
Operation (bb)
Form with etching mask 7 sides from salient point metal forming 3 is etched partially salient point 2 (Fig. 2 (b)) to form desired height t 2.
Operation (cc)
Utilizing conventional method to remove salient point formation, form polyimide precursor layer 8 so that landfill salient point 2 (Fig. 2 (c)) with behind the etching mask 7.
Operation (dd)
Operation (ee)
Utilizing conventional method to remove after the wired circuit of metal forming 3 forms the diaphragm 4 that is provided with on the face 3b, forming at wired circuit and form wired circuit formation etching mask 5 (Fig. 2 (e)) on the face 3b.
Operation (ff)
Metal forming 3 is etched partially to form the wired circuit 1 (Fig. 2 (f)) of desirable thickness t1 with etching mask 5 sides from wired circuit formation.
Have again, also can before etching partially, cover salient point 2 (not shown) with diaphragm.
Operation (gg)
Secondly, utilizing conventional method to remove wired circuit formation, seal coat 6 is set on wired circuit 1 with behind the etching mask 5.Thus, can obtain the wired circuit board that has salient point shown in Fig. 2 (g).
When removing wired circuit formation, under the situation that has covered salient point 2 with diaphragm, also can remove diaphragm simultaneously with etching mask 5.
If, then can extract method for forming bump illustrated in fig. 3 out from the manufacture method that the wired circuit board that has salient point that has illustrated Fig. 1 and Fig. 2 is observed in the such side of the formation method of salient point.
Promptly, salient point in metal forming 3 forms formation salient point formation etching mask 7 (Fig. 3 (a)) on the face 3a, wherein, the thickness of above-mentioned metal forming 3 be the thickness t 1 of wired circuit 1 and the salient point 2 that on wired circuit, should form height t 2 and (t1+t2), metal forming 3 is etched partially with etching mask 7 sides by forming from salient point, till the degree of depth suitable, as shown in Fig. 3 (b), can form salient point 2 with desired bump height t2.At this moment, can after forming salient point 2, carry out being processed to form of wired circuit 1, also can after having carried out being processed to form of wired circuit 1 in advance, form salient point 2.
The height of the salient point that obtains by this way becomes evenly, and the thickness that wired circuit and salient point lump together also is constant.Thereby, can carry out stable salient point and connect.
According to manufacture method of the present invention, salient point intensity becomes stable, and can carry out stable salient point and connect, and, the wired circuit board that has salient point that does not need the such loaded down with trivial details operation of the pre-treatment of electroplating can be provided.Particularly, the salient point that can utilize ultrasonic wave stably to carry out integrated circuit together connects.
Claims (2)
1. a manufacture method that has wired circuit and be formed on the wired circuit board of the salient point on the wired circuit is characterized in that, comprises following operation:
(a) on stacked diaphragm on the salient point formation face of metal forming and wired circuit formation face, form wired circuit and form the operation of using etching mask in metal forming, wherein, the thickness of above-mentioned metal forming be the thickness of wired circuit and the salient point that on wired circuit, should form height and;
(b) form with the etching mask side from wired circuit metal forming is etched partially operation with the wired circuit of formation desirable thickness;
(c) removing the operation that seal coat is set after wired circuit forms with etching mask on wired circuit;
(d) behind the diaphragm that is provided with on the salient point formation face of having removed in metal forming, on salient point formation face, form salient point and form the operation of using etching mask;
(e) form with the etching mask side from salient point metal forming is etched partially operation with the salient point that forms desired height;
(f) after forming with etching mask, salient point forms polyimide precursor layer having removed so that the operation of landfill salient point; And
(g) polyimide precursor layer is carried out etching and carry out the operation of imidization with the insulating barrier of formation desirable thickness.
2. a manufacture method that has wired circuit and be formed on the wired circuit board of the salient point on the wired circuit is characterized in that, comprises following operation:
(aa) on stacked diaphragm on the wired circuit formation face of metal forming and salient point formation face, form salient point and form the operation of using etching mask in metal forming, wherein, the thickness of above-mentioned metal forming be the thickness of wired circuit and the salient point that on wired circuit, should form height and;
(bb) form with the etching mask side from salient point metal forming is etched partially operation with the salient point that forms desired height;
(cc) after forming with etching mask, salient point forms polyimide precursor layer having removed so that the operation of landfill salient point;
(dd) polyimide precursor layer is carried out etching and carry out the operation of imidization with the insulating barrier of formation desirable thickness;
(ee) behind the diaphragm that is provided with on the wired circuit formation face of having removed in metal forming, on wired circuit formation face, form wired circuit and form the operation of using etching mask;
(ff) form with the etching mask side from wired circuit metal forming is etched partially operation with the wired circuit of formation desirable thickness; And
(gg) removing the operation that seal coat is set after wired circuit forms with etching mask on wired circuit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP319669/1999 | 1999-11-10 | ||
| JP31966999A JP3593935B2 (en) | 1999-11-10 | 1999-11-10 | Method of manufacturing wiring circuit board with bump and method of forming bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1296286A CN1296286A (en) | 2001-05-23 |
| CN1171300C true CN1171300C (en) | 2004-10-13 |
Family
ID=18112884
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB001323911A Expired - Fee Related CN1171300C (en) | 1999-11-10 | 2000-11-09 | Method for making wiring circuit board with convex point and method for forming convex point |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6562250B1 (en) |
| JP (1) | JP3593935B2 (en) |
| KR (1) | KR100776558B1 (en) |
| CN (1) | CN1171300C (en) |
| TW (1) | TW464995B (en) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3760731B2 (en) * | 2000-07-11 | 2006-03-29 | ソニーケミカル株式会社 | Bumped wiring circuit board and manufacturing method thereof |
| JP2002111185A (en) * | 2000-10-03 | 2002-04-12 | Sony Chem Corp | Wiring circuit board with bumps and method of manufacturing the same |
| DE10237084A1 (en) * | 2002-08-05 | 2004-02-19 | Osram Opto Semiconductors Gmbh | Electrically conductive frame with a semiconductor light diode, to illuminate a mobile telephone keypad, has a layered structure with the electrical connections and an encapsulated diode chip in very small dimensions |
| JP2005026598A (en) * | 2003-07-01 | 2005-01-27 | Tokyo Electron Ltd | Member for multilayer wiring substrate, its manufacturing method and multilayer wiring substrate |
| KR100652554B1 (en) | 2005-01-07 | 2006-12-01 | 재단법인서울대학교산학협력재단 | Flip-chip bonding structure using multi chip module-deposited substrate |
| KR100664500B1 (en) * | 2005-08-09 | 2007-01-04 | 삼성전자주식회사 | Printed circuit board having metal land with protrusion and manufacturing method thereof |
| CN1933106B (en) * | 2005-09-12 | 2010-04-28 | 中芯国际集成电路制造(上海)有限公司 | Method for producing golden convex points with more smooth surface |
| US20080116587A1 (en) * | 2006-11-16 | 2008-05-22 | Chun Ho Fan | Conductor polymer composite carrier with isoproperty conductive columns |
| TWI375999B (en) | 2007-06-07 | 2012-11-01 | Advanced Semiconductor Eng | Substrate with bumps process and structure |
| CN101221908B (en) * | 2008-01-29 | 2010-10-13 | 日月光半导体制造股份有限公司 | Substrate technique and structure with projection |
| CN101989593B (en) * | 2009-07-30 | 2012-12-12 | 欣兴电子股份有限公司 | Packaging substrate as well as manufacturing method and packaging structure thereof |
| JP6112843B2 (en) * | 2012-11-30 | 2017-04-12 | 敏雄 奥野 | Bumped lead forming method for contact sheet for electronic device inspection |
| JP5610039B2 (en) * | 2013-06-10 | 2014-10-22 | 株式会社村田製作所 | Wiring board manufacturing method |
| CN104039086B (en) * | 2014-06-06 | 2016-11-02 | 中国航天科技集团公司第九研究院第七七一研究所 | A kind of three-dimensional salient point printed circuit board and preparation method thereof |
| CN110468413A (en) * | 2019-09-10 | 2019-11-19 | 四会富仕电子科技股份有限公司 | A kind of method of Metal Substrate roughing in surface |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3217089A (en) * | 1962-06-01 | 1965-11-09 | Control Data Corp | Embedded printed circuit |
| US5055426A (en) * | 1990-09-10 | 1991-10-08 | Micron Technology, Inc. | Method for forming a multilevel interconnect structure on a semiconductor wafer |
| JPH08236654A (en) * | 1995-02-23 | 1996-09-13 | Matsushita Electric Ind Co Ltd | Chip carrier and manufacture thereof |
| JP3666955B2 (en) * | 1995-10-03 | 2005-06-29 | 日本メクトロン株式会社 | Method for manufacturing flexible circuit board |
| JPH09321409A (en) * | 1996-05-28 | 1997-12-12 | Hitachi Chem Co Ltd | Manufacture of interlayer connection film |
| JPH1065048A (en) * | 1996-08-20 | 1998-03-06 | Sony Corp | Manufacturing method for carrier substrate |
| US6222136B1 (en) * | 1997-11-12 | 2001-04-24 | International Business Machines Corporation | Printed circuit board with continuous connective bumps |
| JPH11312857A (en) * | 1998-04-30 | 1999-11-09 | Hitachi Chem Co Ltd | Manufacture of wiring board and manufacture of wiring board with bump |
| JP3760731B2 (en) * | 2000-07-11 | 2006-03-29 | ソニーケミカル株式会社 | Bumped wiring circuit board and manufacturing method thereof |
| JP2002111185A (en) * | 2000-10-03 | 2002-04-12 | Sony Chem Corp | Wiring circuit board with bumps and method of manufacturing the same |
-
1999
- 1999-11-10 JP JP31966999A patent/JP3593935B2/en not_active Expired - Fee Related
-
2000
- 2000-10-27 US US09/697,453 patent/US6562250B1/en not_active Expired - Lifetime
- 2000-10-30 TW TW089122797A patent/TW464995B/en not_active IP Right Cessation
- 2000-11-08 KR KR1020000066235A patent/KR100776558B1/en not_active IP Right Cessation
- 2000-11-09 CN CNB001323911A patent/CN1171300C/en not_active Expired - Fee Related
-
2003
- 2003-04-01 US US10/403,024 patent/US6977349B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP3593935B2 (en) | 2004-11-24 |
| CN1296286A (en) | 2001-05-23 |
| TW464995B (en) | 2001-11-21 |
| US6977349B2 (en) | 2005-12-20 |
| KR100776558B1 (en) | 2007-11-15 |
| US20030201242A1 (en) | 2003-10-30 |
| JP2001144412A (en) | 2001-05-25 |
| US6562250B1 (en) | 2003-05-13 |
| KR20010051541A (en) | 2001-06-25 |
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