CN117118433A - Novel high-order phase-locked loop system, loop filter circuit and implementation method - Google Patents
Novel high-order phase-locked loop system, loop filter circuit and implementation method Download PDFInfo
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- CN117118433A CN117118433A CN202311384966.5A CN202311384966A CN117118433A CN 117118433 A CN117118433 A CN 117118433A CN 202311384966 A CN202311384966 A CN 202311384966A CN 117118433 A CN117118433 A CN 117118433A
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- 238000000034 method Methods 0.000 title claims abstract description 13
- 239000003990 capacitor Substances 0.000 claims abstract description 74
- 230000010354 integration Effects 0.000 claims abstract description 12
- 238000002955 isolation Methods 0.000 claims abstract description 10
- 230000001629 suppression Effects 0.000 claims abstract description 6
- 230000001052 transient effect Effects 0.000 claims description 8
- 230000003014 reinforcing effect Effects 0.000 claims description 6
- 230000035945 sensitivity Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000013016 damping Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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Abstract
The invention discloses a novel high-order phase-locked loop system, a loop filter circuit and an implementation method, wherein the high-order phase-locked loop system consists of a phase frequency detector, an enhanced integration circuit, a basic loop filter, a voltage-controlled oscillator and a loop frequency divider; the high-order loop filter circuit is composed of an enhanced integrating circuit, a basic loop filter and an isolation resistor; the enhanced integrating circuit consists of a precise resistor, a precise capacitor and a high-bandwidth gain integrating operational amplifier; the basic loop filter consists of a precise resistor, a precise capacitor and a low-voltage noise operational amplifier. A novel high-order phase-locked loop system, a loop filter circuit and an implementation method have the advantages of increasing loop zero poles, improving loop orders, providing better noise suppression capability, along with high integration degree, simple design, easy debugging and high reliability.
Description
Technical Field
The invention relates to the field of phase-locked loop circuits, in particular to a novel high-order phase-locked loop system, a loop filter circuit and an implementation method.
Background
The transient characteristic and noise suppression capability of the loop filter circuit of the existing phase-locked loop cannot be greatly improved due to the influence of the order of the loop filter. For example, the locking time of the phase-locked loop is generally about several tens of us to several ms. The transient characteristic of the phase-locked loop can be effectively improved by adopting the high-order loop filter circuit, so that the performance can be greatly optimized by adding only one integrating circuit, and a large number of locking auxiliary circuits are not needed to be added.
Disclosure of Invention
The invention aims at solving the problem that a loop filter circuit of a phase-locked loop in the prior art cannot be greatly improved, and provides a novel high-order phase-locked loop system, a loop filter circuit and an implementation method, which are different from the implementation mode of a traditional digital phase-locked loop filter, and a mode of adding a zero point and a pole point is adopted to realize a higher-order loop filter.
The utility model provides a novel high order phase-locked loop system, comprises phase frequency detector, reinforcing integration circuit, basic loop filter, voltage controlled oscillator and loop frequency divider, the input of reinforcing integration circuit is connected to the output of phase frequency detector, and the input of basic loop filter is connected to the output of reinforcing integration circuit, and voltage controlled oscillator's input is connected to basic loop filter's output, and voltage controlled oscillator's one end output reference signal, and loop frequency divider's input is connected to voltage controlled oscillator's the other end output, and the input of phase frequency detector's the other end is connected to loop frequency divider's output.
Furthermore, the novel high-order phase-locked loop system is characterized in that the phase frequency detector consists of a digital phase frequency detector of a point charge pump, a reference signal is input into an input end of one end of the phase frequency detector, and an output end of the phase frequency detector outputs error pulse current.
Further, a novel high-order phase-locked loop system is provided, wherein the voltage-controlled oscillator and the loop frequency divider jointly form a feedback circuit of the novel high-order phase-locked loop system.
A novel high-order loop filter circuit is composed of an enhanced integrating circuit, a basic loop filter and an isolation resistor;
the enhanced integrating circuit consists of a precise resistor, a precise capacitor and a high-bandwidth gain integrating amplifier;
the basic loop filter consists of a precise resistor, a precise capacitor and a low-voltage noise operational amplifier.
Further, the precision resistor comprises a first resistor R101, a second resistor R102, a fourth resistor R104 and a fifth resistor R105, the precision capacitor comprises a first capacitor C101, a second capacitor C102, a third capacitor C103, a fourth capacitor C104 and a fifth capacitor C105, the high-bandwidth gain operational amplifier is a first operational amplifier AMP101, the low-voltage noise operational amplifier is a second operational amplifier AMP102, and the isolation resistor is a third resistor R103.
Further, the novel high-order loop filter circuit comprises a first resistor R101, a second resistor R102, a first capacitor C101, a second capacitor C102 and a first operational amplifier AMP101, wherein the first capacitor C101 and the first resistor R101 are connected in series, the second capacitor C102 and the second resistor R102 are connected in series, and the third resistor R103 and the second resistor R102 are connected in parallel.
Further, the novel high-order loop filter circuit comprises a third capacitor C103, a fourth capacitor C104, a fifth capacitor C105, a fourth resistor R104, a fifth resistor R105 and a second operational amplifier AMP102, wherein the circuit connection relationship is that the fourth capacitor C104 and the fourth resistor R104 are connected in series, the third capacitor C103 and the fourth resistor R104 are connected in parallel, and the third capacitor C103 and the fifth capacitor C105 are connected in series.
Further, a novel high-order loop filter circuit is provided, wherein the basic loop filter and the enhanced integration circuit are connected through an isolation resistor.
A novel implementation method of a high-order loop filter comprises the following steps:
s1: determining loop bandwidth and phase margin parameters of a basic loop filter according to input and output frequency, phase noise, transient requirements and clutter suppression initial condition requirements required by a phase-locked loop;
；
s2, calculating zero point and pole of the basic third-order loop according to the bandwidth and phase margin parameters of the basic loop filter，/>，/>Transfer function brought into basic third-order loop phase-locked loop:
wherein,representing the transfer function of a basic third-order loop phase-locked loop; r represents proportional resistance, A represents capacitance coefficient, < ->，/>，/>Zero and pole representing transfer function of existing third-order loop phase-locked loop; />Represents C2+C3, < > in the original operational amplifier circuit>Representing the charge pump gain, +.>Representing voltage-controlled sensitivity, s representing a spatial variable of which the closed-loop transfer function changes from a time domain g (t) to a complex s domain in a phase-locked loop negative feedback system;
s3, adding a novel high-order loop filter circuit on the basis of the basic third-order active loop filter, so that a novel zero and a pole are added in the original phase-locked loop system, and the transfer function of the novel high-order loop filter phase-locked loop is as follows:
；
wherein,representing the transfer function of the novel high-order loop filter phase-locked loop; t1 represents the newly added pole; t2 represents a newly added zero point, and N represents an N frequency division number;
s4: will be s is usedThe frequency response of the system is obtained after replacement, and the phase margin expression is:
；
wherein the method comprises the steps ofThe angular velocity of the representative signal is the response of the system in the frequency domain;
s5: the equation of T1 and T2 is obtained by using a phase margin expression, and is brought into the transfer function of a basic third-order loop phase-locked loop and the transfer function of a novel high-order loop filter phase-locked loop, the specific values of T1 and T2 are solved, so that the specific values of a first capacitor C101, a second capacitor C102, a first resistor R101 and a second resistor R102 of an enhanced integrating circuit are obtained, the enhanced integrating circuit is placed by setting the capacitors and resistors of the first capacitor C101, the second capacitor C102 and the first resistor R101 and the second resistor R102 which correspond to the specific values, and finally the novel high-order loop filter circuit is realized.
The invention has the beneficial effects that: the novel high-order phase-locked loop system, the loop filter circuit and the implementation method aim to solve the defects of high hardware configuration cost, low direction-finding efficiency and high time-occupation cost in a radio direction-finding system. The loop filter circuit is used as a loop filter part of a phase-locked loop, can be applied to a frequency synthesizer to realize the filtering of error voltage and the adjustment of loop transfer function, and mainly has the advantages of increasing loop zero poles, improving loop orders, providing better noise suppression capability, along with high integration degree, simple design, easy debugging and high reliability.
Drawings
Fig. 1 is a schematic diagram of a novel high-order pll system.
Fig. 2 is a schematic diagram of a novel high-order loop filter circuit.
Fig. 3 is a simulation diagram of the transient response of a novel high-order phase-locked loop system.
Fig. 4 is a diagram of the phase-frequency response of a novel high-order pll system.
Fig. 5 is a graph showing the amplitude-frequency response of a novel high-order pll system.
Detailed Description
For a clearer understanding of technical features, objects, and effects of the present invention, a specific embodiment of the present invention will be described with reference to the accompanying drawings.
As shown in figure 1, the novel high-order phase-locked loop system consists of a phase frequency detector, an enhanced integral circuit, a basic loop filter, a voltage-controlled oscillator and a loop frequency divider, wherein the output end of the phase frequency detector is connected with the input end of the enhanced integral circuit, the output end of the enhanced integral circuit is connected with the input end of the basic loop filter, the output end of the basic loop filter is connected with the input end of the voltage-controlled oscillator, one end output end of the voltage-controlled oscillator outputs a reference signal, the other end output end of the voltage-controlled oscillator is connected with the input end of the loop frequency divider, and the output end of the loop frequency divider is connected with the input end of the other end of the phase frequency detector.
Further, the novel high-order phase-locked loop system is characterized in that the phase frequency detector is composed of a digital phase frequency detector of a point charge pump, a reference signal is input into an input end of one end of the phase frequency detector, and an output end of the phase frequency detector outputs error pulse current.
As shown in fig. 2, a novel high-order loop filter circuit is composed of an enhanced integrating circuit, a basic loop filter and an isolation resistor;
the enhanced integrating circuit consists of a precise resistor, a precise capacitor and a high-bandwidth gain integrating amplifier;
the basic loop filter consists of a precise resistor, a precise capacitor and a low-voltage noise operational amplifier.
Further, the precision resistor comprises a first resistor R101, a second resistor R102, a fourth resistor R104 and a fifth resistor R105, the precision capacitor comprises a first capacitor C101, a second capacitor C102, a third capacitor C103, a fourth capacitor C104 and a fifth capacitor C105, the high-bandwidth gain operational amplifier is a first operational amplifier AMP101, the low-voltage noise operational amplifier is a second operational amplifier AMP102, and the isolation resistor is a third resistor R103.
Further, the novel high-order loop filter circuit comprises a first resistor R101, a second resistor R102, a first capacitor C101, a second capacitor C102 and a first operational amplifier AMP101, wherein the first capacitor C101 and the first resistor R101 are connected in series, the second capacitor C102 and the second resistor R102 are connected in series, and the third resistor R103 and the second resistor R102 are connected in parallel.
Further, the novel high-order loop filter circuit comprises a third capacitor C103, a fourth capacitor C104, a fifth capacitor C105, a fourth resistor R104, a fifth resistor R105 and a second operational amplifier AMP102, wherein the circuit connection relationship is that the fourth capacitor C104 and the fourth resistor R104 are connected in series, the third capacitor C103 and the fourth resistor R104 are connected in parallel, and the third capacitor C103 and the fifth capacitor C105 are connected in series.
Further, a novel high-order loop filter circuit is provided, wherein the basic loop filter and the enhanced integration circuit are connected through an isolation resistor.
As shown in figure 3, the newly added zero pole is far away from the main pole of the basic loop, so that the order of the phase-locked loop system can be improved, and the steady-state performance of the main loop filter is not greatly influenced. A novel high-order phase-locked loop system greatly improves transient characteristics of the system due to the fact that zero points of a feedback system are added. The damping coefficient of the phase locked loop system can be designed to a suitable magnitude to achieve dynamic tuning performance. The control voltage of the voltage controlled oscillator can be adjusted in a very short time, and ringing caused by damping overshoot is substantially eliminated.
The basic loop filter is a 3-order active filtering integral amplifying circuit, the error pulse current output by the enhanced integral circuit is converted into the control voltage of the voltage-controlled oscillator, the enhanced integral circuit is a compensation circuit of the basic loop filter, and a zero point and a pole are added for a closed loop transfer function of a novel high-order phase-locked loop system.
A novel implementation method of a high-order loop filter comprises the following steps:
s1: determining loop bandwidth and phase margin parameters of a basic loop filter according to input and output frequency, phase noise, transient requirements and clutter suppression initial condition requirements required by a phase-locked loop;
s2, calculating zero point and pole of the basic third-order loop according to the bandwidth and phase margin parameters of the basic loop filter，/>，/>Transfer function brought into basic third-order loop phase-locked loop:
；
wherein,representing the transfer function of a basic third-order loop phase-locked loop; r represents proportional resistance, A represents capacitance coefficient, < ->，/>，/>Zero and pole representing transfer function of existing third-order loop phase-locked loop; />Represents C2+C3, < > in the original operational amplifier circuit>Representing the charge pump gain, +.>Representing voltage-controlled sensitivity, s representing a spatial variable of which the closed-loop transfer function changes from a time domain g (t) to a complex s domain in a phase-locked loop negative feedback system;
s3, adding a novel high-order loop filter circuit on the basis of the basic third-order active loop filter, so that a novel zero and a pole are added in the original phase-locked loop system, and the transfer function of the novel high-order loop filter phase-locked loop is as follows:
；
wherein,representing the transfer function of the novel high-order loop filter phase-locked loop; t1 represents the newly added pole; t2 represents a newly added zero point, and N represents an N frequency division number;
s4: will be s is usedThe frequency response of the system is obtained after replacement, and the phase margin expression is:
；
wherein the method comprises the steps ofThe angular velocity of the representative signal is the response of the system in the frequency domain;
s5: the equation of T1 and T2 is obtained by using a phase margin expression, and is brought into the transfer function of a basic third-order loop phase-locked loop and the transfer function of a novel high-order loop filter phase-locked loop, the specific values of T1 and T2 are solved, so that the specific values of a first capacitor C101, a second capacitor C102, a first resistor R101 and a second resistor R102 of an enhanced integrating circuit are obtained, the enhanced integrating circuit is placed by setting the capacitors and resistors of the first capacitor C101, the second capacitor C102 and the first resistor R101 and the second resistor R102 which correspond to the specific values, and finally the novel high-order loop filter circuit is realized.
As shown in fig. 4 to 5, fig. 4 is a phase frequency response characteristic curve, and fig. 5 is an amplitude frequency response characteristic curve, which shows that the phase margin at the bandwidth of the loop filter is 45 °, and the closed loop characteristic of the novel high-order loop filter after adding a new zero and a pole is still stable.
The scheme is different from the traditional digital phase-locked loop filter implementation mode in that a mode of adding a zero point and a pole is adopted to realize a higher-order loop filter, and has the following advantages:
1. the order of the phase-locked loop system is improved;
2. improving transient characteristics of the phase-locked loop system;
3. the accuracy of the preset frequency is improved in the auxiliary locking loop clock.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. The utility model provides a novel high-order phase-locked loop system, its characterized in that comprises phase frequency detector, reinforcing integration circuit, basic loop filter, voltage controlled oscillator and loop frequency divider, the input of reinforcing integration circuit is connected to the output of phase frequency detector, and the input of basic loop filter is connected to the output of reinforcing integration circuit, and voltage controlled oscillator's input is connected to the output of basic loop filter, and voltage controlled oscillator's one end output reference signal, and loop frequency divider's input is connected to voltage controlled oscillator's the other end output, and the input of phase frequency detector's the other end is connected to loop frequency divider's output.
2. The novel high-order phase-locked loop system of claim 1, wherein the phase-frequency detector is comprised of a digital phase-frequency detector with a charge pump, the reference signal is input to an input terminal of one end of the phase-frequency detector, and an output terminal of the phase-frequency detector outputs an error pulse current.
3. A novel high-order phase-locked loop system as claimed in claim 1, wherein said voltage-controlled oscillator and loop divider together form a feedback circuit of the novel high-order phase-locked loop system.
4. A novel high-order loop filter circuit, which is characterized in that the novel high-order phase-locked loop circuit is realized based on an enhanced integrating circuit and a basic loop filter in any one of claims 1-3, and is composed of the enhanced integrating circuit, the basic loop filter and an isolation resistor;
the enhanced integrating circuit consists of a precise resistor, a precise capacitor and a high-bandwidth gain integrating amplifier;
the basic loop filter consists of a precise resistor, a precise capacitor and a low-voltage noise operational amplifier.
5. The novel high-order loop filter circuit of claim 4, wherein the precision resistor comprises a first resistor R101, a second resistor R102, a fourth resistor R104, and a fifth resistor R105, the precision capacitor comprises a first capacitor C101, a second capacitor C102, a third capacitor C103, a fourth capacitor C104, and a fifth capacitor C105, the high-bandwidth gain operational amplifier is a first operational amplifier AMP101, the low-voltage noise operational amplifier is a second operational amplifier AMP102, and the isolation resistor is a third resistor R103.
6. The novel high-order loop filter circuit as claimed in claim 4, wherein said boost integrating circuit comprises a first resistor R101, a second resistor R102, a first capacitor C101, a second capacitor C102 and a first operational amplifier AMP101, wherein the first capacitor C101 and the first resistor R101 are connected in series, the second capacitor C102 and the second resistor R102 are connected in series, and the third resistor R103 and the second resistor R102 are connected in parallel.
7. The novel high-order loop filter circuit as claimed in claim 4, wherein said basic loop filter comprises a third capacitor C103, a fourth capacitor C104, a fifth capacitor C105, a fourth resistor R104, a fifth resistor R105 and a second operational amplifier AMP102, wherein the circuit connection relationship is that the fourth capacitor C104 and the fourth resistor R104 are connected in series, the third capacitor C103 and the fourth resistor R104 are connected in parallel, and the third capacitor C103 and the fifth capacitor C105 are connected in series.
8. A novel high order loop filter circuit as set forth in claim 4, wherein said fundamental loop filter and said boost integration circuit are connected by an isolation resistor.
9. A novel implementation method of a high-order loop filter, which is characterized by being implemented based on the novel high-order loop filter circuit as claimed in any one of claims 4-8, comprising the following steps:
s1: determining loop bandwidth and phase margin parameters of a basic loop filter according to input and output frequency, phase noise, transient requirements and clutter suppression initial condition requirements required by a phase-locked loop;
s2: according to the bandwidth and phase margin parameters of the basic loop filter, the zero point and the pole of the basic third-order loop are calculated，/>，/>Transfer function brought into basic third-order loop phase-locked loop:
；
wherein,representing the transfer function of a basic third-order loop phase-locked loop; r represents a proportional resistance, A represents a capacitance coefficient,，/>，/>zero and pole representing transfer function of existing third-order loop phase-locked loop; />Represents C2+C3, < > in the original operational amplifier circuit>Representing the charge pump gain, +.>Representing voltage-controlled sensitivity, s representing a spatial variable of which the closed-loop transfer function changes from a time domain g (t) to a complex s domain in a phase-locked loop negative feedback system;
s3: the novel high-order loop filter circuit is added on the basis of the basic third-order active loop filter, so that a novel zero and a pole are added in the original phase-locked loop system, and the transfer function of the novel high-order loop filter phase-locked loop is as follows:
；
wherein,representing the transfer function of the novel high-order loop filter phase-locked loop; t1 represents the newly added pole; t2 represents a newly added zero point; n represents an N division number;
s4: will be s is usedThe frequency response of the system is obtained after replacement, and the phase margin expression is:
；
wherein the method comprises the steps ofThe angular velocity of the representative signal is the response of the system in the frequency domain;
s5: the equation of T1 and T2 is obtained by using a phase margin expression, and is brought into the transfer function of a basic third-order loop phase-locked loop and the transfer function of a novel high-order loop filter phase-locked loop, the specific values of T1 and T2 are solved, so that the specific values of a first capacitor C101, a second capacitor C102, a first resistor R101 and a second resistor R102 of an enhanced integrating circuit are obtained, the enhanced integrating circuit is placed by setting the capacitors and resistors of the first capacitor C101, the second capacitor C102 and the first resistor R101 and the second resistor R102 which correspond to the specific values, and finally the novel high-order loop filter circuit is realized.
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