CN117117006A - Solar cell and preparation method thereof - Google Patents
Solar cell and preparation method thereof Download PDFInfo
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- CN117117006A CN117117006A CN202311107520.8A CN202311107520A CN117117006A CN 117117006 A CN117117006 A CN 117117006A CN 202311107520 A CN202311107520 A CN 202311107520A CN 117117006 A CN117117006 A CN 117117006A
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- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 361
- 230000004888 barrier function Effects 0.000 claims abstract description 105
- 239000000758 substrate Substances 0.000 claims abstract description 94
- 230000005641 tunneling Effects 0.000 claims abstract description 60
- 238000006243 chemical reaction Methods 0.000 claims abstract description 8
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 96
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 84
- 238000000034 method Methods 0.000 claims description 55
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 54
- 229910000077 silane Inorganic materials 0.000 claims description 54
- 239000001272 nitrous oxide Substances 0.000 claims description 48
- 229910052786 argon Inorganic materials 0.000 claims description 42
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 32
- 230000008569 process Effects 0.000 claims description 26
- 125000004429 atom Chemical group 0.000 claims description 18
- 230000003647 oxidation Effects 0.000 claims description 18
- 238000007254 oxidation reaction Methods 0.000 claims description 18
- 239000005922 Phosphane Substances 0.000 claims description 16
- 229910000064 phosphane Inorganic materials 0.000 claims description 16
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 13
- 239000001257 hydrogen Substances 0.000 claims description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 12
- 239000001301 oxygen Substances 0.000 claims description 12
- 229910052760 oxygen Inorganic materials 0.000 claims description 12
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 8
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 6
- 230000000903 blocking effect Effects 0.000 claims description 5
- 150000002431 hydrogen Chemical class 0.000 claims description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 5
- 238000005240 physical vapour deposition Methods 0.000 claims description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 238000010494 dissociation reaction Methods 0.000 claims description 4
- 230000005593 dissociations Effects 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000002923 metal particle Substances 0.000 abstract description 55
- 238000002161 passivation Methods 0.000 abstract description 17
- 230000000694 effects Effects 0.000 abstract description 10
- 230000000149 penetrating effect Effects 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 239000000463 material Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 7
- 239000007789 gas Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 238000010521 absorption reaction Methods 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention relates to the technical field of photovoltaics and discloses a solar cell and a preparation method thereof. A solar cell comprising a semiconductor substrate layer and a tunnel oxide layer on one side surface of the semiconductor substrate layer, further comprising: at least two doped semiconductor layers positioned on one side of the tunneling oxide layer away from the semiconductor substrate layer; a barrier layer; between adjacent doped semiconductor layers. According to the barrier layer in the solar cell, the trend that metal particles in the gate line electrode grow towards one side of the semiconductor substrate layer can be weakened, the metal particles are prevented from penetrating through the doped semiconductor layer closest to the tunneling oxide layer, the passivation effect of the tunneling oxide layer is improved, and the photoelectric conversion efficiency of the solar cell is further improved; second, a thicker doped semiconductor layer is not required to withstand the growth of metal particles, reducing the overall thickness of the doped semiconductor layer.
Description
Technical Field
The invention relates to the technical field of photovoltaics, in particular to a solar cell and a preparation method thereof.
Background
The back surface structure of passivation contact is formed by adopting a silicon substrate, a tunneling silicon oxide layer, a doped silicon film layer, an anti-reflection layer and a metal grid line in the solar cell, wherein the thickness of the doped silicon film layer is generally 90-150 nm, and the amorphous/polycrystalline structure of the silicon film and the heavily doped phosphorus enable the optical absorption of the doped silicon film layer to be strong, so that more light cannot be absorbed by the silicon substrate, and the long-wave-band optical loss is relatively large. Therefore, the reduction of the thickness of the doped silicon film layer can greatly reduce the optical absorption loss of a long wave band, and further improve the short-circuit current of the solar cell.
The back metal grid line in the prior art is formed by high-temperature sintering of metal slurry, glass components in the slurry corrode the anti-reflection layer in the sintering process, metal components reach the doped silicon film layer to form metal particles in the crystallization process, the metal particles can damage the doped silicon film layer with partial thickness, when the thickness of the doped silicon film layer is reduced to a certain thickness, the metal particles can more easily penetrate through the doped silicon film layer and then contact the tunneling silicon oxide layer, the passivation effect of the tunneling silicon oxide layer is damaged, the composite of a metallization region is increased, and the photoelectric conversion efficiency of the solar cell is low. In order to ensure the passivation effect of the solar cell, the thickness of the doped silicon film can only be thinned within a quite small range, generally more than or equal to 90nm, but cannot be further reduced.
Disclosure of Invention
In view of the above, the present invention provides a solar cell and a method for manufacturing the same, which solves the problem of poor passivation effect of a tunneling oxide layer while reducing the thickness of a doped semiconductor layer.
In a first aspect, the present invention provides a solar cell, including a semiconductor substrate layer and a tunnel oxide layer located on a side surface of the semiconductor substrate layer, further including: at least two doped semiconductor layers positioned on one side of the tunneling oxide layer away from the semiconductor substrate layer; a barrier layer; between adjacent ones of the doped semiconductor layers.
The beneficial effects are that: 1. at least two doped semiconductor layers are arranged on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer, a barrier layer is arranged between the adjacent doped semiconductor layers, metal components in the gate line electrode formed subsequently meet one doped semiconductor layer closest to the gate line electrode, metal particles are formed in the doped semiconductor layer through crystallization, and the metal particles are influenced by a crystal phase of the one doped semiconductor layer closest to the gate line electrode, so that the metal particles grow towards one side of the semiconductor substrate layer; when the metal particles meet the barrier layer, the crystalline phase of the barrier layer is inconsistent with the crystalline phase of the doped semiconductor layer, so that the barrier layer does not react with the metal particles, and the trend of the metal particles growing towards one side of the semiconductor substrate layer can be reduced; after passing the barrier layer, the metal particles continue to grow towards one side of the semiconductor substrate layer until they come into contact with a doped semiconductor layer closest to the tunnel oxide layer. Therefore, metal particles are prevented from penetrating through the doped semiconductor layer closest to the tunneling oxide layer, contact between the metal particles and the tunneling oxide layer is avoided, passivation effect of the tunneling oxide layer is improved, and photoelectric conversion efficiency of the solar cell is further improved. 2. Secondly, although a plurality of doped semiconductor layers are arranged, due to the arrangement of the blocking layer, the trend of the metal particles growing towards one side of the semiconductor substrate layer can be weakened, and a thicker doped semiconductor layer is not needed to resist the growth of the metal particles, and the thickness of each doped semiconductor layer can be correspondingly thinned, so that the total thickness of the doped semiconductor layers is reduced, and the total thickness of the doped semiconductor layers is reduced from 90nm-140nm to 12nm-80nm; the reduction of the total thickness of the doped semiconductor layer can reduce the optical absorption loss of a long wave band, and more light of the long wave band is absorbed by the semiconductor substrate layer, so that the short-circuit current of the solar cell is improved. 3. In addition, the process of forming the barrier layer between adjacent doped semiconductor layers and the process of forming the multi-layer doped semiconductor layers can be completed in the same production equipment without additional working procedures, and the solar cell has low manufacturing cost and is easy for mass production.
In an alternative embodiment, the number of the doped semiconductor layers is two, and the number of the barrier layers is one; when the number of the doped semiconductor layers is more than two, the number of the barrier layers is one layer less than the number of the doped semiconductor layers.
In an alternative embodiment, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer; the first doped semiconductor layer is positioned on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer; the second doped semiconductor layer is positioned on one side of the first doped semiconductor layer away from the semiconductor substrate layer; a barrier layer; is located between the first doped semiconductor layer and the second doped semiconductor layer; the thickness of the first doped semiconductor layer is greater than or equal to the thickness of the second doped semiconductor layer.
The beneficial effects are that: since the metal particles in the gate line electrode are required to penetrate through the second doped semiconductor layer to reach the barrier layer, the thickness of the second doped semiconductor layer is relatively small, so that the capability of the metal particles to penetrate through the second doped semiconductor layer is enhanced; the thickness of the first doped semiconductor layer is relatively large, so that the probability that metal particles penetrate through the first doped semiconductor layer to be in contact with the tunneling oxide layer is reduced, and the passivation effect of the tunneling oxide layer is improved.
In an alternative embodiment, the total thickness of the first doped semiconductor layer and the second doped semiconductor layer is from 12nm to 80nm; the thickness of the first doped semiconductor layer is 10nm-50nm, and the thickness of the second doped semiconductor layer is 2nm-30nm.
In an alternative embodiment, the doping concentration of the first doped semiconductor layer is greater than or equal to the doping concentration of the second doped semiconductor layer.
The beneficial effects are that: the doping concentration of the first doped semiconductor layer is greater than or equal to that of the second doped semiconductor layer, so that a larger concentration difference exists between the concentration of the first doped semiconductor layer and that of the semiconductor substrate layer, the selectivity of carriers is stronger, and the passivation effect is improved.
In an alternative embodiment, the first doped semiconductor layer has a doping concentration of 5×10 20 atoms/cm 3 -3×10 21 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The doping concentration of the second doped semiconductor layer is 3×10 20 atoms/cm 3 -2×10 21 atoms/cm 3 。
In an alternative embodiment, the thickness of the barrier layer is less than or equal to the thickness of the tunnel oxide layer.
The beneficial effects are that: the thickness of the barrier layer is smaller, so that metal particles in the grid line electrode can be properly blocked to grow, even if part of the area (such as a non-metalized area) is not broken through by the metal particles, the contact resistance cannot be increased due to the fact that the barrier layer is very thin, and a good filling factor is ensured.
In an alternative embodiment, the thickness of the barrier layer is 0.5nm to 3nm and the thickness of the tunnel oxide layer is 1nm to 3nm.
In an alternative embodiment, the method further comprises: an anti-reflection layer; the doped semiconductor layer is positioned on one side of the semiconductor substrate layer facing away from the semiconductor substrate layer; a gate line electrode; and the anti-reflection layer is positioned on one side of the anti-reflection layer, which faces away from the semiconductor substrate layer.
In an alternative embodiment, the solar cell comprises a P-IBC cell, an N-IBC cell, or a TOPCon cell.
In a second aspect, the present invention also provides a method for preparing a solar cell, including: providing a semiconductor substrate layer; forming a tunneling oxide layer on the back surface of the semiconductor substrate layer; alternately forming a doped semiconductor layer and a blocking layer on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer, so as to form at least two doped semiconductor layers on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer; and forming a barrier layer between adjacent doped semiconductor layers.
The beneficial effects are that: when at least two doped semiconductor layers are formed on one side of the tunneling oxide layer, which is far away from the semiconductor substrate layer, and one doped semiconductor layer is arranged on one side of the tunneling oxide layer, which is far away from the tunneling oxide layer, and one doped semiconductor layer is arranged on one side of the tunneling oxide layer, which is closest to the tunneling oxide layer, and a barrier layer formed in the preparation process is arranged between the adjacent doped semiconductor layers. The metal particles in the gate line electrode formed later react with a doped semiconductor layer farthest from the tunneling oxide layer, so that the gate line electrode grows towards one side of the semiconductor substrate layer, and then a barrier layer is encountered, and the tendency of the metal particles to grow towards one side of the semiconductor substrate layer is weakened because the barrier layer does not react with the metal particles; the metal particles encounter the doped semiconductor layers and the barrier layer in sequence, and each time the metal particles encounter the barrier layer, the tendency of the metal particles to grow toward the side of the semiconductor substrate layer is reduced once until the metal particles contact the doped semiconductor layer closest to the tunnel oxide layer and are not growing. After the growth trend of the metal particles is reduced, a thicker doped semiconductor layer is not required to resist the growth of the metal particles, thus reducing the total thickness of the doped semiconductor layer.
In an alternative embodiment, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer; the step of forming at least two doped semiconductor layers on the side of the tunneling oxide layer facing away from the semiconductor substrate layer comprises the following steps: forming a first doped semiconductor layer on one side of the tunneling oxide layer away from the semiconductor substrate layer; after the first doped semiconductor layer is formed, a barrier layer is formed on one side of the first doped semiconductor layer, which faces away from the semiconductor substrate layer; after forming the barrier layer, a second doped semiconductor layer is formed on a side of the barrier layer facing away from the semiconductor substrate layer.
In an alternative embodiment, a solar cell is fabricated using a PECVD route, wherein the step of forming the tunnel oxide layer comprises: forming the tunneling oxide layer by adopting a nitrous oxide plasma oxidation method; argon is introduced in the process of forming the tunneling oxide layer to assist ionization of nitrous oxide; the step of forming the first doped semiconductor layer includes: introducing silane, phosphane and argon, and forming a first doped semiconductor layer by utilizing plasma ionization silane; or introducing silane, phosphane and hydrogen, and forming a first doped semiconductor layer by utilizing plasma ionization silane; the step of forming the barrier layer includes: forming a barrier layer by adopting a nitrous oxide plasma oxidation method, or introducing silane and nitrous oxide, and forming the barrier layer by utilizing the reaction of ionized silane and nitrous oxide; argon is introduced to assist in ionization of nitrous oxide in the process of forming the barrier layer; the step of forming the second doped semiconductor layer includes: introducing silane, phosphane and argon, and forming a second doped semiconductor layer by utilizing plasma ionization silane; or introducing silane, phosphane and hydrogen, and forming a second doped semiconductor layer by utilizing plasma ionization silane.
In an alternative embodiment, the parameters for forming the tunnel oxide layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-300s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the parameters for forming the barrier layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-100s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the forming of the first doped semiconductor layer and the forming of the second doped semiconductor layer have the same parameters, including: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-400pa; the time is 50s-300s; the flow rate of silane is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the flow rate of the hydrogen is 5000sccm to 20000sccm.
In an alternative embodiment, the solar cell is fabricated using an LPCVD route, wherein the step of forming the tunnel oxide layer includes: introducing oxygen and forming a tunneling oxide layer by using a thermal oxidation mode; the step of forming the first doped semiconductor layer includes: introducing silane and phosphorus oxychloride, and forming a first doped semiconductor layer by utilizing thermal dissociation silane; the step of forming the barrier layer includes: introducing oxygen and forming a barrier layer by using a thermal oxidation mode; the step of forming the second doped semiconductor layer includes: and introducing silane and phosphorus oxychloride, and forming a second doped semiconductor layer by utilizing the thermal dissociation silane.
In an alternative embodiment, the parameters for forming the tunnel oxide layer include: the temperature is 550-700 ℃ and the time is 200-600 s; the flow rate of the oxygen is 5000sccm-50000sccm; the parameters for forming the barrier layer include: the temperature is 550-700 ℃ and the time is 100-300 s; the flow rate of the oxygen is 5000sccm-50000sccm; the parameters of forming the first doped semiconductor layer and the second doped semiconductor layer are the same, including: the temperature is 550-700 ℃ and the time is 500-1000 s; the pressure is 150pa-400pa; the flow rate of silane is 1000sccm to 3000sccm.
In an alternative embodiment, a solar cell is fabricated using a PVD route, wherein forming the tunnel oxide layer comprises: forming a tunneling oxide layer by adopting a nitrous oxide plasma oxidation method; argon is introduced in the process of forming the tunneling oxide layer to assist ionization of nitrous oxide; the step of forming the first doped semiconductor layer includes: forming a first doped semiconductor layer by means of magnetron sputtering; introducing phosphane and argon in the process of forming the first doped semiconductor layer; alternatively, phosphine and hydrogen are introduced; the process for forming the barrier layer comprises the following steps: forming a barrier layer by adopting a nitrous oxide plasma oxidation method, or introducing silane and nitrous oxide, and forming the barrier layer by utilizing the reaction of ionized silane and nitrous oxide; argon is introduced to assist in ionization of nitrous oxide in the process of forming the barrier layer; the step of forming the second doped semiconductor layer includes: forming a second doped semiconductor layer by means of magnetron sputtering; introducing phosphane and argon in the process of forming the second doped semiconductor layer; alternatively, phosphine and hydrogen are introduced.
In an alternative embodiment, the parameters for forming the tunnel oxide layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-300s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the parameters for forming the barrier layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-100s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the parameters of forming the first doped semiconductor layer and the second doped semiconductor layer are the same, including: the sputtering power is 10000W-20000W; the pressure is 130pa-400pa; the time is 50s-300s; the flow rate of the argon is 1000sccm-10000sccm; the flow rate of the hydrogen gas is 1000sccm-10000sccm.
In an alternative embodiment, the method further comprises: forming an anti-reflection layer on one side of the doped semiconductor layer away from the semiconductor substrate layer; and forming a grid line electrode on one side of the anti-reflection layer, which is away from the semiconductor substrate layer.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic view of a part of a solar cell according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a TOPCon battery according to an embodiment of the invention
Fig. 3 is a schematic flow chart of a method for manufacturing a solar cell according to an embodiment of the invention.
Reference numerals illustrate:
1. a semiconductor substrate layer; 2. tunneling oxide layer; 3. doping the semiconductor layer; 31. a first doped semiconductor layer; 32. a second doped semiconductor layer; 4. a barrier layer; 5. an anti-reflection layer; 6. a gate line electrode; 7. a diffusion layer; 8. a passivation layer; 9. a front side antireflection layer; 10. a front gate line electrode.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Embodiments of the present invention are described below with reference to fig. 1 to 3.
According to an embodiment of the present invention, in one aspect, there is provided a solar cell, referring to fig. 1, including a semiconductor substrate layer 1 and a tunnel oxide layer 2 located on one side surface of the semiconductor substrate layer 1, further including: at least two doped semiconductor layers 3 located on the side of the tunneling oxide layer 2 facing away from the semiconductor substrate layer 1; a barrier layer 4; between adjacent ones of said doped semiconductor layers 3.
In this embodiment, at least two doped semiconductor layers 3 are disposed on a side of the tunnel oxide layer 2 facing away from the semiconductor substrate layer 1, a barrier layer 4 is disposed between adjacent doped semiconductor layers 3, a metal component in a subsequently formed gate line electrode may first encounter a doped semiconductor layer closest to the gate line electrode, and metal particles are formed in the doped semiconductor layer by crystallization, and are affected by a crystal phase of the doped semiconductor layer closest to the gate line electrode, so that the metal particles grow toward one side of the semiconductor substrate layer 1; when the metal particles encounter the barrier layer, the crystalline phase of the barrier layer 4 is inconsistent with the crystalline phase of the doped semiconductor layer 3, so that the barrier layer 4 does not react with the metal particles, and the tendency of the metal particles to grow further towards one side of the semiconductor substrate layer 1 can be reduced; after passing the barrier layer 4, the metal particles continue to grow towards the side of the semiconductor substrate layer 1 until they come into contact with the one doped semiconductor layer closest to the tunnel oxide layer 2. Therefore, metal particles are prevented from penetrating through the doped semiconductor layer closest to the tunneling oxide layer 2, contact between the metal particles and the tunneling oxide layer is avoided, passivation effect of the tunneling oxide layer is improved, and photoelectric conversion efficiency of the solar cell is further improved. Secondly, although a plurality of doped semiconductor layers are arranged, due to the arrangement of the barrier layer 4, the trend of the metal particles growing towards one side of the semiconductor substrate layer 1 can be weakened, and a thicker doped semiconductor layer is not needed to resist the growth of the metal particles, and the thickness of each doped semiconductor layer can be correspondingly reduced, so that the total thickness of the doped semiconductor layers 3 is reduced, and the total thickness of the doped semiconductor layers 3 is reduced from 90nm-140nm to 12nm-80nm in the prior art; the reduction of the total thickness of the doped semiconductor layer 3 can reduce the optical absorption loss of a long wave band, and more light of the long wave band is absorbed by the semiconductor substrate layer 1, so that the short-circuit current of the solar cell is improved.
In addition, the process of forming the barrier layer 4 between adjacent doped semiconductor layers and the process of forming the multi-layered doped semiconductor layers can be completed in the same production equipment without additional processes, and the solar cell is low in manufacturing cost and easy to mass-produce.
The material of the semiconductor substrate layer 1 comprises silicon. In other embodiments, the material of the semiconductor substrate layer is other semiconductor materials, such as single crystal silicon or silicon germanium. The material of the semiconductor substrate layer may also be other semiconductor materials.
In this embodiment, the doped semiconductor layer 3 includes a doped silicon layer, where the doped semiconductor layer 3 contains phosphorus atoms; the tunnel oxide layer 2 comprises a tunnel silicon oxide layer and the barrier layer 4 comprises a silicon oxide barrier layer.
In other embodiments, the doped semiconductor layer comprises a doped semiconductor layer of other materials, the tunnel oxide layer comprises a tunnel oxide layer of other materials, and the barrier layer comprises a barrier layer of other materials.
In this embodiment, the number of the doped semiconductor layers 3 is two, and the number of the barrier layers 4 is one.
Specifically, the doped semiconductor layer 3 includes a first doped semiconductor layer 31 and a second doped semiconductor layer 32; the first doped semiconductor layer 31 is located on the side of the tunneling oxide layer 2 facing away from the semiconductor substrate layer 1; the second doped semiconductor layer 32 is located on the side of the first doped semiconductor layer 31 facing away from the semiconductor substrate layer 1; a barrier layer 4; between the first doped semiconductor layer 31 and the second doped semiconductor layer 32.
In one embodiment, the thickness of the first doped semiconductor layer 31 is greater than or equal to the thickness of the second doped semiconductor layer 32. Since the metal particles in the gate line electrode to be formed later need to penetrate the second doped semiconductor layer to reach the barrier layer 4, the thickness of the second doped semiconductor layer 32 is relatively small, so that the capability of the metal particles to penetrate the second doped semiconductor layer is enhanced; the thickness of the first doped semiconductor layer 31 is relatively larger, so that the probability that metal particles penetrate through the first doped semiconductor layer 31 to be in contact with the tunneling oxide layer is reduced, and the passivation effect of the tunneling oxide layer 2 is improved.
In one embodiment, the total thickness of the first doped semiconductor layer 31 and the second doped semiconductor layer 32 is 12nm-80nm, for example 12nm, 16nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm or 80nm; wherein the thickness of the first doped semiconductor layer 31 is 10nm-50nm, and the thickness of the second doped semiconductor layer 32 is 2nm-30nm. Illustratively, the second doped semiconductor layer 32 has a thickness of 2nm, 4nm, 6nm, 8nm, 10nm, 20nm or 30nm, and the first doped semiconductor layer 31 has a thickness of 10nm, 20nm, 30nm, 40nm or 50nm.
In one embodiment, the doping concentration of the first doped semiconductor layer 31 is greater than or equal to the doping concentration of the second doped semiconductor layer 32. The doping concentration of the first doped semiconductor layer 31 is greater than or equal to the doping concentration of the second doped semiconductor layer 32, so that there is a larger concentration difference between the concentration of the first doped semiconductor layer and the semiconductor substrate layer, the selectivity of carriers is stronger, and the passivation effect of the solar cell is improved.
In one embodiment, the first doped semiconductor layer 31 has a doping concentration of 5×10 20 atoms/cm 3 -3×10 21 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The second doped semiconductor layer 32 has a doping concentration of 3×10 20 atoms/cm 3 -2×10 21 atoms/cm 3 . The first doped semiconductor layer 31 has a doping concentration of 5×10 20 atoms/cm 3 、1×10 21 atoms/cm 3 Or 2X 10 21 atoms/cm 3 The second doped semiconductor layer 32 has a doping concentration of 4×10 20 atoms/cm 3 、9×10 20 atoms/cm 3 Or 1X 10 21 atoms/cm 3 。
In one embodiment, the thickness of the barrier layer 4 is less than or equal to the thickness of the tunnel oxide layer 2. The thickness of the barrier layer 4 is smaller, so that metal particles in the gate line electrode can be properly blocked to grow, even if part of the area (such as a non-metalized area) is not broken through by the metal particles, the contact resistance cannot be increased due to the fact that the barrier layer 4 is very thin, and a good filling factor is ensured.
In one embodiment, the thickness of the barrier layer 4 is 0.5nm-3nm, and the thickness of the tunnel oxide layer 2 is 1nm-3nm. Illustratively, the thickness of the barrier layer 4 is 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm or 3nm, and the thickness of the tunnel oxide layer 2 is 1nm, 1.5nm, 2nm, 2.5nm or 3nm.
In another embodiment, when the number of the doped semiconductor layers is greater than two, the number of the barrier layers is one layer less than the number of the doped semiconductor layers (not shown).
It should be noted that, in the structure of the solar cell, the side closest to the tunneling oxide layer and the side farthest from the tunneling oxide layer are both doped semiconductor layers, and only one barrier layer is arranged between adjacent doped semiconductor layers, so that metal particles in the subsequently formed gate line electrode react with the doped semiconductor layer farthest from the tunneling oxide layer, so that the gate line electrode grows towards one side of the semiconductor substrate layer, and then encounters a barrier layer, and the tendency of the metal particles to grow further towards one side of the semiconductor substrate layer is reduced because the barrier layer does not react with the metal particles; the metal particles encounter the doped semiconductor layers and the barrier layer in sequence, and each time the metal particles encounter the barrier layer, the tendency of the metal particles to grow toward the side of the semiconductor substrate layer is reduced once until the metal particles contact the doped semiconductor layer closest to the tunnel oxide layer and are not growing. After the growth trend of the metal particles is reduced, a thicker doped semiconductor layer is not required to resist the growth of the metal particles, thus reducing the total thickness of the doped semiconductor layer.
With continued reference to fig. 1, the solar cell further includes: an antireflection layer 5; on the side of the doped semiconductor layer 3 facing away from the semiconductor substrate layer 1; a gate line electrode 6; on the side of the anti-reflection layer 5 facing away from the semiconductor substrate layer 1. The anti-reflection layer 5 and the grid line electrode 6 are both positioned on the back surface of the solar cell.
The solar cell comprises a P-IBC cell, an N-IBC cell or a TOPCon cell.
When the solar cell is a TOPCon cell, referring to fig. 2, the solar cell further includes: a diffusion layer 7; the semiconductor substrate layer 1 is positioned on one side away from the tunneling oxide layer 2; a passivation layer 8; on the side of the diffusion layer 7 remote from the semiconductor substrate layer 1; a front side antireflection layer 9 located on a side of the passivation layer 8 away from the semiconductor substrate layer 1; a front gate line electrode 10 is located on a side of the front anti-reflection layer 9 remote from the semiconductor substrate layer 1.
According to an embodiment of the present invention, on the other hand, there is also provided a method for manufacturing a solar cell, referring to fig. 3, including:
s1: providing a semiconductor substrate layer;
s2: forming a tunneling oxide layer on the back surface of the semiconductor substrate layer;
s3: alternately forming a doped semiconductor layer and a blocking layer on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer, so as to form at least two doped semiconductor layers on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer; and forming a barrier layer between adjacent doped semiconductor layers.
In the present embodiment, the doped semiconductor layer 3 includes a first doped semiconductor layer 31 and a second doped semiconductor layer 32; the step of forming at least two doped semiconductor layers on the side of the tunnel oxide layer 2 facing away from the semiconductor substrate layer 1 comprises: forming a first doped semiconductor layer 31 on the side of the tunneling oxide layer 2 facing away from the semiconductor substrate layer 1; after the formation of the first doped semiconductor layer 31, a barrier layer 4 is formed on the side of the first doped semiconductor layer 31 facing away from the semiconductor substrate layer 1; after formation of the barrier layer 4, a second doped semiconductor layer 32 is formed on the side of the barrier layer 4 facing away from the semiconductor substrate layer 1.
In one embodiment, the solar cell is fabricated using a PECVD route. PECVD is specifically referred to as plasma enhanced chemical vapor deposition.
Specifically, the step of forming the tunnel oxide layer 2 includes: the tunnel oxide layer 2 is formed by a nitrous oxide plasma oxidation method. Preferably, argon is introduced during formation of the tunnel oxide layer to assist in ionization of nitrous oxide.
In one embodiment, the parameters for forming the tunnel oxide layer include: the radio frequency power is 10000W-20000W, such as 10000W, 15000W or 20000W, the radio frequency on time is 2 μs-10 μs, such as 2 μs, 4 μs, 6 μs, 8 μs or 10 μs, the radio frequency off time is 40 μs-300 μs, such as 40 μs, 60 μs, 100 μs, 150 μs, 200 μs, 250 μs or 300 μs; the pressure is 130pa-250pa, for example 130pa, 150pa, 200pa or 250pa; the time is 50s-300s, such as 50s, 100s, 150s, 200s, 250s or 300s; the flow rate of nitrous oxide is 5000sccm-20000sccm, for example 5000sccm, 10000sccm, 15000sccm or 20000sccm; the flow rate of argon gas is 5000sccm to 20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm.
In the present embodiment, the steps of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same.
Specifically, the step of forming the first doped semiconductor layer 31 includes: introducing silane, phosphane and argon, and forming a first doped semiconductor layer 31 by utilizing plasma ionization silane; or by introducing silane, phosphine and hydrogen, and forming the first doped semiconductor layer 31 by ionizing silane with plasma.
The step of forming the second doped semiconductor layer 32 includes: introducing silane, phosphane and argon gas, and forming a second doped semiconductor layer 32 by utilizing plasma ionization silane; or by introducing silane, phosphine, and hydrogen gas, and forming the second doped semiconductor layer 32 by plasma ionization of the silane.
In one embodiment, the parameters of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same, including: the radio frequency power is 10000W-20000W, such as 10000W, 15000W or 20000W, the radio frequency on time is 2 μs-10 μs, such as 2 μs, 4 μs, 6 μs, 8 μs or 10 μs, the radio frequency off time is 40 μs-300 μs, such as 40 μs, 60 μs, 100 μs, 150 μs, 200 μs, 250 μs or 300 μs; the pressure is 130pa-400pa, for example 130pa, 150pa, 200pa, 250pa, 300pa, 350pa or 400pa; the time is 50s-300s, such as 50s, 100s, 150s, 200s, 250s or 300s; the flow rate of silane is 5000sccm-20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm; the flow rate of argon is 5000sccm-20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm; the flow rate of the hydrogen gas is 5000sccm to 20000sccm, for example, 5000, 10000sccm, 15000sccm or 20000sccm.
In other embodiments, parameters of forming the first doped semiconductor layer and forming the second doped semiconductor layer are different, and are not specifically described in the present application.
The step of forming the barrier layer 4 comprises: the barrier layer is formed by adopting a nitrous oxide plasma oxidation method, or silane and nitrous oxide are introduced, and ionized silane and nitrous oxide are utilized to react to form the barrier layer. Preferably, argon is introduced during formation of the barrier layer to assist in ionization of the nitrous oxide.
In one embodiment, the parameters for forming the barrier layer 4 include: the radio frequency power is 10000W-20000W, such as 10000W, 15000W or 20000W, the radio frequency on time is 2 μs-10 μs, such as 2 μs, 4 μs, 6 μs, 8 μs or 10 μs, the radio frequency off time is 40 μs-300 μs, such as 40 μs, 60 μs, 100 μs, 150 μs, 200 μs, 250 μs or 300 μs; the pressure is 130pa-250pa, for example 50s, 100s, 150s, 200s, 250s or 300s; the time is 50s-100s, such as 50s, 70s, 90s or 100s; the flow rate of nitrous oxide is 5000sccm-20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm; the flow rate of argon gas is 5000sccm to 20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm.
In another embodiment, the solar cell is fabricated using an LPCVD route. LPCVD refers specifically to low pressure chemical vapor deposition.
Specifically, the step of forming the tunnel oxide layer 2 includes: oxygen is introduced, and a tunneling oxide layer is formed by utilizing a thermal oxidation mode.
In one embodiment, the parameters for forming tunnel oxide layer 2 include: the temperature is 550-700 ℃, such as 550 ℃, 600 ℃, 650 ℃, or 700 ℃, and the time is 200s-600s, such as 200s, 300s, 400s, 500s, or 600s; the flow rate of oxygen is 5000sccm-50000sccm, for example 5000, 10000sccm, 15000sccm, 20000sccm, 30000sccm, 40000sccm or 50000sccm.
In the present embodiment, the steps of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same.
Specifically, the step of forming the first doped semiconductor layer 31 includes: the silane and phosphorus oxychloride are introduced, and the first doped semiconductor layer 31 is formed by thermally dissociating the silane.
The step of forming the second doped semiconductor layer 32 includes: silane and phosphorus oxychloride are introduced, and the second doped semiconductor layer 32 is formed by thermally dissociating silane.
In one embodiment, the parameters of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same, including: the temperature is 550-700 ℃, such as 550 ℃, 600 ℃, 650 ℃, or 700 ℃, and the time is 500s-1000s, such as 500s, 700s, 900s, or 1000s; the pressure is 150pa to 400pa, for example 150pa, 200pa, 250pa, 300pa, 350pa or 400pa; the flow rate of silane is 1000sccm to 3000sccm, for example 1000sccm, 2000sccm or 3000sccm.
In other embodiments, parameters of forming the first doped semiconductor layer and forming the second doped semiconductor layer are different, and are not specifically described in the present application.
The step of forming the barrier layer 4 comprises: oxygen is introduced, and a blocking layer is formed by using a thermal oxidation mode.
In one embodiment, the parameters for forming the barrier layer 4 include: the temperature is 550-700 ℃, such as 550 ℃, 600 ℃, 650 ℃ or 700 ℃, and the time is 100s-300s, such as 100s, 200s or 300s; the flow rate of oxygen is 5000sccm-50000sccm, for example 5000, 10000sccm, 15000sccm, 20000sccm, 30000sccm, 40000sccm or 50000sccm.
In another embodiment, the solar cell is fabricated using a PVD route. PVD refers specifically to physical vapor deposition.
Specifically, the step of forming the tunnel oxide layer 2 includes: the tunnel oxide layer 2 is formed by a nitrous oxide plasma oxidation method. Preferably, argon is introduced during formation of the tunnel oxide layer to assist in ionization of nitrous oxide.
In one embodiment, the parameters for forming tunnel oxide layer 2 include: the radio frequency power is 10000W-20000W, such as 10000W, 15000W or 20000W, the radio frequency on time is 2 μs-10 μs, such as 2 μs, 4 μs, 6 μs, 8 μs or 10 μs, the radio frequency off time is 40 μs-300 μs, such as 40 μs, 60 μs, 100 μs, 150 μs, 200 μs, 250 μs or 300 μs; the pressure is 130pa-250pa, for example 130pa, 150pa, 200pa or 250pa; the time is 50s-300s, such as 50s, 100s, 150s, 200s, 250s or 300s; the flow rate of nitrous oxide is 5000sccm-20000sccm, for example 5000sccm, 10000sccm, 15000sccm or 20000sccm; the flow rate of argon gas is 5000sccm to 20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm.
In the present embodiment, the steps of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same.
Specifically, the step of forming the first doped semiconductor layer 31 includes: forming a first doped semiconductor layer 31 by means of magnetron sputtering; introducing phosphane and argon gas in the process of forming the first doped semiconductor layer 31; alternatively, phosphine and hydrogen are introduced.
The step of forming the second doped semiconductor layer 32 includes: forming a second doped semiconductor layer 32 by means of magnetron sputtering; introducing phosphane and argon gas in the process of forming the second doped semiconductor layer 32; alternatively, phosphine and hydrogen are introduced.
In one embodiment, the parameters of forming the first doped semiconductor layer 31 and forming the second doped semiconductor layer 32 are the same, including: the sputtering power is 10000W-20000W, for example 10000W, 15000W or 20000W; the pressure is 130pa-400pa, for example 130pa, 150pa, 200pa, 250pa, 300pa, 350pa or 400pa; the time is 50s-300s, such as 50s, 100s, 150s, 200s, 250s or 300s; the flow rate of argon is 1000sccm-10000sccm, for example 1000sccm, 5000sccm, 7000sccm, or 10000sccm; the flow rate of the hydrogen gas is 1000sccm to 10000sccm, for example, 1000sccm, 5000sccm, 7000sccm, or 10000sccm.
In other embodiments, parameters of forming the first doped semiconductor layer and forming the second doped semiconductor layer are different, and are not specifically described in the present application.
The step of forming the barrier layer 4 comprises: the barrier layer is formed by adopting a nitrous oxide plasma oxidation method, or silane and nitrous oxide are introduced, and ionized silane and nitrous oxide are utilized to react to form the barrier layer. Preferably, argon is introduced during formation of the barrier layer to assist in ionization of the nitrous oxide.
In one embodiment, the parameters for forming the barrier layer 4 include: the radio frequency power is 10000W-20000W, such as 10000W, 15000W or 20000W, the radio frequency on time is 2 μs-10 μs, such as 2 μs, 4 μs, 6 μs, 8 μs or 10 μs, the radio frequency off time is 40 μs-300 μs, such as 40 μs, 60 μs, 100 μs, 150 μs, 200 μs, 250 μs or 300 μs; the pressure is 130pa-250pa, for example 50s, 100s, 150s, 200s, 250s or 300s; the time is 50s-100s, such as 50s, 70s, 90s or 100s; the flow rate of nitrous oxide is 5000sccm-20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm; the flow rate of argon gas is 5000sccm to 20000sccm, for example 5000, 10000sccm, 15000sccm or 20000sccm.
The preparation method of the solar cell further comprises the following steps: forming an anti-reflection layer 5 on the side of the doped semiconductor layer 3 facing away from the semiconductor substrate layer 1; a gate line electrode 6 is formed on the side of the anti-reflection layer 5 facing away from the semiconductor substrate layer 1.
When the solar cell is a TOPCON cell, the preparation method of the solar cell further comprises the following steps: forming a diffusion layer 7 on a side of the semiconductor substrate layer 1 away from the tunnel oxide layer 2; forming a passivation layer 8 on a side of the diffusion layer 7 remote from the semiconductor substrate layer 1; forming a front side antireflection layer 9 on a side of the passivation layer 8 away from the semiconductor substrate layer 1; a front gate line electrode 10 is formed on the side of the front anti-reflection layer 9 remote from the semiconductor substrate layer 1.
In one embodiment, the diffusion layer 7 comprises a P-type diffusion layer.
In one embodiment, the passivation layer 8 includes an aluminum oxide layer and a silicon oxide layer.
In another embodiment, the semiconductor substrate layer 1 is provided as a semiconductor substrate layer 1 after being subjected to a texturing process. The texturing process uses techniques known in the art and will not be described in detail herein.
Although embodiments of the present invention have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope of the invention as defined by the appended claims.
Claims (19)
1. A solar cell comprising a semiconductor substrate layer and a tunnel oxide layer on a side surface of the semiconductor substrate layer, further comprising:
at least two doped semiconductor layers positioned on one side of the tunneling oxide layer away from the semiconductor substrate layer;
a barrier layer; between adjacent ones of the doped semiconductor layers.
2. The solar cell according to claim 1, wherein the number of doped semiconductor layers is two and the number of barrier layers is one;
when the number of the doped semiconductor layers is more than two, the number of the barrier layers is one layer less than the number of the doped semiconductor layers.
3. The solar cell of claim 1, wherein the doped semiconductor layer comprises a first doped semiconductor layer and a second doped semiconductor layer; the first doped semiconductor layer is positioned on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer; the second doped semiconductor layer is positioned on one side of the first doped semiconductor layer away from the semiconductor substrate layer; a barrier layer; is located between the first doped semiconductor layer and the second doped semiconductor layer;
The thickness of the first doped semiconductor layer is greater than or equal to the thickness of the second doped semiconductor layer.
4. The solar cell of claim 3, wherein a total thickness of the first doped semiconductor layer and the second doped semiconductor layer is 12nm-80nm; wherein,
the thickness of the first doped semiconductor layer is 10nm-50nm, and the thickness of the second doped semiconductor layer is 2nm-30nm.
5. The solar cell of claim 3, wherein a doping concentration of the first doped semiconductor layer is greater than or equal to a doping concentration of the second doped semiconductor layer.
6. The solar cell of claim 3, wherein the first doped semiconductor layer has a doping concentration of 5 x 10 20 atoms/cm 3 -3×10 21 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The doping concentration of the second doped semiconductor layer is 3×10 20 atoms/cm 3 -2×10 21 atoms/cm 3 。
7. The solar cell of claim 3, wherein the thickness of the barrier layer is less than or equal to the thickness of the tunnel oxide layer.
8. A solar cell according to claim 3, wherein the thickness of the barrier layer is 0.5nm-3nm and the thickness of the tunnel oxide layer is 1nm-3nm.
9. The solar cell of claim 1, further comprising: an anti-reflection layer; the doped semiconductor layer is positioned on one side of the semiconductor substrate layer facing away from the semiconductor substrate layer; a gate line electrode; and the anti-reflection layer is positioned on one side of the anti-reflection layer, which faces away from the semiconductor substrate layer.
10. The solar cell according to claim 1, wherein the solar cell comprises a P-IBC cell, an N-IBC cell or a TOPCon cell.
11. A method of manufacturing a solar cell, comprising:
providing a semiconductor substrate layer;
forming a tunneling oxide layer on the back surface of the semiconductor substrate layer;
alternately forming a doped semiconductor layer and a blocking layer on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer, so as to form at least two doped semiconductor layers on one side of the tunneling oxide layer, which is away from the semiconductor substrate layer; and forming a barrier layer between adjacent doped semiconductor layers.
12. The method of manufacturing a solar cell according to claim 11, wherein the doped semiconductor layer comprises a first doped semiconductor layer and a second doped semiconductor layer; the step of forming at least two doped semiconductor layers on the side of the tunneling oxide layer facing away from the semiconductor substrate layer comprises the following steps: forming a first doped semiconductor layer on one side of the tunneling oxide layer away from the semiconductor substrate layer; after the first doped semiconductor layer is formed, a barrier layer is formed on one side of the first doped semiconductor layer, which faces away from the semiconductor substrate layer; after forming the barrier layer, a second doped semiconductor layer is formed on a side of the barrier layer facing away from the semiconductor substrate layer.
13. The method of claim 12, wherein the solar cell is fabricated using a PECVD process, and wherein the step of forming the tunnel oxide layer comprises: forming the tunneling oxide layer by adopting a nitrous oxide plasma oxidation method; argon is introduced in the process of forming the tunneling oxide layer to assist ionization of nitrous oxide;
the step of forming the first doped semiconductor layer includes: introducing silane, phosphane and argon, and forming a first doped semiconductor layer by utilizing plasma ionization silane; or introducing silane, phosphane and hydrogen, and forming a first doped semiconductor layer by utilizing plasma ionization silane;
the step of forming the barrier layer includes: forming a barrier layer by adopting a nitrous oxide plasma oxidation method, or introducing silane and nitrous oxide, and forming the barrier layer by utilizing the reaction of ionized silane and nitrous oxide; argon is introduced to assist in ionization of nitrous oxide in the process of forming the barrier layer;
the step of forming the second doped semiconductor layer includes: introducing silane, phosphane and argon, and forming a second doped semiconductor layer by utilizing plasma ionization silane; or introducing silane, phosphane and hydrogen, and forming a second doped semiconductor layer by utilizing plasma ionization silane.
14. The method of claim 13, wherein the parameters for forming the tunnel oxide layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-300s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm;
the parameters for forming the barrier layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-100s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm;
the forming of the first doped semiconductor layer and the forming of the second doped semiconductor layer have the same parameters, including: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-400pa; the time is 50s-300s; the flow rate of silane is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm; the flow rate of the hydrogen is 5000sccm to 20000sccm.
15. The method of claim 12, wherein the solar cell is fabricated using an LPCVD route, and wherein the step of forming the tunnel oxide layer comprises: introducing oxygen and forming a tunneling oxide layer by using a thermal oxidation mode;
The step of forming the first doped semiconductor layer includes: introducing silane and phosphorus oxychloride, and forming a first doped semiconductor layer by utilizing thermal dissociation silane;
the step of forming the barrier layer includes: introducing oxygen and forming a barrier layer by using a thermal oxidation mode;
the step of forming the second doped semiconductor layer includes: and introducing silane and phosphorus oxychloride, and forming a second doped semiconductor layer by utilizing the thermal dissociation silane.
16. The method of claim 15, wherein the parameters for forming the tunnel oxide layer include: the temperature is 550-700 ℃ and the time is 200-600 s; the flow rate of the oxygen is 5000sccm-50000sccm;
the parameters for forming the barrier layer include: the temperature is 550-700 ℃ and the time is 100-300 s; the flow rate of the oxygen is 5000sccm-50000sccm;
the forming of the first doped semiconductor layer and the forming of the second doped semiconductor layer have the same parameters, including: the temperature is 550-700 ℃ and the time is 500-1000 s; the pressure is 150pa-400pa; the flow rate of silane is 1000sccm to 3000sccm.
17. The method of claim 12, wherein the solar cell is fabricated using a PVD route, and wherein the step of forming the tunnel oxide layer comprises: forming a tunneling oxide layer by adopting a nitrous oxide plasma oxidation method; argon is introduced in the process of forming the tunneling oxide layer to assist ionization of nitrous oxide;
The step of forming the first doped semiconductor layer includes: forming a first doped semiconductor layer by means of magnetron sputtering; introducing phosphane and argon in the process of forming the first doped semiconductor layer; alternatively, phosphine and hydrogen are introduced;
the process for forming the barrier layer comprises the following steps: forming a barrier layer by adopting a nitrous oxide plasma oxidation method, or introducing silane and nitrous oxide, and forming the barrier layer by utilizing the reaction of ionized silane and nitrous oxide; argon is introduced to assist in ionization of nitrous oxide in the process of forming the barrier layer;
the step of forming the second doped semiconductor layer includes: forming a second doped semiconductor layer by means of magnetron sputtering; introducing phosphane and argon in the process of forming the second doped semiconductor layer; alternatively, phosphine and hydrogen are introduced.
18. The method of claim 17, wherein the parameters for forming the tunnel oxide layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-300s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm;
The parameters for forming the barrier layer include: the radio frequency power is 10000W-20000W, the radio frequency opening time is 2 mu s-10 mu s, and the radio frequency closing time is 40 mu s-300 mu s; the pressure is 130pa-250pa; the time is 50s-100s; the flow rate of the nitrous oxide is 5000sccm-20000sccm; the flow rate of argon is 5000sccm-20000sccm;
the forming of the first doped semiconductor layer and the forming of the second doped semiconductor layer have the same parameters, including: the sputtering power is 10000W-20000W; the pressure is 130pa-400pa; the time is 50s-300s; the flow rate of the argon is 1000sccm-10000sccm; the flow rate of the hydrogen gas is 1000sccm-10000sccm.
19. The method of manufacturing a solar cell according to claim 11, further comprising: forming an anti-reflection layer on one side of the doped semiconductor layer away from the semiconductor substrate layer;
and forming a grid line electrode on one side of the anti-reflection layer, which is away from the semiconductor substrate layer.
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