CN117079597A - Display driving circuit, display driving method and display panel - Google Patents

Display driving circuit, display driving method and display panel Download PDF

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Publication number
CN117079597A
CN117079597A CN202311134334.3A CN202311134334A CN117079597A CN 117079597 A CN117079597 A CN 117079597A CN 202311134334 A CN202311134334 A CN 202311134334A CN 117079597 A CN117079597 A CN 117079597A
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China
Prior art keywords
transistor
unit
node
display
line
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CN202311134334.3A
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Chinese (zh)
Inventor
蒲洋
谢俊烽
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HKC Co Ltd
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HKC Co Ltd
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Priority to CN202311134334.3A priority Critical patent/CN117079597A/en
Publication of CN117079597A publication Critical patent/CN117079597A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application belongs to the field of display, and particularly relates to a display driving circuit, a display driving method and a display panel, wherein a storage unit in the display driving circuit is connected with a first node, a second node and a second power line, a first light-emitting control unit is connected with a first light-emitting control line, the first power line and the second node, a control end, a first end and a second end of a data writing unit are respectively connected with a first scanning line, a data line and the first node, a control end, a first end and a second end of a compensation unit are respectively connected with a second scanning line, the first node and a third node, and a second light-emitting control unit is connected with a second light-emitting control line, a third node and a display light-emitting unit. When the display driving circuit works, the storage of the threshold voltage into the storage unit and the compensation of the threshold voltage are completed in the time except the data writing, the compensation time is not limited by the scanning time, the situation that the threshold voltage is not fully compensated can be avoided, and the problem of uneven display of the display panel is improved.

Description

Display driving circuit, display driving method and display panel
Technical Field
The application belongs to the field of display, and particularly relates to a display driving circuit, a display driving method and a display panel.
Background
An OLED (Organic Light-Emitting Diode) display panel has many advantages of self-luminescence, flexibility, thin thickness, high brightness, low power consumption, fast response, wide color gamut, etc., and is widely used in electronic products such as televisions, mobile phones, notebooks, etc.
The driving mode of the organic light emitting diode is current driving. The display driving circuit comprises a driving transistor, and the opening degree of the driving transistor determines the current of the organic light emitting diode, so as to determine the brightness of the organic light emitting diode. Since there is a difference in threshold voltage (Vth) of different driving transistors, the display driving circuit needs to compensate for the threshold voltage in order to eliminate display unevenness caused by the difference in threshold voltage.
Currently, the display driving circuits compensate the threshold voltage by using the data signal. However, the refresh rate of the OLED display panel is higher and higher, and the scanning time per frame is shorter and shorter. The data signal is used for compensating the threshold voltage, the compensation time is limited by the scanning time, and the threshold voltage cannot be sufficiently compensated, so that the display panel is non-uniform.
Disclosure of Invention
The application aims to provide a display driving circuit, a display driving method and a display panel, so as to improve the problem of uneven display of the display panel.
In order to achieve the above object, the present application provides a display driving circuit, including a first transistor, a control terminal of the first transistor is connected to a data line, a first terminal of the first transistor is connected to a first power line, a second terminal of the first transistor is connected to a second power line through a display light emitting unit, and a voltage of the first power line is greater than a voltage of the second power line, the display driving circuit further includes:
the storage unit is connected with the control end of the first transistor through a first node, is connected with the first end of the first transistor through a second node, and is also connected with the second power line;
the control end of the first light-emitting control unit is connected with a first light-emitting control line, the first end of the first light-emitting control unit is connected with the first power line, and the second end of the first light-emitting control unit is connected with the second node;
the control end of the data writing unit is connected with a first scanning line, the first end of the data writing unit is connected with the data line, and the second end of the data writing unit is connected with the first node;
the control end of the compensation unit is connected with the second scanning line, the first end of the compensation unit is connected with the first node, the second end of the compensation unit is connected with the second end of the first transistor through the third node, and the compensation unit is used for compensating the threshold voltage of the first transistor;
the control end of the second light-emitting control unit is connected with a second light-emitting control line, the first end of the second light-emitting control unit is connected with the third node, and the second end of the second light-emitting control unit is connected with the second power line through the display light-emitting unit.
Optionally, the storage unit includes a first capacitor and a second capacitor, two ends of the first capacitor are respectively connected with the first node and the second node, and two ends of the second capacitor are respectively connected with the second node and the second power line.
Optionally, the data writing unit includes a second transistor, a control end of the second transistor is connected to the first scan line, a first end of the second transistor is connected to the data line, and a second end of the second transistor is connected to the first node;
the compensation unit includes a third transistor, a control terminal of the third transistor is connected to the second scan line, a first terminal of the third transistor is connected to the first node, and a second terminal of the third transistor is connected to the third node.
Optionally, the first light emitting control unit includes a fourth transistor, a control terminal of the fourth transistor is connected to the first light emitting control line, a first terminal of the fourth transistor is connected to the first power line, and a second terminal of the fourth transistor is connected to the second node;
the second light-emitting control unit comprises a fifth transistor, the control end of the fifth transistor is connected with a second light-emitting control line, the first end of the fifth transistor is connected with the third node, and the second end of the fifth transistor is connected with the second power line through the display light-emitting unit.
Optionally, the data line voltage is Vdata, the second power line voltage is Vss, and Vdata < Vss.
Optionally, the display light emitting unit includes an organic light emitting diode, the second end of the fifth transistor is connected with an anode of the organic light emitting diode through a fourth node, and a cathode of the organic light emitting diode is connected with the second power line;
the display driving circuit further comprises a reset unit, the reset unit comprises a sixth transistor, the control end of the sixth transistor is connected with the third scanning line, the first end of the sixth transistor is connected with the reset signal line, and the second end of the sixth transistor is connected with the fourth node.
Optionally, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are P-type thin film transistors.
The present application also provides a display driving method for controlling the display driving circuit, the display driving method comprising:
in a pre-compensation stage, controlling the first light-emitting control unit and the data writing unit to be closed, controlling the second light-emitting control unit and the compensation unit to be opened, and releasing charges of the first node and the second node;
in a data writing stage, the first light-emitting control unit, the second light-emitting control unit and the compensation unit are controlled to be closed, the data writing unit is controlled to be opened, and the data line voltage is written into the storage unit;
in the compensation stage, the second light-emitting control unit, the data writing unit and the compensation unit are controlled to be closed, the first light-emitting control unit is controlled to be opened, and the first power line voltage is written into the second node;
and in the light emitting stage, the data writing unit and the compensation unit are controlled to be closed, and the first light emitting control unit and the second light emitting control unit are controlled to be opened, so that the first power line and the second power line are conducted through the first transistor and the display light emitting unit.
The present application also provides a display panel including:
a substrate base;
a plurality of display light emitting units arranged on the substrate at intervals along the row direction and the column direction;
the display driving circuits are connected with the display light-emitting units in a one-to-one correspondence manner;
and the grid driving units are cascaded, the grid driving units of each row are connected with the display driving circuits of the corresponding row through the first scanning lines and the second scanning lines of the corresponding row, and the grid driving units of the first row are connected with the driving chip.
Optionally, the display light emitting unit includes an organic light emitting diode, a second end of the second light emitting control unit is connected with an anode of the organic light emitting diode through a fourth node, a cathode of the organic light emitting diode is connected with the second power line, the display driving circuit further includes a reset unit, the reset unit includes a sixth transistor, a control end of the sixth transistor is connected with a third scan line, a first end of the sixth transistor is connected with a reset signal line, and a second end of the sixth transistor is connected with the fourth node;
the third scanning line of the nth row is connected with the grid driving unit of the n-1 th row, n is more than or equal to 2, and the third scanning line of the 1 st row is connected with the driving chip.
The display driving circuit, the display driving method and the display panel disclosed by the application have the following beneficial effects:
in the application, a storage unit is connected with a control end of a first transistor through a first node, is connected with a first end of the first transistor through a second node, is also connected with a second power line, a control end, a first end and a second end of a first light-emitting control unit are respectively connected with the first light-emitting control line, the first power line and the second node, a control end, a first end and a second end of a data writing unit are respectively connected with a first scanning line, a data line and the first node, a control end, a first end and a second end of a compensation unit are respectively connected with the second scanning line, the first node and the third node and are used for compensating threshold voltage of the first transistor, and a control end, a first end and a second end of the second light-emitting control unit are respectively connected with the second light-emitting control line, the third node and a display light-emitting unit, and the display light-emitting unit is connected with the second power line. When the display driving circuit works, the storage of the threshold voltage into the storage unit and the compensation of the threshold voltage are completed in the time except the data writing, the data line voltage is not needed to participate, the compensation time is not limited by the scanning time, the situation that the threshold voltage is not fully compensated can be avoided, and the problem of uneven display of the display panel is solved.
Other features and advantages of the application will be apparent from the following detailed description, or may be learned by the practice of the application.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic diagram of a display driving circuit according to a first embodiment of the application.
Fig. 2 is a timing diagram of a display driving circuit according to a first embodiment of the application.
Fig. 3 is a schematic diagram of a pre-compensation stage of the display driving circuit according to the first embodiment of the application.
Fig. 4 is a schematic diagram of an initialization stage of the display driving circuit according to the first embodiment of the application.
Fig. 5 is a schematic diagram of a data writing stage of the display driving circuit according to the first embodiment of the application.
Fig. 6 is a schematic diagram of a compensation stage of the display driving circuit according to the first embodiment of the application.
Fig. 7 is a schematic diagram of a light emitting stage of the display driving circuit according to the first embodiment of the application.
Fig. 8 is a flowchart of a display driving method in the second embodiment of the application.
Fig. 9 is a schematic structural diagram of a display panel according to a third embodiment of the present application.
Reference numerals illustrate:
100. a display driving circuit;
110. a first transistor; 120. a storage unit; 121. a first capacitor; 122. a second capacitor;
130. a first light emission control unit; 131. a fourth transistor; 140. a second light emission control unit; 141. a fifth transistor; 150. a data writing unit; 151. a second transistor; 160. a compensation unit; 161. a third transistor; 171. a first power line; 172. a second power line; 173. a data line; 174. a first light emitting control line; 175. a second light emission control line; 176. a first scan line; 177. a second scanning line; 178. a third scan line; 179. a reset signal line;
180. a reset unit; 181. a sixth transistor;
200. a display light emitting unit; 300. a gate driving unit; 400. a substrate.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the application. One skilled in the relevant art will recognize, however, that the application may be practiced without one or more of the specific details, or with other methods, components, devices, steps, etc. In other instances, well-known methods, devices, implementations, or operations are not shown or described in detail to avoid obscuring aspects of the application.
The application will be described in further detail with reference to the drawings and the specific examples. It should be noted that the technical features of the embodiments of the present application described below may be combined with each other as long as they do not collide with each other. The embodiments described below by referring to the drawings are illustrative and intended to explain the present application and should not be construed as limiting the application.
Example 1
Referring to fig. 1 to 7, the display driving circuit 100 in this embodiment includes a first transistor 110, a storage unit 120, a first light emission control unit 130, a second light emission control unit 140, a data writing unit 150, and a compensation unit 160. The control terminal of the first transistor 110 is connected to the data line 173, the first terminal of the first transistor 110 is connected to the first power line 171, and the second terminal of the first transistor 110 is connected to the second power line 172 through the display light emitting unit 200. The first transistor 110 is a driving transistor, and drives the display light emitting unit 200 to emit light. The first transistor 110 may be a P-type thin film transistor, and the control terminal, the first terminal and the second terminal of the first transistor 110 may be a gate, a source and a drain thereof, respectively. The first power line 171 has a voltage of Vdd, and the second power line 172 has a voltage of Vss, vdd > Vss. The voltage Vss of the second power line 172 is less than or equal to 0, for example, the voltage Vss of the second power line 172 may be 0V or-1V, etc.
The memory cell 120 is connected to the control terminal of the first transistor 110 through a first node a, and the memory cell 120 is connected to the first terminal of the first transistor 110 through a second node B. Further, the memory cell 120 is also connected to a second power line 172. The memory cell 120 is used to store charge, maintaining the voltages of the first node a and the second node B. The control terminal of the first light emitting control unit 130 is connected to the first light emitting control line 174, the first terminal of the first light emitting control unit 130 is connected to the first power line 171, and the second terminal of the first light emitting control unit 130 is connected to the second node B.
The control terminal of the data writing unit 150 is connected to the first scan line 176, the first terminal of the data writing unit 150 is connected to the data line 173, and the second terminal of the data writing unit 150 is connected to the first node a. The control terminal of the compensation unit 160 is connected to the second scan line 177, the first terminal of the compensation unit 160 is connected to the first node a, the second terminal of the compensation unit 160 is connected to the second terminal of the first transistor 110 through the third node C, and the compensation unit 160 is configured to compensate the threshold voltage Vth of the first transistor 110. The control end of the second light emitting control unit 140 is connected to the second light emitting control line 175, the first end of the second light emitting control unit 140 is connected to the third node C, and the second end of the second light emitting control unit 140 is connected to the second power line 172 through the display light emitting unit 200.
The first light emission control line 174 signal EM1, the second light emission control line 175 signal EM2, the first scan line 176 signal G1, the second scan line 177 signal G2, and a third scan line 178 signal G3, which will be referred to later, are shown in fig. 2. In fig. 3 to 7, x represents off.
The display driving circuit 100 operates: in the pre-compensation period T1, the first light emission control unit 130 and the data writing unit 150 are turned off, the second light emission control unit 140 and the compensation unit 160 are turned on, the first node a and the second node B are charge-discharged, and the threshold voltage Vth is stored in the memory unit 120; in the data writing period T3, the first light emitting control unit 130, the second light emitting control unit 140 and the compensation unit 160 are turned off, the data writing unit 150 is turned on, and the data line 173 is voltage-written into the memory unit 120; in the compensation phase T4, the second light emission control unit 140, the data writing unit 150, and the compensation unit 160 are turned off, the first light emission control unit 130 is turned on, the first power line 171 voltage is written into the second node B, and the threshold voltage Vth is compensated such that the current flowing through the driving transistor is not affected by the threshold voltage Vth; in the light emitting period T5, the data writing unit 150 and the compensation unit 160 are turned off, the first light emitting control unit 130 and the second light emitting control unit 140 are turned on, and current flows to the display light emitting unit 200 through the first light emitting control unit 130, the first transistor 110, and the second light emitting control unit 140, and the display light emitting unit 200 emits light.
The refresh rate of the OLED display panel is higher and the scanning time per frame is shorter. If the threshold voltage is compensated by the data signal, the compensation time is limited by the scan time, resulting in insufficient compensation of the threshold voltage and thus non-uniformity of display of the display panel.
In this embodiment, the storage unit 120 is connected to the control terminal of the first transistor 110 through the first node a, is connected to the first terminal of the first transistor 110 through the second node B, is further connected to the second power line 172, the control terminal, the first terminal and the second terminal of the first light emitting control unit 130 are respectively connected to the first light emitting control line 174, the first power line 171 and the second node B, the control terminal, the first terminal and the second terminal of the data writing unit 150 are respectively connected to the first scan line 176, the data line 173 and the first node a, the control terminal, the first terminal and the second terminal of the compensation unit 160 are respectively connected to the second scan line 177, the first node a and the third node C for compensating the threshold voltage Vth of the first transistor 110, the control terminal, the first terminal and the second terminal of the second light emitting control unit 140 are respectively connected to the second light emitting control line 175, the third node C and the display light emitting unit 200, and the display light emitting unit 200 are respectively connected to the second power line 172. When the display driving circuit 100 works, the storage of the threshold voltage Vth into the memory cell 120 and the compensation of the threshold voltage Vth are completed in a time other than the data writing, the voltage of the data line 173 is not needed, the compensation time is not limited by the scanning time, the threshold voltage Vth is prevented from being fully compensated, and the problem of uneven display of the display panel is improved.
Referring to fig. 3 and 7, the memory cell 120 includes a first capacitor 121 and a second capacitor 122, both ends of the first capacitor 121 are connected to a first node a and a second node B, respectively, and both ends of the second capacitor 122 are connected to a second node B and a second power line 172, respectively. The first capacitor 121 is mainly used for storing the threshold voltage Vth, and the second capacitor 122 is mainly used for balancing the charge of the first capacitor 121.
In the pre-compensation phase T1, the first light emission control unit 130 and the data writing unit 150 are turned off, and the second light emission control unit 140 and the compensation unit 160 are turned on. For the first transistor 110, at the beginning of the precompensation stage T1, the first node a potential VA and the second node B potential VB remain at the end of the previous frame (the light emitting stage T5), the first node a will release the charge through the compensation unit 160 and the display light emitting unit 200, and the second node B will release the charge through the first transistor 110 and the display light emitting unit 200 until va=voled, vb=voled+vth, where Voled is the initial light emitting voltage of the display light emitting unit 200. As for the first transistor 110, when the source-gate voltage difference thereof is equal to the threshold voltage Vth, that is, vsg=vb-va=vth, the first transistor 110 is changed from the on state to the off state at this time.
In the data writing period T3, the first light emitting control unit 130, the second light emitting control unit 140 and the compensation unit 160 are turned off, the data writing unit 150 is turned on, and the data line 173 is voltage-written to the memory unit 120. The voltage of the data line 173 is written into the first node a through the data writing unit 150, the voltage of the data line 173 is Vdata, the potential VA of the first node a is Vdata, and the potential VB of the second node B is:
VB＝C1/(C1+C2)×(Vdata-Voled)+Voled+Vth。
for the first transistor 110, vsg=vb-va=c2/(c1+c2) × (Voled-Vdata) +vth, where the first transistor 110 is switched on or off according to the magnitude of Vdata and Voled absolute values.
In the compensation phase T4, the second light emission control unit 140, the data writing unit 150, and the compensation unit 160 are turned off, and the first light emission control unit 130 is turned on. The second node B is charged to Vdd by the first power line 171 voltage through the first light emitting control unit 130, so that the first node a potential VA becomes:
VA＝Vdata+Vdd-(VB)
＝Vdata+Vdd-(C1/(C1+C2)×Vdata+C2/(C1+C2)×Voled+Vth)
＝C2/(C1+C2)×(Vdata-Voled)+Vdd-Vth。
at this time, the source-to-gate voltage difference Vgs of the first transistor 110 is:
Vsg＝VB-VA＝Vdd-(C2/(C1+C2)×(Vdata-Voled)+Vdd-Vth)
＝C2/(C1+C2)×(Voled-Vdata)+Vth。
when the source-to-gate voltage difference Vgs of the first transistor 110 is greater than the threshold voltage Vth, the first transistor 110 is turned on, and the driving current Ioled flowing through the first transistor 110 pair is:
Ioled＝1/2×K×(Vsg-Vth) 2
＝1/2×K×(C2/(C1+C2)×(Voled-Vdata)) 2 。
where k=μ×w/L, μ is carrier mobility, is a channel width of the first transistor 110, and L is a channel length of the first transistor 110.
As can be seen from the driving current Ioled formula, the driving current Ioled is not affected by the first power line 171 voltage Vdd and the threshold voltage Vth, and compensates not only for the threshold voltage Vth but also for the voltage drop of the first power line 171 voltage Vdd. In addition, when the display light emitting unit 200 is attenuated, the initial light emitting voltage Voled thereof increases, and the driving current Ioled increases accordingly, thereby compensating for the decrease in brightness caused by the attenuation of the display light emitting unit 200.
Referring to fig. 1 and 2, the data writing unit 150 includes a second transistor 151, a control terminal of the second transistor 151 is connected to a first scan line 176, a first terminal of the second transistor 151 is connected to a data line 173, and a second terminal of the second transistor 151 is connected to a first node a. The compensation unit 160 includes a third transistor 161, a control terminal of the third transistor 161 is connected to the second scan line 177, a first terminal of the third transistor 161 is connected to the first node a, and a second terminal of the third transistor 161 is connected to the third node C. The second transistor 151 and the third transistor 161 may be P-type thin film transistors, and the control terminal, the first terminal, and the second terminal of the second transistor 151 and the third transistor 161 may be gates, sources, and drains thereof, respectively.
The data writing unit 150 includes a second transistor 151 to control the threshold voltage compensation by one transistor, and the compensation unit 160 includes a third transistor 161 to control the data writing by one transistor, and the structure of the display driving circuit 100 is simpler.
Referring to fig. 1 and 2, the first light emitting control unit 130 includes a fourth transistor 131, a control terminal of the fourth transistor 131 is connected to a first light emitting control line 174, a first terminal of the fourth transistor 131 is connected to a first power line 171, and a second terminal of the fourth transistor 131 is connected to a second node B. The second light emission control unit 140 includes a fifth transistor 141, a control terminal of the fifth transistor 141 is connected to the second light emission control line 175, a first terminal of the fifth transistor 141 is connected to the third node C, and a second terminal of the fifth transistor 141 is connected to the second power line 172 through the display light emission unit 200. The fourth transistor 131 and the fifth transistor 141 may be P-type thin film transistors, and the control terminal, the first terminal, and the second terminal of the fourth transistor 131 and the fifth transistor 141 may be gates, sources, and drains thereof, respectively.
The first light emitting control unit 130 includes a fourth transistor 131, on and off of the first power line 171 and the second node B are controlled by one transistor, while the second light emitting control unit 140 includes a fifth transistor 141, on and off of the third node C and the display light emitting unit 200 are controlled by one transistor, and the structure of the display driving circuit 100 is simpler.
In some embodiments, the data line 173 voltage is Vdata, the second power line 172 voltage is Vss, vdata < Vss. For example, the voltage Vss of the second power line 172 is 0, and the voltage Vdata of the data line 173 is a negative voltage.
In the compensation phase T4, the source-to-gate voltage difference Vgs of the first transistor 110 is:
Vsg＝VB-VA＝Vdd-(C2/(C1+C2)×(Vdata-Voled)+Vdd-Vth)
＝C2/(C1+C2)×(Voled-Vdata)+Vth。
when the data line 173 voltage Vdata is negative, vgs is necessarily greater than Vth, and the first transistor 110 is turned on.
It should be noted that the voltage Vdata of the data line 173 may be a negative voltage, but is not limited thereto, and Voled-Vdata may be set to be greater than 0, as the case may be.
Referring to fig. 4, the display light emitting unit 200 includes an organic light emitting diode. The second terminal of the fifth transistor 141 is connected to an anode of the organic light emitting diode through the fourth node D, and a cathode of the organic light emitting diode is connected to the second power line 172.
The display driving circuit 100 further includes a reset unit 180, and the reset unit 180 includes a sixth transistor 181. A control terminal of the sixth transistor 181 is connected to the third scan line 178, a first terminal of the sixth transistor 181 is connected to the reset signal line 179, and a second terminal of the sixth transistor 181 is connected to the fourth node D. The sixth transistor 181 may be a P-type thin film transistor, and the control terminal, the first terminal and the second terminal of the sixth transistor 181 may be a gate, a source and a drain, respectively. The reset signal line 179 has a voltage Vini smaller than the initial light emission voltage Voled of the display light emitting unit 200.
In the reset period T2, the second light emission control unit 140 is turned off, the sixth transistor 181 is turned on, and a current flows through the display light emission unit 200. The reset signal line 179 has a voltage Vini smaller than the initial light emission voltage Voled of the display light emitting unit 200, and a reset period T2, the display light emitting unit 200 does not emit light.
The display driving circuit 100 further includes a reset unit 180 that resets the display light emitting units 200 before the light emitting period T5, so that all the display light emitting units 200 are in the same state before each light emission.
In some embodiments, the first transistor 110, the second transistor 151, the third transistor 161, the fourth transistor 131, the fifth transistor 141, and the sixth transistor 181 are P-type thin film transistors.
Six transistors in the display driving circuit 100 are P-type thin film transistors, the structure of the display driving circuit 100 is simpler, the display driving circuit 100 is used in a display panel, and the manufacturing cost of the display panel can be reduced.
Note that, the first transistor 110, the second transistor 151, the third transistor 161, the fourth transistor 131, the fifth transistor 141, and the sixth transistor 181 may be P-type thin film transistors, but not limited thereto, and one or more of the first transistor 110, the second transistor 151, the third transistor 161, the fourth transistor 131, the fifth transistor 141, and the sixth transistor 181 may be N-type thin film transistors, as the case may be. When one or more of the first transistor 110, the second transistor 151, the third transistor 161, the fourth transistor 131, the fifth transistor 141, and the sixth transistor 181 may be an N-type thin film transistor, the high and low levels of the first light emitting control line 174, the second light emitting control line 175, the first scan line 176, the second scan line 177, and the third scan line 178 are adjusted accordingly.
Example two
In this embodiment, the display driving method is used to control the display driving circuit 100 in the first embodiment. Referring to fig. 3 to 8, the display driving method includes:
s100: in the pre-compensation phase T1, the first light emission control unit 130 and the data writing unit 150 are controlled to be turned off, the second light emission control unit 140 and the compensation unit 160 are controlled to be turned on, and the charges of the first node and the second node are released;
s300: in the data writing stage T3, the first light emitting control unit 130, the second light emitting control unit 140 and the compensation unit 160 are controlled to be turned off, the data writing unit 150 is controlled to be turned on, and the voltage of the data line 173 is written into the memory unit 120;
s400: in the compensation phase T4, the second light emission control unit 140, the data writing unit 150, and the compensation unit 160 are controlled to be turned off, the first light emission control unit 130 is controlled to be turned on, and the voltage of the first power line 171 is written into the second node;
s500: in the light emitting period T5, the data writing unit 150 and the compensation unit 160 are controlled to be turned off, and the first light emitting control unit 130 and the second light emitting control unit 140 are controlled to be turned on, so that the first power line 171 and the second power line 172 are turned on through the first transistor 110 and the display light emitting unit 200.
In the pre-compensation period T1, the first light emission control unit 130 and the data writing unit 150 are turned off, the second light emission control unit 140 and the compensation unit 160 are turned on, the first node a and the second node B are charge-discharged, and the threshold voltage Vth is stored in the memory unit 120; in the data writing period T3, the first light emitting control unit 130, the second light emitting control unit 140 and the compensation unit 160 are turned off, the data writing unit 150 is turned on, and the data line 173 is voltage-written into the memory unit 120; in the compensation period T4, the second light emission control unit 140, the data writing unit 150, and the compensation unit 160 are turned off, the first light emission control unit 130 is turned on, the first power line 171 voltage is written into the second node B, and the threshold voltage Vth is compensated such that the current flowing through the driving transistor is not affected by the threshold voltage Vth. Because the storage of the threshold voltage Vth into the memory cell 120 and the compensation of the threshold voltage Vth are completed in a time other than the data writing, and the voltage of the data line 173 is not required, the compensation time is not limited by the scanning time, the insufficient compensation of the threshold voltage Vth can be avoided, and the display non-uniformity problem of the display panel is improved.
Further, before the data writing stage T3, the display driving method includes:
s200: in the reset period T2, the first light emission control unit 130, the second light emission control unit 140, the data writing unit 150, and the compensation unit 160 are controlled to be turned off, and the reset unit 180 is controlled to be turned on, so that a current flows through the reset signal line 179, the display light emitting unit 200, and the second power line 172.
It should be noted that, the reset phase T2 may be located between the pre-compensation phase T1 and the data writing phase T3, but is not limited thereto, and the reset phase T2 only needs to keep the second light-emitting control unit 140 turned off, so that the reset of the display light-emitting unit 200 may be completed synchronously in the data writing phase T3 or the compensation phase T4, as the case may be.
Example III
Referring to fig. 9, the display panel in this embodiment includes a display driving circuit 100, a display light emitting unit 200, a gate driving unit 300, and a substrate base 400. A plurality of display light emitting units 200 are disposed on the substrate 400 at intervals in the row direction and the column direction, and the display light emitting units 200 include organic light emitting diodes. The display driving circuits 100 are connected to the display light emitting units 200 in a one-to-one correspondence. The plurality of rows of gate driving units 300 are cascaded, the gate driving units 300 of each row are connected to the display driving circuits 100 of the corresponding row through the first scanning lines 176 and the second scanning lines 177 of the corresponding row, and the gate driving units 300 of the first row are connected to the driving chips. The gate driving unit 300 may include a GOA (Gate driver on array, array substrate row driving) circuit.
When the display panel works, after the driving chip sends initial driving signals to the first gate driving units 300, the cascaded gate driving units 300 sequentially provide driving signals of the next gate driving units 300 by the previous gate driving units 300, so that scanning driving of all the gate driving units 300 is realized.
In this embodiment, the display panel includes a display driving circuit 100, and the display driving circuit 100 includes a first transistor 110, a storage unit 120, a first light emission control unit 130, a second light emission control unit 140, a data writing unit 150, and a compensation unit 160. In the precompensation phase T1, the first node a and the second node B are charge-released while the threshold voltage Vth is stored in the memory cell 120; in the data writing phase T3, the voltage of the data line 173 is written into the memory cell 120; in the compensation period T4, the voltage of the first power line 171 is written into the second node B to compensate the threshold voltage Vth, so that the current flowing through the driving transistor is not affected by the threshold voltage Vth. Because the storage of the threshold voltage Vth into the memory cell 120 and the compensation of the threshold voltage Vth are completed in a time other than the data writing, and the voltage of the data line 173 is not required, the compensation time is not limited by the scanning time, the insufficient compensation of the threshold voltage Vth can be avoided, and the display non-uniformity problem of the display panel is improved.
It should be noted that the gate driving unit 300 may include a GOA circuit, but is not limited thereto, and the gate driving unit 300 may also include a gate driving chip, as the case may be.
In some embodiments, the display driving circuit 100 further includes a reset unit 180, and the reset unit 180 includes a sixth transistor 181. A control terminal of the sixth transistor 181 is connected to the third scan line 178, a first terminal of the sixth transistor 181 is connected to the reset signal line 179, and a second terminal of the sixth transistor 181 is connected to the fourth node D. The third scan line 178 of the nth row is connected to the gate driving unit 300 of the n-1 th row, n is 2 or more, and the third scan line 178 of the 1 st row is connected to the driving chip. In addition, the second scan line 177 of the m-th row may be connected to the gate driving unit 300 of the n-2 th row, m is greater than 2, and the second scan lines 177 of the 1 st and 2 nd rows are connected to the driving chip.
The third scan line 178 of the n-th row is provided with the driving signal by the gate driving unit 300 of the n-1-th row, so that the structure of the gate driving unit 300 can be simplified, and the manufacturing cost of the display panel can be reduced.
The terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", etc. may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and the like are to be construed broadly, and may be fixedly attached, detachably attached, or integrally formed, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
In the description of the present specification, reference to the terms "some embodiments," "exemplary," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present application have been shown and described, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives and variations may be made in the above embodiments by those skilled in the art within the scope of the application, which is therefore intended to be covered by the appended claims and their equivalents.

Claims (10)

1. The utility model provides a display drive circuit, includes first transistor, the control end and the data line of first transistor are connected, the first end and the first power cord of first transistor are connected, the second end of first transistor is connected with the second power cord through the display lighting unit, first power cord voltage is greater than the second power cord voltage, its characterized in that, display drive circuit still includes:
the storage unit is connected with the control end of the first transistor through a first node, is connected with the first end of the first transistor through a second node, and is also connected with the second power line;
the control end of the first light-emitting control unit is connected with a first light-emitting control line, the first end of the first light-emitting control unit is connected with the first power line, and the second end of the first light-emitting control unit is connected with the second node;
the control end of the data writing unit is connected with a first scanning line, the first end of the data writing unit is connected with the data line, and the second end of the data writing unit is connected with the first node;
the control end of the compensation unit is connected with the second scanning line, the first end of the compensation unit is connected with the first node, the second end of the compensation unit is connected with the second end of the first transistor through the third node, and the compensation unit is used for compensating the threshold voltage of the first transistor;
the control end of the second light-emitting control unit is connected with a second light-emitting control line, the first end of the second light-emitting control unit is connected with the third node, and the second end of the second light-emitting control unit is connected with the second power line through the display light-emitting unit.
2. The display driver circuit according to claim 1, wherein the memory cell includes a first capacitor and a second capacitor, both ends of the first capacitor are connected to the first node and the second node, respectively, and both ends of the second capacitor are connected to the second node and the second power line, respectively.
3. The display driving circuit according to claim 2, wherein the data writing unit includes a second transistor, a control terminal of the second transistor is connected to the first scan line, a first terminal of the second transistor is connected to the data line, and a second terminal of the second transistor is connected to the first node;
the compensation unit includes a third transistor, a control terminal of the third transistor is connected to the second scan line, a first terminal of the third transistor is connected to the first node, and a second terminal of the third transistor is connected to the third node.
4. A display driver circuit according to claim 3, wherein the first light emission control unit includes a fourth transistor, a control terminal of the fourth transistor is connected to the first light emission control line, a first terminal of the fourth transistor is connected to the first power supply line, and a second terminal of the fourth transistor is connected to the second node;
the second light-emitting control unit comprises a fifth transistor, the control end of the fifth transistor is connected with a second light-emitting control line, the first end of the fifth transistor is connected with the third node, and the second end of the fifth transistor is connected with the second power line through the display light-emitting unit.
5. The display driver circuit of claim 4, wherein the data line voltage is Vdata, and the second power line voltage is Vss, vdata < Vss.
6. The display driving circuit according to claim 4, wherein the display light emitting unit includes an organic light emitting diode, a second terminal of the fifth transistor is connected to an anode of the organic light emitting diode through a fourth node, and a cathode of the organic light emitting diode is connected to the second power line;
the display driving circuit further comprises a reset unit, the reset unit comprises a sixth transistor, the control end of the sixth transistor is connected with the third scanning line, the first end of the sixth transistor is connected with the reset signal line, and the second end of the sixth transistor is connected with the fourth node.
7. The display driver circuit according to claim 6, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are P-type thin film transistors.
8. A display driving method for controlling the display driving circuit according to any one of claims 1 to 7, comprising:
in a pre-compensation stage, controlling the first light-emitting control unit and the data writing unit to be closed, controlling the second light-emitting control unit and the compensation unit to be opened, and releasing charges of the first node and the second node;
in a data writing stage, the first light-emitting control unit, the second light-emitting control unit and the compensation unit are controlled to be closed, the data writing unit is controlled to be opened, and the data line voltage is written into the storage unit;
in the compensation stage, the second light-emitting control unit, the data writing unit and the compensation unit are controlled to be closed, the first light-emitting control unit is controlled to be opened, and the voltage is written into the second node;
and in the light emitting stage, the data writing unit and the compensation unit are controlled to be closed, and the first light emitting control unit and the second light emitting control unit are controlled to be opened, so that the first power line and the second power line are conducted through the first transistor and the display light emitting unit.
9. A display panel, comprising:
a substrate base;
a plurality of display light emitting units arranged on the substrate at intervals along the row direction and the column direction;
the display driving circuit according to any one of claims 1 to 7, wherein the display driving circuit is connected to the display light emitting units in one-to-one correspondence;
and the grid driving units are cascaded, the grid driving units of each row are connected with the display driving circuits of the corresponding row through the first scanning lines and the second scanning lines of the corresponding row, and the grid driving units of the first row are connected with the driving chip.
10. The display panel according to claim 9, wherein the display light emitting unit includes an organic light emitting diode, a second terminal of the second light emitting control unit is connected to an anode of the organic light emitting diode through a fourth node, a cathode of the organic light emitting diode is connected to the second power line, the display driving circuit further includes a reset unit including a sixth transistor, a control terminal of the sixth transistor is connected to a third scan line, a first terminal of the sixth transistor is connected to a reset signal line, and a second terminal of the sixth transistor is connected to the fourth node;
the third scanning line of the nth row is connected with the grid driving unit of the n-1 th row, n is more than or equal to 2, and the third scanning line of the 1 st row is connected with the driving chip.
CN202311134334.3A 2023-08-31 2023-08-31 Display driving circuit, display driving method and display panel Pending CN117079597A (en)

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CN116386541A (en) * 2023-06-05 2023-07-04 惠科股份有限公司 Display driving circuit, display driving method and display panel
CN116543702A (en) * 2023-05-31 2023-08-04 惠科股份有限公司 Display driving circuit, display driving method and display panel

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CN112053661A (en) * 2020-09-28 2020-12-08 京东方科技集团股份有限公司 Pixel circuit, pixel driving method, display panel and display device
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