CN115527487A

CN115527487A - Pixel circuit, driving method thereof and display panel

Info

Publication number: CN115527487A
Application number: CN202211328991.7A
Authority: CN
Inventors: 潘康观; 郭恩卿; 盖翠丽; 李俊峰; 邢汝博; 郭双
Original assignee: Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2022-10-27
Filing date: 2022-10-27
Publication date: 2022-12-27

Abstract

The invention discloses a pixel circuit, a driving method thereof and a display panel, wherein the pixel circuit comprises a driving module, a first voltage writing module, a second voltage writing module, a coupling module, a compensation module, a storage module and a light-emitting module, wherein the second voltage writing module is connected with a first end of the coupling module and used for keeping the potential of the first end of the coupling module when the coupling module is conducted and continuously transmitting fixed voltage to the first end of the coupling module in a threshold compensation stage. According to the technical scheme provided by the embodiment, the threshold compensation is carried out before the data voltage is written into the control end of the driving module, so that the threshold compensation stage and the data writing stage are not influenced mutually, the time of the threshold compensation is not influenced by the data writing stage, and the threshold voltage of the driving module can be completely compensated even under the high refreshing frequency, so that the difference of the characteristics of the driving modules corresponding to different pixels can be reduced, the difference of the display brightness can be improved, and the uniformity of the display image quality can be improved.

Description

Pixel circuit, driving method thereof and display panel

Technical Field

The invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.

Background

With the development of display technology, the requirements of users on display quality are higher and higher.

When the display device is operated, the display device usually emits light by a current driving method, so the characteristics of the driving devices affect the display gray scale brightness, when the characteristic difference of the driving devices corresponding to different pixels is too large, the phenomenon of poor image quality is easy to occur, and when the dynamic refresh rate is switched, the problem of non-uniform display is easy to occur.

Disclosure of Invention

The invention provides a pixel circuit, a driving method thereof and a display panel, which are used for improving the uniformity of a display picture.

According to an aspect of the present invention, there is provided a pixel circuit including: the device comprises a driving module, a first voltage writing module, a second voltage writing module, a coupling module, a compensation module, a storage module and a light-emitting module;

the first voltage writing module is connected with the first end of the coupling module, the second end of the coupling module is connected with the control end of the driving module, the first voltage writing module is used for transmitting a data voltage to the first end of the coupling module in a data writing stage, and the coupling module is used for coupling the data voltage to the control end of the driving module;

the second voltage writing module is connected with the first end of the coupling module and used for keeping the potential of the first end of the coupling module when the coupling module is conducted and continuously transmitting fixed voltage to the first end of the coupling module in a threshold compensation stage;

the compensation module is connected between the first end and the control end of the driving module and used for charging the control end of the driving module in the threshold compensation stage so as to compensate the threshold voltage of the driving module;

the storage module is connected with the control end of the driving module and used for storing the voltage of the control end of the driving module; the driving module and the light-emitting module are connected between a first power line and a second power line, and the driving module is used for driving the light-emitting module to emit light at a light-emitting stage in a display period;

wherein the threshold compensation phase precedes the data writing phase in the same display period.

Optionally, the driving module includes a first transistor, the first voltage writing module includes a second transistor, the second voltage writing module includes a third transistor, the compensation module includes a fourth transistor, the coupling unit includes a first capacitor, and the storage module includes a second capacitor;

a first electrode of the first transistor is connected to a first power supply voltage on the first power supply line, a second electrode of the first transistor is connected to a first electrode of the fourth transistor, a second electrode of the fourth transistor is connected to a gate of the first transistor, a first electrode of the second transistor is connected to the data voltage, a second electrode of the second transistor is connected to a first electrode of the first capacitor, a second electrode of the second capacitor is connected to a gate of the first transistor, a first electrode of the third transistor is connected to the first power supply line, a second electrode of the third transistor is connected to a first electrode of the first capacitor, a gate of the second transistor is connected to a first scan signal, and a gate of the third transistor and a gate of the fourth transistor are both connected to a second scan signal; the first end of the second capacitor is connected with the first power line, and the second end of the second capacitor is connected with the grid electrode of the first transistor.

Optionally, the lighting control system further comprises a voltage bias module, a first lighting control module and a second lighting control module; the first light-emitting control module is connected between the first power line and the second end of the driving module, the second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module, and the second end of the light-emitting module is connected with the second power line;

the voltage bias module is connected with the second end of the driving module and used for transmitting a bias voltage to the control end of the driving module in the threshold compensation phase and transmitting the bias voltage to the second end of the driving module after the data writing phase.

Optionally, the display period includes a write frame and a hold frame, and the voltage bias module is further configured to transmit the bias voltage to the control terminal of the driving module through the turned-on compensation module in an initialization stage of the write frame to initialize the potential of the control terminal of the driving module, and transmit the bias voltage to the second terminal of the driving module again in the hold frame.

Optionally, the voltage bias module includes a fifth transistor, the first light emitting control module includes a sixth transistor, and the second light emitting control module includes a seventh transistor;

a gate of the fifth transistor is connected to a third scan signal, a first pole of the fifth transistor is connected to the bias voltage, a second pole of the fifth transistor is connected to the second end of the driving module, a gate of the sixth transistor is connected to a first light-emitting control signal, a first pole of the sixth transistor is connected to the first power line, a second pole of the sixth transistor is connected to the first end of the driving module, a gate of the seventh transistor is connected to a second light-emitting control signal, a first pole of the seventh transistor is connected to the second end of the driving module, and a second pole of the seventh transistor is connected to the first end of the light-emitting module;

preferably, the first light emission control signal is multiplexed into the second light emission control signal.

Optionally, the system further comprises a first initialization module and a second initialization module; the first initialization module is connected with the control end of the driving module and used for transmitting a first initialization voltage to the control end of the driving module in an initialization stage; the second initialization module is connected with the first end of the light emitting module and used for transmitting a second initialization voltage to the first end of the light emitting module;

the first initialization module comprises an eighth transistor, the second initialization module comprises a ninth transistor, a gate of the eighth transistor is connected to a fourth scan signal, a first pole of the eighth transistor is connected to the first initialization voltage, a second pole of the eighth transistor is connected to the control terminal of the driving module, a gate of the ninth transistor is connected to a third scan signal, a first pole of the ninth transistor is connected to the second initialization voltage, and a second pole of the ninth transistor is connected to the first terminal of the light emitting module;

preferably, the first initialization voltage is multiplexed into the second initialization voltage.

According to another aspect of the present invention, there is provided a driving method of a pixel circuit including a driving module, a first voltage writing module, a second voltage writing module, a coupling module, a compensation module, a storage module, and a light emitting module; the first voltage writing module is connected with the first end of the coupling module, the second end of the coupling module is connected with the control end of the driving module, the second voltage writing module is connected with the first end of the coupling module, the compensation module is connected between the first end and the control end of the driving module, the storage module is connected with the control end of the driving module, and the driving module and the light emitting module are connected between a first power line and a second power line;

the driving method of the pixel circuit includes:

in a threshold compensation stage, controlling the second voltage writing module to be conducted, and continuously transmitting a fixed voltage to the first end of the coupling module; controlling the compensation module to be conducted, and charging a control end of the driving module to compensate the threshold voltage of the driving module;

in a data writing stage, controlling the first voltage writing module to transmit a data voltage to a first end of the coupling module, and coupling the coupling module to write the data voltage into a control end of the driving module;

and controlling the driving module to drive the light-emitting module to emit light according to the voltages of the control end and the second end of the driving module in a light-emitting stage in a display period.

Optionally, the display period includes a write frame and a hold frame, wherein the write frame includes the threshold compensation phase, the data write phase and the light emitting phase; the pixel circuit further comprises a voltage bias module, and the voltage bias module is connected with the second end of the driving module;

the writing frame further includes a voltage bias stage between the data writing stage and the light emitting stage, and the driving method of the pixel circuit further includes:

in the voltage bias stage, controlling the voltage bias module to transmit bias voltage to the second end of the driving module;

in the threshold compensation stage, the step of controlling the compensation module to be conducted and charging the control end of the driving module to compensate the threshold voltage of the driving module includes:

in the threshold compensation stage, the voltage bias module and the compensation module are controlled to be conducted, and the bias voltage is transmitted to the control end of the driving module so as to compensate the threshold voltage of the driving module;

and in the holding frame, controlling the voltage bias module to be conducted and transmitting the bias voltage to the second end of the driving module.

Optionally, the pixel circuit further includes a first initialization module and a second initialization module, the first initialization module is connected to the control end of the driving module, and the second initialization module is connected to the first end of the light emitting module;

the write frame further includes a first initialization phase, a second initialization phase, and a third initialization phase, and the driving method further includes:

in the first initialization stage, controlling the voltage bias module to write the bias voltage into the control end of the driving module through the conducted compensation module, controlling the second voltage write module to write a fixed voltage into the first end of the coupling module, and controlling the second initialization module to transmit a second initialization voltage to the first end of the light emitting module;

in the second initialization stage, controlling the first initialization module to transmit a first initialization voltage to a control end of the control module;

and in the third initialization stage, controlling the first initialization module to transmit the first initialization voltage to the first end of the driving module through the conducted compensation module.

According to another aspect of the present invention, there is provided a display panel including the pixel circuit provided in any of the embodiments of the present invention.

According to the technical scheme, the pixel circuit comprises the second voltage writing module and the coupling module, the second voltage writing module is connected with the first end of the coupling module and used for keeping the potential of the first end of the coupling module when the pixel circuit is conducted, and fixed voltage is continuously transmitted to the first end of the coupling module in the threshold compensation stage, so that threshold compensation and data writing of the driving module are not conducted simultaneously, threshold compensation is conducted before data voltage is written into the control end of the driving module, the threshold compensation stage and the data writing stage are not influenced mutually, the time of the threshold compensation is not influenced by the data writing stage, even under high refreshing frequency, the threshold voltage of the driving module can be completely compensated, the difference of characteristics of the driving modules corresponding to different pixels can be reduced, the difference of display brightness can be improved, and the uniformity of display image quality can be improved.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

FIG. 4 is a waveform diagram of a driving timing of a pixel circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;

FIG. 8 is a waveform diagram of a driving timing of a pixel circuit in a write frame according to an embodiment of the present invention;

FIG. 9 is a waveform diagram of a driving timing of a pixel circuit in a hold frame according to an embodiment of the present invention;

fig. 10 is a flowchart of a driving method of a pixel circuit according to an embodiment of the invention;

fig. 11 is a flowchart of another driving method of a pixel circuit according to an embodiment of the invention;

fig. 12 is a flowchart of another driving method of a pixel circuit according to an embodiment of the invention;

fig. 13 is a schematic structural diagram of a display panel according to an embodiment of the present invention.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

As described in the background, the conventional pixel circuit cannot meet the requirement of uniformity of display brightness, and to solve this problem, the threshold voltage of the pixel circuit is usually compensated to improve the brightness uniformity of the whole display screen. The inventor researches and discovers that the above problem is caused by the fact that in the process of performing threshold voltage compensation on the conventional pixel circuit, data writing and threshold compensation are generally performed simultaneously, and the threshold voltage of the driving module is compensated by controlling the data writing module to be conducted. Under the high refresh frequency, the compensation time is limited by the conduction time of the data writing module, so that the threshold compensation time is fixed, the threshold voltage is not completely compensated after the data writing is finished, the compensation range of the threshold voltage is limited, and for the driving circuits of different pixels, the pixel circuits still have differences, so that the driving currents generated by the pixel circuits are different, and the uniformity of the display brightness is influenced.

In view of the above problem, an embodiment of the present invention provides a pixel circuit, and fig. 1 is a schematic structural diagram of the pixel circuit provided in the embodiment of the present invention, and referring to fig. 1, the pixel circuit includes: the driving module 110, the first voltage writing module 120, the second voltage writing module 130, the coupling module 140, the compensation module 150, the storage module 160 and the light emitting module 170; the first voltage writing module 120 is connected to the first end of the coupling module 140, the second end of the coupling module 140 is connected to the control end G of the driving module 110, the first voltage writing module 120 is configured to transmit the data voltage Vdata to the first end of the coupling module 140 in the data writing phase, and the coupling module 140 is configured to couple the data voltage Vdata to the control end G of the driving module 110.

The second voltage writing module 130 is connected to the first end of the coupling module 140, and configured to maintain a potential of the first end of the coupling module 140 when the second voltage writing module is turned on, and continuously transmit a fixed voltage V1 to the first end of the coupling module 140 at a threshold compensation stage; the compensation module 150 is connected between the first terminal and the control terminal G of the driving module 110, and is configured to charge the control terminal of the driving module 110 during a threshold compensation phase to compensate for a threshold voltage of the driving module 110.

The storage module 160 is connected to the control terminal G of the driving module 110, and is configured to store a voltage of the control terminal G of the driving module 110; the driving module 110 and the light emitting module 170 are connected between the first power line L1 and the second power line L2, and the driving module 110 is configured to drive the light emitting module 170 to emit light at a light emitting stage in a display period; wherein, in the same display period, the threshold compensation phase is before the data writing phase.

Specifically, the first power line L1 is configured to transmit a first power voltage VDD, the second power line L2 is configured to transmit a second power voltage VSS, the driving module 110 and the light emitting module 170 are connected between the first power line L1 and the second power line L2, and the driving module 110 is configured to drive the light emitting module 170 to emit light in a light emitting stage of the display period according to voltages of the control terminal G and the second terminal when a discharging path between the first power line L1 and the second power line L2 is turned on. Wherein, a light emitting control module 180 may be disposed on the discharge path to ensure light emitting reliability.

Taking the pixel circuit shown in fig. 1 as an example, the operation process of the pixel circuit is as follows:

in the threshold compensation stage, the driving module 110 and the compensation module 150 are turned on, the light emitting control module 180 is turned off, the first power voltage VDD transmitted on the first power line L1 is written into the control terminal G of the driving module 110 through the compensation module 150, and the storage module 160 stores the voltage of the control terminal G of the driving module 110, where the voltage includes the threshold information of the driving module 110. The transistors included in the driving module 110 are driving transistors, and the threshold information refers to a threshold voltage of the driving transistors. In addition, the second voltage writing module 130 is also turned on simultaneously, and continuously transmits a fixed voltage V1 to the first end of the coupling module 140, so as to keep the potential at the N point stable, and prevent the coupling effect of the coupling module 140 from affecting the potential at the control end G of the driving module 110.

In the data writing stage, the first voltage writing module 120 is turned on, the compensation module 150 and the second voltage writing module 130 are turned off, the data voltage Vdata is written into the first end (point N) of the coupling module 140, the voltage at the point N jumps from the fixed voltage V1 to the data voltage Vdata, and the voltage variation at the point N is coupled to the control end G of the driving module 110 under the coupling effect of the coupling module 140, so as to implement data writing. Here, the data voltage Vdata may be supplied from the data line.

In the light emitting stage, the light emitting control module 180 is turned on, and the driving module 110 drives the light emitting module 170 to emit light according to the voltages of the control terminal G and the second terminal.

In this embodiment, since the second voltage writing module 130 continuously writes the fixed voltage V1 to the N point in the threshold compensation phase, the data voltage Vdata cannot be written to the N point, so that the threshold compensation phase and the data writing phase are not performed simultaneously, and therefore, the duration of the threshold compensation phase is determined by the on durations of the compensation module 150 and the second voltage writing module 130, regardless of the on duration of the first voltage writing module 120, and it can be ensured that the threshold compensation phase has a sufficient duration to perform threshold compensation on the driving module 110 even at a high refresh frequency. That is to say, writing the data voltage Vdata and compensating the threshold voltage to the driving module 110 are respectively implemented through two separate paths, so that the data writing stage and the threshold compensation stage are not affected by each other, the duration of the threshold compensation stage is not affected by the data writing time (line time), and it can be ensured that the control end G of the driving module 110 sufficiently writes the required voltage to compensate the threshold voltage fluctuation in a large range, so that the threshold voltage is completely compensated.

The pixel circuit provided by this embodiment, by setting that the pixel circuit includes the second voltage writing module and the coupling module, the second voltage writing module is connected to the first end of the coupling module, and is configured to maintain the potential at the first end of the coupling module when the pixel circuit is turned on, and continuously transmit a fixed voltage to the first end of the coupling module in the threshold compensation stage, so that the threshold compensation and the data writing to the driving module are not performed simultaneously, and the threshold compensation is performed before the data voltage is written to the control end of the driving module, so that the threshold compensation stage and the data writing stage are not affected by each other, and thus the time of the threshold compensation is not affected by the data writing stage, and even at a high refresh frequency, the threshold voltage of the driving module can be completely compensated, so that the difference of characteristics of the driving modules corresponding to different pixels can be reduced, which is beneficial to improving the difference of display luminance, and improving the uniformity of display image quality.

In an alternative embodiment, the fixed voltage V1 accessed by the second voltage writing module 130 may be the first power voltage VDD. Fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 2, on the basis of the foregoing technical solution, optionally, the driving module 110 includes a first transistor M1, the first voltage writing module 120 includes a second transistor M2, the second voltage writing module 130 includes a third transistor M3, the compensating module 150 includes a fourth transistor M4, the coupling unit 140 includes a first capacitor C1, and the storage module 160 includes a second capacitor C2.

Here, the second transistor M2, the third transistor M3, and the fourth transistor M4 are all N-type transistors, preferably metal oxide transistors, and a leakage current of the oxide transistors is small, so that a potential of the control terminal of the light-emitting stage driving module 120 can be better maintained, which is more beneficial to improving display uniformity and improving display quality. Of course, in other embodiments, these transistors may also be P-type LTPS transistors, and this embodiment only schematically illustrates a structure of a pixel circuit.

Specifically, a first pole of the first transistor M1 is connected to the first power voltage VDD on the first power line L1, a second pole of the first transistor M1 is connected to a first pole of the fourth transistor M4, a second pole of the fourth transistor M4 is connected to the gate of the first transistor M1, a first pole of the second transistor M2 is connected to the data voltage Vdata, a second pole of the second transistor M2 is connected to the first pole of the first capacitor C1, a second pole of the second capacitor C2 is connected to the gate of the first transistor M1, a first pole of the third transistor M3 is connected to the first power line L1, a second pole of the third transistor M3 is connected to the first pole of the first capacitor C1, a gate of the second transistor M2 is connected to the first scan signal S1, and gates of the third transistor M3 and the fourth transistor M4 are both connected to the second scan signal S2; a first end of the second capacitor C2 is connected to the first power line L1, and a second end of the second capacitor C2 is connected to the gate of the first transistor M1.

Fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, based on the above technical solutions, optionally, the pixel circuit according to this embodiment further includes a first initialization module 191 and a second initialization module 192, where the first initialization module 191 is connected to the control terminal G of the driving module 110, and is configured to transmit a first initialization voltage Vref1 to the control terminal G of the driving module 110 in an initialization stage to initialize the driving module 110; the second initializing module 192 is connected to the first terminal of the light emitting module 170, and is configured to transmit a second initializing voltage Vref2 to the first terminal of the light emitting module 170 to initialize the light emitting module 170.

The first initialization module 191 includes an eighth transistor M8, the second initialization module 192 includes a ninth transistor M9, a gate of the eighth transistor M8 is connected to the fourth scan signal S4, a first pole of the eighth transistor M8 is connected to the first initialization voltage Vref1, a second pole of the eighth transistor M8 is connected to the control terminal G of the driving module 110, a gate of the ninth transistor M9 is connected to the third scan signal S3, a first pole of the ninth transistor M9 is connected to the second initialization voltage Vref2, and a second pole of the ninth transistor M9 is connected to the first terminal of the light emitting module 170.

Optionally, the eighth transistor M8 and the ninth transistor M9 are both metal oxide transistors to reduce leakage current, which is beneficial to maintaining stability of the potential of the control terminal G of the driving module 110. In the present embodiment, the light emitting module 170 may include a light emitting diode such as an LED, an OLED, a micro-LED, and the like.

Fig. 4 is a waveform diagram of a driving timing sequence of a pixel circuit according to an embodiment of the invention, where the driving timing sequence can be applied to the pixel circuit shown in fig. 3. Referring to fig. 3 and 4, the operation process of the pixel circuit includes an initialization phase T1, a threshold compensation phase T2, a data writing phase T3, a holding phase T4, and a light emitting phase T5.

In the initialization period T1, the emission control signal EM is at a high level, the first scan signal S1 and the third scan signal S3 are both at a low level, the second scan signal S2 is at a low level, and the fourth scan signal S4 is at a high level. Accordingly, the eighth transistor M8 is turned on in response to the fourth scan signal S4 of the high level, and the first initialization voltage Vref1 is written to the gate of the first transistor M1 through the eighth transistor M8, thereby initializing the gate of the first transistor M1.

In the threshold compensation stage T2, the emission control signal EM is at a high level, the first scan signal S1 and the third scan signal S3 are both at a low level, the second scan signal S2 is at a high level, and the fourth scan signal S4 is at a low level. Accordingly, the third transistor M3 and the fourth transistor M4 are turned on in response to the second scan signal S2 of the high level, the first power voltage VDD on the first power line L1 is charged to the gate of the first transistor M1 through the first transistor M1 and the fourth transistor M4, and at the same time, the first power voltage VDD is written to the first pole of the first capacitor C1 through the third transistor M3 to stabilize the potential at the point N1. When the gate voltage of the first transistor M1 is VDD + Vth1, the first transistor M1 is turned off, and the threshold compensation phase T2 is ended, where Vth1 is the threshold voltage of the first transistor M1. Here, since the data voltage Vdata is not written into the gate of the first transistor M1, the threshold compensation process of the first transistor M1 is not affected by the data writing time, so that the point G can be fully written into VDD + Vth1, and the threshold voltage of the first transistor M1 is fully compensated.

In the data writing period T3, the emission control signal EM is at a high level, the first scan signal S1 and the third scan signal S3 are both at a high level, the second scan signal S2 is at a low level, and the fourth scan signal S4 is at a low level. Accordingly, the second transistor M2 and the ninth transistor M9 are turned on, the data voltage Vdata is written into the first terminal of the first capacitor C1 through the second transistor M2, and the potential (i.e., the N-point potential) of the first terminal of the first capacitor C1 jumps from the first power voltage VDD to the data voltage Vdata. Under the coupling action of the first capacitor C1, the gate potential (i.e., the potential at the point G) of the first transistor M1 changes to VDD + Vth1+ (Vdata-VDD) × C1/(C1 + C2), so that the data voltage Vdata is written into the gate of the first transistor M1. Meanwhile, the second initialization voltage Vref2 is written into the first end of the light emitting module 170 through the ninth transistor M9, so that the initialization of the first end of the light emitting module 170 is realized.

In the holding period T4, the emission control signal EM is at a high level, the first scan signal S1 and the third scan signal S3 are both at a low level, the second scan signal S2 is at a low level, and the fourth scan signal S4 is at a low level. Therefore, all the transistors except the first transistor M1 are in an off state, and the potential of each node is maintained at the potential of the previous stage to prepare for the light emission of the light emitting module 170.

In the emission period T5, the emission control signal EM is at a low level, the first scan signal S1 and the third scan signal S3 are both at a low level, the second scan signal S2 is at a low level, and the fourth scan signal S4 is at a low level. Therefore, the seventh transistor M7 is turned on, and the first transistor M1 generates the driving current I according to the voltage at the point G and the Voltage (VDD) of the first electrode thereof, so as to drive the light emitting module 170 to emit light. The drive current I can be expressed as:

where μ is the electron mobility of the first transistor M1, cox is the channel capacitance per unit area of the first transistor M1, W/L is the width-to-length ratio of the first transistor M1, C1 is the capacitance of the first capacitor C1, and C2 is the capacitance of the second capacitor C2.

By separating the time of threshold compensation and the time of data writing, the threshold compensation stage T2 and the data writing stage T3 are not affected by each other, so that the time of threshold compensation is not affected by the data writing stage, and even under the condition of high refreshing frequency, the threshold voltage of the first transistor M1 can be completely compensated, so that the difference of the characteristics of the first transistor M1 corresponding to different pixels can be reduced, the difference of display brightness can be improved, and the uniformity of display image quality can be improved.

Optionally, in this embodiment, the first initialization voltage Vref1 may be multiplexed as the second initialization voltage Vref2, the first scan signal S1 may also be multiplexed as the third scan signal S3, and each scan signal or voltage signal is provided by a corresponding signal line, so that the number of corresponding signal lines may be reduced, which is beneficial to improving the PPI.

Optionally, the display device may have different operation modes during operation, and the corresponding refresh frequencies are different, for example, when the display device displays a static picture and displays a dynamic picture of a game, the refresh frequencies are different. Typically, the low refresh rate is achieved by skipping frames on the basis of the high refresh rate, and one display period includes a write frame and a hold frame. For example, when the refresh frequency is 60Hz, the 60 data frames are all write-in frames, and data is written in each write-in frame; when the refresh frequency is 1Hz, one data frame is set as a write frame and the other data frames are set as hold frames on the basis of 60Hz, and data is written only in the write frame and not in the hold frames. The driving timing shown in fig. 4 may be the driving timing of the pixel circuit at the write frame.

The inventor also found that, at a low refresh frequency, the behavior of the first transistor M1 is different between the writing frame and the holding frame, so that the characteristics of the first transistor M1 are different, which results in poor display quality at low frequency.

On the basis of the above technical solutions, fig. 5 is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, and referring to fig. 5, the pixel circuit further includes a voltage bias module 210, a first light emitting control module 181, and a second light emitting control module 182; the first light emitting control module 181 is connected between the first power line L1 and the second end of the driving module 110, the second light emitting control module 182 is connected between the first end of the driving module 110 and the first end of the light emitting module 170, and the second end of the light emitting module 170 is connected with the second power line L2; the voltage offset module 210 is connected to the second terminal of the driving module 110, and is configured to transmit the offset voltage VOBS to the control terminal G of the driving module 110 during the threshold compensation phase, and to transmit the offset voltage VOBS to the second terminal of the driving module 110 after the data writing phase.

The voltage offset module 210 transmits the offset voltage VOBS to the second end of the driving module 110 after the data writing stage, so as to reset the potential of the second end of the driving module 110, so that the offset states of the driving module 110 are the same, and the first end of the driving module 110 has the same voltage value under the same gray scale condition, so as to ensure that the first end and the second end of the driving module 110 maintain the same potential in the writing frame and the holding frame, respectively.

In this embodiment, the bias voltage VOBS can be set according to the actual screen-adjusting effect.

Referring to fig. 5, the pixel circuit operates in writing a frame as follows:

in the threshold compensation phase, the voltage offset module 210, the driving module 110 and the compensation module 150 are turned on, the first lighting control module 181 and the second lighting control module 182 are turned off, the offset voltage VOBS is written into the control terminal G of the driving module 110 through the driving module 110 and the compensation module 150, and the storage module 160 stores the voltage of the control terminal G of the driving module 110, which contains the threshold information of the driving module 110. The transistors included in the driving module 110 are driving transistors, and the threshold information refers to a threshold voltage of the driving transistors. In addition, the second voltage writing module 130 is also turned on simultaneously, and continuously transmits a fixed voltage V1 to the first end of the coupling module 140, so as to keep the potential at the N point stable, and prevent the coupling effect of the coupling module 140 from affecting the potential at the control end G of the driving module 110.

In the data writing stage, the first voltage writing module 120 is turned on, the voltage bias module 210, the compensation module 150, and the second voltage writing module 130 are turned off, the data voltage Vdata is written into the first end (point N) of the coupling module 140, at this time, the voltage at the point N jumps from the fixed voltage V1 to the data voltage Vdata, and the voltage variation at the point N is coupled to the control end G of the driving module 110 under the coupling effect of the coupling module 140, so as to implement data writing.

In the voltage offset stage, the voltage offset module 210 is turned on, the offset voltage VOBS is written into the second terminal of the driving module 110 through the voltage offset module 210, and the potential of the second terminal of the driving module 110 is reset to the offset voltage VOBS, so that the first terminal of the driving module 110 is written with the corresponding fixed voltage under the same gray scale condition.

In the light emitting phase, the first light emitting control module 181 and the second light emitting control module 182 are turned on, and the driving module 110 drives the light emitting module 170 to emit light according to the voltages of the control terminal G and the second terminal thereof.

The pixel circuit works in the following process of maintaining frames:

in the voltage offset phase, the voltage offset module 210 is turned on, the offset voltage VOBS is written into the second terminal of the driving module 110 through the voltage offset module 210, and the potential of the second terminal of the driving module 110 is reset to the offset voltage VOBS.

The pixel circuit provided by the embodiment resets the potential of the second end of the driving module 110 before the light-emitting phases of the writing frame and the holding frame by arranging the voltage bias module 210, so that the potential of the second end of the driving module 110 is the same and the potential of the first end is the same before the light-emitting phases of the writing frame and the holding frame under the same gray scale condition, and further the bias states of the driving module 110 in the writing frame and the holding frame are the same, and when displaying at low frequency, the brightness of the light-emitting module 170 cannot change, which is beneficial to improving the problem of low-frequency flicker and improving the display effect. Furthermore, since the data writing and the threshold compensation are also independently performed, the threshold compensation stage and the data writing stage are not affected by each other, so that the time of the threshold compensation is not affected by the data writing stage, and even under a high refresh frequency, the threshold voltage of the driving module can be completely compensated, so that the difference of the characteristics of the driving module corresponding to different pixels can be reduced, thereby being beneficial to improving the difference of the display brightness and improving the uniformity of the display image quality. Therefore, the pixel circuit provided by the embodiment has good characteristics at both low and high frequencies, and can satisfy the wide-frequency driving of 1 to 240 Hz.

In this embodiment, the magnitude of the bias voltage VOBS can be set to ensure that the driving module 110 can be turned on during the voltage bias phase.

In an alternative embodiment, if the driving module 110 includes a P-type transistor, the bias voltage VOBS is greater than the data voltage Vdata; if the driving module 110 includes an N-type transistor, the bias voltage VOBS is smaller than the data voltage Vdata, so as to ensure that the driving module 110 can be turned on during the voltage bias phase, so as to write the bias voltage VOBS into the second terminal of the driving module 110.

Fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, referring to fig. 6, based on the foregoing technical solution, optionally, the pixel circuit according to this embodiment further includes a first initialization module 191 and a second initialization module 192, where the first initialization module 191 is connected to the control terminal G of the driving module 110, and is configured to transmit a first initialization voltage Vref1 to the control terminal G of the driving module 110 in an initialization stage to initialize the driving module 110; the second initializing module 192 is connected to the first terminal of the light emitting module 170, and is configured to transmit a second initializing voltage Vref2 to the first terminal of the light emitting module 170 to initialize the light emitting module 170.

The second initialization module 192 and the voltage bias module 210 can receive the same control signal, such as the third scan signal S3, to save the number of signal lines. Therefore, in the hold frame, the second initializing module 192 may provide the second initializing voltage Vref2 to the first terminal of the light emitting module 170 to initialize the potential of the first terminal of the light emitting module 170, so as to ensure that the light emitting brightness of the light emitting module 170 does not change in the light emitting phases of the write frame and the hold frame.

Here, the initialization phase precedes the threshold compensation phase when writing the frame.

In addition, the inventor has found that, when the pixel circuit operates at a high refresh frequency, the initialization time of the control terminal G of the driving module 110 is short, so that when different pixel circuits with a large gray scale difference in a previous frame are initialized, voltages initialized at the control terminal G of the driving module 110 are different, and when a current frame is displayed, data written into the pixel circuits are different, so that the display device is not uniform in display, and a residual image phenomenon occurs.

Based on the above problem, on the basis of the above technical solution, the voltage offset module 210 is further configured to transmit the offset voltage VOBS to the control terminal G of the driving module 110 through the conducted compensation module 150 in the initialization stage of the write frame, so as to initialize the potential of the control terminal G of the driving module 110, so as to eliminate the afterimage phenomenon.

Fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and unlike the pixel circuit shown in fig. 3, the pixel circuit shown in fig. 7 includes a voltage bias module 210 and a first light emitting control module 181. Wherein the voltage bias module 210 includes a fifth transistor M5, the first lighting control module 181 includes a sixth transistor M6, and the second lighting control module 182 includes a seventh transistor M7; a gate of the fifth transistor M5 is connected to the third scan signal S3, a first pole of the fifth transistor M5 is connected to the bias voltage VOBS, a second pole of the fifth transistor M5 is connected to the second end of the driving module 110, a gate of the sixth transistor M6 is connected to the first emission control signal EM1, a first pole of the sixth transistor M6 is connected to the first power line L1, a second pole of the sixth transistor M6 is connected to the second end of the driving module 110, a gate of the seventh transistor M7 is connected to the second emission control signal EM2, a first pole of the seventh transistor M7 is connected to the first end of the driving module 110, and a second pole of the seventh transistor M7 is connected to the first end of the emission module 170. The light emitting module 170 includes a light emitting diode D1.

Fig. 8 is a waveform diagram of a driving timing of a pixel circuit in a writing frame according to an embodiment of the present invention, which can be used for driving the pixel circuit shown in fig. 7, and referring to fig. 7 and fig. 8, a working process of the pixel circuit in the writing frame according to the embodiment includes: the method comprises an initialization phase T1, a threshold compensation phase T2, a data writing phase T3, a voltage bias phase T6, a holding phase T4 and a light-emitting phase T5, wherein the initialization phase T1 comprises a first initialization phase T1, a second initialization phase T2 and a third initialization phase T3.

In the first initialization period t1, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a high level, the third scan signal S3 is at a low level, and the fourth scan signal S4 is at a low level. Accordingly, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the ninth transistor M9 are turned on. The first power supply voltage VDD is written to the N point through the third transistor M3, so that the potential of the first pole of the first capacitor C1 is maintained at the first power supply voltage VDD. The bias voltage VOBS charges the point G through the fifth transistor M5, the first transistor M1, and the fourth transistor M4, until the voltage at the point G is VOBS + Vth1, the first transistor M1 is turned off. In the process, a large current flows through the first transistor M1 to flush the residual charge on the first transistor M1; meanwhile, aiming at display pictures with different gray scales (such as checkerboard pictures), the grid (G point) of the first transistor M1 of the pixel circuit is written to the same voltage state, stress difference of different pictures can be eliminated, and therefore the ghost phenomenon is improved.

At the same time, the second initialization voltage Vref2 is written to the first pole (anode) of the light emitting diode D1 through the ninth transistor M9, and the potential of the first pole of the light emitting diode D1 is initialized.

In the second initialization period t2, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a low level, the third scan signal S3 is at a high level, and the fourth scan signal S4 is at a high level. Accordingly, the eighth transistor M8 is turned on, and the first initialization voltage Vref1 is written to the gate of the first transistor M1 through the eighth transistor M8, thereby resetting the gate voltage of the first transistor M1 to the first initialization voltage Vref1. The rest nodes keep the state at the last moment. Here, the first initialization voltage Vref1 is lower than the bias voltage VOBS.

In the third initialization period t3, the first and second emission control signals EM1 and EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a high level, the third scan signal S3 is at a high level, and the fourth scan signal S4 is at a high level. Therefore, the fourth transistor M4 is turned on, the eighth transistor M8 is continuously turned on, the first initialization voltage Vref1 is written into the second pole of the first transistor M1 through the fourth transistor M4, and since the first transistor M1 is in a turned-on state, the first initialization voltage Vref1 is also written into the first pole of the first transistor M1, so that the gate, the first pole and the second pole of the first transistor M1 are all reset to the first initialization voltage Vref1.

Through the three initialization operations in the initialization stage T1, the first transistors M1 can be initialized to the same voltage, so that the difference of the subsequent written data is relatively small, thereby improving the display uniformity and improving the image sticking phenomenon.

In the threshold compensation period T2, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a high level, the third scan signal S3 is at a low level, and the fourth scan signal S4 is at a low level. Therefore, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are turned on, the fourth transistor M4 is turned off, the bias voltage VOBS is charged to the point G through the fifth transistor M5, the first transistor M1, and the fourth transistor M4, and the first capacitor C1 does not generate the coupling effect because the point N is continuously written with the first power supply voltage VDD. Until the voltage at the point G is VOBS + Vth1, the first transistor M1 is turned off, and the second capacitor C2 stores the voltage at the point G at this time. Here, since the data voltage Vdata is not written into the gate of the first transistor M1, the threshold compensation process of the first transistor M1 is not affected by the data writing time, so that the point G can be fully written into VDD + Vth1, the threshold voltage of the first transistor M1 can be fully compensated, and the method is applicable to an ultra-high refresh frequency.

In the data writing period T3, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a high level, the second scan signal S2 is at a low level, the third scan signal S3 is at a high level, and the fourth scan signal S4 is at a low level. Therefore, the second transistor M2 is turned on, the third transistor M3 is turned off, the data voltage Vdata is transmitted to the first electrode of the first capacitor C1 through the second transistor M2, the potential at the N point jumps from the first power voltage VDD to the data voltage Vdata, and under the coupling action of the first capacitor C1, the gate potential (i.e., the potential at the G point) of the first transistor M1 is changed to VOBS + Vth1+ (Vdata-VDD) × C1/(C1 + C2), thereby writing the data voltage Vdata into the gate of the first transistor M1.

In the voltage offset period T6, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a low level, the third scan signal S3 is at a low level, and the fourth scan signal S4 is at a low level. Therefore, the fifth transistor M5 and the ninth transistor M9 are turned on, the bias voltage VOBS is written into the first pole of the first transistor M1 through the fifth transistor M5, and the voltage of the first pole of the first transistor M1 is reset to the bias voltage VOBS, so that the second pole of the first transistor M1 is also written with the corresponding fixed voltage at the same gray level. Meanwhile, the second initialization voltage Vref2 is written into the first pole of the light emitting diode D1, and the voltage of the first pole of the light emitting diode D1 is reset to the second initialization voltage Vref2.

In the holding period T4, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 is at a low level, the second scan signal S2 is at a low level, the third scan signal S3 is at a high level, and the fourth scan signal S4 is at a low level. Each transistor is in an off state, and each node maintains the potential at the previous moment to prepare for the subsequent light emitting diode D1 to emit light.

In the emission period T5, the first emission control signal EM1 and the second emission control signal EM2 are at a low level, the first scan signal S1 is at a low level, the second scan signal S2 is at a low level, the third scan signal S3 is at a high level, and the fourth scan signal S4 is at a low level. Accordingly, the sixth transistor M6 and the seventh transistor M7 are turned on, the first power voltage VDD is transmitted to the first pole of the first transistor M1, and the first transistor M1 generates the driving current I according to the voltage of the gate and the first pole thereof, so as to drive the light emitting diode D1 to emit light. The drive current I can be expressed as:

Fig. 9 is a waveform diagram of a driving timing of a pixel circuit in a retention frame according to an embodiment of the present invention, and is applicable to the pixel circuit shown in fig. 7, and with reference to fig. 7 and fig. 9, the operation process of the pixel circuit in the retention frame is as follows:

in the voltage bias period T7, the first emission control signal EM1 and the second emission control signal EM2 are at a high level, the first scan signal S1 maintains a low level, the second scan signal S2 maintains a low level, the third scan signal S3 jumps to a low level, and the fourth scan signal S4 maintains a low level. Therefore, the fifth transistor M5 and the ninth transistor M9 are turned on, the bias voltage VOBS is written into the first pole of the first transistor M1 through the fifth transistor M5, and the voltage of the first pole of the first transistor M1 is reset to the bias voltage VOBS, so that the second pole of the first transistor M1 is also written with the corresponding fixed voltage at the same gray level. Meanwhile, the second initialization voltage Vref2 is written into the first pole of the light emitting diode D1, and the voltage of the first pole of the light emitting diode D1 is reset to the second initialization voltage Vref2.

In the emission period T8, the first emission control signal EM1 and the second emission control signal EM2 are at a low level, the first scan signal S1 maintains a low level, the second scan signal S2 maintains a low level, the third scan signal S3 jumps to a high level, and the fourth scan signal S4 maintains a low level. Accordingly, the sixth transistor M6 and the seventh transistor M7 are turned on, the first power voltage VDD is transmitted to the first electrode of the first transistor M1, and the first transistor M1 generates the driving current I according to the voltages of the gate and the first electrode thereof, thereby driving the light emitting diode D1 to emit light.

In this embodiment, the fifth transistor M5 is controlled to be turned on in the voltage bias phase of the write frame and the hold frame, and the bias voltage VOBS is transmitted to the first pole of the first transistor M1, so as to reset the potential of the first pole of the first transistor M1, thereby making the bias state of the first transistor M1 before the light-emitting phase the same, and ensuring that the first pole and the second pole of the first transistor M1 respectively maintain the same potential in the write frame and the hold frame. When the low-frequency display is carried out, because the voltages of all nodes between the first power line L1 and the second power line L2 in the maintaining frame and the writing frame are equal, the brightness of the light-emitting diode D1 in the maintaining frame and the writing frame cannot be changed, the problem of low-frequency flicker is favorably solved, and the display effect is improved.

It should be noted that, in this embodiment, both the write frame and the hold frame include a voltage bias phase and a light-emitting phase, and the operation principle is the same. In the above embodiments, the first initialization voltage Vref1 may be multiplexed to the second initialization voltage Vref2.

Optionally, an embodiment of the present invention further provides a driving method for a pixel circuit, which is used for driving the pixel circuit provided in any embodiment of the present invention. Fig. 10 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention, and with reference to fig. 1 and fig. 10, the driving method includes:

s110, in the threshold compensation stage, controlling the second voltage writing module to be conducted, and continuously transmitting a fixed voltage to the first end of the coupling module; and controlling the conduction of the compensation module, and charging the control end of the driving module to compensate the threshold voltage of the driving module.

And S120, in the data writing stage, controlling the first voltage writing module to transmit the data voltage to the first end of the coupling module, and coupling the coupling module to write the data voltage to the control end of the driving module.

And S130, controlling the driving module to drive the light-emitting module to emit light according to the voltages of the control end and the second end of the driving module in the light-emitting stage in the display period.

The driving method of the pixel circuit provided by this embodiment includes, by setting that the pixel circuit includes a second voltage writing module and a coupling module, the second voltage writing module is connected to the first end of the coupling module, and is configured to maintain a potential at the first end of the coupling module when the pixel circuit is turned on, and continuously transmit a fixed voltage to the first end of the coupling module in a threshold compensation phase, so that threshold compensation and data writing to the driving module are not performed simultaneously, and the threshold compensation is performed before writing a data voltage to a control end of the driving module, so that the threshold compensation phase and the data writing phase are not affected by each other, and thus the time of the threshold compensation is not affected by the data writing phase.

Fig. 11 is a flowchart of another driving method of a pixel circuit according to an embodiment of the present invention, and with reference to fig. 5 and fig. 11, optionally, the driving method of the pixel circuit in writing a frame includes:

s1101, in a threshold compensation stage, controlling the second voltage writing module to be conducted, and continuously transmitting a fixed voltage to the first end of the coupling module; and the control voltage bias module is conducted with the compensation module, and transmits the bias voltage to the control end of the driving module so as to compensate the threshold voltage of the driving module.

And S120, in the data writing stage, controlling the first voltage writing module to transmit the data voltage to the first end of the coupling module, and coupling the coupling module to write the data voltage into the control end of the driving module in a coupling mode.

And S210, in the voltage bias stage, controlling the voltage bias module to transmit bias voltage to the second end of the driving module.

And S1301, in the light emitting stage, controlling the driving module to drive the light emitting module to emit light according to the voltage of the control end and the second end of the driving module.

The driving method of the pixel circuit in the retention frame comprises the following steps:

and in the holding frame, the voltage bias module is controlled to be conducted, and the bias voltage is transmitted to the second end of the driving module.

The specific working process of the driving method of the pixel circuit shown in fig. 11 may refer to the description related to the pixel circuit shown in fig. 5 in the foregoing embodiment, and also has the beneficial effects described in the foregoing technical solution, and is not repeated.

Fig. 12 is a flowchart of another driving method of a pixel circuit according to an embodiment of the present invention, and with reference to fig. 6 and 12, optionally, the driving method of the pixel circuit in writing a frame includes:

and S310, in a first initialization stage, controlling the voltage bias module to write the bias voltage into the control end of the driving module through the conducted compensation module, controlling the second voltage write module to write the fixed voltage into the first end of the coupling module, and controlling the second initialization module to transmit the second initialization voltage to the first end of the light emitting module.

And S320, in the second initialization stage, controlling the first initialization module to transmit the first initialization voltage to the control end of the control module.

And S330, in a third initialization stage, controlling the first initialization module to transmit the first initialization voltage to the first end of the driving module through the conducted compensation module.

The specific working process of the driving method of the pixel circuit shown in fig. 12 may refer to the description related to the pixel circuit shown in fig. 6 in the foregoing embodiment, and also has the beneficial effects described in the foregoing technical solution, and is not repeated.

Optionally, an embodiment of the present invention further provides a display panel, including the pixel circuit provided in the foregoing embodiment, so that the display panel also has the beneficial effects described in any of the foregoing embodiments. Fig. 13 is a schematic structural diagram of a display panel according to an embodiment of the present invention, in this embodiment, the display panel may be applied to a mobile phone, and may also be applied to any electronic product with a display function, including but not limited to the following categories: the touch screen display system comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited in this respect.

It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired result of the technical solution of the present invention can be achieved.

The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel circuit, comprising: the device comprises a driving module, a first voltage writing module, a second voltage writing module, a coupling module, a compensation module, a storage module and a light-emitting module;

2. The pixel circuit according to claim 1, wherein the driving module comprises a first transistor, the first voltage writing module comprises a second transistor, the second voltage writing module comprises a third transistor, the compensation module comprises a fourth transistor, the coupling unit comprises a first capacitor, and the storage module comprises a second capacitor;

a first electrode of the first transistor is connected to a first power supply voltage on the first power supply line, a second electrode of the first transistor is connected to a first electrode of the fourth transistor, a second electrode of the fourth transistor is connected to a gate of the first transistor, a first electrode of the second transistor is connected to the data voltage, a second electrode of the second transistor is connected to a first electrode of the first capacitor, a second electrode of the second capacitor is connected to a gate of the first transistor, a first electrode of the third transistor is connected to the first power supply line, a second electrode of the third transistor is connected to a first electrode of the first capacitor, a gate of the second transistor is connected to a first scan signal, and a gate of the third transistor and a gate of the fourth transistor are both connected to a second scan signal;

the first end of the second capacitor is connected with the first power line, and the second end of the second capacitor is connected with the grid electrode of the first transistor.

3. The pixel circuit according to claim 1, further comprising a voltage bias module, a first light emission control module, and a second light emission control module;

the first light-emitting control module is connected between the first power line and the second end of the driving module, the second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module, and the second end of the light-emitting module is connected with the second power line;

4. The pixel circuit according to claim 3, wherein the display period comprises a write frame and a hold frame, and the voltage bias module is further configured to transmit the bias voltage to the control terminal of the driving module through the turned-on compensation module during an initialization phase of the write frame to initialize the potential of the control terminal of the driving module, and transmit the bias voltage to the second terminal of the driving module again during the hold frame.

5. The pixel circuit according to claim 3, wherein the voltage bias module comprises a fifth transistor, the first light emission control module comprises a sixth transistor, and the second light emission control module comprises a seventh transistor;

6. The pixel circuit according to any of claims 1-5, further comprising a first initialization module and a second initialization module;

the first initialization module is connected with the control end of the driving module and used for transmitting a first initialization voltage to the control end of the driving module in an initialization stage; the second initialization module is connected with the first end of the light emitting module and used for transmitting a second initialization voltage to the first end of the light emitting module;

7. The driving method of the pixel circuit is characterized in that the pixel circuit comprises a driving module, a first voltage writing module, a second voltage writing module, a coupling module, a compensation module, a storage module and a light-emitting module; the first voltage writing module is connected with the first end of the coupling module, the second end of the coupling module is connected with the control end of the driving module, the second voltage writing module is connected with the first end of the coupling module, the compensation module is connected between the first end and the control end of the driving module, the storage module is connected with the control end of the driving module, and the driving module and the light emitting module are connected between a first power line and a second power line;

the driving method of the pixel circuit includes:

and in a light-emitting stage in the display period, controlling the driving module to drive the light-emitting module to emit light according to the voltages of the control end and the second end of the driving module.

8. The method of driving the pixel circuit according to claim 7, wherein the display period includes a write frame and a hold frame, wherein the write frame includes the threshold compensation phase, the data write phase, and the light emission phase; the pixel circuit further comprises a voltage bias module, and the voltage bias module is connected with the second end of the driving module;

the writing frame further includes a voltage bias phase interposed between the data writing phase and the light emitting phase, and the driving method of the pixel circuit further includes:

9. The method according to claim 8, wherein the pixel circuit further comprises a first initialization module and a second initialization module, the first initialization module is connected to the control terminal of the driving module, and the second initialization module is connected to the first terminal of the light emitting module;

10. A display panel comprising the pixel circuit according to any one of claims 1 to 6.