CN117032579A - Slave starting method, device and storage medium - Google Patents

Slave starting method, device and storage medium Download PDF

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Publication number
CN117032579A
CN117032579A CN202311056973.2A CN202311056973A CN117032579A CN 117032579 A CN117032579 A CN 117032579A CN 202311056973 A CN202311056973 A CN 202311056973A CN 117032579 A CN117032579 A CN 117032579A
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China
Prior art keywords
data
check
slave
check code
checked
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CN202311056973.2A
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Chinese (zh)
Inventor
汤彩芸
蔡文明
陈文涛
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Hexin Technology Co ltd
Shanghai Hexin Digital Technology Co ltd
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Hexin Technology Co ltd
Shanghai Hexin Digital Technology Co ltd
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Priority to CN202311056973.2A priority Critical patent/CN117032579A/en
Publication of CN117032579A publication Critical patent/CN117032579A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0635Configuration or reconfiguration of storage systems by changing the path, e.g. traffic rerouting, path reconfiguration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/067Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]

Abstract

The invention provides a method and a device for starting a slave machine and a storage medium, wherein the method comprises the following steps: after the host is electrified, reading a first data packet required by the slave from the flash memory according to a preset access data format; the first data packet comprises first data to be checked and a first check code; storing the first check code into a preset temporary storage space, checking first data to be checked to obtain first check data, reading a stored second check code from the temporary storage space, and packaging the second check code and the first check data to obtain a second data packet; transmitting the second data packet to the powered-on slave machine so that the slave machine starts after verifying the received second data packet; the starting efficiency of the slave machine can be improved.

Description

Slave starting method, device and storage medium
Technical Field
The present invention relates to the field of multi-machine data transmission technologies, and in particular, to a method and apparatus for starting a slave machine, and a storage medium.
Background
In the scene of multi-chip interconnection, when the prior art carries out the security check of data at the host computer, in order to get all check codes and RAM data, the host computer needs to carry out a plurality of accesses to the flash memory, but the time cost for obtaining the check codes and the RAM data from the flash memory is high, so that the efficiency of the slave computer in accessing the flash memory data to start is extremely low due to the fact that the host computer is depended on the host computer, and therefore, the time cost for realizing the slave computer to access the flash memory data to start is high in the prior art, and the starting efficiency of the slave computer is low.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provide a method, a device and a storage medium for starting a slave machine, which can improve the starting efficiency of the slave machine.
In a first aspect, the present invention provides a method for starting a slave, including:
after the host is electrified, reading a first data packet required by the slave from the flash memory according to a preset access data format; the first data packet comprises first data to be checked and a first check code;
storing the first check code into a preset temporary storage space, checking first data to be checked to obtain first check data, reading a stored second check code from the temporary storage space, and packaging the second check code and the first check data to obtain a second data packet;
and transmitting the second data packet to the powered-on slave machine so that the slave machine is started after verification according to the received second data packet.
The invention adopts the verification at the host computer, can ensure the correctness of the received data of the host computer, sets the temporary storage space at the host computer to buffer the verification code of the data transmitted by the host computer, and obtains the verification code from the flash memory to verify the data by consuming the space of the host computer to obtain the data verification rate of the slave computer, thereby being convenient for the slave computer to start the data by receiving the verification code, and further improving the starting efficiency of the slave computer according to the verified data.
Further, the storing the first check code in a preset temporary storage space includes:
setting an address space with a preset size in a first storage area as a temporary storage space, putting an acquired first data packet into a first check code cache memory according to a first direct memory access controller of a host side, and storing the first check code into the temporary storage space in a coverage mode; when a plurality of slaves respectively reach corresponding data demands, the master releases the temporary storage space.
According to the invention, the address space is set in the storage area in the host as the temporary storage space, so that the time delay of the host for acquiring the check code again from the flash memory can be reduced, the efficiency of acquiring the check code of the host is improved, and the starting efficiency of the slave according to the checked data can be improved; and when a plurality of slaves respectively reach the corresponding data demands, the master releases the temporary storage space, so that the utilization rate of the storage space of the master can be improved.
Further, after the first data to be verified is verified, first verification data is obtained, including:
The first check code engine acquires a first data packet from a first check code cache memory of the host to obtain a first check code and first data to be checked, and performs error checking on the first data to be checked according to the first check code, and if the error is checked, the first data to be checked is corrected to obtain first check data with correct check;
and storing the first check data into a first storage area according to a first direct memory access controller of the host side.
The invention adopts the mode of firstly checking errors and then correcting errors according to the check code, not only can find errors or losses of received data, but also can correct errors, thereby correcting error data generated in the data transmission process and further guaranteeing the correctness of the data received by the host.
Further, after the second check code stored in the temporary storage space is read, the second check code and the first check data are packed to obtain a second data packet, which includes:
after the first check data are stored in a first storage area, a second check code is read from the temporary storage space, second check data corresponding to the second check code are read from the first storage area, and the second check code and the second check data are packed to obtain a second data packet.
Further, the step of enabling the slave to start after verifying the received second data packet includes:
and after the secondary machine checks the received second data packet, third check data passing through the check is obtained, the third check data is accumulated, and if the accumulated first access data still fails to meet the data requirement, the access data is continuously acquired from the internal memory according to the primary machine, so that the secondary machine is started according to the finally accumulated second access data.
Further, after the slave machine performs verification on the received second data packet, third verification data passing the verification is obtained, including:
after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data.
Further, after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data, including:
Placing the acquired second data packet into a second check code cache according to a second direct memory access controller of the slave side;
the second check code engine acquires a third check code and second data to be checked in a second data packet from the second check code cache memory, and performs error checking on the second data to be checked according to the third check code, and if an error is detected, corrects the second data to be checked to obtain third check data with correct check;
and storing the third check data into a second storage area according to the second direct memory access controller.
The data verification of the slave machine is carried out at the slave machine, so that the accuracy of the data received by the slave machine can be further ensured, and the quick start according to the received data can be ensured.
Further, the reading the first data packet required by the slave from the flash memory according to the preset access data format further includes:
and reading a third data packet required by the user from the flash memory according to a preset access data format, and starting according to the third data packet after verification.
In a second aspect, the present invention further provides a slave starting device, including:
The reading module is used for reading a first data packet required by the slave from the flash memory according to a preset access data format after the host is electrified; the first data packet comprises first data to be checked and a first check code;
the verification module is used for storing the first verification code into a preset temporary storage space, verifying the first data to be verified to obtain first verification data, reading a stored second verification code from the temporary storage space, and packaging the second verification code and the first verification data to obtain a second data packet;
and the slave machine starting module is used for transmitting the second data packet to the slave machine after power-on so that the slave machine starts after verifying the received second data packet.
In a third aspect, the present invention also provides a computer-readable storage medium comprising: the computer readable storage medium includes a stored computer program; wherein the computer program, when executed, controls a device on which the computer-readable storage medium is located to perform the slave boot method according to the first aspect.
The method can be applied to specific computer equipment or terminal equipment through the computer readable storage medium, and can process the slave machine starting of different structures and process more complex slave machine starting scenes, thereby further accelerating the efficiency of large-scale slave machine starting and having higher applicability.
Drawings
FIG. 1 is a schematic flow chart of a method for starting a slave according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an interconnected master and single slave boot provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating the start-up of interconnected master and multi-slave according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a multi-chip start-up of the same structure interconnected as provided by an embodiment of the present invention;
FIG. 5 is a schematic diagram of a multi-chip start-up of different configurations of interconnections provided by embodiments of the present invention;
FIG. 6 is a multi-machine start-up flow chart for interconnections provided by an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a slave starting device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, in the prior art, the data is usually checked at the host computer, the host computer needs to read the data from the flash memory for multiple times, if the data is checked correctly after each time of reading, the data is continuously obtained from the flash memory for checking, the obtained complete data is once transmitted to the slave computer, the slave computer starts according to the received data, however, in this process, the correctness of the received final data cannot be ensured at the slave computer, if the correctness of the data received by the slave computer is ensured by checking at the slave computer, the host computer is required to transmit the data checked by the host computer and the corresponding check code at the same time, but the data of the check code in the check code engine of the host computer is unreadable, so that the corresponding check code is required to be read from the flash memory after the data is transmitted by the host computer, and the check code is forwarded to the slave computer, and the slave computer performs checking according to the received check code.
It can be understood that the prior art that is not checked at the slave computer exchanges space for time, so that the slave computer starts according to the data sent by the host computer at one time, but the prior art that is not checked at the slave computer cannot guarantee the correctness of the data received by the slave computer; in the prior art for checking the slave machine, after the host machine accesses the flash memory for multiple times to obtain checked data, the host machine is required to obtain the check code from the flash memory multiple times so as to forward the check code to the slave machine for data checking, which obviously increases the checking time cost and leads to extremely low starting efficiency of the slave machine according to the checked data.
It is noted that Flash memory (Flash) is a nonvolatile memory, including Nor Flash memory and Nand Flash memory; among them, nand Flash is more commonly used for the production and application of a chip with a large capacity to provide a service with a high data storage density, because the Nand Flash has a low production cost and a capacity much larger than that of the Nor Flash, and the Nand Flash has a unit size almost half that of the Nor Flash.
In a preferred embodiment, the Flash memory is Nand Flash memory.
It is worth to say that, the I/O port of Nand Flash memory adopts multiplexing data line and address line to access serial data, and the bit exchange operation is many and complex, therefore, after reading data from Nand Flash, it is necessary to check to ensure the integrity and correctness of data.
In order to improve and ensure the correctness of data received by the slave, and improve the starting efficiency of the slave, the technical conception of the invention is as follows: the temporary storage space is defined in the storage space of the host computer to temporarily store the check codes, the host computer reads the data and the check codes once from the flash memory each time, the host computer stores the check codes into the temporary storage space, and after checking the received data according to the check codes, the obtained check data and the corresponding check codes in the temporary storage space are packed so as to check the slave computer until the data forwarded by the host computer can meet the data requirement of the slave computer. The invention divides the temporary storage space at the host computer, can reduce the time cost of the host computer for accessing the flash memory twice to obtain the check code, and performs secondary check at the slave computer, thereby ensuring the correctness of the data received by the slave computer and improving the starting efficiency of the slave computer.
Referring to fig. 1, an embodiment of the present invention provides a flowchart of a slave start-up method, including steps S11 to S13, specifically:
step S11, after the host is electrified, reading a first data packet required by the slave from the flash memory according to a preset access data format; the first data packet comprises first data to be checked and a first check code.
In a preferred embodiment, in the case of interconnection, the host plug-in Flash, the slave and the host are interconnected.
In a preferred embodiment, the method for reading the first data packet required by the slave from the flash memory according to the preset access data format includes: acquiring initial data to be checked and the size of an initial check code corresponding to the initial data to be checked from a flash memory, and packaging the initial data to be checked and the initial check code according to a preset access data format to obtain a plurality of first data packets required by the slave; the initial data to be checked are RAM data; the initial check code is an ECC check code.
It is worth to describe that the host reads the third data packet required by the host from the flash memory according to the preset access data format, and starts according to the third data packet after verification.
In a preferred embodiment, the predetermined access data format is 4k initial data to be verified-1 k initial ECC check code.
In a preferred embodiment, after the master completes the verification, the data to be verified, again packed in the format of a 4 k-1 k check code, is transmitted to the slave. Because RAM data is adopted in Flash, and the host adopts SRAM as a memory, the size of the actual need can be adjusted for the divided temporary storage space, and therefore, in addition to the access data format of the 4k initial data to be checked-1 k initial ECC check code and the 4k data to be checked-1 k check code as a preferred scheme, larger initial data to be checked and the initial ECC check codes and check codes respectively corresponding to the two data to be checked can be supported. And the data to be checked obtained in the whole starting process of the slave is RAM data, and the check codes are ECC check codes.
In a preferred embodiment, a third data packet is fetched into the first check code cache according to the first direct memory access controller on the host side and fetched from the first check code cache by the first check code engine; the third data packet comprises a fourth check code after unpacking and third data to be checked; the third data to be checked are subjected to error checking according to the fourth check code, and if errors are checked, the third data to be checked are corrected to obtain fourth check data with correct check; and storing the fourth check data into a first storage area according to the first direct memory access controller, accumulating the fourth check data, and continuously acquiring the access data from the memory if the third access data obtained by accumulation does not meet the data requirement of the host computer, so that the starting is performed according to the fourth access data accumulated finally.
In a preferred embodiment, if the command, parameter or code in the data that the slave and the host start is the same, the host does not need to acquire the started data additionally; otherwise, the host needs to additionally acquire the started data, accumulate the checked data, and start according to the finally obtained access data.
And step S12, storing the first check code into a preset temporary storage space, checking the first data to be checked to obtain first check data, reading the stored second check code from the temporary storage space, and packaging the second check code and the first check data to obtain a second data packet.
The storing the first check code in a preset temporary storage space comprises the following steps: setting an address space with a preset size in a first storage area as a temporary storage space, putting an acquired first data packet into a first check code cache memory according to a first direct memory access controller of a host side, and storing the first check code into the temporary storage space in a coverage mode; when a plurality of slaves respectively reach corresponding data demands, the master releases the temporary storage space.
In a preferred embodiment, the last block of address space is used as temporary storage space in the SRAM area in the host.
The invention adopts the last block of address space in the SRAM area in the host as the temporary storage space, can ensure that the temporary storage space can not cut the addresses of other stored data in the SRAM area, is convenient for the host to directly find the address storage check code of the corresponding temporary storage space, thereby improving the efficiency of accessing the check code of the host and further improving the starting efficiency of the slave according to the checked data; and after the plurality of slaves acquire corresponding second access data which can be started, the host releases the temporary storage space, so that the utilization rate of the storage space of the host can be improved.
In a preferred embodiment, the number of the slaves is one or more, when the number of the slaves is multiple, the temporary storage space is free after the plurality of slaves are required to obtain corresponding access data, and the host releases the temporary storage space.
After checking the first data to be checked, obtaining first check data, including: the first check code engine acquires a first data packet from a first check code cache memory of the host to obtain a first check code and first data to be checked, and performs error checking on the first data to be checked according to the first check code, and if the error is checked, the first data to be checked is corrected to obtain first check data with correct check; and storing the first check data into a first storage area according to a first direct memory access controller of the host side.
In a preferred embodiment, both the master and the slave check by means of error checking and then error correction.
The invention adopts the mode of firstly checking errors and then correcting errors according to the check code, not only can find errors or losses of received data, but also can correct errors, thereby correcting error data generated in the data transmission process and further guaranteeing the correctness of the data received by the host.
After reading the stored second check code from the temporary storage space, packaging the second check code and the first check data to obtain a second data packet, including: after the first check data are stored in a first storage area, a second check code is read from the temporary storage space, second check data corresponding to the second check code are read from the first storage area, and the second check code and the second check data are packed to obtain a second data packet.
In a preferred embodiment, 1K of address space from the ROM area in the first SRAM area is used as temporary storage space for storing a first check code.
It should be noted that the temporary storage space may be located anywhere in the ROM area, but in order to facilitate continuous use of the address space except the temporary storage space, the present invention preferably uses the last 1K address space in the ROM area as the temporary storage space, and the size of the temporary storage space is determined by the corresponding verification data.
And step S13, transmitting the second data packet to the powered-on slave machine so that the slave machine starts after verifying the received second data packet.
The slave starts according to the received second data packet, and comprises the following steps: and after the secondary machine checks the received second data packet, third check data passing through the check is obtained, the third check data is accumulated, and if the accumulated first access data still fails to meet the data requirement, the access data is continuously acquired from the internal memory according to the primary machine, so that the secondary machine is started according to the finally accumulated second access data.
After the slave machine checks the received second data packet, third check data passing the check is obtained, and the method comprises the following steps: after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data.
Specifically, according to the second direct memory access controller of the slave side, the acquired second data packet is put into a second check code cache; the second check code engine acquires a third check code and second data to be checked in a second data packet from the second check code cache memory, and performs error checking on the second data to be checked according to the third check code, and if an error is detected, corrects the second data to be checked to obtain third check data with correct check; and storing the third check data into a second storage area according to the second direct memory access controller.
The data verification of the slave machine is carried out at the slave machine, so that the accuracy of the data received by the slave machine can be further ensured, and the quick start according to the received data can be ensured.
In a second embodiment, starting a slave includes: the method comprises the steps that a host computer is connected with a Flash memory of a Nand Flash memory, a slave computer is connected with the host computer, a data packet for starting the slave computer is obtained by directly accessing the Flash memory after the host computer is electrified, a data packet of 4k check data and 1k check codes is obtained, the data packet is unpacked, the data to be checked and the check codes are obtained, the check codes are stored in a temporary storage area for storing the check codes, the temporary storage area is a storage area with the size of the last 1k in the host computer storage area, ECC check is carried out on the data to be checked through the check codes, and the check data passing through the check codes are stored.
It is noted that the time delay of checking the check data is longer than the storage time delay of storing the check code, and the time delay of checking is shorter than the storage time delay, so that the obtained check data is stored when checking.
And respectively reading the stored check codes and check data, packaging according to the 4k check data and the 1k check code, sending the data packet to the slave, receiving the data packet by the slave, unpacking the data packet to obtain the data to be checked and the check code, checking the data to be checked through the check code until the acquired check data meets the data requirement of the slave starting, starting the slave, and releasing the temporary storage space by the host.
The invention temporarily stores the check code in the temporary storage area of the host computer, the host computer does not need to access the flash memory for the second time to acquire the check code again and then packages the check data to the slave computer, so that the starting efficiency of the slave computer can be improved; in addition, the verification data is stored in the starting process of the slave machine, so that the data processing time delay can be reduced, and the starting efficiency of the slave machine can be improved; in addition, after the slave acquires the started data requirement, the temporary storage space can be released, namely the divided temporary storage space is a non-fixed storage space, so that the slave has flexibility in the starting process, and the utilization rate of storage resources of the host can be improved.
In a third embodiment, starting the host includes: the host is connected with the host through the slave, and the host obtains a data packet for starting the host through directly accessing the Flash memory after power-on to obtain a data packet of 4k check data and 1k check code; the data packet started by the host is the same as the data packet started by the slave. Unpacking the data packet to obtain data to be checked and check codes, storing the check codes into a temporary storage area which is the last 1k storage area in the host storage area for storing the check codes, performing ECC check on the data to be checked through the check codes to obtain check data passing the check, and storing the check data.
It is worth noting that the verification time delay spent in verifying the verification data is larger than the storage time delay of the storage verification code, the situation that the verification time delay is smaller than the storage time delay also occurs, and the same data packet as the slave computer is used for starting the host computer, so that the obtained verification data is stored when the verification is performed.
The verification data can be used for starting the slave machine as well as the host machine, the obtained verification data are stored for starting the host machine, after the verification code and the verification data are read, the verification data are packaged according to the 4k verification data and the 1k verification code and sent to the slave machine, the slave machine receives the data package and unpacks the data package to obtain the data to be verified and the verification code, the data to be verified are verified through the verification code, the slave machine is started until the obtained verification data meet the data requirement of starting the slave machine, and the temporary storage space is released by the host machine.
The difference between the third embodiment and the second embodiment is that: the host reads the data packet from the flash memory, and the data packet can be used for starting the host and starting the slave, so that the efficiency of simultaneously starting the master and the slave can be improved.
In the fourth embodiment, referring to fig. 2, a schematic diagram of starting an interconnected host and a single slave according to the embodiment of the present invention is shown, in the figure, the host is interconnected with a Flash, and a RAM code area and an ECC code area are stored in the Flash; the RAM code area and the ECC code area respectively store initial data to be checked and an initial check code; the initial data to be checked is a RAM code (RAM code), namely: RAM data, the initial check code is ECC check code (ECC code).
PVSoC0 is a host, and in the host, a check code Cache (ECC Cache) and an SRAM area are included; the ECC Cache is used for caching data packets acquired from the Flash by a direct memory access (Directive Memory Access, DMA) controller at the host side; the data packet includes: the method comprises the steps that data to be checked and check codes received by a host, namely RAM codes and ECC codes, or the RAM data and the ECC check codes; the SRAM area includes a RAM code area (ram.code), a ROM data area (rom.data), an temporary storage space (ecc.temp), and a RAM data area (ram.data); the temporary storage space is used for storing the check code, and the host computer stores the checked data into the SRAM.
PVSoC1 is a slave, and the master and the slave respectively pass through I 2 C bus interconnect, host side I 2 The C port is I 2 C0, I of slave side 2 C port 1.
In the slave, a check code Cache (ECC Cache) and an SRAM area are also included; the ECC Cache is used for caching data packets acquired from the host by DMA of the slave side; the data packet includes: the data to be checked and the check codes, namely the RAM codes and the ECC codes, received by the slave; the SRAM region includes: a RAM code area (ram.code), a ROM data area (rom.data) and a RAM data area (ram.data), the slave stores the verified data in the SRAM.
Slave machine through I 2 The C bus acquires data in the flash memory from the host, the slave is started after the two times of verification of the host and the slave are performed, and the host directly reads the data in the flash memory and starts after the verification.
It is noted that, the SRAM area divided into ROM.data area is temporarily reserved for host to store ECC code in host, each time the host transfers RAM data and ECC check code in Flash to ECC Engine (Engine), at the same time the ECC code is stored to temporary ECC.temp, the host reads RAM data from SRAM and ECC code from ECC.temp, then packages and transfers it to slave's ECC Engine, the slave side after ECC Engine check, DMA transfers the checked RAM data to SRAM, so after transferring for several times, the whole RAM data of slave is transferred, the slave jumps to SRAM and executes RAM data to start. If the RAM data needed by the starting of the host is also read, the corresponding SRAM is also jumped to and the RAM data is executed for starting.
In a preferred embodiment, a chip may comprise 1 or more DIEs (DIE), each DIE being a DIE cut from a silicon Wafer (Wafer), each DIE being a separate functional chip, and each DIE being an unpackaged DIE, the DIE being packaged as a common chip, and PVSoC0 and PVSoC1 being control management units for the different chips, respectively, for powering up the chip, and the chip further comprising a core unit for providing computing power. And taking the Flash-mounted chips as a host and the rest chips as slaves on the chips of the multiple chips. Thus, in FIG. 2, the master is a wafer and the slaves are a wafer.
The invention adopts the verification at the host computer, can ensure the correctness of the received data of the host computer, sets the temporary storage space at the host computer to buffer the verification code of the data transmitted by the host computer, and obtains the verification code from the flash memory to verify the data by consuming the space of the host computer to obtain the rate of the data verification by the slave computer, thereby being convenient for the slave computer to verify the data by receiving the verification code, not only ensuring the correctness of the data received by the slave computer, but also improving the starting efficiency of the slave computer according to the verified data.
In a fifth embodiment, refer to fig. 3, which is a start-up of an interconnected master and a multi-slave according to an embodiment of the present invention. In the figure, a host computer and Flash access data through DMA, and the host computer and a multi-slave computer pass through I 2 The C buses are interconnected, the host is PVSoC0, and the slaves comprise PVSoC1, PVSoC2 and PVSoC3. Each slave machine passes through I 2 The C bus acquires data in the flash memory from the host, the slave is started after the two times of verification of the host and the slave are performed, and the host directly reads the data in the flash memory and starts after the verification.
In a preferred embodiment, the master and 3 slaves in FIG. 3 are all wafers, and the master is configured to communicate with a plurality of slaves in I, based on the teachings of the present invention 2 And after the host acquires data from the flash memory, if the commands of starting the plurality of slaves are the same, the same RAM code is received, the received RAM code is subjected to ECC verification, the plurality of slaves are synchronously started according to the obtained verification code, the same verification code of the plurality of slaves can be stored at the host through a temporary storage space, and if the commands of starting the host and the slaves are the same, the host does not need to additionally read the RAM code and the ECC code required by the host from the flash memory, so that the efficiency of starting the plurality of slaves is further improved.
In a sixth embodiment, referring to fig. 4, a multi-Chip starting schematic diagram with the same structure and interconnection provided in the embodiment of the present invention includes a Chip0 and a Chip1; the Chip0 and the Chip1 are chips of multiple wafers, and the number of the wafers is the same; host PVSoC0 and slave PVSoC1 in Chip0 through I 2 C bus interconnection, master-slave interconnection among chips is also realized through I 2 The C bus connects host PVSoC0 and Ch in Chip0Slave PVSoC2 and slave PVSoC1 on ip1 chip pass I 2 C bus interconnection, each slave machine all passes through I 2 The C bus acquires data in the flash memory from the host, the slave is started after the two times of verification of the host and the slave are performed, and the host directly reads the data in the flash memory and starts after the verification.
It should be noted that in fig. 4, the master and the slave are packaged chips, the master and the slave have the same number of wafers, i.e. the master and the slave have the same structure, and based on the technical concept of the present invention, the wafers in the chips and between the chips can pass through I 2 The C buses are interconnected, and the wafers between chips and in the chips are started by I 2 And C bus obtains data package sent by the host, if all the data needed by the starting of the wafers are the same, the synchronous starting of the multiple chips can be realized through the temporarily stored check codes and the checked check data of the temporary storage space of the host, and the multiple chips do not need to wait for the idle temporary storage space of the host when obtaining the corresponding data package. Therefore, when the technical concept of the invention is applied to the starting of a multi-chip and multi-wafer, the starting efficiency of a large-scale chip can be improved.
An embodiment seven, see fig. 5, is a schematic diagram of starting up multiple chips with different interconnected structures according to the embodiment of the present invention, where the diagram includes a Chip0, a Chip1, and a Chip2; the Chip0 is a multi-wafer Chip, and the chips Chip1 and Chip2 are single-wafer chips. The multi-machine interconnection is started, and the multi-machine interconnection further comprises a Chip0 which only comprises one wafer and a plurality of chips which comprise a plurality of wafers; wherein, the control management unit of Chip0 is the host computer. Each slave machine passes through I 2 The C bus acquires data in the flash memory from the host, the slave is started after the two times of verification of the host and the slave are performed, and the host directly reads the data in the flash memory and starts after the verification.
In a preferred embodiment, fig. 5 shows a multi-wafer chip as the master, two chips as the slaves, i.e. the master and the slaves are chips with different structures, based on the technical concept of the present invention, the chips with different structures can also pass through I 2 C busThe method and the device can realize data transmission among chips with different structures, can be suitable for more complex chip integration or chip interconnection scenes, and can start the chips in complex environments, so that the method and the device have stronger applicability and adaptability, and can provide efficient starting for chip interconnection in large-scale complex scenes.
An eighth embodiment, see fig. 6, is a multi-machine starting flowchart of interconnection provided in the embodiment of the present invention, including steps S61 to S70, specifically:
step S61, powering up the master and the slave.
Step S62, the host acquires the initial data to be transmitted and the initial check code from the flash memory.
Step S63, according to a preset access data format, the host packages the initial data to be transmitted and the initial check code from the flash memory to obtain a plurality of data packets.
Step S64, a data packet is obtained according to DMA of the host side, and is put into ECC Cache in the host, and check codes in the data packet are stored into the temporary storage space; the data packet comprises a data packet for starting the host and a data packet for starting the slave.
Step S65, DMA of the host side puts the data checked by the ECC check code into the SRAM area of the host; the data checked by the ECC check code comprises check data of the starting host and check data of the starting slave.
Step S66, the host computer packages the data in the SRAM and the check code in the temporary storage space to obtain a data packet to be transmitted to the slave computer; wherein the packed data is used for the start-up of the slave.
Step S67, the host computer passes through I 2 The C bus transmits the data packet to the ECC Cache of the slave.
In step S68, the DMA of the slave side places the data checked by the ECC check code into the SRAM area of the slave.
Step S69, judging whether a data packet which can be started is obtained, if the slave does not obtain all the corresponding data packets, entering step S64, otherwise, entering step S70; if the commands in the data of the master-slave machine for starting are the same, the master-slave machine only needs to judge whether the data packet obtained by the master machine or the slave machine can be started once.
Step S70, a plurality of slaves jump to corresponding SRAM areas and start according to data in the corresponding SRAM areas, and the host releases the temporary storage space; if the host also acquires the data packet which can be started, the host also jumps to the SRAM area of the host and starts according to the data in the SRAM area.
According to the invention, the temporary storage space is arranged at the host, the check codes in the temporary storage space and the checked check data are packaged and then sent to the slave, the rate of data check by acquiring the check codes from the flash memory by the slave is replaced by consuming the host space, the slave can conveniently verify the data by receiving the check codes, the slave performs secondary check on the check data according to the check codes, the correctness of the data received by the slave can be ensured, and the starting efficiency of the slave according to the checked data can be improved.
An embodiment nine, referring to fig. 7, is a schematic structural diagram of a slave starting device according to an embodiment of the present invention, including: a reading module 71, a checking module 72 and a slave start-up module 73.
In a preferred embodiment, the reading module 71 reads the first data packet from the flash memory according to a preset data format, and transmits the read first data packet to the checking module 72, after the checking module stores the check code of the received first data packet in the temporary storage space, and checks the data in the first data packet according to the check code, and packages the checked check data and the check code in the temporary storage space, and then sends the packaged check data and the check code in the temporary storage space to the slave starting module 73, and the slave starting module 73 starts according to the received data packet.
The reading module 71 is configured to read, after the host is powered on, a first data packet required by the slave from the flash memory according to a preset access data format; the first data packet comprises first data to be checked and a first check code.
Specifically, reading a first data packet required by the slave from the flash memory according to a preset access data format, including: acquiring initial data to be checked and the size of an initial check code corresponding to the initial data to be checked from a flash memory, and packaging the initial data to be checked and the initial check code according to a preset access data format to obtain a plurality of first data packets required by the slave; the initial data to be checked are RAM data; the initial check code is an ECC check code.
Specifically, according to a first direct memory access controller of a host side, acquiring a third data packet into a first check code cache memory, and acquiring the third data packet from the first check code cache memory by a first check code engine; the third data packet comprises a fourth check code after unpacking and third data to be checked; the third data to be checked are subjected to error checking according to the fourth check code, and if errors are checked, the third data to be checked are corrected to obtain fourth check data with correct check; and storing the fourth check data into a first storage area according to the first direct memory access controller, accumulating the fourth check data, and continuously acquiring the access data from the memory if the third access data obtained by accumulation does not meet the data requirement of the host computer, so that the starting is performed according to the fourth access data accumulated finally.
And the verification module 72 is configured to store the first verification code into a preset temporary storage space, verify the first data to be verified to obtain first verification data, read the stored second verification code from the temporary storage space, and package the second verification code with the first verification data to obtain a second data packet.
The storing the first check code in a preset temporary storage space comprises the following steps: setting an address space with a preset size in a first storage area as a temporary storage space, putting an acquired first data packet into a first check code cache memory according to a first direct memory access controller of a host side, and storing the first check code into the temporary storage space in a coverage mode; when a plurality of slaves respectively reach corresponding data demands, the master releases the temporary storage space.
The invention adopts the last block of address space in the SRAM area in the host as the temporary storage space, can ensure that the temporary storage space can not cut the addresses of other stored data in the SRAM area, is convenient for the host to directly find the address storage check code of the corresponding temporary storage space, thereby improving the efficiency of accessing the check code of the host and further improving the starting efficiency of the slave according to the checked data; and after the plurality of slaves acquire corresponding second access data which can be started, the host releases the temporary storage space, so that the utilization rate of the storage space of the host can be improved.
In a preferred embodiment, the number of the slaves is one or more, when the number of the slaves is multiple, the temporary storage space is free after the plurality of slaves are required to obtain corresponding access data, and the host releases the temporary storage space.
After checking the first data to be checked, obtaining first check data, including: the first check code engine acquires a first data packet from a first check code cache memory of the host to obtain a first check code and first data to be checked, and performs error checking on the first data to be checked according to the first check code, and if the error is checked, the first data to be checked is corrected to obtain first check data with correct check; and storing the first check data into a first storage area according to a first direct memory access controller of the host side.
The invention adopts the mode of firstly checking errors and then correcting errors according to the check code, not only can find errors or losses of received data, but also can correct errors, thereby correcting error data generated in the data transmission process and further guaranteeing the correctness of the data received by the host.
After reading the stored second check code from the temporary storage space, packaging the second check code and the first check data to obtain a second data packet, including: after the first check data are stored in a first storage area, a second check code is read from the temporary storage space, second check data corresponding to the second check code are read from the first storage area, and the second check code and the second check data are packed to obtain a second data packet.
In a preferred embodiment, 1K of address space from the ROM area in the first SRAM area is used as temporary storage space for storing a first check code.
And the slave start module 73 is configured to transmit the second data packet to the slave after power-up, so that the slave starts after verifying the received second data packet.
The slave starts according to the received second data packet, and comprises the following steps: and after the secondary machine checks the received second data packet, third check data passing through the check is obtained, the third check data is accumulated, and if the accumulated first access data still fails to meet the data requirement, the access data is continuously acquired from the internal memory according to the primary machine, so that the secondary machine is started according to the finally accumulated second access data.
After the slave machine checks the received second data packet, third check data passing the check is obtained, and the method comprises the following steps: after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data.
Specifically, according to the second direct memory access controller of the slave side, the acquired second data packet is put into a second check code cache; the second check code engine acquires a third check code and second data to be checked in a second data packet from the second check code cache memory, and performs error checking on the second data to be checked according to the third check code, and if an error is detected, corrects the second data to be checked to obtain third check data with correct check; and storing the third check data into a second storage area according to the second direct memory access controller.
The data verification of the slave machine is carried out at the slave machine, so that the accuracy of the data received by the slave machine can be further ensured, and the quick start according to the received data can be ensured.
The present invention also provides, in an embodiment, a computer-readable storage medium including a stored computer program; and when the computer program runs, controlling the equipment where the computer readable storage medium is located to execute the slave starting method.
The slave starts the computer readable storage medium, a temporary storage space can be arranged at the host, the check codes in the temporary storage space and the checked check data are packaged and then sent to the slave, the rate of data check by the slave for acquiring the check codes from the flash memory is replaced by consuming the host space, the slave can conveniently verify the data by receiving the check codes, the slave performs secondary check on the check data according to the check codes, the correctness of the data received by the slave can be ensured, and the starting efficiency of the slave for starting according to the checked data can be improved; in addition, according to the slave starting computer readable storage medium, the slave starting method can be applied to specific computer equipment or terminal equipment, the starting of chips or wafers or sockets with different structures can be processed, more complex slave starting scenes can be processed, and therefore the efficiency of large-scale slave starting is further improved, and the method has higher applicability.
In an eleventh embodiment, the present invention further provides an electronic device, where the electronic device includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, where the processor executes the slave boot method as described.
Through electronic equipment, set up temporary storage space in host computer department, send the check-up code in the temporary storage space and after the check-up data packing to the slave machine, obtain the rate that check-up code carries out data check in the slave machine follow flash memory through consuming the host computer space, can be convenient for the slave machine can verify the data through receiving the check-up code, the slave machine carries out the secondary check to check-up data according to the check-up code, can both ensure the accuracy of the data that the slave machine received, can improve the starting efficiency that the slave machine starts according to the data after the check-up again, and in the concrete electronic equipment of integrating, can be applied to in the middle of the slave machine start of more business, have higher adaptability.
It will be appreciated by those skilled in the art that embodiments of the present application may also be provided including a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.

Claims (10)

1. A slave start-up method, comprising:
after the host is electrified, reading a first data packet required by starting the slave from the flash memory according to a preset access data format; the first data packet comprises first data to be checked and a first check code;
storing the first check code into a preset temporary storage space, checking first data to be checked to obtain first check data, reading a stored second check code from the temporary storage space, and packaging the second check code and the first check data to obtain a second data packet;
And transmitting the second data packet to the powered-on slave machine so that the slave machine is started after verification according to the received second data packet.
2. The method for starting up a slave machine according to claim 1, wherein storing the first check code in a predetermined temporary storage space comprises:
setting an address space with a preset size in a first storage area as a temporary storage space, putting an acquired first data packet into a first check code cache memory according to a first direct memory access controller of a host side, and storing the first check code into the temporary storage space in a coverage mode; when a plurality of slaves respectively reach corresponding data demands, the master releases the temporary storage space.
3. The method for starting up a slave machine according to claim 1, wherein the step of obtaining the first check data after checking the first data to be checked comprises:
the first check code engine acquires a first data packet from a first check code cache memory of the host to obtain a first check code and first data to be checked, and performs error checking on the first data to be checked according to the first check code, and if the error is checked, the first data to be checked is corrected to obtain first check data with correct check;
And storing the first check data into a first storage area according to a first direct memory access controller of the host side.
4. The method for starting up a slave machine according to claim 1, wherein after reading the stored second check code from the temporary storage space, packaging the second check code with the first check data to obtain a second data packet, comprising:
after the first check data are stored in a first storage area, a second check code is read from the temporary storage space, second check data corresponding to the second check code are read from the first storage area, and the second check code and the second check data are packed to obtain a second data packet.
5. The method for starting up a slave according to claim 1, wherein the step of starting up the slave after verifying the received second packet includes:
and after the secondary machine checks the received second data packet, third check data passing through the check is obtained, the third check data is accumulated, and if the accumulated first access data still fails to meet the data requirement, the access data is continuously acquired from the internal memory according to the primary machine, so that the secondary machine is started according to the finally accumulated second access data.
6. The method for starting up a slave according to claim 5, wherein after the slave checks the received second data packet, obtaining third check data passing the check, includes:
after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data.
7. The method for starting up a slave machine according to claim 5, wherein after receiving the second data packet, unpacking the second data packet to obtain a third check code and second data to be checked, checking the second data to be checked according to the third check code, and taking the checked data as third check data, wherein the method comprises the steps of:
placing the acquired second data packet into a second check code cache according to a second direct memory access controller of the slave side;
the second check code engine acquires a third check code and second data to be checked in a second data packet from the second check code cache memory, and performs error checking on the second data to be checked according to the third check code, and if an error is detected, corrects the second data to be checked to obtain third check data with correct check;
And storing the third check data into a second storage area according to the second direct memory access controller.
8. The method for starting up a slave according to claim 1, wherein the reading the first data packet required by the slave from the flash memory according to the preset access data format further comprises:
and reading a third data packet required by the user from the flash memory according to a preset access data format, and starting according to the third data packet after verification.
9. A multi-machine data transmission device, comprising:
the request data module is used for actively sending a first request data command to the host according to the reconfigured first integrated circuit interconnection bus so that the host feeds back first data according to the first request data command; the first data are generated after the host checks the data packet taken out of the flash memory according to the first request data command;
the verification module is used for unpacking the received first data to obtain first code data and a first verification code, and verifying the first code data according to the first verification code;
the repeated request data module is used for repeatedly sending the first request data command to the host under the limit of the times of the data sending threshold value if the first code data does not pass the verification, so that the host feeds back the second data again; the second data is obtained by the host sending the first data again after the first request data command.
10. A computer-readable storage medium, comprising: the computer readable storage medium includes a stored computer program; wherein the computer program, when run, controls a device in which the computer readable storage medium resides to perform the slave boot method according to any one of claims 1-8.
CN202311056973.2A 2023-08-21 2023-08-21 Slave starting method, device and storage medium Pending CN117032579A (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08305431A (en) * 1995-04-28 1996-11-22 Fanuc Ltd Memory access system
CN105786753A (en) * 2016-02-22 2016-07-20 上海斐讯数据通信技术有限公司 Method and device for data transmission between master and slave devices on I2C bus
CN105786639A (en) * 2016-03-01 2016-07-20 上海斐讯数据通信技术有限公司 I2C buss data transmission method and system
CN108037931A (en) * 2017-12-06 2018-05-15 广州路派电子科技有限公司 A kind of method that file programming is carried out to microprocessor storage unit
CN110750480A (en) * 2019-10-18 2020-02-04 苏州浪潮智能科技有限公司 Dual-computer hot standby system
CN115480965A (en) * 2022-09-16 2022-12-16 山东云海国创云计算装备产业创新中心有限公司 Method, device, equipment and medium for building PECI bus protocol command response
CN116366391A (en) * 2023-03-29 2023-06-30 惠州汇能精电科技有限公司 MODBUS communication method and device based on data list structure
CN116541047A (en) * 2023-07-05 2023-08-04 广州疆海科技有限公司 Firmware upgrading method, device, computer equipment and computer readable storage medium

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08305431A (en) * 1995-04-28 1996-11-22 Fanuc Ltd Memory access system
CN105786753A (en) * 2016-02-22 2016-07-20 上海斐讯数据通信技术有限公司 Method and device for data transmission between master and slave devices on I2C bus
CN105786639A (en) * 2016-03-01 2016-07-20 上海斐讯数据通信技术有限公司 I2C buss data transmission method and system
CN108037931A (en) * 2017-12-06 2018-05-15 广州路派电子科技有限公司 A kind of method that file programming is carried out to microprocessor storage unit
CN110750480A (en) * 2019-10-18 2020-02-04 苏州浪潮智能科技有限公司 Dual-computer hot standby system
CN115480965A (en) * 2022-09-16 2022-12-16 山东云海国创云计算装备产业创新中心有限公司 Method, device, equipment and medium for building PECI bus protocol command response
CN116366391A (en) * 2023-03-29 2023-06-30 惠州汇能精电科技有限公司 MODBUS communication method and device based on data list structure
CN116541047A (en) * 2023-07-05 2023-08-04 广州疆海科技有限公司 Firmware upgrading method, device, computer equipment and computer readable storage medium

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
卢腾辉: ""eMMC主机控制器设计与研究"", 《中国优秀硕士学位论文全文数据库信息科技辑》, no. 12, 15 December 2018 (2018-12-15) *

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