CN116996647A - Video transmission method of BMC, BMC and system-level chip - Google Patents

Video transmission method of BMC, BMC and system-level chip Download PDF

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Publication number
CN116996647A
CN116996647A CN202311233660.XA CN202311233660A CN116996647A CN 116996647 A CN116996647 A CN 116996647A CN 202311233660 A CN202311233660 A CN 202311233660A CN 116996647 A CN116996647 A CN 116996647A
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information
module
video
bmc
acquisition
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CN116996647B (en
Inventor
张贞雷
李拓
邹晓峰
满宏涛
刘同强
周玉龙
王贤坤
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Suzhou Metabrain Intelligent Technology Co Ltd
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Suzhou Metabrain Intelligent Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/18Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306Intercommunication techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/781On-chip cache; Off-chip memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/547Remote procedure calls [RPC]; Web services
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/54Indexing scheme relating to G06F9/54
    • G06F2209/544Remote

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

The embodiment of the application provides a video transmission method of a BMC, the BMC and a system-level chip, wherein the method comprises the following steps: the method comprises the steps that a statistical scheduling module obtains first information representing the data transmission speed between a BMC and an off-chip memory, second information representing the compression speed of the BMC on video information and third information representing the frame loss rate in the process of sending the video information by the BMC; the function selection module determines a function selection mode; when the function selection mode is determined to be an automatic mode, the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths at least according to part of the first information, the second information and the third information and a preset threshold value, wherein the acquisition path is a path for acquiring video information by the BMC; and the statistical scheduling module controls the BMC to acquire video information in a target acquisition way, compresses the video information and sends the compressed video information to a far end. The application solves the problem that the way of capturing video information by the BMC in the remote video transmission process is not matched with the current performance of the BMC.

Description

Video transmission method of BMC, BMC and system-level chip
Technical Field
The embodiment of the application relates to the field of computers, in particular to a video transmission method of a BMC, a computer readable storage medium, the BMC and a system-on-chip.
Background
A System On Chip (SOC) is a standard product that integrates a microprocessor, an analog IP (Intellectual Property) core, a digital IP core, and a memory (or off-Chip memory control interface) on a single Chip, typically custom-made, or specific-purpose oriented. On the server, a custom baseboard management controller (Baseboard Management Controller, abbreviated as BMC) is usually configured to monitor server states including temperature, fans, CPU (Central Processing Unit ) running conditions, and the like, and to transmit local video information to a remote device through a network, so that the remote device can realize a display function, a monitoring function, and the like.
In the process of remotely transmitting video information, the BMC captures the video information by adopting two acquisition ways:
firstly, a DVI (Digital Visual Interface, digital video interface) approach is adopted, after a capturing module of a video compression module in the BMC receives RGB original Data on the DVI, the RGB original Data is sent to a compression module at a later stage for video compression, after the compression is completed, the compressed Data is written into a DDR (Double Data Rate, double Rate memory), then, network transmission is carried out by an EMAC (Ethernet Media Access Controller, ethernet transmission controller), and the network transmission is carried out to a far end for remote display;
Secondly, the capture module actively reads RGB original data in DDR through AXI (Advanced eXtensible Interface, bus protocol) interface, then sends the RGB original data into a later compression module for video compression, after the compression is completed, writes the compressed data into DDR, then carries out network transmission by EMAC, and transmits the compressed data to a far end for remote display.
The two acquisition approaches have advantages and disadvantages, but for users of the BMC, the two acquisition approaches are random, and because the basic functions are consistent, when the DDR bus bandwidth of the BMC is already large, the user still selects the Buffer approach, which causes overload of the DDR bus bandwidth to affect the overall performance of the BMC chip, and when the DDR bus bandwidth of the BMC is low, the remote data delay is larger.
Disclosure of Invention
The embodiment of the application provides a video transmission method of a BMC, a computer readable storage medium, the BMC and a system-level chip, which at least solve the problem that the way of capturing video information by the BMC is not matched with the current performance of the BMC in the remote video transmission process in the related technology.
According to an embodiment of the present application, there is provided a video transmission method of a BMC, the BMC including a control structure including a statistical scheduling module and a function selecting module, the method including: the statistical scheduling module acquires first information, second information and third information, wherein the first information represents the data transmission speed between the BMC and an off-chip memory, the second information represents the compression speed of the BMC on video information, and the third information represents the frame loss rate in the process of sending the video information by the BMC; the function selection module determines a function selection mode, wherein the function selection mode comprises an automatic mode and a non-automatic mode, the automatic mode is a mode for automatically selecting an acquisition path, and the non-automatic mode is a mode for manually selecting the acquisition path; in the case that the function selection module determines that the function selection mode is the automatic mode, the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least the size relation between parts of the first information, the second information and the third information and a preset threshold, wherein the acquisition path is a path for acquiring the video information by the BMC; and the statistical scheduling module controls the BMC to acquire the video information in the target acquisition way, compresses the video information and then sends the compressed video information to a far end.
In an exemplary embodiment, the BMC further includes a video processing module, a video compression module, and an ethernet transmission controller, where the video processing module is configured to write the video information into the off-chip memory and read the video information from the off-chip memory, the video compression module is configured to compress the video information and write the compressed video information into the off-chip memory, and the ethernet transmission controller is configured to read the compressed video information from the off-chip memory and send the compressed video information to the remote end, and the acquisition path is a path for the video compression module to acquire the video information, where a plurality of the acquisition paths respectively include: a first acquisition path and/or a second acquisition path, wherein the first acquisition path is used for representing the video compression module to receive the video information sent by the video processing module through DVI; the second acquisition path is used for representing that the video compression module receives the video information from the first port in the condition that the video compression module reads the video information from the off-chip memory through the first port; and a third acquisition path for characterizing the video compression module to read the video information from the off-chip memory.
In an exemplary embodiment, the statistical scheduling module includes a network speed analysis module and a memory bandwidth analysis module, where the statistical scheduling module obtains first information, and includes: the network speed analysis module acquires frequency information of the Ethernet transmission controller reading a preset address space, wherein the preset address space is an address space of the off-chip memory for storing the compressed video information; the network speed analysis module acquires frequency information of other address spaces read by the Ethernet transmission controller, wherein the other address spaces are address spaces of the off-chip memory except the preset address space; and the memory bandwidth analysis module acquires the rate information of writing the compressed video information into the off-chip storage by the video compression module.
In an exemplary embodiment, the network speed analysis module obtains frequency information of the ethernet transport controller reading a predetermined address space, including: the network speed analysis module receives a first address range corresponding to the preset address space; and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the first address range according to the first address range, and obtains the frequency information of the Ethernet transmission controller for reading the preset address space.
In an exemplary embodiment, the network speed analysis module obtains frequency information of the ethernet transport controller reading other address spaces, including: the network speed analysis module receives a second address range corresponding to the other address space; and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the second address range according to the second address range, and obtains the frequency information of the Ethernet transmission controller for reading the other address spaces.
In an exemplary embodiment, the memory bandwidth analysis module obtains rate information of the video compression module writing the compressed video information to the off-chip memory, including: the memory bandwidth analysis module determines the interval time of two adjacent writing operations of the video compression module to obtain the rate information, wherein the writing operation is an operation of writing one frame of compressed video information into the off-chip memory.
In an exemplary embodiment, the statistical scheduling module further includes a video compression speed analysis module, and the statistical scheduling module obtains second information, including: the video compression speed analysis module detects the moment when the video compression module receives the current frame data of the video information, and obtains a first moment; the video compression speed analysis module detects the moment when the video compression module receives the current frame data of the video information, and obtains a first moment; the video compression speed analysis module determines a duration between the first time and the second time as the second information.
In an exemplary embodiment, the video compression speed analysis module detects a time when the video compression module receives the current frame data of the video information, to obtain a first time, including: when the video compression module receives first effective data in the video information, the video compression speed analysis module sets a frame header mark to 1; the video compression speed analysis module starts from the first effective data according to the resolution of the video information, and sets the frame header mark to 1 after each time the video compression module receives the resolution effective data; the video compression speed analysis module determines the corresponding moment under the condition of the frame header mark 1, and obtains the first moment of each frame of data.
In an exemplary embodiment, the video compression speed analysis module detects a time when the video compression module completes compressing the current frame data, and obtains a second time, including one of the following: under the condition that a compression interrupt signal is detected, the video compression speed analysis module determines that the detection time of the compression interrupt signal is the second time, and the compression interrupt signal is a signal generated under the condition that the video compression module completes the compression of the current frame data; and under the condition that the data content compressed by the video compression module comprises an end mark, the video compression speed analysis module determines that the detection moment of the end mark is the second moment, and the end mark is a compression completion mark of the current frame data.
In an exemplary embodiment, the video compression module includes a capturing module and a compression module, the capturing module is configured to read the video information and send the video information to the compression module, the compression module is configured to compress the video information, the statistical scheduling module further includes a frame loss analysis module, and the statistical scheduling module obtains third information, including: when the current acquisition path of the BMC is the first acquisition path, the frame loss analysis module determines whether the DVI receives first preset information, and part of data of the DVI and the current frame data is not transmitted to the capture module, wherein the first preset information is information which is sent by the compression module and indicates that the storage space of the DVI is full; when the DVI receives the first preset information and the DVI also has partial data of the current frame data which is not sent to the capturing module, the frame loss analysis module determines that the BMC has a frame loss; and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information.
In an exemplary embodiment, in a case where the DVI receives the first predetermined information and the DVI also has partial data of the current frame data not transmitted to the capturing module, the method further includes: the frame loss analysis module generates second preset information and sends the second preset information to the capture module, wherein the second preset information is used for indicating the capture module to stop reading the residual data of the current frame data.
In an exemplary embodiment, the video processing module is further configured to write the video information to the off-chip memory through a second port, and the statistical scheduling module obtains third information, including: when the current acquisition path of the BMC is the third acquisition path or the second acquisition path, the frame loss analysis module determines whether partial data of the current frame data are not read in the off-chip memory, and the off-chip memory receives new current frame data written by the video processing module through the second port; when part of the data of the current frame data is not read in the off-chip memory and the off-chip memory receives the new current frame data written by the video processing module through the second port, the frame loss analysis module determines that the BMC loses frames once; and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information.
In an exemplary embodiment, the method further comprises: when the function selection mode is the non-automatic mode, the function selection module receives a preset acquisition path and sends the preset acquisition path to the statistical scheduling module, wherein the preset acquisition path is one of a plurality of preset acquisition paths; and the statistical scheduling module controls the BMC to acquire the video information in the preset acquisition way, compresses the video information and then sends the compressed video information to a far end.
In an exemplary embodiment, the statistical scheduling module further includes a scheduling center module, where the scheduling center module is respectively connected to the network speed analysis module, the memory bandwidth analysis module, the video compression speed analysis module, and the frame loss analysis module, and the scheduling center module is configured to receive the first information, the second information, and the third information, and determine a target acquisition path from a plurality of acquisition paths according to at least a size relationship between a part of the first information, the second information, and the third information and a predetermined threshold, where the determining includes: in the case that the first information is greater than a first threshold, the second information is greater than a second threshold, and the third information is less than a third threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway, the first threshold, the second threshold, and the third threshold constituting the predetermined threshold; the dispatch center module determines the target acquisition pathway as the third acquisition pathway if the first information is less than or equal to the first threshold, the second information is less than or equal to the second threshold, and the third information is greater than or equal to the third threshold.
In an exemplary embodiment, the statistical scheduling module determines a target acquisition path from a plurality of the acquisition paths according to at least a size relationship of a portion of the first information, the second information, and the third information to a predetermined threshold, and further includes: in the case that the first information is less than or equal to the first threshold value, the second information is less than or equal to the second threshold value, and the third information is greater than or equal to the third threshold value, the dispatch center module obtains a preference mode including a first mode of a predetermined preference display effect and a second mode of preference BMC performance; in the case that the preference mode is the first mode, the dispatch center module determines that the target acquisition pathway is the third acquisition pathway; in the case where the preference mode is the second mode, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway.
In an exemplary embodiment, the statistical scheduling module further includes a scheduling center module, where the scheduling center module is respectively connected to the network speed analysis module, the memory bandwidth analysis module, the video compression speed analysis module, and the frame loss analysis module, and the scheduling center module is configured to receive the first information, the second information, and the third information, and determine a target acquisition path from a plurality of acquisition paths according to at least a size relationship between a part of the first information, the second information, and the third information and a predetermined threshold, where the determining includes: the dispatching center module obtains a first weight corresponding to frequency information of a preset address space read by the Ethernet transmission controller, a second weight corresponding to frequency information of other address spaces read by the Ethernet transmission controller, a third weight corresponding to the rate information, a fourth weight corresponding to the second information and a fifth weight corresponding to the third information, wherein the first weight, the second weight, the third weight and the fourth weight are all positive numbers, and the fifth weight is a negative number; the dispatching center module performs weighted summation on the first information, the second information and the third information according to the first weight, the second weight, the third weight, the fourth weight and the fifth weight to obtain weighted values; the dispatch center module determining whether the weighted value is greater than the predetermined threshold; in the case that the weighted value is greater than the predetermined threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway; the dispatch center module determines the target acquisition path as the third acquisition path if the weighted value is less than or equal to the predetermined threshold.
In one exemplary embodiment, the first weight is 0.5±0.1, the second weight is 0.3±0.1, the third weight is 0.6±0.1, the fourth weight is 0.4±0.1, and the fifth weight is-0.2±0.1.
In one exemplary embodiment, after the statistical scheduling module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway, before the statistical scheduling module controls the BMC to acquire the video information in the target acquisition pathway, the method further comprises: the statistical scheduling module determines whether a quick cursor function is opened, wherein the quick cursor function is a function of not transmitting a cursor image; the statistical scheduling module determines the target acquisition pathway to be the second acquisition pathway if the fast cursor function is on.
In one exemplary embodiment, after the statistical scheduling module determines a target acquisition pathway from a plurality of the acquisition pathways, the method further comprises: the function selection module determines to update the fetch path in the status register to the target fetch path.
According to a further embodiment of the application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments when run.
According to still another embodiment of the present application, there is also provided a BMC including: the video processing module is used for writing video information into an off-chip memory and reading the video information from the off-chip memory; the video compression module is used for compressing the video information and writing the compressed video information into the off-chip memory; the Ethernet transmission controller is used for reading the compressed video information from the off-chip memory and sending the compressed video information to the far end; the control structure comprises a statistical scheduling module and a function selecting module, and is used for executing the steps in any method embodiment.
According to another embodiment of the present application, there is also provided a system-on-chip including: the BMC is used for being respectively connected with a host, a display and a far end, and is used for receiving original video information sent by the host, and sending the video information obtained after the original video information is processed to the display for display through DVI; and the off-chip memory is connected with the BMC.
According to the method and the device for obtaining the video information, in an automatic mode, the obtaining way which is matched with the performance of the BMC is determined according to the data transmission speed between the BMC representing the current performance of the BMC and the off-chip memory, the compression speed of the BMC on the video information and at least part of information in the frame loss rate, so that the determined obtaining way can be matched with the current running performance of the BMC, and the effect of flexibly selecting the obtaining way of the video information according to the current performance of the BMC is achieved.
Drawings
Fig. 1 is a flowchart of a video transmission method of a BMC according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a system-on-chip architecture according to an embodiment of the present application;
fig. 3 is a block diagram of a statistical scheduling module according to an embodiment of the present application.
Wherein the above figures include the following reference numerals:
110. a video processing module; 112. a video compression module; 114. an ethernet transmission controller; 116. an off-chip memory; 118. a control structure; 120. a host; 122. a display; 124. a capture module; 126. a compression module; 128. a statistical scheduling module; 130. a function selection module; 132. a network speed analysis module; 134. a memory bandwidth analysis module; 136. a video compression speed analysis module; 138. a frame loss analysis module; 140. and a dispatch center module.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and in the drawings are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
In this embodiment, as shown in fig. 1, the BMC includes a control structure 118, where the control structure 118 includes a statistical scheduling module 128 and a function selecting module 130, and fig. 2 is a flowchart of a video transmission method of the BMC according to an embodiment of the present application, as shown in fig. 2, the flowchart includes the following steps:
Step S202, the statistical scheduling module acquires first information, second information and third information, wherein the first information represents the data transmission speed between the BMC and an off-chip memory, the second information represents the compression speed of the BMC on video information, and the third information represents the frame loss rate in the process of sending the video information by the BMC;
specifically, the data transmission speed is the speed at which the BMC writes data into the off-chip memory and the speed at which the BMC reads data from the off-chip memory. The BMC caches the video information by writing the video information into the off-chip memory, and then reads the video information from the off-chip memory and forwards the video information to a remote end. The first information may represent a network transmission speed of the BMC and a bandwidth of the off-chip memory, the second information may represent a video compression speed of the BMC, and the third information may represent a frame loss condition of the BMC. The off-chip memory may be any suitable type of memory in the prior art, such as a hard disk, a floppy disk, an optical disk, a usb disk, etc., and in the present application, DDR is used as the off-chip memory. The video information is video data in RGB format.
Step S204, the function selection module determines a function selection mode, wherein the function selection mode comprises an automatic mode and a non-automatic mode, the automatic mode is a mode for automatically selecting an acquisition path, and the non-automatic mode is a mode for manually selecting the acquisition path;
specifically, the function selection mode is a mode configured by a user by itself, and may be specifically implemented by issuing register configuration information, where if a value of a register user_auto in the BMC is configured to be 1, it indicates that the function selection mode is the automatic mode, and if a value of a register user_auto in the BMC is configured to be 0, it indicates that the function selection mode is the non-automatic mode. The non-automatic mode is to perform remote video transmission according to the acquisition path manually selected by the user.
Step S206, in the case that the function selection module determines that the function selection mode is the automatic mode, the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least a size relationship between a part of the first information, the second information, and the third information and a predetermined threshold, where the acquisition path is a path of the BMC acquiring the video information;
Specifically, according to at least the magnitude relation between the parts of the first information, the second information and the third information and the predetermined threshold, the first information, the second information and the third information may be compared with corresponding predetermined thresholds, the first information and the third information may be compared with corresponding predetermined thresholds, and the second information and the third information may be compared with corresponding predetermined thresholds, so as to determine an acquisition path matching with the current performance of the BMC.
In step S208, the statistical scheduling module controls the BMC to acquire the video information in the target acquisition way, and compress the video information and send the compressed video information to a remote end.
Firstly, acquiring first information representing the data transmission speed between the BMC and the off-chip memory, second information representing the compression speed of the video and third information representing the frame loss rate of the BMC through the statistical scheduling module; and determining, by the function selection module, a function selection mode that characterizes whether the mode of the acquisition pathway is currently automatically selected or is not automatically selected; then, under the condition that the function selection mode is an automatic mode, determining a target acquisition path from the acquisition paths of acquiring video information from a plurality of BMCs through the statistical scheduling module at least according to the size relation between parts of the first information, the second information and the third information and a preset threshold; and finally, controlling the BMC to acquire video information by the target acquisition way through the statistical scheduling module, compressing the video information and transmitting the compressed video information to a far end to realize remote video display. Compared with the problem that in the prior art, the BMC captures video information according to a DVI path or a Buffer path set in advance by a user, so that the video information acquisition path is not matched with the current performance of the BMC.
And the determined BMC acquisition path can be matched with the current performance of the BMC, so that the full utilization of the BMC performance in the process of remotely transmitting the video is realized, the problem of overload of the bus bandwidth of the off-chip memory caused by adopting a Buffer path when the bus bandwidth of the off-chip memory is large is avoided, and the problems of large delay of remotely transmitting the video, poor viewing of users such as video blocking and the like caused by adopting a DVI path when the bus bandwidth of the off-chip memory is small are avoided.
The execution subject of the steps may be a controller, a terminal, or the like, but is not limited thereto.
The execution order of step S202 and step S204 may be interchanged, i.e. step S204 may be executed first and then step S202 may be executed.
According to some exemplary embodiments of the present application, as shown in fig. 1, the BMC further includes a video processing module 110, a video compression module 112, and an ethernet transmission controller 114, wherein the video processing module 110 is configured to write the video information into the off-chip memory 116 and read the video information from the off-chip memory 116, the video compression module 112 is configured to compress the video information and write the compressed video information into the off-chip memory 116, and the ethernet transmission controller 114 is configured to read the compressed video information from the off-chip memory 116 and send the compressed video information to the remote end.
In addition, the video processing module 110 is further configured to receive original video information from the host 120 through PCIe, write the original video information into the off-chip memory 116 through the third Port1, process the original video information to convert the original video information into video information in RGB format, write the video information into the off-chip memory 116 through the second Port2, read the video information from the off-chip memory 116 through the first Port0, and send the video information to the display 122 through DVI for video display.
After the video processing module reads the video information back from the off-chip memory, some control signals, such as a line synchronization signal, a field synchronization signal, a clock signal, a data valid signal, and the like, are added, and then the video information and the control signals are sent to the display through the DVI. The video processing module may be a VGA module.
The acquisition path is a path for the video compression module 112 to acquire the video information, and the plurality of acquisition paths respectively include:
a first acquisition pathway and/or a second acquisition pathway;
wherein the first acquisition path is used for characterizing that the video compression module 112 receives the video information sent by the video processing module 110 through DVI, that is, when the video processing module 110 sends the video information to the display 122 through DVI, the video compression module 112 sends the video information through DVI synchronously, and the first acquisition path is called DVI path;
The second acquisition path is used for characterizing that in the case that the video compression module 112 reads the video information from the off-chip memory 116 through the first Port0, the video compression module receives the video information from the first Port0, the first Port0 is a channel through which the video processing module 110 reads the video information from the off-chip memory 116 back to the inside of the video processing module 110, so-called a channel, which is actually a set of aximaster interfaces of the BMC, and the second acquisition path is a function of adding a set of monitoring to the aximaster interfaces, namely, reading return data and reading return data valid indication signals according to a read data channel of the aximaster ports, when the valid indication signals are pulled high, the read return data on the aximaster interfaces is sent to the video compression module 112, and the second acquisition path is also called a Port path;
a third obtaining way, which is used for characterizing that the video compression module 112 reads the video information from the off-chip memory 116, that is, the video compression module 112 actively reads the video information cached in the off-chip memory 116 through a set of AXI interfaces, that is, one AXI interface is added to the bus port of the off-chip memory 116, where the cache space of the video processing module 110 is the reading space of the video processing module 110, and the third obtaining way is called as a Buffer way.
In the embodiment, the acquisition paths may include a first acquisition path, a second acquisition path, and a third acquisition path, may include the first acquisition path and the third acquisition path, and may further include the second acquisition path and the third acquisition path. By setting different acquisition ways, the requirements of acquiring video information under different running states of the BMC are matched.
The Buffer approach is flexible in frame loss control, data can be obtained from the active memory, the reading speed is high, information such as line and field synchronization is not required to wait, and time difference caused by network transmission is reduced to a certain extent. But because the off-chip memory needs to be actively read with the AXI interface, DDR bus bandwidth is additionally occupied. Meanwhile, if the process of writing the compressed data into the DDR is slower, the situation that the Buffer space inside the video compression function is full is caused, and the data of the current frame is not completely compressed at the moment, but the Buffer path can actively stop reading the off-chip memory, so that the situation that the current frame needs to be discarded basically does not occur, and the compression efficiency is high and the user experience is better under the path.
Specifically, as shown in fig. 3, the statistical scheduling module 128 includes a network speed analysis module 132 and a memory bandwidth analysis module 134, where the statistical scheduling module obtains first information, including: the network speed analysis module acquires frequency information of the Ethernet transmission controller reading a preset address space, wherein the preset address space is an address space of the off-chip memory for storing the compressed video information; the network speed analysis module acquires frequency information of other address spaces read by the Ethernet transmission controller, wherein the other address spaces are address spaces of the off-chip memory except the preset address space; and the memory bandwidth analysis module acquires the rate information of writing the compressed video information into the off-chip storage by the video compression module. In this embodiment, the greater the frequency of the acquired ethernet transmission controller reading the compressed video information in the off-chip memory, the faster the ethernet transmission controller reading the compressed video information; the greater the frequency of the Ethernet transmission controller reading other address spaces, the faster the Ethernet transmission controller reading the off-chip memory; the larger the video compression module writes the compressed video information into the off-chip memory, the larger the bus bandwidth of the off-chip memory is, and the network transmission speed between the BMC and the off-chip memory can be accurately and completely represented by acquiring the frequency of the Ethernet transmission controller for reading the compressed video information in the off-chip memory, the frequency of the Ethernet transmission controller for reading other data in the off-chip memory and the rate of the video compression module for writing the video compression module into the off-chip memory.
Of course, in addition to the above manner, in order to obtain the first information more simply and quickly, in other embodiments, the obtaining, by the statistical scheduling module, the first information may further include: the network speed analysis module acquires frequency information of the Ethernet transmission controller reading a preset address space, wherein the preset address space is an address space of the off-chip memory for storing the compressed video information; and the memory bandwidth analysis module acquires the rate information of writing the compressed video information into the off-chip storage by the video compression module.
In order to further ensure that the frequency of reading the off-chip memory by the ethernet transmission controller can be obtained accurately and quickly, the network speed analysis module further obtains the frequency information of reading the predetermined address space by the ethernet transmission controller, including: the network speed analysis module receives a first address range corresponding to the preset address space; and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the first address range according to the first address range, and obtains the frequency information of the Ethernet transmission controller for reading the preset address space.
Specifically, because in the application of the BMC, the compressed video information is written into an address range of the off-chip memory agreed by the software, such as a range agreed to be written into 0x1000_0000 to 0x2000_0000 (i.e., the first address range), the address range needs to be configured into the BMC, and is received by the registers com_data_begin_addr and com_data_end_addr in the BMC.
In order to further ensure that the frequency of reading the off-chip memory by the ethernet transmission controller can be obtained accurately and quickly, the network speed analysis module further obtains the frequency information of reading other address spaces by the ethernet transmission controller, including: the network speed analysis module receives a second address range corresponding to the other address space; and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the second address range according to the second address range, and obtains the frequency information of the Ethernet transmission controller for reading the other address spaces.
In another alternative, the memory bandwidth analysis module obtains rate information of the video compression module writing the compressed video information into the off-chip memory, including: the memory bandwidth analysis module determines the interval time of two adjacent writing operations of the video compression module to obtain the rate information, wherein the writing operation is an operation of writing one frame of compressed video information into the off-chip memory. By acquiring the time interval between two adjacent write operations of the video compression module, the write rate of the video compression module to the off-chip memory is represented, and the write rate can be represented more simply and accurately, so that the bus bandwidth of the off-chip memory can be obtained accurately without time-to-rate conversion. Wherein, the shorter the time interval, the faster the write rate, and correspondingly the greater the bus bandwidth.
Similarly, the address range of the video compression module for writing the compressed video information into the off-chip memory is also software-agreed, and is consistent with the range 0x1000_0000 to 0x2000_0000, and is also received by the registers com_data_begin_addr and com_data_end_addr, because the address range of the off-chip memory to be read by the ethernet transmission controller is the address range of the off-chip memory written by the video compression module.
In an embodiment of the present application, as shown in fig. 3, the statistical scheduling module 128 further includes a video compression speed analysis module 136, where the statistical scheduling module obtains second information, including: the video compression speed analysis module detects the moment when the video compression module receives the current frame data of the video information, and obtains a first moment; the video compression speed analysis module detects the moment when the video compression module completes compressing the current frame data to obtain a second moment; the video compression speed analysis module determines a duration between the first time and the second time as the second information. In this embodiment, the compression speed of the video compression module is represented by detecting the duration from the time of receiving the current frame data to the time of completing the compression of the frame data, and the shorter the duration is, the faster the compression speed is indicated, so that the rate conversion and calculation are not required, and the process of acquiring the second information is simplified.
Further, the video compression speed analysis module detects a time when the video compression module receives the current frame data of the video information, and obtains a first time, including: when the video compression module receives first effective data (namely the first pixel point of the video information) in the video information, the video compression speed analysis module sets a frame header mark to be 1; the video compression speed analysis module sets the frame header flag to 1 after each time the video compression module receives the resolution number of valid data (i.e. the resolution number of pixels) according to the resolution of the video information, for example, when the resolution is 800×600, counting from the first valid data in the current frame data, after the number of received valid data is 800×600, indicating that the receiving of the current frame data is completed, and when the 800×600+1 valid data is received, indicating that the beginning of another current frame data is the beginning of another current frame data, and then pulling the pillow flag high; the video compression speed analysis module determines the corresponding moment under the condition of the frame header mark 1, and obtains the first moment of each frame of data. By the method, frame header detection of video information is realized, the moment when each frame of data is received by the video compression module can be detected more accurately, and video information with different resolutions is adapted.
Further, the video compression speed analysis module detects a time when the video compression module completes compressing the current frame data to obtain a second time, and the second time comprises one of the following steps: under the condition that a compression interrupt signal is detected, the video compression speed analysis module determines that the detection time of the compression interrupt signal is the second time, and the compression interrupt signal is a signal generated under the condition that the video compression module completes the compression of the current frame data; and under the condition that the data content compressed by the video compression module comprises an end mark, the video compression speed analysis module determines that the detection moment of the end mark is the second moment, and the end mark is a compression completion mark of the current frame data. For the frame tail detection of each frame of compressed data, the frame tail can be detected through a compression interrupt signal or through the detection of a compression end mark, so that the flexible detection of the frame tail is realized.
Wherein, the end mark can be ffd or ffd9. The time length between the first time and the second time is greatly influenced by the resolution of the current video information and the speed of writing the compressed video information into the off-chip memory.
In an exemplary embodiment, as shown in fig. 1, the video compression module 112 includes a capturing module 124 and a compression module 126, where the capturing module 124 is configured to read the video information and send the video information to the compression module 126, and the compression module 126 is configured to perform compression processing on the video information, as shown in fig. 3, and the statistical scheduling module 128 further includes a frame loss analysis module 138, and the statistical scheduling module obtains third information, including: when the current acquisition path of the BMC is the first acquisition path, the frame loss analysis module determines whether the DVI receives first preset information, and part of data of the DVI and the current frame data is not transmitted to the capture module, wherein the first preset information is information which is sent by the compression module and indicates that the storage space of the DVI is full; when the DVI receives the first preset information and the DVI also has partial data of the current frame data which is not sent to the capturing module, the frame loss analysis module determines that the BMC has a frame loss; and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information. Under the DVI approach, video information is continuously sent to a capturing module, and for a video compression module, the video compression module is used for passively receiving the video information, so that each frame of received data must be processed in time, when the data processing is not time-consuming, namely the speed of the compression module writing into an off-chip memory is slower, so that the memory space inside the compression module is full, and when part of data in a current frame is not sent to the video compression module for compression, the part of data is discarded, so that the data in the current frame which is already compressed is invalid, a user cannot read the data in the current frame, and the problem of frame loss of the current frame occurs. The application characterizes the current frame loss rate data of the BMC through the frame loss quantity.
According to some other embodiments of the application, in case the DVI receives the first predetermined information and the DVI also has partial data of the current frame data not sent to the capture module, the method further comprises: the frame loss analysis module generates second preset information and sends the second preset information to the capture module, wherein the second preset information is used for indicating the capture module to stop reading the residual data of the current frame data. And under the condition of frame loss, sending the rest data of the frame data indicating the capture module to stop reading the frame loss, so that the compression of the compression module on more invalid data can be avoided, and part of storage space of the compression module is released.
In addition to the frame loss detection manner, the statistical scheduling module may further obtain third information, where the third information may further include: when the current acquisition path of the BMC is the first acquisition path, the frame loss analysis module determines whether the DVI receives first preset information, and the capture module also does not send partial data of the current frame data to the compression module, wherein the first preset information is information which is sent by the compression module and indicates that the storage space of the compression module is full; when the DVI receives the first preset information and the capturing module also has partial data of the current frame data not sent to the compression module, the frame loss analysis module determines that the BMC has a frame loss; and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information.
In this case, in a case where the DVI receives the first predetermined information and the capturing module further has partial data of the current frame data not transmitted to the compressing module, the method further includes: the frame loss analysis module generates third preset information and sends the third preset information to the capture module, wherein the third preset information is used for indicating the capture module to stop sending the residual data of the current frame data to the compression module, so that the compression of the compression module on more invalid data is further avoided, and part of storage space of the compression module is relieved.
According to still further alternative embodiments of the present application, as shown in fig. 1, the video processing module 110 is further configured to write the video information into the off-chip memory 116 through a second Port2, and the statistical scheduling module obtains third information, including: when the current acquisition path of the BMC is the third acquisition path or the second acquisition path, the frame loss analysis module determines whether partial data of the current frame data are not read in the off-chip memory, and the off-chip memory receives new current frame data written by the video processing module through the second port; when part of the data of the current frame data is not read in the off-chip memory and the off-chip memory receives the new current frame data written by the video processing module through the second port, the frame loss analysis module determines that the BMC loses frames once; and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information. For the Buffer approach or the Port approach, the current frame data cached in the off-chip memory is not completely read, but is covered by the current frame data newly written by the video processing module, and at this time, the frame loss problem occurs.
For example, the addresses 0x1000_1000 to 0x1000_2000 of the off-chip memory are already covered by the write channel of the second Port2 if the data stored in the space of the capturing module is not read, and the frame is just a lost frame.
In addition, the obtaining, by the frame loss analysis module, the number of times that the BMC has frame loss may include: the frame loss analysis module obtains the number of times that the BMC loses frames in a preset period; and the frame loss analysis module calculates the quotient of the times and the preset time period to obtain the frame loss rate of the BMC in the preset time period.
Specifically, the method further comprises: the function selection module receives a preset acquisition path and sends the preset acquisition path to the statistical scheduling module under the condition that the function selection module determines that the function selection mode is the non-automatic mode, wherein the preset acquisition path is one of a plurality of preset acquisition paths; and the statistical scheduling module controls the BMC to acquire the video information in the preset acquisition way, compresses the video information and then sends the compressed video information to a far end. When the function selection mode is the non-automatic mode, video information needs to be acquired according to a preset acquisition path set by a user, for example, when the preset acquisition path is the first acquisition path, the target acquisition path is the first acquisition path, so that user demand guidance can be further realized, and user experience is further improved.
For example, user_func_cfg=2' b01, which indicates that in the non-automatic mode, the acquisition path set by the User is a Port path; user_func_cfg=2' b10, indicating that in the non-automatic mode, the acquisition path set by the User is a Buffer path; user_func_cfg=2' b11, indicating that in the non-automatic mode, the User sets the acquisition path to the DVI path.
In the present application, as shown in fig. 3, the statistical scheduling module 128 further includes a scheduling center module 140, where the scheduling center module 140 is respectively connected to the network speed analysis module 132, the memory bandwidth analysis module 134, the video compression speed analysis module 136, and the frame loss analysis module 138, and the scheduling center module is configured to receive the first information, the second information, and the third information, and the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least a size relationship between a part of the first information, the second information, and the third information and a predetermined threshold, where the determining includes: in the case that the first information is greater than a first threshold, the second information is greater than a second threshold, and the third information is less than a third threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway, the first threshold, the second threshold, and the third threshold constituting the predetermined threshold; the dispatch center module determines the target acquisition pathway as the third acquisition pathway if the first information is less than or equal to the first threshold, the second information is less than or equal to the second threshold, and the third information is greater than or equal to the third threshold.
In the embodiment, when the first information is greater than a first threshold, the second information is greater than a second threshold, and the third information is smaller than a third threshold, it is indicated that the writing rate of the compressed video information into the off-chip memory and the reading rate of the compressed video information by the ethernet transmission controller are both faster, the compression rate of the video information is also faster, and the current frame loss rate of the BMC is lower, and at this time, it is determined that the target acquisition path is the first acquisition path or the second acquisition path, so that the bandwidth of the off-chip memory can be further saved, and the overall performance of the baseboard management control chip is improved; otherwise, the target acquisition path is determined to be the third acquisition path, so that transmission intervals between frames (because the DVI and Port modes are required to acquire frame data according to the VESA standard, the frames are separated by a time interval), display delay caused by writing in an off-chip memory, reading out by an Ethernet transmission controller and the like is reduced, so that the user experience of a far end is further improved, and meanwhile, the frame loss rate can be reduced.
In an exemplary embodiment, the statistical scheduling module determines a target acquisition path from a plurality of the acquisition paths according to at least a size relationship of a portion of the first information, the second information, and the third information to a predetermined threshold, and further includes: in the case that the first information is less than or equal to the first threshold value, the second information is less than or equal to the second threshold value, and the third information is greater than or equal to the third threshold value, the dispatch center module obtains a preference mode including a first mode of a predetermined preference display effect and a second mode of preference BMC performance; in the case that the preference mode is the first mode, the dispatch center module determines that the target acquisition pathway is the third acquisition pathway; in the case where the preference mode is the second mode, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway. When the first information is smaller than or equal to the first threshold, the second information is smaller than or equal to the second threshold and the third information is larger than or equal to the third threshold, the frame loss rate is too high, the rate of writing the compressed video information into the DDR and the rate of reading the compressed video information by the EMAC are also slow, a user needs to be checked at the moment, namely, the user needs to check according to a preference mode of the user, when the preference mode is the first mode, the user is illustrated to feel a first main point with experience, and a third acquisition way is adopted, so that the frame loss rate is reduced; when the preference mode is the second mode, the user is stated to take the overall performance of the BMC as a first key point, and at the moment, the first acquisition path or the second acquisition path is adopted, so that the flexibility selection of the acquisition path is further realized, the problem that the path of capturing video information by the BMC is not matched with the current performance of the BMC in the remote video transmission process in the prior art is further solved, and meanwhile, the user experience feeling or the overall running performance of the BMC can be further improved.
In the specific application process, the preference mode can be determined by writing the configuration information of the preference mode into a register of the BMC and reading the configuration value in the register. For example, a register is added, and if a user_func_default=0 is configured, the preference mode is indicated as the first mode, and if a user_func_default=1 is configured, the preference mode is indicated as the second mode.
Of course, in addition to the foregoing manner, any other suitable manner may be adopted by a person skilled in the art to perform comparison between at least part of the first information, the second information and the third information and a predetermined threshold value, so as to determine a target acquisition path, and in some other embodiments, the statistical scheduling module further includes a scheduling center module, where the scheduling center module is connected to the network speed analysis module, the memory bandwidth analysis module, the video compression speed analysis module and the frame loss analysis module, and the scheduling center module is configured to receive the first information, the second information and the third information, and the statistical scheduling module determines, from a plurality of the acquisition paths, the target acquisition path according to at least a size relationship between part of the first information, the second information and the third information and the predetermined threshold value, where the statistical scheduling module includes: the dispatching center module obtains a first weight corresponding to frequency information of a preset address space read by the Ethernet transmission controller, a second weight corresponding to frequency information of other address spaces read by the Ethernet transmission controller, a third weight corresponding to the rate information, a fourth weight corresponding to the second information and a fifth weight corresponding to the third information, wherein the first weight, the second weight, the third weight and the fourth weight are all positive numbers, and the fifth weight is a negative number; the dispatching center module performs weighted summation on the first information, the second information and the third information according to the first weight, the second weight, the third weight, the fourth weight and the fifth weight to obtain weighted values; the dispatch center module determining whether the weighted value is greater than the predetermined threshold; in the case that the weighted value is greater than the predetermined threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway; the dispatch center module determines the target acquisition path as the third acquisition path if the weighted value is less than or equal to the predetermined threshold.
In addition to the situation that the first weight and the second weight are both positive numbers and the third weight is negative numbers, the situation that the first weight and the second weight are both negative numbers and the third weight is positive numbers can be set, whether the weighted value is smaller than the preset threshold value is correspondingly determined, and if the weighted value is smaller than the preset threshold value, the target acquisition path is determined to be the first acquisition path or the second acquisition path; otherwise, determining that the target acquisition path is the third acquisition path.
It should be noted that, the specific values of the first threshold, the second threshold, the third threshold, the predetermined threshold, and the specific values of the weights are not particularly limited in the present application, and a person skilled in the art may perform assignment according to an empirical value, may determine according to a result of multiple experiments, or may perform training determination through a neural network model.
In an exemplary embodiment of the present application, the first weight is 0.5±0.1, the second weight is 0.3±0.1, the third weight is 0.6±0.1, the fourth weight is 0.4±0.1, and the fifth weight is-0.2±0.1.
Specifically, the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least a size relation between a part of the first information, the second information and the third information and a predetermined threshold, and may further include: the scheduling center module determines the target acquisition path from a plurality of acquisition paths according to the relation between the first information and the third information and a predetermined threshold value, specifically may be that the scheduling center module determines the target acquisition path to be the first acquisition path or the second acquisition path when the first information is greater than a first threshold value and the third information is less than a third threshold value, and determines the target acquisition path to be the third acquisition path when the first information is less than or equal to the first threshold value and the third information is greater than or equal to the third threshold value.
The statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least the magnitude relation between the first information, the second information and the third information and a predetermined threshold value, and may further include: the scheduling center module determines the target acquisition path from a plurality of acquisition paths according to the relationship between the second information and the third information and a predetermined threshold, specifically may be that the scheduling center module determines the target acquisition path to be the first acquisition path or the second acquisition path when the second information is greater than a second threshold and the third information is less than a third threshold, and determines the target acquisition path to be the third acquisition path when the second information is less than or equal to the second threshold and the third information is greater than or equal to the third threshold.
In an actual application process, since the fast cursor function is not supported in the first acquisition path, but is supported in other acquisition paths, in order to further satisfy the user requirement while further ensuring the flexibility of video information acquisition, in an exemplary embodiment, after the statistical scheduling module determines that the target acquisition path is the first acquisition path or the second acquisition path, the statistical scheduling module controls the BMC to acquire the video information in the target acquisition path, and before compressing and transmitting the video information to a far end, the method further includes: the statistical scheduling module determines whether a quick cursor function is opened, wherein the quick cursor function is a function of not transmitting a cursor image; the statistical scheduling module determines the target acquisition pathway to be the second acquisition pathway if the fast cursor function is on. In the case that the target acquisition path is determined to be the first acquisition path or the second acquisition path, the acquisition path meeting the user requirement is selected from the first acquisition path and the second acquisition path by determining whether the quick cursor function is started, so that the remote video transmission function with the user requirement being guided can be further realized.
The fast cursor function is to transmit the image picture and the mouse picture separately, the mouse image is not transmitted through the picture, but has a special register to record the coordinate position of the mouse in the current frame, and then the cursor synthesis is performed during the far-end display, so that the phenomenon of the cursor blocking can be effectively avoided, the Port approach and the Buffer mode support the fast cursor function, and the DVI approach does not support the fast cursor function.
In addition, in a case where the quick cursor function is not turned on, the target acquisition path is determined to be the first acquisition path or the second acquisition path.
To facilitate the user to read the currently optimal acquisition pathway of the BMC, in an exemplary embodiment, after the statistical scheduling module determines a target acquisition pathway from a plurality of the acquisition pathways, the method further comprises: the function selection module determines to update the fetch path in the status register to the target fetch path. Thus, the user can determine the currently optimal acquisition path by reading the configuration of the status register.
The specific manner of the statistical scheduling module controlling the BMC to acquire the video information in the target acquisition way may be: if the target acquisition path is the same as the current acquisition path, not processing; if the target acquisition path is different from the current acquisition path and the user_auto=1 set by the user, that is, the function selection mode is the automatic mode, the acquisition path is switched autonomously, the current acquisition path is switched to the target acquisition path obtained by analysis, and a state register dispatch_status is updated for the user to read; if the target acquisition path is different from the current acquisition path and the user_auto=0 set by the user, that is, the function selection mode is the non-automatic mode, the acquisition path cannot be switched, and only the state register dispatch_status is updated, because the non-automatic mode set by the user is set by the user at this time.
It should be noted that, the switching of the acquisition path described in the present application is not completed once, but a real-time dynamic process, such as switching from time T0 to DVI path, switching from time T1 to Buffer path, switching from time T2 to Port path, and switching from time T3 to Buffer path. Therefore, the step of acquiring the first information, the second information, and the third information is a first acquiring step, the step of acquiring the function selection mode is a second acquiring step, and the step of determining a target acquiring path from a plurality of acquiring paths according to at least a size relation between a part of the first information, the second information, and the third information and a predetermined threshold value when the function selection mode is the automatic mode is a determining step, and controlling the BMC to acquire the video information in the target acquiring path and compress and transmit the video information to a remote end may include: updating, in the case that the current acquisition path of the BMC is not the target acquisition path, the current acquisition path to be updated to the target acquisition path; and a loop step of circularly executing the first acquisition step, the second acquisition step, the determination step, and the update step a predetermined number of times.
The application avoids the defects that the video function of the traditional scheme is dead in the acquisition way of original video data, lacks flexibility, sometimes cannot fully utilize the performance of a baseboard management control chip, and sometimes also can excessively occupy the DDR bus bandwidth. The system can provide autonomous switching and user initiative setting of the acquisition path, has strong flexibility in practical use, can improve the performance of the baseboard management control chip to the greatest extent while guaranteeing the user experience of a remote end, realizes real-time flexible calculation, analysis and switching of the optimal acquisition path, and greatly improves the flexibility of the video function of the baseboard management control chip. The optimal acquisition path is provided, and meanwhile, the user is ensured to set the acquisition path according to subjective intention.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the described embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present application.
It should be noted that the respective modules may be implemented by software or hardware, and for the latter, may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the modules may be located in different processors in any combination.
Embodiments of the application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
An embodiment of the application also provides an electronic device comprising a memory in which a computer program is stored and a processor arranged to run the computer program to perform the steps of any of the method embodiments.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor and an input/output device connected to the processor.
There is also provided, in accordance with yet another embodiment of the present application, a BMC as shown in FIG. 1, including: a video processing module 110 for writing video information into an off-chip memory 116 and reading the video information from the off-chip memory 116; a video compression module 112, configured to compress the video information and write the compressed video information into the off-chip memory 116; an ethernet transmission controller 114, configured to read the compressed video information from the off-chip memory 116 and send the video information to a remote end; a control structure 118 comprising a statistical scheduling module and a function selection module, said control structure being adapted to perform the steps of any of the method embodiments.
According to another embodiment of the present application, there is also provided a system-on-chip as shown in fig. 1, including: the BMC is configured to be connected to the host 120, the display 122, and the remote end, respectively, and is configured to receive original video information sent by the host 120, and further configured to send video information obtained after processing the original video information to the display 122 for display through DVI; an off-chip memory 116 is connected to the BMC.
Specific examples in this embodiment may refer to examples described in the embodiments and the exemplary implementation manners, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code that is executable by computing devices, so that they may be stored in a memory device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.

Claims (22)

1. A video transmission method of a BMC, wherein the BMC includes a control structure, the control structure includes a statistical scheduling module and a function selecting module, the method includes:
the statistical scheduling module acquires first information, second information and third information, wherein the first information represents the data transmission speed between the BMC and an off-chip memory, the second information represents the compression speed of the BMC on video information, and the third information represents the frame loss rate in the process of sending the video information by the BMC;
the function selection module determines a function selection mode, wherein the function selection mode comprises an automatic mode and a non-automatic mode, the automatic mode is a mode for automatically selecting an acquisition path, and the non-automatic mode is a mode for manually selecting the acquisition path;
in the case that the function selection module determines that the function selection mode is the automatic mode, the statistical scheduling module determines a target acquisition path from a plurality of acquisition paths according to at least the size relation between parts of the first information, the second information and the third information and a preset threshold, wherein the acquisition path is a path for acquiring the video information by the BMC;
And the statistical scheduling module controls the BMC to acquire the video information in the target acquisition way, compresses the video information and then sends the compressed video information to a far end.
2. The method of claim 1, wherein the BMC further comprises a video processing module for writing the video information to the off-chip memory and reading the video information from the off-chip memory, a video compression module for compressing the video information and writing the compressed video information to the off-chip memory, and an Ethernet transmission controller for reading the compressed video information from the off-chip memory and transmitting the compressed video information to the remote end,
the obtaining paths are paths for the video compression module to obtain the video information, and the obtaining paths respectively comprise:
a first acquisition path and/or a second acquisition path, wherein the first acquisition path is used for representing the video compression module to receive the video information sent by the video processing module through DVI; the second acquisition path is used for representing that the video compression module receives the video information from the first port in the condition that the video compression module reads the video information from the off-chip memory through the first port;
And a third acquisition path for characterizing the video compression module to read the video information from the off-chip memory.
3. The method of claim 2, wherein the statistical scheduling module includes a network speed analysis module and a memory bandwidth analysis module, the statistical scheduling module obtaining first information, comprising:
the network speed analysis module acquires frequency information of the Ethernet transmission controller reading a preset address space, wherein the preset address space is an address space of the off-chip memory for storing the compressed video information;
the network speed analysis module acquires frequency information of other address spaces read by the Ethernet transmission controller, wherein the other address spaces are address spaces of the off-chip memory except the preset address space;
and the memory bandwidth analysis module acquires the rate information of writing the compressed video information into the off-chip storage by the video compression module.
4. The method of claim 3, wherein the network speed analysis module obtaining frequency information for the ethernet transport controller to read a predetermined address space comprises:
The network speed analysis module receives a first address range corresponding to the preset address space;
and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the first address range according to the first address range, and obtains the frequency information of the Ethernet transmission controller for reading the preset address space.
5. The method of claim 3, wherein the network speed analysis module obtaining frequency information for the ethernet transport controller to read other address spaces comprises:
the network speed analysis module receives a second address range corresponding to the other address space;
and the network speed analysis module determines the frequency of the reading address of the Ethernet transmission controller in the second address range according to the second address range, and obtains the frequency information of the Ethernet transmission controller for reading the other address spaces.
6. The method of claim 3, wherein the memory bandwidth analysis module obtaining rate information for the video compression module to write the compressed video information to the off-chip memory comprises:
The memory bandwidth analysis module determines the interval time of two adjacent writing operations of the video compression module to obtain the rate information, wherein the writing operation is an operation of writing one frame of compressed video information into the off-chip memory.
7. The method of claim 3, wherein the statistical scheduling module further comprises a video compression rate analysis module, the statistical scheduling module obtaining second information comprising:
the video compression speed analysis module detects the moment when the video compression module receives the current frame data of the video information, and obtains a first moment;
the video compression speed analysis module detects the moment when the video compression module completes compressing the current frame data to obtain a second moment;
the video compression speed analysis module determines a duration between the first time and the second time as the second information.
8. The method of claim 7, wherein the video compression rate analysis module detecting a time when the video compression module receives the current frame data of the video information, obtaining a first time, comprises:
when the video compression module receives first effective data in the video information, the video compression speed analysis module sets a frame header mark to 1;
The video compression speed analysis module starts from the first effective data according to the resolution of the video information, and sets the frame header mark to 1 after each time the video compression module receives the resolution effective data;
the video compression speed analysis module determines the corresponding moment under the condition of the frame header mark 1, and obtains the first moment of each frame of data.
9. The method of claim 7, wherein the video compression rate analysis module detects a time when the video compression module completes compressing the current frame data to obtain a second time, comprising one of:
under the condition that a compression interrupt signal is detected, the video compression speed analysis module determines that the detection time of the compression interrupt signal is the second time, and the compression interrupt signal is a signal generated under the condition that the video compression module completes the compression of the current frame data;
and under the condition that the data content compressed by the video compression module comprises an end mark, the video compression speed analysis module determines that the detection moment of the end mark is the second moment, and the end mark is a compression completion mark of the current frame data.
10. The method of claim 7, wherein the video compression module comprises a capture module and a compression module, the capture module is configured to read the video information and send the video information to the compression module, the compression module is configured to compress the video information, the statistical scheduling module further comprises a frame loss analysis module, and the statistical scheduling module obtains third information, including:
when the current acquisition path of the BMC is the first acquisition path, the frame loss analysis module determines whether the DVI receives first preset information, and part of data of the DVI and the current frame data is not transmitted to the capture module, wherein the first preset information is information which is sent by the compression module and indicates that the storage space of the DVI is full;
when the DVI receives the first preset information and the DVI also has partial data of the current frame data which is not sent to the capturing module, the frame loss analysis module determines that the BMC has a frame loss;
and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information.
11. A method as recited in claim 10, wherein in the event that the first predetermined information is received by the DVI and the DVI also has partial data of the current frame data not sent to the capture module, the method further comprises:
The frame loss analysis module generates second preset information and sends the second preset information to the capture module, wherein the second preset information is used for indicating the capture module to stop reading the residual data of the current frame data.
12. The method of claim 10, wherein the video processing module is further configured to write the video information to the off-chip memory via a second port, and wherein the statistical scheduling module obtains third information, comprising:
when the current acquisition path of the BMC is the third acquisition path or the second acquisition path, the frame loss analysis module determines whether partial data of the current frame data are not read in the off-chip memory, and the off-chip memory receives new current frame data written by the video processing module through the second port;
when part of the data of the current frame data is not read in the off-chip memory and the off-chip memory receives the new current frame data written by the video processing module through the second port, the frame loss analysis module determines that the BMC loses frames once;
and the frame loss analysis module acquires the times of frame loss of the BMC to obtain the third information.
13. The method according to any one of claims 2 to 12, further comprising:
when the function selection mode is the non-automatic mode, the function selection module receives a preset acquisition path and sends the preset acquisition path to the statistical scheduling module, wherein the preset acquisition path is one of a plurality of preset acquisition paths;
and the statistical scheduling module controls the BMC to acquire the video information in the preset acquisition way, compresses the video information and then sends the compressed video information to a far end.
14. The method of claim 12, wherein the statistical scheduling module further comprises a scheduling center module, the scheduling center module being respectively connected to the network speed analysis module, the memory bandwidth analysis module, the video compression speed analysis module, and the frame loss analysis module, the scheduling center module being configured to receive the first information, the second information, and the third information, the statistical scheduling module determining a target acquisition path from a plurality of acquisition paths based at least on a size relationship between a portion of the first information, the second information, and the third information and a predetermined threshold, the statistical scheduling module comprising:
In the case that the first information is greater than a first threshold, the second information is greater than a second threshold, and the third information is less than a third threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway, the first threshold, the second threshold, and the third threshold constituting the predetermined threshold;
the dispatch center module determines the target acquisition pathway as the third acquisition pathway if the first information is less than or equal to the first threshold, the second information is less than or equal to the second threshold, and the third information is greater than or equal to the third threshold.
15. The method of claim 14, wherein the statistical scheduling module determines a target acquisition pathway from a plurality of the acquisition pathways based at least on a magnitude relationship of portions of the first information, the second information, and the third information to a predetermined threshold, further comprising:
in the case that the first information is less than or equal to the first threshold value, the second information is less than or equal to the second threshold value, and the third information is greater than or equal to the third threshold value, the dispatch center module obtains a preference mode including a first mode of a predetermined preference display effect and a second mode of preference BMC performance;
In the case that the preference mode is the first mode, the dispatch center module determines that the target acquisition pathway is the third acquisition pathway;
in the case where the preference mode is the second mode, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway.
16. The method of claim 12, wherein the statistical scheduling module further comprises a scheduling center module, the scheduling center module being respectively connected to the network speed analysis module, the memory bandwidth analysis module, the video compression speed analysis module, and the frame loss analysis module, the scheduling center module being configured to receive the first information, the second information, and the third information, the statistical scheduling module determining a target acquisition path from a plurality of acquisition paths based at least on a size relationship between a portion of the first information, the second information, and the third information and a predetermined threshold, the statistical scheduling module comprising:
the dispatching center module obtains a first weight corresponding to frequency information of a preset address space read by the Ethernet transmission controller, a second weight corresponding to frequency information of other address spaces read by the Ethernet transmission controller, a third weight corresponding to the rate information, a fourth weight corresponding to the second information and a fifth weight corresponding to the third information, wherein the first weight, the second weight, the third weight and the fourth weight are all positive numbers, and the fifth weight is a negative number;
The dispatching center module performs weighted summation on the first information, the second information and the third information according to the first weight, the second weight, the third weight, the fourth weight and the fifth weight to obtain weighted values;
the dispatch center module determining whether the weighted value is greater than the predetermined threshold;
in the case that the weighted value is greater than the predetermined threshold, the dispatch center module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway;
the dispatch center module determines the target acquisition path as the third acquisition path if the weighted value is less than or equal to the predetermined threshold.
17. The method of claim 16, wherein the first weight is 0.5 ± 0.1, the second weight is 0.3 ± 0.1, the third weight is 0.6 ± 0.1, the fourth weight is 0.4 ± 0.1, and the fifth weight is-0.2 ± 0.1.
18. The method of any of claims 2 to 12, wherein after the statistical scheduling module determines that the target acquisition pathway is the first acquisition pathway or the second acquisition pathway, before the statistical scheduling module controls the BMC to acquire the video information in the target acquisition pathway, the method further comprises:
The statistical scheduling module determines whether a quick cursor function is opened, wherein the quick cursor function is a function of not transmitting a cursor image;
the statistical scheduling module determines the target acquisition pathway to be the second acquisition pathway if the fast cursor function is on.
19. The method of any one of claims 1 to 12, wherein after the statistical scheduling module determines a target acquisition pathway from a plurality of the acquisition pathways, the method further comprises:
the function selection module determines to update the fetch path in the status register to the target fetch path.
20. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, wherein the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 19.
21. A BMC, comprising:
the video processing module is used for writing video information into an off-chip memory and reading the video information from the off-chip memory;
the video compression module is used for compressing the video information and writing the compressed video information into the off-chip memory;
The Ethernet transmission controller is used for reading the compressed video information from the off-chip memory and sending the compressed video information to the far end;
control structure comprising a statistical scheduling module and a function selection module, said control structure being adapted to perform the steps of the method of any one of claims 1 to 19.
22. A system-on-chip, comprising:
the BMC of claim 21, configured to be connected to a host, a display, and a remote end, respectively, where the BMC is configured to receive original video information sent by the host, and the BMC is further configured to send video information obtained by processing the original video information to the display for display through DVI;
and the off-chip memory is connected with the BMC.
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