CN117319716A

CN117319716A - Resource scheduling method of baseboard management control chip and baseboard management control chip

Info

Publication number: CN117319716A
Application number: CN202311604438.6A
Authority: CN
Inventors: 李拓; 邹晓峰; 满宏涛; 张贞雷
Original assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Current assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Priority date: 2023-11-28
Filing date: 2023-11-28
Publication date: 2023-12-29
Anticipated expiration: 2043-11-28
Also published as: CN117319716B

Abstract

The embodiment of the application provides a resource scheduling method of a baseboard management control chip and the baseboard management control chip, wherein the baseboard management control chip comprises a plurality of video processing links, the video processing links comprise a processing passage in an operating state and an idle link in an unoperated state, and the method comprises the following steps: detecting video processing parameters of the processing path in the running process of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on videos; extracting target processing resources from second processing resources of the idle link according to the target matching degree between the first processing resources of the processing path and the operation requirements of the processing path indicated by the video processing parameters; the target processing resources are allocated to the processing paths. Through the method and the device, the problem that the resource utilization rate of the substrate management control chip is low is solved, and the effect of improving the resource utilization rate of the substrate management control chip is achieved.

Description

Resource scheduling method of baseboard management control chip and baseboard management control chip

Technical Field

The embodiment of the application relates to the field of computers, in particular to a resource scheduling method of a substrate management control chip and the substrate management control chip.

Background

At present, the baseboard management control chip performs video processing work through a plurality of video processing links on the baseboard management control chip, but in the process of the video processing links, the processing performance of the processing path on the video may be changed under various influences, so that the processing performance of the processing path on the video is reduced, and the processing resources of the idle links in an unoperated state are wasted at the moment, so that the resource utilization rate of the whole video processing links is lower.

Aiming at the problems of low resource utilization rate of a baseboard management control chip and the like in the related art, no effective solution is proposed yet.

Disclosure of Invention

The embodiment of the application provides a resource scheduling method of a substrate management control chip and the substrate management control chip, which at least solve the problem of low resource utilization rate of the substrate management control chip in the related technology.

According to an embodiment of the present application, there is provided a resource scheduling method of a baseboard management control chip, where the baseboard management control chip includes a plurality of video processing links, the video processing links include a processing path in an operating state and an idle link in an unoperated state, and the method includes:

Detecting video processing parameters of the processing path in the running process of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on video;

detecting a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path according to the video processing parameter, wherein the target matching degree is used for indicating the degree that the first processing resource meets the operation requirement of the processing path;

extracting a target processing resource from a second processing resource of the idle link under the condition that the target matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path;

and distributing the target processing resource to the processing path.

In an exemplary embodiment, the detecting the target matching degree between the first processing resource of the processing path and the operation requirement of the processing path according to the video processing parameter includes: comparing the frame loss rate of the processing path with a frame loss rate threshold corresponding to the processing path, wherein the video processing parameters comprise the frame loss rate; determining the target matching degree as a first matching degree under the condition that the frame loss rate is greater than or equal to the frame loss rate threshold, wherein the first matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; and under the condition that the frame loss rate is smaller than the frame loss rate threshold, determining the target matching degree as a second matching degree, wherein the second matching degree is used for indicating the first processing resource to meet the operation requirement of the processing path.

In an exemplary embodiment, the extracting the target processing resource from the second processing resource of the idle link includes: determining a target resource type required by the processing path according to the video processing parameters, and a target resource amount allowed to be allocated for the processing path in processing resources belonging to the target resource type; and extracting the processing resources of the target resource quantity belonging to the target resource type from the second processing resources as the target processing resources.

In an exemplary embodiment, the determining, according to the video processing parameter, a target resource type required by the processing path, and a target amount of processing resources belonging to the target resource type that is allowed to be allocated for the processing path, includes: determining a first frame loss rate belonging to inter-frame loss and a second frame loss rate belonging to intra-frame loss from the frame loss rates of the processing paths, wherein the video processing parameters comprise the frame loss rate; determining a target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate; acquiring the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation; and distributing the target resource amount to the processing path according to the target frame loss reason and the second processing resource.

In an exemplary embodiment, the determining the target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate includes: determining a ratio of the first frame loss rate to the second frame loss rate; determining the target frame loss reason as a first frame loss reason under the condition that the ratio is larger than 1, wherein the first frame loss reason is used for indicating that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path; and under the condition that the ratio is smaller than 1, determining the target frame loss reason as a second frame loss reason, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the obtaining, from the frame loss reason and the resource types having the correspondence, the target resource type corresponding to the target frame loss reason includes: determining that the target resource type comprises a video control logic type and a video storage type when the target frame loss reason is a first frame loss reason, wherein the first frame loss reason is used for indicating that the processing performance influence of the inter-frame loss on the processing path is greater than the processing performance influence of the intra-frame loss on the processing path; and in the case that the target frame loss reason is a second frame loss reason, the target resource type comprises a video storage type, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is greater than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the allocating the target resource amount for the processing path according to the target frame loss reason and the second processing resource includes: dividing the idle links into a first set and a second set according to a first number and a second number in the plurality of processing paths, wherein the first number is the number of the first processing paths belonging to a first frame loss reason, the second number is the number of the second processing paths belonging to a second frame loss reason, the first frame loss reason is used for indicating that the processing performance influence of an inter-frame loss on the processing paths is larger than that of an intra-frame loss on the processing paths, the second frame loss reason is used for indicating that the processing performance influence of an intra-frame loss on the processing paths is larger than that of an inter-frame loss on the processing paths, the target frame loss reason comprises the first frame loss reason and the second frame loss reason, the first set comprises a third number of idle links, and the second set comprises a fourth number of idle links; the processing resources of the first set are allocated to the first number of the first processing lanes, and the processing resources of the second set are allocated to the second number of the second processing lanes.

In an exemplary embodiment, the dividing the idle links into a first set and a second set according to a first number and a second number of the plurality of processing paths includes: determining the third number according to the first number and the first frame loss rate of each first processing path; determining the third number of idle links as the first set; and determining other idle links except the third number of idle links in all idle links on the baseboard management control chip as the second set.

In an exemplary embodiment, the determining the third number according to the first number and the first frame loss rate of each first processing lane includes: allocating an initial number to each first processing path according to the first frame loss rate of each first processing path, wherein the initial number is larger as the first frame loss rate is higher, and each initial number is larger than or equal to 1; the sum of the initial numbers is determined as the third number.

In an exemplary embodiment, the allocating the processing resources of the first set to the first number of the first processing paths includes: and allocating an initial number of the idle links in the first set to the corresponding first processing paths.

In an exemplary embodiment, said allocating processing resources of said second set to said second number of said second processing paths comprises: determining the duty ratio of the second frame loss rate of each second processing path in the second frame loss rate sum as the resource duty ratio of each second processing path; and distributing the processing resources which meet the resource proportion in the processing resources of the second set to corresponding second processing paths.

In an exemplary embodiment, the allocating the target processing resource to the processing path includes: in case the target processing resource comprises a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type, connecting in parallel a first idle link providing the target processing resource to the processing path; in case the target processing resource comprises a processing resource belonging to the video storage type, loading the target processing resource in a second idle link providing the target processing resource to a processing resource of the processing path.

In an exemplary embodiment, the detecting the video processing parameter of the processing path includes: and detecting the frame loss rate of the processing path in a target time period in a current scheduling period as the video processing parameter, wherein the processing path is used for using the target processing resource in the current scheduling period.

In an exemplary embodiment, after said allocating said target processing resource to said processing path, said method further comprises: receiving initial video processing data generated by the plurality of video processing links; and integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource.

According to another embodiment of the present application, there is provided a baseboard management control chip including: the system comprises a plurality of video processing links and a processor, wherein the video processing links comprise a processing passage in an operating state and an idle link in an unoperated state, the processor is connected with the video processing links, the processor is used for detecting video processing parameters of the processing passage in the process of operating the processing passage, and the video processing parameters are used for indicating the processing performance of the processing passage on videos; detecting a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path according to the video processing parameter, wherein the target matching degree is used for indicating the degree that the first processing resource meets the operation requirement of the processing path; extracting a target processing resource from a second processing resource of the idle link under the condition that the target matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; and distributing the target processing resource to the processing path.

In an exemplary embodiment, each video processing link includes a video interface and a video processing module, the video processing module including processing resources therein, the processor comprising: the video resource scheduling controller is connected with the access selection controller, and the access selection controller is connected between each group of video interfaces and the video processing module; the video resource scheduling controller is used for detecting video processing parameters of the processing path in the running process of the processing path; detecting target matching degree between a first processing resource of the processing path and operation requirements of the processing path according to the video processing parameters; extracting a target processing resource from a second processing resource of the idle link under the condition that the target matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; controlling the path selection controller to allocate the target processing resource to the processing path; the path selection controller is used for distributing the target processing resources to the processing paths according to the control of the video resource scheduling controller.

In an exemplary embodiment, the path selection controller is configured to connect, in parallel, a first idle link providing the target processing resource to the processing path, in a case where the target processing resource includes a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type; in case the target processing resource comprises a processing resource belonging to the video storage type, loading the target processing resource in a second idle link providing the target processing resource to a processing resource of the processing path.

In an exemplary embodiment, the baseboard management control chip further includes: the video output integration controller is connected behind the plurality of video processing links and is also used for being connected with a memory, wherein the video output integration controller is also used for receiving initial video processing data generated by the plurality of video processing links; integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource; outputting the target video processing data to the memory.

According to another embodiment of the present application, there is provided a resource scheduling device of a baseboard management control chip, including a plurality of video processing links on the baseboard management control chip, where the video processing links include a processing path in an operating state and an idle link in an unoperated state, the device including:

the first detection module is used for detecting video processing parameters of the processing path in the running process of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on videos;

the second detection module is used for detecting target matching degree between a first processing resource of the processing path and the operation requirement of the processing path according to the video processing parameter, wherein the target matching degree is used for indicating the degree that the first processing resource meets the operation requirement of the processing path;

an extracting module, configured to extract a target processing resource from a second processing resource of the idle link, where the target matching degree is used to indicate that the first processing resource does not meet an operation requirement of the processing path;

and the allocation module is used for allocating the target processing resources to the processing paths.

According to a further embodiment of the present application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.

According to a further embodiment of the present application, there is also provided an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.

According to the video processing method and device, a plurality of video processing links are arranged on a baseboard management control chip, each video processing link comprises a processing passage in an operating state and an idle link in an unoperated state, and video processing parameters of the processing passage are detected in the operation process of the processing passage, wherein the video processing parameters are used for indicating the processing performance of the processing passage on videos; extracting target processing resources from second processing resources of the idle link according to target matching degree between first processing resources of the processing path and operation requirements of the processing path, which are indicated by the video processing parameters, wherein the target matching degree is used for indicating the degree that the first processing resources meet the operation requirements of the processing path; the target processing resources are allocated to the processing paths. The processing path is allocated to the target processing resource in the second processing resource of the idle link, so that the processing path can meet the operation requirement of the processing path after obtaining the target processing resource, and the problem of lower resource utilization rate of the substrate management control chip can be solved, and the effect of improving the resource utilization rate of the substrate management control chip is achieved.

Drawings

Fig. 1 is a hardware block diagram of a server device of a resource scheduling method of a baseboard management control chip according to an embodiment of the present application;

FIG. 2 is a flow chart of a resource scheduling method of a baseboard management control chip according to an embodiment of the present application;

FIG. 3 is a schematic diagram of the operation of a video processing link according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a method of extracting target processing resources according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a method of integrating first data and second data according to an embodiment of the present application;

FIG. 6 is a block diagram of a baseboard management control chip according to an embodiment of the present application;

fig. 7 is a block diagram of a resource scheduling device of a baseboard management control chip according to an embodiment of the present application;

fig. 8 is a block diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.

It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.

The method embodiments provided in the embodiments of the present application may be performed in a server device or similar computing device. Taking the operation on the server device as an example, fig. 1 is a hardware block diagram of the server device of a resource scheduling method of a baseboard management control chip according to an embodiment of the present application. As shown in fig. 1, the server device may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU, a programmable logic device FPGA, or the like processing means) and a memory 104 for storing data, wherein the server device may further include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those of ordinary skill in the art that the architecture shown in fig. 1 is merely illustrative and is not intended to limit the architecture of the server apparatus described above. For example, the server device may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.

The memory 104 may be used to store a computer program, for example, a software program of an application software and a module, such as a computer program corresponding to a resource scheduling method of a baseboard management control chip in an embodiment of the present application, and the processor 102 executes the computer program stored in the memory 104 to perform various functional applications and data processing, that is, implement the above-mentioned method. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located with respect to the processor 102, which may be connected to the server device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device 106 is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of a server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.

In this embodiment, a resource scheduling method of a baseboard management control chip is provided, where the baseboard management control chip includes a plurality of video processing links, where the video processing links include a processing path in an operating state and an idle link in an unoperated state, and fig. 2 is a flowchart of a resource scheduling method of a baseboard management control chip according to an embodiment of the present application, as shown in fig. 2, where the flowchart includes the following steps:

step S202, detecting video processing parameters of the processing path in the running process of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on videos;

Step S204, detecting a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path according to the video processing parameter, wherein the target matching degree is used for indicating the degree that the first processing resource meets the operation requirement of the processing path;

step S206, extracting target processing resources from the second processing resources of the idle link under the condition that the target matching degree is used for indicating that the first processing resources do not meet the operation requirement of the processing path;

step S208, allocating the target processing resource to the processing path.

Through the steps, the substrate management control chip comprises a plurality of video processing links, the video processing links comprise a processing passage in an operating state and an idle link in an unoperated state, and video processing parameters of the processing passage are detected in the operation process of the processing passage, wherein the video processing parameters are used for indicating the processing performance of the processing passage on videos; extracting target processing resources from second processing resources of the idle link according to target matching degree between first processing resources of the processing path and operation requirements of the processing path, which are indicated by the video processing parameters, wherein the target matching degree is used for indicating the degree that the first processing resources meet the operation requirements of the processing path; the target processing resources are allocated to the processing paths. The processing path is allocated to the target processing resource in the second processing resource of the idle link, so that the processing path can meet the operation requirement of the processing path after obtaining the target processing resource, and the problem of lower resource utilization rate of the substrate management control chip can be solved, and the effect of improving the resource utilization rate of the substrate management control chip is achieved.

Alternatively, in this embodiment, the baseboard management control chip may be disposed on the server, and the baseboard management control chip may be used for monitoring the status of the server (such as temperature, fan, main processor, etc.). Or the local video information is sent to the remote end through the network module, and the remote end displays and monitors the video information.

Alternatively, in this embodiment, the server with the baseboard management control chip may be, but not limited to, a multi-HOST server, that is, multiple CPUs (Central Processing Unit, central processing units) on one server respectively run different operating systems to form different HOSTs, where multiple HOSTs share one BMC (Baseboard Management Controller, baseboard management control chip), and since the servers are disposed on the same motherboard of the server, one baseboard management control chip can manage and control hardware information on the entire motherboard. In the baseboard management control chip of the multi-host server, the video processing link corresponding to each host may be, but not limited to, a processing path in an operating state or an idle link in an unoperated state.

Optionally, in this embodiment, in the baseboard management control chip, a video processing link corresponding to each host may be matched, and the video processing link may be used, but is not limited to, outputting compressed input data, for example: taking input data as video data as an example, the video processing link converts the video data of the host end into data in an RGB (Red, green, glue, red, green and blue) format, then JPEG (Joint Photographic Experts Group ) compression is carried out on the converted data, then the compressed data is written into a memory, and the compressed data is sent to a remote end through a network module. Thus, the video processing link may, but is not limited to, accomplish compression using a variety of processing resources, which may, but are not limited to, include: processing resources, storage resources, etc.

Optionally, in this embodiment, in the case where the local video card of the server outputs the image data, the image data may be, but not limited to, compressed and then sent to the remote end through the network, where the purpose of this is to reduce the amount of data transmitted, reduce the network bandwidth, and may be, but not limited to, after the video processing link deployed on the baseboard management control chip compresses the input image data, the image data may include, but not limited to: video data, picture data, text data, audio data, and the like. The video processing link may include, but is not limited to, a plurality of video processing modules connected in sequence, and in the case where image data input to the video processing link is different, the video processing link has different processing capabilities.

Optionally, in this embodiment, the resource scheduling method of the above-mentioned baseboard management control chip can be used in a wide range of scenarios, which may include, but is not limited to: a compression scenario, a decompression scenario, etc. in the following embodiments, a resource scheduling method of the above-mentioned baseboard management control chip may be described by taking, as an example, but not limited to, a video compression scenario.

In the solution provided in the above step S202, a parameter capable of indicating the processing performance of the processing path on the video may be used as the above video processing parameter, for example: frame rate, frame loss rate, delay rate, stuck rate, distortion rate, repetition rate, etc.

Alternatively, in this embodiment, for different video processing parameters, parameters of the processing performance corresponding to the processing path may be detected, for example, but not limited to: detecting the number of frames displayed per second in the video to obtain the frame rate of a processing path; detecting the ratio of the lost frame number to the total frame number in the video processing process to obtain the frame loss rate of a processing path; detecting the ratio of the delay time to the total time in the video processing process to obtain a delay rate; detecting the frequency of the situation of jamming or unsmooth occurrence in the video playing process to obtain the jamming rate; detecting the proportion of distortion or picture quality degradation in the video processing process to obtain the distortion rate; and detecting the proportion of repeated frames or repeated pictures in the video processing process to obtain the repetition rate and the like.

In one exemplary embodiment, the video processing parameters of the processing path may be detected, but are not limited to, in the following manner: and detecting the frame loss rate of the processing path in a target time period in a current scheduling period as the video processing parameter, wherein the processing path is used for using the target processing resource in the current scheduling period.

Alternatively, in this embodiment, the processing path duty cycle may be used as a scheduling cycle of the processing path, for example: in the case where the processing path completes one video compression, the processing path is considered to have passed one scheduling period. Alternatively, in the case where the processing path completes several video compression times, it is considered that the processing path passes one scheduling period or the like.

Alternatively, in the present embodiment, a target period of time for detecting the video processing parameter may be set for the processing path, such as: setting a detection starting time point and a detection ending time point of a processing path in a scheduling period, taking a time period between the detection starting time point and the detection ending time point as a target time period, and acquiring a frame loss rate of the target time period as a video processing parameter. Or, setting a detection period of the processing path in the scheduling period, taking a time point when a previous detection period ends as a time point when a next detection period starts, and acquiring a frame loss rate in the detection period as a video processing parameter of each period.

Alternatively, in this embodiment, the processing path may, but is not limited to, perform the task of video compression and the like in the current scheduling period using the target processing resource, which may, but is not limited to, a processing resource allocated in advance for the processing path, and may, but is not limited to, include multiple types of processing resources, such as: processing resources of the video control logic type, processing resources of the video storage type, etc.

In the technical solution provided in step S204, the processing path may, but is not limited to, use the first processing resource to process the video, but since the video processed by the processing path has different attributes, it may, but is not limited to, determine, through the target matching degree between the first processing resource of the processing path and the operation requirement of the processing path, that the first processing resource of the processing path can meet the processing resource required by the processing path to process the video, thereby determining the operation requirement of the processing path. The attributes of the video may include, but are not limited to: video resolution, video frame rate, code rate, encoding format, GOP (Group of Pictures, meaning a set of consecutive frames) size, color space, etc.

Alternatively, in this embodiment, each video processing link included in the baseboard management control chip may be pre-allocated with processing resources that can be used by the video processing link, that is, the video processing link includes a processing path in an operating state and an idle link in an unoperated state, for example: a processing path in an operational state that can use a first processing resource allocated thereto, an idle link in an unoperated state that can use a second processing resource allocated thereto, and so on. The processing resources described above may include, but are not limited to: processing resources of the video control logic type and processing resources of the video storage type, etc.

Alternatively, in this embodiment, the processing resource that can be used by the processing path may be, but is not limited to, a first processing resource of the processing path, the processing resource that needs to be used by the processing path to perform a task such as video compression may be, but is not limited to, an operation requirement of the processing path, and the target matching degree may be determined according to, but is not limited to, a relationship between the processing resource that can be used by the processing path and the processing resource that needs to be used by the processing path, where the operation requirement of the processing path and the first processing resource of the processing path are: and determining the amount of resources required to be used for video compression of the processing path according to the processing resources which can be used by the processing path and the processing resources required to be used by the processing path, and determining the target matching degree and the like according to the amount of resources.

Optionally, in this embodiment, the degree to which the first processing resource meets the operation requirement of the processing path may be determined according to, but not limited to, the video processing parameter, so as to obtain the target matching degree between the first processing resource of the processing path and the operation requirement of the processing path.

Optionally, in this embodiment, taking the frame rate, the frame loss rate, the delay rate, the katon rate, the distortion rate, and the repetition rate of the processing path as examples of the video processing parameters, it may be, but not limited to, detecting whether the frame rate, the frame loss rate, the delay rate, the katon rate, the distortion rate, and the repetition rate of the processing path indicate that the processing condition of the processing path is poor, so as to determine a target matching degree between the first processing resource of the processing path and the operation requirement of the processing path, for example: the frame rate, the frame loss rate, the delay rate, the stuck rate, the distortion rate and the repetition rate of the processing path are used as the target matching degree of the processing path. Alternatively, a weighted sum of the frame rate, the frame loss rate, the delay rate, the click-through rate, the distortion rate, and the repetition rate of the processing path is used as the target matching degree of the processing path.

Optionally, in this embodiment, taking the frame rate, the frame loss rate, the delay rate, the click-through rate, the distortion rate, and the repetition rate of the processing path as examples of the video processing parameters, it may be, but not limited to, determining whether the first processing resource meets the operation requirement of the processing path according to the frame rate, the frame loss rate, the delay rate, the click-through rate, the distortion rate, and the repetition rate of the processing path, for example: and comparing the frame rate, the frame loss rate, the delay rate, the jamming rate, the distortion rate and the repetition rate of the processing path with corresponding thresholds respectively, and determining that the first processing resource does not meet the operation requirement of the processing path under the condition that the frame rate, the frame loss rate, the delay rate, the jamming rate, the distortion rate and the repetition rate of the processing path exceed the threshold range. Alternatively, a weighted sum of the frame rate, the frame loss rate, the delay rate, the click-through rate, the distortion rate, and the repetition rate of the processing path is calculated as a threshold value, and if the weighted sum exceeds the threshold value range, it is determined that the first processing resource has not satisfied the operation requirement of the processing path, and the like.

Alternatively, in this embodiment, the target processing resource may be added to the processing path, so that the processing resource of the processing path includes the first processing resource and the target processing resource, and the processing resource of the processing path can meet the operation requirement of the processing path.

In one exemplary embodiment, the target match between the first processing resource of the processing path and the operational requirement of the processing path may be detected from the video processing parameters in the following manner, but is not limited to: comparing the frame loss rate of the processing path with a frame loss rate threshold corresponding to the processing path, wherein the video processing parameters comprise the frame loss rate; determining the target matching degree as a first matching degree under the condition that the frame loss rate is greater than or equal to the frame loss rate threshold, wherein the first matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; and under the condition that the frame loss rate is smaller than the frame loss rate threshold, determining the target matching degree as a second matching degree, wherein the second matching degree is used for indicating the first processing resource to meet the operation requirement of the processing path.

Optionally, in this embodiment, acquiring the frame loss rate of the processing path includes: and detecting the ratio of the lost frame number to the total frame number of the processing path in the video processing process to obtain the frame loss rate of the processing path. The number of lost frames may include, but is not limited to, the number of frames in which intra-frame loss occurs and the number of frames in which inter-frame loss occurs in the processing path during video processing.

Alternatively, in this embodiment, the frame loss rate threshold corresponding to the processing path may be, but not limited to, a preset fixed value, or may be generated in real time with reference to various conditions, where the conditions may include, but are not limited to, bandwidth and network conditions, server conditions, and the like.

Optionally, in this embodiment, it may be determined, but not limited to, whether the first processing resource can meet the operation requirement of the processing path according to the frame loss rate, for example: and under the condition that the frame loss rate is greater than or equal to the frame loss rate threshold value, determining that the first processing resource does not meet the operation requirement of the processing path. Or determining that the first processing resource meets the operation requirement of the processing path and the like under the condition that the frame loss rate is smaller than the frame loss rate threshold value.

In the solution provided in step S206, the target processing resource that needs to be extracted from the second processing resource of the idle link may be determined according to the target matching degree, for example: and determining a resource difference between processing resources which can be used by the processing path and processing resources which need to be used by the processing path according to the target matching degree, and determining the resource difference as target processing resources which need to be extracted from second processing resources of the idle link.

Alternatively, in this embodiment, the sum of the processing resources of each processing path in the running state in the video processing link may be used as the first processing resource, and the processing path may be used as the first processing resource, but is not limited to the processing resource capable of adaptively adjusting the processing resources in the first processing resource, so as to obtain the processing resources required by the operations such as video compression performed by the processing resource to perform the operations, for example: the video processing link includes processing path 1, processing path 2, and processing path 3 in an operating state, and corresponding processing resources 1, processing resources 2, and processing resources 3 may be allocated from the first processing resources according to the amount of resources of processing resources required for operations such as video compression performed by processing path 1, processing path 2, and processing path 3. Alternatively, but not limited to, a processing resource corresponding to each processing path in the video processing link in the running state may be used as the first processing resource.

In the case where the sum of the processing resources of each processing path in the video processing link in the running state is taken as the first processing resource, the target matching degree between the first processing resource and the sum of the running requirements of each processing path may be obtained, but is not limited to, the sum of the running requirements of each processing path being obtained.

Alternatively, in this embodiment, the processing resources of one or more idle links in the non-running state in the video processing links may be used as the second processing resources, for example: the idle links in the video processing links are divided into a plurality of sets, with the idle links in each set being used to provide processing resources for different processing paths. Alternatively, the sum of processing resources for acquiring idle links is divided into multiple sets, and different processing paths use processing resources in different sets. Alternatively, the sum of the processing resources of the idle link in the non-operating state among the video processing links may be used as the second processing resource.

In one exemplary embodiment, the target processing resource may be, but is not limited to, extracted from the second processing resource of the idle link in the following manner: determining a target resource type required by the processing path according to the video processing parameters, and a target resource amount allowed to be allocated for the processing path in processing resources belonging to the target resource type; and extracting the processing resources of the target resource quantity belonging to the target resource type from the second processing resources as the target processing resources.

Alternatively, in the present embodiment, the resource types of the resources used by the processing path to process the video may include, but are not limited to: processing resource type and storage resource type, etc. The type of target resource required for the processing path may be, but is not limited to, determined based on video processing parameters.

Alternatively, in this embodiment, the second processing resource may, but is not limited to, include processing resources belonging to multiple resource types, and the processing resource belonging to the target resource type may, but is not limited to, be acquired from the second processing resource, and then the target amount of resources allowed to be allocated for the processing path is determined as the target processing resource.

In one exemplary embodiment, the target resource type required for the processing path and the target amount of processing resources belonging to the target resource type that are allowed to be allocated for the processing path may be determined according to the video processing parameters in the following manner, but not limited to: determining a first frame loss rate belonging to inter-frame loss and a second frame loss rate belonging to intra-frame loss from the frame loss rates of the processing paths, wherein the video processing parameters comprise the frame loss rate; determining a target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate; acquiring the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation; and distributing the target resource amount to the processing path according to the target frame loss reason and the second processing resource.

Alternatively, in this embodiment, the method may, but is not limited to, acquiring the first frame loss rate of the processing path for the inter-frame loss to occur in the target period, for example: and acquiring the ratio of the number of frames, in which the processing path generates frame loss between frames, in the target time period to the target time period as a first frame loss rate. Alternatively, the ratio of the occurrence of inter-frame loss is obtained from the frame loss rate of the processing path as the first frame loss rate or the like.

Alternatively, in this embodiment, the method may, but is not limited to, acquiring the second frame loss rate of the processing path for intra-frame loss in the target period, for example: and acquiring the ratio of the number of frames in which the processing path generates intra-frame loss in the target time period to the target time period as a second frame loss rate. Or, the ratio of the occurrence of intra-frame loss is obtained from the frame loss rate of the processing path as the second frame loss rate or the like.

Alternatively, in this embodiment, the target frame loss reason of the processing path may be, but is not limited to, a size indicating a probability that the processing path generates an inter-frame loss and a probability that an intra-frame loss occurs in the target period. The target frame loss reason of the processing path may be determined according to the first frame loss rate and the second frame loss rate, for example: comparing the first frame loss rate with the second frame loss rate, determining the probability of occurrence of intra-frame loss and inter-frame loss, and determining the target frame loss reason of the processing path. Or, the ratio of the number of times of the intra-frame loss and the inter-frame loss in all frame loss is calculated, the number of times of the intra-frame loss and the inter-frame loss generated by the processing path is determined, the target frame loss reason of the processing path is determined, and the like.

Optionally, in this embodiment, the reason for frame loss may be, but not limited to, that there is a corresponding resource type, such as: and in the case that the target frame loss reason is intra-frame loss, the intra-frame loss is used for indicating that the type of the target resource lacking in the processing path is a storage resource. Or in the case that the target frame loss reason is inter-frame loss, the inter-frame loss is used for indicating that the type of the target resource lacking in the processing path is processing resource and storage resource.

Alternatively, in the present embodiment, in the case where the target resource type of the processing path is determined, the processing path may, but is not limited to, acquire the target processing resource corresponding to the resource type and the target resource amount from the second processing resource.

In one exemplary embodiment, the target frame loss reason of the processing path may be determined according to the first frame loss rate and the second frame loss rate in the following manner, but is not limited to: determining a ratio of the first frame loss rate to the second frame loss rate; determining the target frame loss reason as a first frame loss reason under the condition that the ratio is larger than 1, wherein the first frame loss reason is used for indicating that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path; and under the condition that the ratio is smaller than 1, determining the target frame loss reason as a second frame loss reason, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path.

Optionally, in this embodiment, determining the target frame loss reason according to the ratio of the first frame loss rate to the second frame loss rate may include, but is not limited to: calculating the ratio of the first frame loss rate to the second frame loss rate, and determining that the influence of the inter-frame loss on the processing performance of the processing path is greater than the influence of the intra-frame loss on the processing performance of the processing path under the condition that the ratio is greater than 1, wherein the target frame loss is due to the partial inter-frame loss; or under the condition that the ratio is smaller than 1, determining that the processing performance influence of the intra-frame loss on the processing path is larger than that of the inter-frame loss on the processing path, and determining that the target frame loss source is the partial intra-frame loss.

Or calculating the ratio of the second frame loss rate to the first frame loss rate, and determining that the influence of the intra-frame loss on the processing performance of the processing path is greater than the influence of the inter-frame loss on the processing performance of the processing path under the condition that the ratio is greater than 1, and determining that the target frame loss is due to the partial intra-frame loss; or under the condition that the ratio is smaller than 1, determining that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path, wherein the target frame loss is caused by the partial inter-frame loss.

Or under the condition that the ratio is 1, determining that the processing performance influence of the intra-frame loss on the processing path is equal to the processing performance influence of the inter-frame loss on the processing path, and determining that the target frame loss source is the inter-frame loss.

Alternatively, in this embodiment, the intra-frame loss may be used, but not limited to, to indicate that a frame is unable to be compressed in time due to a full signal in the buffer array, i.e. the buffer space is full, during the compression process of a frame image, and thus the frame must be discarded (because the subsequent frame comes continuously). An inter-frame loss may be, but is not limited to, an indication that a frame of an image has not yet begun to be compressed and is forced to drop.

Optionally, in this embodiment, the first frame loss rate of the inter-frame loss occurring in the processing path and the second frame loss rate of the intra-frame loss occurring in the processing path are obtained, and the target frame loss cause may be determined, but not limited to, by calculating a ratio between the first frame loss rate and the second frame loss rate, for example: and under the condition that the first frame loss rate is larger than the second frame loss rate, namely the ratio between the first frame loss rate and the second frame loss rate is larger than 1, determining that the influence of the inter-frame loss of the processing path on the processing performance of the processing path is larger than the influence of the intra-frame loss on the processing performance of the processing path, and therefore, the target frame loss reason is that the inter-frame loss of the processing path occurs. Or when the first frame loss rate is smaller than or equal to the second frame loss rate, that is, the ratio between the first frame loss rate and the second frame loss rate is smaller than or equal to 1, determining that the processing performance influence of the intra-frame loss generated by the processing path on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path, so that the target frame loss reason is the intra-frame loss generated by the processing path.

In an exemplary embodiment, the target resource type corresponding to the target frame loss reason may be acquired from the frame loss reason and the resource type having a correspondence relationship by, but not limited to, the following ways: determining that the target resource type comprises a video control logic type and a video storage type when the target frame loss reason is a first frame loss reason, wherein the first frame loss reason is used for indicating that the processing performance influence of the inter-frame loss on the processing path is greater than the processing performance influence of the intra-frame loss on the processing path; and in the case that the target frame loss reason is a second frame loss reason, the target resource type comprises a video storage type, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is greater than the processing performance influence of the inter-frame loss on the processing path.

Optionally, in this embodiment, the resource types of the processing path include: video control logic type and video storage type. And determining that the target resource type comprises a video control logic type and a video storage type when the target frame loss reason indicates that the processing path has an influence of inter-frame loss on the processing performance of the processing path greater than that of intra-frame loss on the processing performance of the processing path.

Or determining that the target resource type comprises a video storage type when the target frame loss cause indicates that the processing path has an influence of intra-frame loss on the processing performance of the processing path greater than that of inter-frame loss on the processing path.

In one exemplary embodiment, an example of the operation of a video processing link is provided. The target resource types include a video control logic type and a video storage type, fig. 3 is a schematic diagram illustrating an operation process of a video processing link according to an embodiment of the present application, and as shown in fig. 3, a plurality of CPUs (processor 1, processor 2, processor 3 and processor 4) on a server motherboard respectively run different operating systems to form 4 hosts, where the hosts share a BMC chip, and each host has its corresponding video processing link (video processing link 1, video processing link 2, video processing link 3 and video processing link 4).

The processor is used for outputting original video data, and before the original video data is transmitted to the remote end through the network, video compression is needed through the video processing link, so that the purpose of reducing the video data volume and the network bandwidth is achieved. Before the original video Data is input into the video processing link, the video Data of the host can be converted into RGB format through VGA (Video Graphics Array ), the RGB Data is JPEG compressed by the video processing link, the compressed Data is written into the memory and sent to the remote end through the network module, the video processing link can be jpeg_comp, and the memory can be DDR (Double Data Rate).

The video processing link may include, but is not limited to, a color space conversion module, a block data conversion module, and JPEG IP, the color space conversion module may operate, but is not limited to, by: the color space conversion module performs matrix conversion on input data, which may include, but is not limited to, RGB data, the conversion process of which is completed using a matrix conversion formula. Matrix conversion formulas may include, but are not limited to: y= (0.257×r) + (0.504×g) + (0.098×b) +16; u=0.148 x r-0.291 x g+0.439 x b+128; v=0.439×r-0.368×g-0.071×b+128, where the coefficient may be adaptively adjusted according to practical situations, but is not limited to.

The BLOCK data generating module may be, but not limited to, for converting YUV format data into YUV BLOCK data, i.e. BLOCK data, and the size of the BLOCK may be, but not limited to, 16×16, 16×8,8×8, etc. according to YUV444 and YUV420 compression formats, so 16 y_rams (i.e. y_ram_0 to y_ram_15), 16 u_rams (i.e. u_ram_0 to u_ram_15), and 16 v_rams (i.e. v_ram_0 to v_ram_15) are required for buffering data.

For the BLOCK data conversion module, the data in YUV (a color coding method, Y represents brightness, U and V represent chromaticity) format is converted into the data of YUV BLOCK by the write control logic to perform data buffering, and the buffered data is transmitted to the next processing module by the read control logic, so that the video control logic type and the video storage type are required to be used in the video processing link processing process.

In one exemplary embodiment, the target amount of resources may be allocated to the processing path according to the target frame loss reason and the second processing resources in the following manner, but is not limited to: dividing the idle links into a first set and a second set according to a first number and a second number in the plurality of processing paths, wherein the first number is the number of the first processing paths belonging to a first frame loss reason, the second number is the number of the second processing paths belonging to a second frame loss reason, the first frame loss reason is used for indicating that the processing performance influence of an inter-frame loss on the processing paths is larger than that of an intra-frame loss on the processing paths, the second frame loss reason is used for indicating that the processing performance influence of an intra-frame loss on the processing paths is larger than that of an inter-frame loss on the processing paths, the target frame loss reason comprises the first frame loss reason and the second frame loss reason, the first set comprises a third number of idle links, and the second set comprises a fourth number of idle links; the processing resources of the first set are allocated to the first number of the first processing lanes, and the processing resources of the second set are allocated to the second number of the second processing lanes.

Optionally, in this embodiment, the number of processing paths for which the influence of the inter-frame loss on the processing performance of the processing path is greater than the influence of the intra-frame loss on the processing performance of the processing path may be counted to obtain the first number, the number of processing paths for which the influence of the intra-frame loss on the processing performance of the processing path is greater than the influence of the inter-frame loss on the processing performance of the processing path may be counted to obtain the second number, and the idle links may be divided according to the first number and the second number.

Alternatively, in this embodiment, the first number and the idle links may be divided into a first set, the second number and the idle links may be divided into a second set, and the processing resources in the first set may be allocated to a first number of first processing paths, for example: processing resources in the first set are allocated equally to a first number of first processing lanes. Alternatively, the processing resources in the first set are allocated to each processing lane or the like in accordance with the amount of resources required for each processing lane.

Similarly, allocating processing resources in the second set to the second number of second processing lanes may include, but is not limited to: processing resources in the second set are allocated equally to a second number of second processing lanes. Alternatively, the processing resources in the second set are allocated to each processing lane or the like in accordance with the amount of resources required for each processing lane.

In one exemplary embodiment, the idle links may be divided into a first set and a second set according to a first number and a second number of the plurality of processing lanes in the following manner, but not limited to: determining the third number according to the first number and the first frame loss rate of each first processing path; determining the third number of idle links as the first set; and determining other idle links except the third number of idle links in all idle links on the baseboard management control chip as the second set.

Optionally, in this embodiment, the first processing path is a processing path with an influence of an inter-frame loss on a processing performance of the processing path greater than an influence of an intra-frame loss on a processing performance of the processing path, and may, but is not limited to, determining an amount of resources required for the first processing path according to a first frame loss rate of the first processing path, for example: when the first frame loss rate of the first processing path is large, the amount of resources required for the first processing path is appropriately increased. The amount of resources that it needs may be, but is not limited to, determined for each first processing lane of the first number, resulting in a third amount of resources that is needed for each first processing lane of the first number.

Alternatively, in this embodiment, in the case that the third number is determined, the third number of idle links may be, but not limited to, acquired from the idle links as the first set, and the other idle links as the second set.

In one exemplary embodiment, the third number may be determined from the first number and the first frame loss rate of each first processing lane in the following manner, but is not limited to: allocating an initial number to each first processing path according to the first frame loss rate of each first processing path, wherein the initial number is larger as the first frame loss rate is higher, and each initial number is larger than or equal to 1; the sum of the initial numbers is determined as the third number.

Alternatively, in this embodiment, the initial number may be, but is not limited to, determined according to a first frame loss rate of the first processing path, for example: when the first frame loss rate is within the first range, 1 is set, and when the first frame loss rate is within the second range, 2 is set, or the like. The sum of the initial numbers of each first processing path is calculated as a third number.

In one exemplary embodiment, the processing resources of the first set may be allocated to the first number of the first processing paths in the following manner, but is not limited to: and allocating an initial number of the idle links in the first set to the corresponding first processing paths.

Alternatively, in this embodiment, an initial number of idle links in the first set may be allocated to a corresponding first processing path, such as: 1 idle link is allocated for the first processing path of initial number 1, etc.

In one exemplary embodiment, the processing resources of the second set may be allocated to the second number of the second processing paths in the following manner: determining the duty ratio of the second frame loss rate of each second processing path in the second frame loss rate sum as the resource duty ratio of each second processing path; and distributing the processing resources which meet the resource proportion in the processing resources of the second set to corresponding second processing paths.

Alternatively, in this embodiment, the second processing path may be, but is not limited to, a processing path that requires processing resources of a video storage type, and may be, but is not limited to, increasing the capacity of a buffer space in the second processing path, and reducing the probability of full yuv_ram_array (block data storage ARRAY).

Alternatively, in the present embodiment, taking the example that the second processing path includes the second processing path 1 and the second processing path 2, the frame loss rate of the processing path 2 is 30% and the frame loss rate of the processing path 3 is 40%, the resource ratio of each second processing path may be determined according to the ratio of the second frame loss rate of each second processing path in the second frame loss rate sum, which includes: the resource ratio of the second processing path 1 to obtain the idle link is 30/(30+40), and the resource ratio of the second processing path 2 to obtain the idle link is 40/(30+40).

Alternatively, in this embodiment, the processing resources in the second set may be, but are not limited to, allocated to each second processing path according to the resource ratio of each second processing path, where the processing resources in the second set are of the video storage type and the processing resources in the second set may be, but are not limited to, processing resources of the video storage type including one or more idle links, and the processing resources of the second set may be, but are not limited to, multiplexed with the processing resources of the video storage type included in the second set, such as: and integrating processing resources belonging to the video storage type in the idle links included in the second set to obtain an integral RAM array, wherein the RAM array is 70KB, the second processing path comprises a second processing path 1 and a second processing path 2, the frame loss rate of the processing path 2 is 30%, the frame loss rate of the processing path 3 is 40% by way of example, and the RAM resources of 30/(30+40) 70 kb=30 KB can be divided into the second processing path 1, and the RAM resources of 40/(30+40) 70 kb=40 KB can be divided into the second processing path 2.

In the solution provided in step S208, the allocation of the target processing resource to the processing path may include, but is not limited to: and allocating corresponding target processing resources for each processing path. Alternatively, the target processing resources are evenly allocated to each processing lane, etc.

In one exemplary embodiment, the target processing resources may be allocated to the processing lanes, but are not limited to, in the following manner: in case the target processing resource comprises a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type, connecting in parallel a first idle link providing the target processing resource to the processing path; in case the target processing resource comprises a processing resource belonging to the video storage type, loading the target processing resource in a second idle link providing the target processing resource to a processing resource of the processing path.

Alternatively, in this embodiment, the processing resource belonging to the video storage type may, but is not limited to, an on-chip storage space including a baseboard management control chip, and may, but is not limited to, loading the on-chip storage space belonging to the second idle link into the processing resource of the processing path for use by the processing path, thereby implementing loading the processing path with the target processing resource.

Optionally, in this embodiment, in a case where the processing resources to be allocated include a processing resource of a video control logic type and a processing resource of a video storage type, the processing resources belonging to the video storage type may, but are not limited to, an on-chip memory space including a baseboard management control chip, may, but are not limited to, be used by a processing path by loading the on-chip memory space belonging to a first idle link into the processing resources of the processing path, so as to implement loading of the processing resources of the video storage type for the processing path, and further, may, but are not limited to, delivering, by the processing path, a control right of the processing resources belonging to the video control logic type of the first idle link, that is, delivering video data to be subjected to compression processing to a common processing of the first idle link and the processing path, for example: and outputting even frames of the video data to a processing path for compression, outputting odd frames to an idle link for compression and the like, so that loading of target processing resources for the processing path is realized.

In one exemplary embodiment, after the allocation of the target processing resources to the processing path, the target video processing data corresponding to the processing path may be obtained, but is not limited to, in the following manner: receiving initial video processing data generated by the plurality of video processing links; and integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource.

Alternatively, in this embodiment, since a plurality of processing paths are used to process video, the method may, but is not limited to, receive initial video processing data generated by a plurality of video processing links, and integrate with video processing data of the processing paths to obtain complete target video processing data.

In one exemplary embodiment, an example of a method of extracting a target processing resource is provided. Fig. 4 is a schematic diagram of a method for extracting target processing resources according to an embodiment of the present application, as shown in fig. 4, in a multi-host server system, each host runs different or identical N operating systems through a CPU (processor 1 to processor N), each processor converts video data of the host into RGB format through a VGA (Video Graphics Array ) before the original video data is input into the video processing link through a corresponding video processing link (video processing link 1 to video processing link N), then the video processing link performs JPEG compression on the RGB data, and finally the compressed data is written into a memory and sent to a remote terminal through a network module.

The video processing link includes processing paths in M running states and P idle links in non-running states, m+p=n, during the running process of the processing paths, the processing paths operate through first processing resources, the first processing resources include processing resources belonging to a video control logic type and processing resources belonging to a video storage type, and the video processing parameters of the processing paths can be but not limited to detected by a processor, and according to a target matching degree between the first processing resources of the processing paths and running requirements of the processing paths indicated by the video processing parameters, target processing resources are extracted from second processing resources of the idle links, and the target processing resources are allocated to the processing paths.

Specifically, firstly, detecting the frame loss rate (from 1 to M) of each processing path (from 1 to M) in a target time period T0, comparing the frame loss rate of each processing path with a frame loss rate threshold, and for the processing paths with frame loss rates smaller than the frame loss rate threshold, keeping video resources of the processing paths, wherein the frame loss rate of the processing paths is considered to be lower than the frame loss rate requirement (namely, the target matching degree of the processing paths is the second matching degree, and the first processing resources of the processing paths meet the operation requirement of the processing paths) in the target time period T0; for a processing path with a frame loss rate greater than or equal to the frame loss rate threshold, the frame loss rate of the processing path is considered to be relatively high in the target period T0, and the video resource of the processing path needs to be modified (i.e., the target matching degree of the processing path is the first matching degree, and the first processing resource does not meet the running requirement of the processing path), the video resource of the processing path with the frame loss rate greater than or equal to the frame loss rate threshold may be modified by, but not limited to:

Acquiring a first frame loss rate of an inter-frame loss and a second frame loss rate of an intra-frame loss of a processing path in a frame loss rate within a target time period T0, calculating a ratio of the first frame loss rate to the second frame loss rate, and determining that the influence of the inter-frame loss on the processing path is greater than the influence of the intra-frame loss on the processing performance of the processing path under the condition that the ratio is greater than 1, so that the target frame loss reason of the processing path is considered to be a partial inter-frame loss (namely, a first frame loss reason); when the ratio is less than or equal to 1, it is determined that the processing performance impact of the intra-frame loss on the processing path is greater than the processing performance impact of the inter-frame loss on the processing path, and therefore the target frame loss cause of the processing path is considered to be the intra-frame loss (i.e., the second frame loss cause).

Since the partial frame loss requires complete multiplexing of processing resources belonging to the video control logic type and processing resources belonging to the video storage type, the partial frame loss requires multiplexing of processing resources belonging to the video storage type, and more processing resources of P idle links can be allocated for processing paths with high frame loss rate, fewer processing resources of P idle links can be allocated for processing paths with low frame loss rate, and therefore P idle links can be divided into P1 and P2 according to the first number of processing paths of the partial frame loss and the first frame loss rate of each processing path and the second number of processing paths of the partial frame loss and the second frame loss rate of each processing path, wherein P1 is to complete multiplexing of processing resources belonging to the video storage type and processing resources belonging to the video control logic type, and P2 is to multiplex only processing resources belonging to the video storage type, such as: the number of idle links is 4: calculating the initial number of processing paths of each partial frame loss, p1=first frame loss rate, and performing rounding processing, wherein the higher the frame loss rate is, the larger the PARAM_0 is, the cardinal number of the PARAM_0 can be, but is not limited to, 1 (each processing path is ensured to have at least one corresponding idle link for supplying resources for the processing paths), the third number of processing paths P2 is equal to the sum of the initial number of processing paths of each partial frame loss, p4=p-P2, so that the processing resources of the video storage type of P1 idle path and the processing resources belonging to the video control logic type are multiplexed, and in most cases, the processing resources of the idle links of the corresponding 1 path are only newly added to the processing paths of the 1 path, and in the rare cases, the processing resources of the idle links of the corresponding 1 path are multiplexed for 2 paths or other paths.

Such as: the idle link 1 is multiplexed to the processing path 1, namely the processing path 1 uses two processing resources belonging to the video storage type and two processing resources belonging to the video control logic type simultaneously, so that the video data can realize parallel compression of two adjacent frames, and the frame loss probability between frames is greatly reduced. Or in extreme cases, namely the frame loss rate of the processing path 1 is very high, at the moment, the processing resources of the idle link 2 and the idle link 3 are multiplexed to the channel 1, so that synchronous compression of adjacent three-frame data is realized, and the frame loss probability between frames is greatly reduced.

For the processing paths of frame loss in partial frames, the probability of full yuv_ram_array (block data storage ARRAY) needs to be reduced by increasing the capacity of the buffer space in each processing path, so that the frame loss rate in frames is reduced, that is, the total storage resource of the multiplexing idle link P3 is divided according to the proportion of the frame loss rate of the processing path to the total frame loss rate, for example: the frame loss rate of the processing path 2 is 30%, and the frame loss rate of the processing path 3 is 40%, so that the proportion of the processing path 2 to obtain the total buffer resource of the idle link P3 is 30/(30+40), and the total storage resource of the idle link P3 refers to the sum of the spaces of yuv_ram_array included in the idle link P3.

The multiplexing of the storage resources of the idle link P3 is to load the storage resources of the idle link P3 divided according to the frame loss rate into RAM arrays corresponding to each processing path, and integrate the RAM arrays into 1 whole RAM array. Such as: the frame loss rate of processing path 1 is 30% and the frame loss rate of processing path 2 is 40%, then the total RAM resource of idle link P3, such as 70KB, is divided into processing path 1 by 30/(30+40) 70 kb=30 KB, and is divided into processing path 2 by 40/(30+40) 70 kb=40 KB RAM resources.

In one exemplary embodiment, an example of a method of integrating first data and second data is provided. FIG. 5 is a schematic diagram of a method for integrating first data and second data according to an embodiment of the present application, as shown in FIG. 5, but not limited to, detecting, by a processor 1 in a BMC, a video processing parameter of a processing path, and extracting a target processing resource from a second processing resource of an idle link according to a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path indicated by the video processing parameter, receiving, by a processor 2 connected after the video processing link, initial video processing data generated by a plurality of video processing links; and integrating the first data and the second data in the initial video processing data to obtain target video processing data corresponding to the processing path, for example:

Processing resources belonging to the video control logic type and processing resources belonging to the video storage type of the idle link 1 are multiplexed by the processing path 1, the processing resources belonging to the video control logic type and the processing resources belonging to the video storage type of the idle link 1 are also connected to the VGA1 by the processor 1, meanwhile, a frame counter is arranged in the processing path 1, and frames output by the VGA1 are evenly distributed to the processing path 1 and the idle link 1, such as: the even frames may be, but are not limited to, output to processing path 1 for compression and the odd frames to idle link 1 for compression. The compression result of the idle link 1 is integrated into the processing path 1 by the processor 2, that is, the memory cache addresses corresponding to the processing path 1 are written together, and then read by the network module and sent to the remote end.

The method comprises the steps of detecting the remote end in the multi-host server to start a video remote control channel, detecting the frame loss rate and the specific reason of frame loss in the video compression function channel, carrying out comprehensive dynamic scheduling control on idle video control logic and storage resources in a BMC chip according to the specific frame loss reason (including inter-frame loss and intra-frame loss) of a specific channel, fully multiplexing the video control logic and the storage resources, carrying out dynamic detection, adjusting the comprehensive scheduling strategy of the video resources in real time, improving the utilization rate of the video control logic and the storage resources of the BMC chip, greatly reducing the frame loss rate of the video remote management control function channel, improving the utilization rate of the system bus bandwidth, and improving the display quality and user experience of the remote end, thereby improving the overall performance of the substrate management control chip.

From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method described in the embodiments of the present application.

In this embodiment, there is also provided a baseboard management control chip, fig. 6 is a block diagram of a baseboard management control chip according to an embodiment of the present application, and as shown in fig. 6, the baseboard management control chip includes: a plurality of video processing links (602-1 to 602-N) and a processor 604, wherein the plurality of video processing links (602-1 to 602-N) comprise a processing path in an operating state and an idle link in an unoperated state, the processor 604 is connected with the plurality of video processing links (602-1 to 602-N), and the processor is used for detecting video processing parameters of the processing path during the operation of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on video; detecting a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path according to the video processing parameter, wherein the target matching degree is used for indicating the degree that the first processing resource meets the operation requirement of the processing path; extracting a target processing resource from a second processing resource of the idle link under the condition that the target matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; and distributing the target processing resource to the processing path.

Through the substrate management control chip, the substrate management control chip comprises a plurality of video processing links, the video processing links comprise processing channels in an operating state and idle links in an unoperated state, and video processing parameters of the processing channels are detected in the operation process of the processing channels, wherein the video processing parameters are used for indicating the processing performance of the processing channels on videos; extracting target processing resources from second processing resources of the idle link according to target matching degree between first processing resources of the processing path and operation requirements of the processing path, which are indicated by the video processing parameters, wherein the target matching degree is used for indicating the degree that the first processing resources meet the operation requirements of the processing path; the target processing resources are allocated to the processing paths. The processing path is allocated to the target processing resource in the second processing resource of the idle link, so that the processing path can meet the operation requirement of the processing path after obtaining the target processing resource, and the problem of lower resource utilization rate of the substrate management control chip can be solved, and the effect of improving the resource utilization rate of the substrate management control chip is achieved.

In an exemplary embodiment, the video resource scheduling controller is further configured to compare a frame loss rate of the processing path with a frame loss rate threshold corresponding to the processing path, where the video processing parameter includes the frame loss rate; determining the target matching degree as a first matching degree under the condition that the frame loss rate is greater than or equal to the frame loss rate threshold, wherein the first matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; and under the condition that the frame loss rate is smaller than the frame loss rate threshold, determining the target matching degree as a second matching degree, wherein the second matching degree is used for indicating the first processing resource to meet the operation requirement of the processing path.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine a target resource type required by the processing path according to the video processing parameter, and a target resource amount allowed to be allocated for the processing path in processing resources belonging to the target resource type; and extracting the processing resources of the target resource quantity belonging to the target resource type from the second processing resources as the target processing resources.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine, from the frame loss rates of the processing paths, a first frame loss rate that belongs to an inter-frame loss and a second frame loss rate that belongs to an intra-frame loss, where the video processing parameters include the frame loss rate; determining a target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate; acquiring the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation; and distributing the target resource amount to the processing path according to the target frame loss reason and the second processing resource.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine a ratio of the first frame loss rate to the second frame loss rate; determining the target frame loss reason as a first frame loss reason under the condition that the ratio is larger than 1, wherein the first frame loss reason is used for indicating that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path; and under the condition that the ratio is smaller than 1, determining the target frame loss reason as a second frame loss reason, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine that the target resource type includes a video control logic type and a video storage type if the target frame loss cause is a first frame loss cause, where the first frame loss cause is used to indicate that a processing performance impact of an inter-frame loss on the processing path is greater than a processing performance impact of an intra-frame loss on the processing path; and in the case that the target frame loss reason is a second frame loss reason, the target resource type comprises a video storage type, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is greater than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the video resource scheduling controller is further configured to divide the idle links into a first set and a second set according to a first number and a second number in the plurality of processing lanes, where the first number is a number of first processing lanes belonging to a first frame loss reason, the second number is a number of second processing lanes belonging to a second frame loss reason, the first frame loss reason is used to indicate that a processing performance impact of an inter-frame loss on the processing lanes is greater than a processing performance impact of an intra-frame loss on the processing lanes, the second frame loss reason is used to indicate that a processing performance impact of an intra-frame loss on the processing lanes is greater than a processing performance impact of an inter-frame loss on the processing lanes, the target frame loss reason includes the first frame loss reason and the second frame loss reason, the first set includes a third number of idle links, and the second set includes a fourth number of idle links; the processing resources of the first set are allocated to the first number of the first processing lanes, and the processing resources of the second set are allocated to the second number of the second processing lanes.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine the third number according to the first number and the first frame loss rate of each first processing lane; determining the third number of idle links as the first set; and determining other idle links except the third number of idle links in all idle links on the baseboard management control chip as the second set.

In an exemplary embodiment, the video resource scheduling controller is further configured to allocate an initial number to each first processing path according to a first frame loss rate of each first processing path, where the higher the first frame loss rate, the greater the initial number, and each initial number is greater than or equal to 1; the sum of the initial numbers is determined as the third number.

In an exemplary embodiment, the video resource scheduling controller is further configured to allocate an initial number of the idle links in the first set to the corresponding first processing lanes.

In an exemplary embodiment, the video resource scheduling controller is further configured to determine a ratio of the second frame loss rate of each second processing path to the second frame loss rate sum as a resource ratio of each second processing path; and distributing the processing resources which meet the resource proportion in the processing resources of the second set to corresponding second processing paths.

In an exemplary embodiment, the processor is further configured to detect, as the video processing parameter, a frame loss rate of the processing path for a target period of time in a current scheduling period, where the processing path is configured to use the target processing resource in the current scheduling period.

The embodiment also provides a resource scheduling device of the baseboard management control chip, which is used for implementing the above embodiment and the preferred implementation manner, and the description is omitted. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.

Fig. 7 is a block diagram of a resource scheduling device of a baseboard management control chip according to an embodiment of the present application, where, as shown in fig. 7, the baseboard management control chip includes a plurality of video processing links, and the video processing links include a processing path in an operating state and an idle link in an unoperated state, and the device includes:

a first detection module 72, configured to detect a video processing parameter of the processing path during operation of the processing path, where the video processing parameter is used to indicate a processing performance of the processing path on a video;

a second detection module 74, configured to detect, according to the video processing parameter, a target matching degree between a first processing resource of the processing path and an operation requirement of the processing path, where the target matching degree is used to indicate a degree to which the first processing resource meets the operation requirement of the processing path;

An extraction module 76 for extracting a target processing resource from a second processing resource of the idle link if the target match is indicative that the first processing resource has not met the operational requirements of the processing path;

an allocation module 78 for allocating the target processing resources to the processing lanes.

Through the device, the substrate management control chip comprises a plurality of video processing links, the video processing links comprise processing channels in an operating state and idle links in an unoperated state, and video processing parameters of the processing channels are detected in the operation process of the processing channels, wherein the video processing parameters are used for indicating the processing performance of the processing channels on videos; extracting target processing resources from second processing resources of the idle link according to target matching degree between first processing resources of the processing path and operation requirements of the processing path, which are indicated by the video processing parameters, wherein the target matching degree is used for indicating the degree that the first processing resources meet the operation requirements of the processing path; the target processing resources are allocated to the processing paths. The processing path is allocated to the target processing resource in the second processing resource of the idle link, so that the processing path can meet the operation requirement of the processing path after obtaining the target processing resource, and the problem of lower resource utilization rate of the substrate management control chip can be solved, and the effect of improving the resource utilization rate of the substrate management control chip is achieved.

In an exemplary embodiment, the second detection module includes:

the comparison unit is used for comparing the frame loss rate of the processing path with a frame loss rate threshold corresponding to the processing path, wherein the video processing parameters comprise the frame loss rate;

the first determining unit is configured to determine, when the frame loss rate is greater than or equal to the frame loss rate threshold, that the target matching degree is a first matching degree, where the first matching degree is used to indicate that the first processing resource does not meet an operation requirement of the processing path;

and the second determining unit is used for determining the target matching degree as a second matching degree under the condition that the frame loss rate is smaller than the frame loss rate threshold, wherein the second matching degree is used for indicating the first processing resource to meet the operation requirement of the processing path.

In one exemplary embodiment, the extraction module includes:

a third determining unit, configured to determine, according to the video processing parameter, a target resource type required by the processing path, and a target resource amount allowed to be allocated to the processing path in processing resources belonging to the target resource type;

And the extraction unit is used for extracting the processing resources belonging to the target resource amount of the target resource type from the second processing resources as the target processing resources.

In an exemplary embodiment, the third determining unit is further configured to: determining a first frame loss rate belonging to inter-frame loss and a second frame loss rate belonging to intra-frame loss from the frame loss rates of the processing paths, wherein the video processing parameters comprise the frame loss rate; determining a target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate; acquiring the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation; and distributing the target resource amount to the processing path according to the target frame loss reason and the second processing resource.

In an exemplary embodiment, the third determining unit is further configured to: determining a ratio of the first frame loss rate to the second frame loss rate; determining the target frame loss reason as a first frame loss reason under the condition that the ratio is larger than 1, wherein the first frame loss reason is used for indicating that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path; and under the condition that the ratio is smaller than 1, determining the target frame loss reason as a second frame loss reason, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the third determining unit is further configured to: determining that the target resource type comprises a video control logic type and a video storage type when the target frame loss reason is a first frame loss reason, wherein the first frame loss reason is used for indicating that the processing performance influence of the inter-frame loss on the processing path is greater than the processing performance influence of the intra-frame loss on the processing path; and in the case that the target frame loss reason is a second frame loss reason, the target resource type comprises a video storage type, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is greater than the processing performance influence of the inter-frame loss on the processing path.

In an exemplary embodiment, the third determining unit is further configured to: dividing the idle links into a first set and a second set according to a first number and a second number in the plurality of processing paths, wherein the first number is the number of the first processing paths belonging to a first frame loss reason, the second number is the number of the second processing paths belonging to a second frame loss reason, the first frame loss reason is used for indicating that the processing performance influence of an inter-frame loss on the processing paths is larger than that of an intra-frame loss on the processing paths, the second frame loss reason is used for indicating that the processing performance influence of an intra-frame loss on the processing paths is larger than that of an inter-frame loss on the processing paths, the target frame loss reason comprises the first frame loss reason and the second frame loss reason, the first set comprises a third number of idle links, and the second set comprises a fourth number of idle links; the processing resources of the first set are allocated to the first number of the first processing lanes, and the processing resources of the second set are allocated to the second number of the second processing lanes.

In an exemplary embodiment, the third determining unit is further configured to: determining the third number according to the first number and the first frame loss rate of each first processing path; determining the third number of idle links as the first set; and determining other idle links except the third number of idle links in all idle links on the baseboard management control chip as the second set.

In an exemplary embodiment, the third determining unit is further configured to: allocating an initial number to each first processing path according to the first frame loss rate of each first processing path, wherein the initial number is larger as the first frame loss rate is higher, and each initial number is larger than or equal to 1; the sum of the initial numbers is determined as the third number.

In an exemplary embodiment, the third determining unit is further configured to: and allocating an initial number of the idle links in the first set to the corresponding first processing paths.

In an exemplary embodiment, the third determining unit is further configured to: determining the duty ratio of the second frame loss rate of each second processing path in the second frame loss rate sum as the resource duty ratio of each second processing path; and distributing the processing resources which meet the resource proportion in the processing resources of the second set to corresponding second processing paths.

In one exemplary embodiment, the allocation module includes:

a parallel unit, configured to, in a case where the target processing resource includes a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type, connect in parallel a first idle link that provides the target processing resource to the processing path;

and the loading unit is used for loading the target processing resource in the second idle link providing the target processing resource to the processing resource of the processing path in the case that the target processing resource comprises the processing resource belonging to the video storage type.

In an exemplary embodiment, the first detection module includes:

and the detection unit is used for detecting the frame loss rate of the processing path in a target time period in the current scheduling period as the video processing parameter, wherein the processing path is used for using the target processing resource in the current scheduling period.

In an exemplary embodiment, the apparatus further comprises:

the receiving module is used for receiving the initial video processing data generated by the video processing links;

and the integration module is used for integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource.

It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.

Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.

In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.

An embodiment of the present application further provides an electronic device, fig. 8 is a block diagram of a structure of the electronic device according to an embodiment of the present application, and as shown in fig. 8, the electronic device includes a memory and a processor, where the memory stores a computer program, and the processor is configured to execute the computer program to perform steps in any one of the method embodiments described above.

In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.

Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.

It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application should be included in the protection scope of the present application.

Claims

1. A resource scheduling method of a baseboard management control chip is characterized in that,

the baseboard management control chip comprises a plurality of video processing links, wherein the video processing links comprise a processing passage in an operating state and an idle link in an unoperated state, and the method comprises the following steps:

And distributing the target processing resource to the processing path.

2. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the detecting the target matching degree between the first processing resource of the processing path and the operation requirement of the processing path according to the video processing parameter includes:

comparing the frame loss rate of the processing path with a frame loss rate threshold corresponding to the processing path, wherein the video processing parameters comprise the frame loss rate;

determining the target matching degree as a first matching degree under the condition that the frame loss rate is greater than or equal to the frame loss rate threshold, wherein the first matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path;

and under the condition that the frame loss rate is smaller than the frame loss rate threshold, determining the target matching degree as a second matching degree, wherein the second matching degree is used for indicating the first processing resource to meet the operation requirement of the processing path.

3. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the extracting the target processing resource from the second processing resource of the idle link includes:

Determining a target resource type required by the processing path according to the video processing parameters, and a target resource amount allowed to be allocated for the processing path in processing resources belonging to the target resource type;

and extracting the processing resources of the target resource quantity belonging to the target resource type from the second processing resources as the target processing resources.

4. The method of claim 3, wherein the step of,

the determining the target resource type required by the processing path according to the video processing parameter, and the target resource amount allowed to be allocated to the processing path in the processing resources belonging to the target resource type, includes:

determining a first frame loss rate belonging to inter-frame loss and a second frame loss rate belonging to intra-frame loss from the frame loss rates of the processing paths, wherein the video processing parameters comprise the frame loss rate;

determining a target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate;

acquiring the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation;

and distributing the target resource amount to the processing path according to the target frame loss reason and the second processing resource.

5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

the determining the target frame loss reason of the processing path according to the first frame loss rate and the second frame loss rate includes:

determining a ratio of the first frame loss rate to the second frame loss rate;

determining the target frame loss reason as a first frame loss reason under the condition that the ratio is larger than 1, wherein the first frame loss reason is used for indicating that the influence of the inter-frame loss on the processing performance of the processing path is larger than that of the intra-frame loss on the processing path;

and under the condition that the ratio is smaller than 1, determining the target frame loss reason as a second frame loss reason, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is larger than the processing performance influence of the inter-frame loss on the processing path.

6. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

the obtaining the target resource type corresponding to the target frame loss reason from the frame loss reason and the resource type with the corresponding relation comprises the following steps:

determining that the target resource type comprises a video control logic type and a video storage type when the target frame loss reason is a first frame loss reason, wherein the first frame loss reason is used for indicating that the processing performance influence of the inter-frame loss on the processing path is greater than the processing performance influence of the intra-frame loss on the processing path;

And in the case that the target frame loss reason is a second frame loss reason, the target resource type comprises a video storage type, wherein the second frame loss reason is used for indicating that the processing performance influence of the intra-frame loss on the processing path is greater than the processing performance influence of the inter-frame loss on the processing path.

7. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

the allocating the target resource amount for the processing path according to the target frame loss reason and the second processing resource includes:

dividing the idle links into a first set and a second set according to a first number and a second number in the plurality of processing paths, wherein the first number is the number of the first processing paths belonging to a first frame loss reason, the second number is the number of the second processing paths belonging to a second frame loss reason, the first frame loss reason is used for indicating that the processing performance influence of an inter-frame loss on the processing paths is larger than that of an intra-frame loss on the processing paths, the second frame loss reason is used for indicating that the processing performance influence of an intra-frame loss on the processing paths is larger than that of an inter-frame loss on the processing paths, the target frame loss reason comprises the first frame loss reason and the second frame loss reason, the first set comprises a third number of idle links, and the second set comprises a fourth number of idle links;

The processing resources of the first set are allocated to the first number of the first processing lanes, and the processing resources of the second set are allocated to the second number of the second processing lanes.

8. The method of claim 7, wherein the step of determining the position of the probe is performed,

the dividing the idle links into a first set and a second set according to a first number and a second number of the plurality of processing lanes includes:

determining the third number according to the first number and the first frame loss rate of each first processing path;

determining the third number of idle links as the first set;

and determining other idle links except the third number of idle links in all idle links on the baseboard management control chip as the second set.

9. The method of claim 8, wherein the step of determining the position of the first electrode is performed,

the determining the third number according to the first number and the first frame loss rate of each first processing path includes:

allocating an initial number to each first processing path according to the first frame loss rate of each first processing path, wherein the initial number is larger as the first frame loss rate is higher, and each initial number is larger than or equal to 1;

The sum of the initial numbers is determined as the third number.

10. The method of claim 9, wherein the step of determining the position of the substrate comprises,

the allocating processing resources of the first set to the first number of the first processing lanes includes:

and allocating an initial number of the idle links in the first set to the corresponding first processing paths.

11. The method of claim 7, wherein the step of determining the position of the probe is performed,

the allocating processing resources of the second set to the second number of the second processing lanes includes:

determining the duty ratio of the second frame loss rate of each second processing path in the second frame loss rate sum as the resource duty ratio of each second processing path;

and distributing the processing resources which meet the resource proportion in the processing resources of the second set to corresponding second processing paths.

12. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the allocating the target processing resource to the processing path includes:

in case the target processing resource comprises a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type, connecting in parallel a first idle link providing the target processing resource to the processing path;

In case the target processing resource comprises a processing resource belonging to the video storage type, loading the target processing resource in a second idle link providing the target processing resource to a processing resource of the processing path.

13. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the detecting the video processing parameters of the processing path includes:

and detecting the frame loss rate of the processing path in a target time period in a current scheduling period as the video processing parameter, wherein the processing path is used for using the target processing resource in the current scheduling period.

14. The method of claim 1, wherein the step of determining the position of the substrate comprises,

after said allocating said target processing resources to said processing path, said method further comprises:

receiving initial video processing data generated by the plurality of video processing links;

and integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource.

15. A baseboard management control chip is characterized in that,

comprising the following steps: a plurality of video processing links including processing paths in an operating state and idle links in an unoperated state, and a processor connected to the plurality of video processing links, wherein,

the processor is used for detecting video processing parameters of the processing path in the running process of the processing path, wherein the video processing parameters are used for indicating the processing performance of the processing path on video;

and distributing the target processing resource to the processing path.

16. The baseboard management control chip of claim 15, wherein,

Each video processing link includes a video interface and a video processing module, the video processing module includes a processing resource, and the processor includes: the video resource scheduling controller is connected with the access selection controller, and the access selection controller is connected between each group of video interfaces and the video processing module;

the video resource scheduling controller is used for detecting video processing parameters of the processing path in the running process of the processing path; detecting target matching degree between a first processing resource of the processing path and operation requirements of the processing path according to the video processing parameters; extracting a target processing resource from a second processing resource of the idle link under the condition that the target matching degree is used for indicating that the first processing resource does not meet the operation requirement of the processing path; controlling the path selection controller to allocate the target processing resource to the processing path;

the path selection controller is used for distributing the target processing resources to the processing paths according to the control of the video resource scheduling controller.

17. The baseboard management control chip of claim 16, wherein,

the path selection controller is configured to connect, in parallel, a first idle link that provides the target processing resource to the processing path, in a case where the target processing resource includes a processing resource belonging to a video control logic type and a processing resource belonging to a video storage type; in case the target processing resource comprises a processing resource belonging to the video storage type, loading the target processing resource in a second idle link providing the target processing resource to a processing resource of the processing path.

18. The baseboard management control chip of claim 15, wherein,

the baseboard management control chip further includes: a video output integration controller connected after the plurality of video processing links, the video output integration controller further configured to connect to a memory, wherein,

the video output integration controller is further used for receiving initial video processing data generated by the plurality of video processing links; integrating first data and second data in the initial video processing data to obtain target video processing data corresponding to the processing path, wherein the first data is video processing data generated by the processing path, and the second data is video processing data generated by the target processing resource; outputting the target video processing data to the memory.

19. A resource scheduling device of a baseboard management control chip is characterized in that,

the baseboard management control chip comprises a plurality of video processing links, the video processing links comprise a processing path in an operating state and an idle link in an unoperated state, and the device comprises:

20. A computer-readable storage medium comprising,

the computer readable storage medium has stored therein a computer program, wherein the computer program when executed by a processor implements the steps of the method of any of claims 1 to 14.

21. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that,

the processor, when executing the computer program, implements the steps of the method as claimed in any one of claims 1 to 14.