CN116990660A - eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium - Google Patents

eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium Download PDF

Info

Publication number
CN116990660A
CN116990660A CN202310758370.0A CN202310758370A CN116990660A CN 116990660 A CN116990660 A CN 116990660A CN 202310758370 A CN202310758370 A CN 202310758370A CN 116990660 A CN116990660 A CN 116990660A
Authority
CN
China
Prior art keywords
emmc
data
test
read
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310758370.0A
Other languages
Chinese (zh)
Inventor
李�浩
宋魏杰
赖鼐
龚晖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhuhai Miaocun Technology Co ltd
Original Assignee
Zhuhai Miaocun Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhuhai Miaocun Technology Co ltd filed Critical Zhuhai Miaocun Technology Co ltd
Priority to CN202310758370.0A priority Critical patent/CN116990660A/en
Publication of CN116990660A publication Critical patent/CN116990660A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/2872Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
    • G01R31/2879Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads

Abstract

The embodiment of the invention provides an eMMC aging test method, an eMMC aging test device, electronic equipment and a computer readable storage medium. The method comprises the following steps: acquiring eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information; determining chip test performance parameters according to the environment attribute information; performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data; analyzing and processing the read and stored data to obtain data analysis information; and combining the data analysis information with the environment attribute information to obtain an eMMC aging test result. According to the scheme provided by the embodiment of the invention, the eMMC aging test can be more refined and accurate.

Description

eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium
Technical Field
The present invention relates to the field of chip testing technologies, and in particular, to an eMMC burn-in method, an eMMC burn-in device, an electronic device, and a computer readable storage medium.
Background
eMMC is a acronym for embedded MultiMedia Card, i.e., embedded multimedia card, which is a standard for flash memory cards, and defines the physical architecture and access interface and protocol of a memory system based on embedded multimedia cards; however, in the process of producing and preparing the eMMC chip, the chip is often required to be subjected to the aging test treatment, but the current aging test process of the eMMC chip is not performed according to different use environments, so that the eMMC aging test is not refined and accurate enough, and the effect of the eMMC aging test is affected.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art.
Therefore, the invention provides an eMMC aging test method, so that the eMMC aging test can be more refined and accurate.
The invention also provides a device applying the eMMC aging test method.
The invention also provides electronic equipment applying the eMMC aging test method.
The invention also provides a computer readable storage medium applying the eMMC aging test method.
According to an embodiment of the first aspect of the invention, the eMMC aging test method comprises the following steps:
acquiring eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information;
determining chip test performance parameters according to the environment attribute information;
performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data;
analyzing the read data to obtain data analysis information;
and combining the data analysis information with the environment attribute information to obtain an eMMC aging test result.
According to some embodiments of the invention, the determining the chip test performance parameter according to the environmental attribute information includes:
analyzing and processing the environment attribute information to obtain an attribute analysis result;
and determining the chip test performance parameters from a preset environment test performance parameter setting list according to the attribute analysis result.
According to some embodiments of the present invention, the performing a read-memory operation on an eMMC chip according to the chip test performance parameter to obtain read-memory data includes:
performing control processing on the read-memory operation state of the eMMC chip according to the chip test performance parameters;
and acquiring and processing the data of the eMMC chip read-memory operation every time a preset time interval passes to obtain the read-memory data.
According to some embodiments of the present invention, the data analysis information includes test normal information and test abnormal information, and the analyzing the read data to obtain the data analysis information includes:
matching corresponding data standard intervals according to the environment attribute information;
comparing the read data with the data standard interval;
obtaining the test normal information based on the read-save data under the condition that the read-save data is within the data standard interval;
and under the condition that the read-memory data is not in the data standard interval, obtaining the test abnormal information based on the read-memory data.
According to some embodiments of the invention, after the combining the data analysis information with the environment attribute information to obtain an eMMC aging test result, the method further includes:
performing data compression and packaging processing on the eMMC aging test result to obtain a data packet;
and sending the data packet to a preset network address.
According to some embodiments of the invention, the environment attribute information includes one of:
video playing environment information;
navigation operation environment information;
game running environment information;
e-book running environment information.
According to some embodiments of the invention, the chip test performance parameter includes at least one of: chip current; chip voltage; data read-write frequency.
An eMMC burn-in test apparatus according to an embodiment of the second aspect of the present invention includes:
the system comprises a first processing module, a second processing module and a third processing module, wherein the first processing module is used for acquiring eMMC test environment information, and the eMMC test environment information comprises environment attribute information;
the second processing module is used for determining chip test performance parameters according to the environment attribute information;
the third processing module is used for performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data;
the fourth processing module is used for analyzing and processing the read and stored data to obtain data analysis information;
and the fifth processing module is used for combining the data analysis information with the environment attribute information to obtain an eMMC aging test result.
An electronic device according to an embodiment of a third aspect of the present invention includes: the memory, the processor and the computer program stored on the memory and capable of running on the processor, wherein the processor realizes the eMMC aging test method when executing the computer program.
A computer-readable storage medium according to an embodiment of the fourth aspect of the present invention stores computer-executable instructions that, when executed by a control processor, implement the eMMC burn-in test method as described above.
The eMMC aging test method provided by the embodiment of the invention has at least the following beneficial effects: in the process of performing eMMC aging test, first obtaining eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information; then determining chip test performance parameters according to the environment attribute information; then, performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain corresponding read-memory data; then analyzing the read data to obtain data analysis information; and finally, combining the data analysis information with the environment attribute information to obtain an eMMC aging test result. Through the technical scheme, the eMMC aging test can be refined and accurate, and the effect of the eMMC aging test is improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain, without limitation, the disclosed embodiments.
FIG. 1 is a flowchart of an eMMC burn-in test method according to an embodiment of the present invention;
FIG. 2 is a specific flow chart of S200 provided by one embodiment of the present invention;
FIG. 3 is a specific flowchart of S300 provided by one embodiment of the present invention;
FIG. 4 is a specific flowchart of S400 provided by one embodiment of the present invention;
FIG. 5 is a flowchart of an eMMC burn-in test method according to another embodiment of the present invention;
fig. 6 is a schematic configuration diagram of an eMMC burn-in test apparatus according to an embodiment of the present invention;
fig. 7 is a schematic view of the configuration of an electronic device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In the description of the present invention, a number means one or more, a number means two or more, and greater than, less than, exceeding, etc. are understood to not include the present number, and above, below, within, etc. are understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present invention can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.
The invention provides an eMMC aging test method, an eMMC aging test device, electronic equipment and a computer readable storage medium, wherein the eMMC aging test method comprises the following steps: in the process of performing eMMC aging test, first obtaining eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information; then determining chip test performance parameters according to the environment attribute information; then, performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain corresponding read-memory data; then analyzing the read data to obtain data analysis information; and finally, combining the data analysis information with the environment attribute information to obtain an eMMC aging test result. Through the technical scheme, the eMMC aging test can be refined and accurate, and the effect of the eMMC aging test is improved.
Embodiments of the present invention will be further described below with reference to the accompanying drawings.
As shown in fig. 1, fig. 1 is a flowchart of an eMMC burn-in test method according to an embodiment of the present invention. The method includes, but is not limited to, step S100, step S200, step S300, step S400, and step S500.
Step S100, acquiring eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information;
step S200, determining chip test performance parameters according to the environment attribute information;
step S300, performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data;
step S400, analyzing and processing the read and stored data to obtain data analysis information;
and S500, combining the data analysis information with the environment attribute information to obtain an eMMC aging test result.
It should be noted that, in the process of performing an eMMC aging test, eMMC test environment information is first obtained, where the eMMC test environment information includes environment attribute information; then determining chip test performance parameters according to the environment attribute information; then, performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain corresponding read-memory data; then analyzing the read data to obtain data analysis information; and finally, combining the data analysis information with the environment attribute information to obtain an eMMC aging test result. Through the technical scheme, the eMMC aging test can be refined and accurate, and the effect of the eMMC aging test is improved.
It can be understood that a specific use environment is combined in the process of testing the eMMC chip, wherein the use environment can be a video playing environment, a navigation running environment, a game running environment and an electronic book browsing environment, which are all high-frequency use environments; and for each use environment, the related chip test performance parameters are corresponding, namely the operation performance parameters of the chip under the corresponding use environment.
Notably, the chip test performance parameters can be determined according to the environmental attribute information; for example, for the use environment of video playing, the chip testing performance parameter of the test chip needs to be set as the parameter under the environment of video playing, so that the chip burn-in test under the video playing occasion can be simulated. Performing read-memory operation control processing on the eMMC chip according to the chip test performance parameters so that the operation of the eMMC chip can correspond to the corresponding use environment, and finally performing analysis processing on read-memory data to obtain data analysis information; and finally, combining the data analysis information with the corresponding environment attribute information to obtain an eMMC aging test result. Wherein, eMMC ageing test result carries the relevant information of service environment, and then makes eMMC ageing test can refine more accurately, has promoted eMMC ageing test's effect.
In addition, in an embodiment, as shown in fig. 2, the step S200 may include, but is not limited to, step S210 and step S220.
Step S210, analyzing and processing the environmental attribute information to obtain an attribute analysis result;
step S220, determining the chip test performance parameters from a preset environment test performance parameter setting list according to the attribute analysis result.
In the process of determining the chip test performance parameters, firstly, analyzing and processing the environmental attribute information to obtain an attribute analysis result; and then determining the chip test performance parameters from a preset environment test performance parameter setting list according to the attribute analysis result.
It is noted that the environment test performance parameter setting list includes various test environments, and each test environment corresponds to a corresponding chip test performance parameter; for example, for a test environment of navigation operation, the chip test performance parameters corresponding to the test environment of navigation operation are in the environment test performance parameter setting list. Analyzing and processing the environment attribute information to obtain an attribute analysis result; and then determining and obtaining corresponding chip test performance parameters from a preset environment test performance parameter setting list according to the attribute analysis result, and subsequently, performing control processing on the running state of the eMMC chip according to the determined chip test performance parameters so that the eMMC chip can simulate the corresponding use environment state.
In addition, in an embodiment, as shown in fig. 3, the step S300 may include, but is not limited to, step S310 and step S320.
Step S310, performing control processing on the read-memory operation state of the eMMC chip according to the chip test performance parameters;
step S320, collecting and processing the data of the eMMC chip read-memory operation to obtain read-memory data every time a preset time interval passes.
It should be noted that, in the process of performing the aging test on the eMMC chip under the corresponding use environment, the read-memory operation state of the eMMC chip is controlled according to the chip test performance parameter; and then, acquiring and processing the data of the eMMC chip read-memory operation every time a preset time interval passes, so as to obtain corresponding read-memory data.
It is noted that, the memory reading operation of the eMMC chip is controlled according to the chip test performance parameter, that is, the data reading and the data writing of the eMMC chip are controlled according to the chip test performance parameter; the time interval can be set, and data of the eMMC chip read-memory operation can be acquired and processed under the condition that the preset time interval passes; for example, it may be set that the read-in data of the eMMC chip in this period of time is collected at intervals of one week, and the collected read-in data is analyzed to obtain corresponding data analysis information.
In addition, in an embodiment, the data analysis information includes test normal information and test abnormal information, and as shown in fig. 4, the above step S400 may include, but is not limited to, step S410, step S420, step S430 and step S440.
Step S410, matching corresponding data standard intervals according to the environment attribute information;
step S420, comparing the read-stored data with a data standard interval;
step S430, obtaining test normal information based on the read-save data under the condition that the read-save data is within the data standard interval;
in step S440, in the case that the read-memory data is not within the data standard interval, the test anomaly information is obtained based on the read-memory data.
In the process of determining the data analysis information, firstly, matching corresponding data standard intervals according to the environment attribute information; then comparing the read-stored data with a data standard interval; under the condition that the read-and-store data is within the data standard interval, the test normal information can be obtained based on the read-and-store data; under the condition that the read-memory data is not in the data standard interval, the test abnormality information can be obtained based on the read-memory data.
It should be noted that, the data standard interval is that the corresponding data is in the interval, which indicates that the corresponding test performance is normal, and if a certain data is outside the data standard interval, it can be determined that the performance of the chip is abnormal.
In addition, in an embodiment, as shown in fig. 5, the step S500 may further include, but is not limited to, step S610 and step S620 after the above-mentioned step S is performed.
Step S610, performing data compression and packaging processing on the eMMC aging test result to obtain a data packet;
step S620, the data packet is sent to a preset network address.
It should be noted that, after the eMMC aging test result is obtained, the eMMC aging test result may be further subjected to data compression and packaging processing to obtain a corresponding data packet; the data packet may then be sent to a predetermined network address.
It is worth noting that the mailbox address of the test developer can be used as a network address, and then the test developer can conduct data analysis research processing on the eMMC chip according to the obtained eMMC aging test result, so that convenience is brought to the test developer.
In addition, in one embodiment, the environmental attribute information includes one of:
video playing environment information;
navigation operation environment information;
game running environment information;
e-book running environment information.
It should be noted that, the environmental attribute information may include one of the following: video playing environment information; navigation operation environment information; game running environment information; e-book running environment information. The test environments are all high-frequency use environments, so that various common occasions of equipment can be well simulated.
In addition, in one embodiment, the chip test performance parameters include at least one of: chip current; chip voltage; data read-write frequency. And controlling the chip test performance parameters to simulate the operation states of various use environments.
In some embodiments of the present invention, as shown in fig. 6, an embodiment of the present invention further provides an eMMC burn-in test apparatus 10, which includes:
a first processing module 100, configured to obtain eMMC test environment information, where the eMMC test environment information includes environment attribute information;
the second processing module 200 is configured to determine a chip test performance parameter according to the environmental attribute information;
the third processing module 300 is configured to perform a read-memory operation on the eMMC chip according to the chip test performance parameter to obtain read-memory data;
a fourth processing module 400, configured to perform analysis processing on the read data to obtain data analysis information;
and the fifth processing module 500 is configured to combine the data analysis information with the environment attribute information to obtain an eMMC aging test result.
The specific embodiment of the EMMC burn-in device 10 is substantially the same as the specific embodiment of the EMMC burn-in method described above, and will not be described herein.
In some embodiments of the present invention, as shown in fig. 7, an embodiment of the present invention further provides an electronic device 700, including: the memory 720, the processor 710, and the computer program stored on the memory 720 and executable on the processor 710, the processor 710 implements the eMMC burn-in test method in the above embodiment when executing the computer program, for example, performs the method steps S100 to S500 in fig. 1, the method steps S210 to S220 in fig. 2, the method steps S310 to S320 in fig. 3, the method steps S410 to S440 in fig. 4, and the method steps S610 to S620 in fig. 5 described above.
In some embodiments of the present invention, an embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor or controller, for example, by one of the above-described device embodiments, which may cause the above-described processor to perform the eMMC burn-in test method in the above-described embodiment, for example, the above-described method steps S100 to S500 in fig. 1, the method steps S210 to S220 in fig. 2, the method steps S310 to S320 in fig. 3, the method steps S410 to S440 in fig. 4, and the method steps S610 to S620 in fig. 5.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiment of the present invention has been described in detail, the present invention is not limited to the above embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present invention, and these equivalent modifications and substitutions are intended to be included in the scope of the present invention as defined in the appended claims.

Claims (10)

1. An eMMC burn-in test method, the method comprising:
acquiring eMMC test environment information, wherein the eMMC test environment information comprises environment attribute information;
determining chip test performance parameters according to the environment attribute information;
performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data;
analyzing the read data to obtain data analysis information;
and combining the data analysis information with the environment attribute information to obtain an eMMC aging test result.
2. The eMMC burn-in method of claim 1, wherein the determining the chip test performance parameter according to the environmental attribute information comprises:
analyzing and processing the environment attribute information to obtain an attribute analysis result;
and determining the chip test performance parameters from a preset environment test performance parameter setting list according to the attribute analysis result.
3. The eMMC burn-in method according to claim 1, wherein the performing a read-in operation on the eMMC chip according to the chip test performance parameter to obtain read-in data includes:
performing control processing on the read-memory operation state of the eMMC chip according to the chip test performance parameters;
and acquiring and processing the data of the eMMC chip read-memory operation every time a preset time interval passes to obtain the read-memory data.
4. The eMMC burn-in method of claim 1, wherein the data analysis information includes test normal information and test abnormal information, and the analyzing the read data to obtain the data analysis information includes:
matching corresponding data standard intervals according to the environment attribute information;
comparing the read data with the data standard interval;
obtaining the test normal information based on the read-save data under the condition that the read-save data is within the data standard interval;
and under the condition that the read-memory data is not in the data standard interval, obtaining the test abnormal information based on the read-memory data.
5. The eMMC chip burn-in method according to claim 1, wherein after combining the data analysis information and the environment attribute information to obtain an eMMC burn-in result, the method further comprises:
performing data compression and packaging processing on the eMMC aging test result to obtain a data packet;
and sending the data packet to a preset network address.
6. The eMMC chip burn-in method of claim 1, wherein the environmental attribute information includes one of:
video playing environment information;
navigation operation environment information;
game running environment information;
e-book running environment information.
7. The eMMC chip burn-in method of claim 1, wherein the chip test performance parameter comprises at least one of: chip current; chip voltage; data read-write frequency.
8. An eMMC burn-in test device, comprising:
the system comprises a first processing module, a second processing module and a third processing module, wherein the first processing module is used for acquiring eMMC test environment information, and the eMMC test environment information comprises environment attribute information;
the second processing module is used for determining chip test performance parameters according to the environment attribute information;
the third processing module is used for performing read-memory operation processing on the eMMC chip according to the chip test performance parameters to obtain read-memory data;
the fourth processing module is used for analyzing and processing the read and stored data to obtain data analysis information;
and the fifth processing module is used for combining the data analysis information with the environment attribute information to obtain an eMMC aging test result.
9. An electronic device, comprising:
memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the eMMC burn-in test method according to any one of claims 1 to 7 when the computer program is executed.
10. A computer readable storage medium storing computer executable instructions which when executed by a control processor implement the eMMC burn-in test method of any one of claims 1 to 7.
CN202310758370.0A 2023-06-25 2023-06-25 eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium Pending CN116990660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310758370.0A CN116990660A (en) 2023-06-25 2023-06-25 eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310758370.0A CN116990660A (en) 2023-06-25 2023-06-25 eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium

Publications (1)

Publication Number Publication Date
CN116990660A true CN116990660A (en) 2023-11-03

Family

ID=88524007

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310758370.0A Pending CN116990660A (en) 2023-06-25 2023-06-25 eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium

Country Status (1)

Country Link
CN (1) CN116990660A (en)

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020012956A (en) * 2000-08-09 2002-02-20 윤종용 Apparatus and method of post package semiconductor burn-in test
US6671843B1 (en) * 2000-11-13 2003-12-30 Omar Kebichi Method for providing user definable algorithms in memory BIST
US6671837B1 (en) * 2000-06-06 2003-12-30 Intel Corporation Device and method to test on-chip memory in a production environment
US20130103992A1 (en) * 2011-10-25 2013-04-25 Silicon Motion, Inc Burn-In Method for Embedded Multi Media Card, and Test Board Using the Same, and Embedded Multi Media Card Tested by the Same
CN103605096A (en) * 2013-11-20 2014-02-26 广东电网公司电力科学研究院 Method and system for online parameter adjustment of electrical network state detection system
WO2014089520A1 (en) * 2012-12-07 2014-06-12 Anayas360. Com, Llc On-chip calibration and built-in-self-test for soc millimeter-wave integrated digital radio and modem
JP2019132695A (en) * 2018-01-31 2019-08-08 三菱電機株式会社 Coil testing device
CN112860532A (en) * 2021-03-02 2021-05-28 中国农业银行股份有限公司 Performance test method, device, equipment, medium and program product
CN113391970A (en) * 2021-07-08 2021-09-14 无锡江南计算技术研究所 Chip testing method and device for heterogeneous many-core processor
CN114138679A (en) * 2022-01-12 2022-03-04 中国平安人寿保险股份有限公司 Test data construction method and device, computer readable medium and electronic equipment
CN114441927A (en) * 2020-11-02 2022-05-06 圣邦微电子(北京)股份有限公司 Multi-environment batch chip testing method
US11328112B1 (en) * 2021-01-27 2022-05-10 Nvidia Corporation Timing-aware testing
CN114461534A (en) * 2022-03-14 2022-05-10 广域铭岛数字科技有限公司 Software performance testing method and system, electronic equipment and readable storage medium
CN115292196A (en) * 2022-08-31 2022-11-04 中国平安人寿保险股份有限公司 User interface testing method and device, electronic equipment and readable storage medium
CN116008790A (en) * 2023-03-23 2023-04-25 深圳市宇芯数码技术有限公司 Chip aging test system and method

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6671837B1 (en) * 2000-06-06 2003-12-30 Intel Corporation Device and method to test on-chip memory in a production environment
KR20020012956A (en) * 2000-08-09 2002-02-20 윤종용 Apparatus and method of post package semiconductor burn-in test
US6671843B1 (en) * 2000-11-13 2003-12-30 Omar Kebichi Method for providing user definable algorithms in memory BIST
US20130103992A1 (en) * 2011-10-25 2013-04-25 Silicon Motion, Inc Burn-In Method for Embedded Multi Media Card, and Test Board Using the Same, and Embedded Multi Media Card Tested by the Same
WO2014089520A1 (en) * 2012-12-07 2014-06-12 Anayas360. Com, Llc On-chip calibration and built-in-self-test for soc millimeter-wave integrated digital radio and modem
CN103605096A (en) * 2013-11-20 2014-02-26 广东电网公司电力科学研究院 Method and system for online parameter adjustment of electrical network state detection system
JP2019132695A (en) * 2018-01-31 2019-08-08 三菱電機株式会社 Coil testing device
CN114441927A (en) * 2020-11-02 2022-05-06 圣邦微电子(北京)股份有限公司 Multi-environment batch chip testing method
US11328112B1 (en) * 2021-01-27 2022-05-10 Nvidia Corporation Timing-aware testing
CN112860532A (en) * 2021-03-02 2021-05-28 中国农业银行股份有限公司 Performance test method, device, equipment, medium and program product
CN113391970A (en) * 2021-07-08 2021-09-14 无锡江南计算技术研究所 Chip testing method and device for heterogeneous many-core processor
CN114138679A (en) * 2022-01-12 2022-03-04 中国平安人寿保险股份有限公司 Test data construction method and device, computer readable medium and electronic equipment
CN114461534A (en) * 2022-03-14 2022-05-10 广域铭岛数字科技有限公司 Software performance testing method and system, electronic equipment and readable storage medium
CN115292196A (en) * 2022-08-31 2022-11-04 中国平安人寿保险股份有限公司 User interface testing method and device, electronic equipment and readable storage medium
CN116008790A (en) * 2023-03-23 2023-04-25 深圳市宇芯数码技术有限公司 Chip aging test system and method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
陶霰韬等: "基于RFID测温芯片的电缆温度反演计算方法研究", 《高压电器》, vol. 59, no. 4 *

Similar Documents

Publication Publication Date Title
WO2019227641A1 (en) Application testing method, apparatus, terminal device and medium
CN110989926A (en) Fault disk slot positioning method and device and electronic equipment
CN113064558B (en) Data storage method and device
CN105446864A (en) Method and device for verifying influence of deletion of cache file and mobile terminal
CN111159042A (en) Fluency testing method and device and electronic equipment
CN116340076B (en) Hard disk performance test method, device and medium
WO2016119755A1 (en) Integrated circuit measurement method, device, and system
CN111638439B (en) Communication module testing method, device, computer equipment and storage medium
CN116990660A (en) eMMC aging test method, eMMC aging test device, electronic equipment and computer readable storage medium
CN109101435A (en) The multi partition recognition methods of movable storage device and system, car-mounted terminal
CN111124894B (en) Code coverage rate processing method and device and computer equipment
CN109542743B (en) Log checking method and device, electronic equipment and computer readable storage medium
CN104835435A (en) Test method and device for liquid crystal module
CN112100036B (en) Page performance monitoring method and system based on PaaS front-end engine
CN114283876A (en) DDR signal quality test method, test device and test equipment
CN113377637A (en) Performance capacity diagnostic method and device
CN109542726B (en) Power consumption detection method and device
CN106886800B (en) Leakage current fault positioning device and method
CN109658977B (en) Hard disk detection device and method
CN116754919B (en) Outfield life assessment method and device, electronic equipment and storage medium
CN104714879A (en) Picture testing method and device
CN115357458B (en) Method and device for testing TISDM display information
US10803003B1 (en) Method for operating data recording system
CN111326182B (en) Aging test method and device for vehicle-mounted multimedia equipment
CN110399297B (en) Test method and computing device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination