CN116990319B - Semiconductor chip packaging defect detection method - Google Patents
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Abstract
The invention relates to the technical field of chip defect detection, and discloses a semiconductor chip packaging defect detection method, which comprises the steps of acquiring M chip reflection signals acquired in each reflection receiving area when target packaging chips in K preset chip states are in a preset detection area; determining at least one reflection receiving surface as a target reflection receiving surface according to the M chip reflection signals; calculating a reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, and calculating a reflection distribution density difference of the target reflection receiving surface; comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval, or comparing the reflection distribution density difference of the target reflection receiving surface with a preset second density difference interval, so as to obtain a defect detection result; the invention is beneficial to improving the accuracy and the speed of the defect detection of the chip packaging defect so as to meet the requirement of detecting the actual chip packaging defect.
Description
Technical Field
The invention relates to the technical field of chip defect detection, in particular to a semiconductor chip packaging defect detection method.
Background
The chip packaging is a process of fixing a semiconductor chip on a packaging substrate and sealing and protecting the chip by using a packaging material, and the purpose of the packaging is to provide functions of mechanical protection, electrical connection and thermal management for the chip; the packaging material generally comprises plastics, ceramics, metals and the like, and during the packaging process, the chip pins are connected to the pins on the packaging substrate through welding or gold wires to form electrical connection, and meanwhile, the packaging material can provide mechanical strength and protect the chip from the external environment; however, due to the complexity of the packaging materials, equipment, process and other factors, various packaging defects may occur to the packaged chip, which directly affects the performance and reliability of the chip; therefore, how to detect defects of the packaged chip to ensure the packaging quality of the chip has become an important point of current research.
Chip package defects including solder joint cracking, pin dislocation, surface cracking, voids, bulges, etc., which can lead to unstable operation, shortened lifetime, and even complete failure of the chip, become critical for rapid and accurate detection of chip package defects.
At present, the existing semiconductor chip packaging defect detection method is mainly realized by combining image recognition with a machine learning technology, for example, chinese patent with an authority publication number CN112967243B discloses a deep learning chip packaging crack defect detection method based on YOLO, and for example, chinese patent with an application publication number CN115760812A discloses a chip packaging defect detection and positioning method and device, and the invention solves the problem of chip packaging defect detection by utilizing the image recognition and machine learning technology; however, the method is easily affected by factors such as image quality and the like, and the image processing is relatively complex, so that the accuracy and the speed of detecting the chip packaging defects are low, and in addition, the requirement on generalization capability of a model is high due to the diversity of the chip packaging defects, so that the requirement on detecting the actual chip packaging defects is difficult to meet by adopting the method; in addition, the prior art also lacks feasible defect classification for the packaged chip, so that data support cannot be provided for defect classification management of the packaged chip.
In view of the above, the present invention provides a semiconductor chip package defect detection method to solve the above-mentioned problems.
Disclosure of Invention
In order to overcome the above-mentioned drawbacks of the prior art, embodiments of the present invention provide a semiconductor chip package defect detection method.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a semiconductor chip package defect detection method applied to a defect detection system including five reflective receiving surfaces, each of the reflective receiving surfaces including a plurality of reflective receiving areas, the method comprising:
when the target packaged chips in the K preset chip states are in the preset detection areas, M chip reflection signals collected in each reflection receiving area are obtained, wherein K, M epsilon N ＊ ，N ＊ Is a positive integer set;
according to the M chip reflection signals, determining at least one reflection receiving surface as a target reflection receiving surface;
calculating a reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, and calculating a reflection distribution density difference of the target reflection receiving surface;
and comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval, or comparing the reflection distribution density difference of the target reflection receiving surface with a preset second density difference interval, so as to obtain a defect detection result.
Further, the five reflective receiving surfaces include a top reflective receiving surface and four side reflective receiving surfaces; the top reflection receiving surface and the four side reflection receiving surfaces form a semi-closed detector;
the defect detection system further comprises a fusion component, a lifting module, a chip fixing module and a control terminal; the fusion component includes a signal transmitter, a signal receiver, an industrial camera, and a light source.
Further, acquiring the M chip reflection signals acquired in each reflection receiving area includes:
s1: extracting a standard chip image set of a prestored standard packaging chip, wherein the standard chip image set comprises standard chip images under multiple forms;
s2: the standard chip images in the multiple forms are marked by serial numbers, and the standard chip images in the multiple forms after the serial numbers are marked are used as K preset chip states;
s3: acquiring an image of the target packaged chip during detection to obtain an actual measurement image of the packaged chip;
s4: comparing the actual measurement image of the packaged chip with a standard chip image under a multi-form, judging whether the actual measurement image of the packaged chip is in a preset chip state marked by the (i+v) th serial number, and if the actual measurement image of the packaged chip is in the preset chip state marked by the (i+v) th serial number, acquiring M chip reflection signals in each reflection receiving area; if the state of the preset chip marked by the (i+v) th serial number is not the preset chip state, reminding the state adjustment of the target packaging chip;
Wherein i is a positive integer greater than or equal to 1, v=0, 1, 2 …, i starts from 1, v starts from 0, and 0 < i+v is less than or equal to K;
s5: and repeating the step S4 until i+v=K is stopped, and obtaining M chip reflection signals of the target package chip in each reflection receiving area under the state of K preset chips.
Further, determining at least one reflective receiving surface as a target reflective receiving surface includes:
extracting M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
calculating the total number of reflection points in each reflection receiving surface according to M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
comparing the total number of reflection points in each reflection receiving surface with a reflection threshold value in a corresponding preset chip state;
if the total number of reflection points in a certain reflection receiving surface is larger than or equal to the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is taken as a target reflection receiving surface;
and if the total number of reflection points in one reflection receiving surface is smaller than the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is not used as the target reflection receiving surface.
Further, calculating a reflection distribution density difference for each reflection receiving area in the target reflection receiving surface includes:
acquiring the total number of reflection points of each reflection receiving area and the area of each reflection receiving area;
calculating based on the total number of reflection points and the area of each reflection receiving area to obtain the reflection distribution density of each reflection receiving area;
and calculating the difference value between the reflection distribution density of each reflection receiving area and the local reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of each reflection receiving area.
Further, calculating the reflection distribution density difference of the target reflection receiving surface includes:
acquiring the total number of reflection points of the target reflection receiving surface and the area of the reflection surface of the target reflection receiving surface;
calculating based on the total number of reflection points of the target reflection receiving surface and the area of the reflection surface to obtain the reflection distribution density of the target reflection receiving surface;
and calculating the difference value between the reflection distribution density of the target reflection receiving surface and the global reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of the target reflection receiving surface.
Further, the defect detection result includes:
If the reflection distribution density difference of any reflection receiving area belongs to a preset first density difference interval, judging that the target packaging chip has no defect; if the reflection distribution density difference of any one of the reflection receiving areas does not belong to the preset first density difference interval, judging that the target packaging chip has defects.
Further, the defect detection result further includes:
if the reflection distribution density difference of the target reflection receiving surface belongs to a preset second density difference interval, judging that the target packaging chip has no defect; and if the reflection distribution density difference of the target reflection receiving surface does not belong to the preset second density difference interval, judging that the target packaging chip has defects.
Further, the method further comprises:
collecting actual measurement electrical measurement values of each pin on the target packaging chip to obtain a plurality of actual measurement electrical measurement values, and generating electrical measurement coefficients of the target packaging chip according to the plurality of actual measurement electrical measurement values;
extracting the reflection distribution density difference of the target reflection receiving surface under the state of K preset chips, and calculating based on the reflection distribution density difference of the target reflection receiving surface to obtain a defect detection coefficient;
performing comprehensive analysis based on the electrical measurement coefficient and the defect detection coefficient to obtain a chip package defect classification result; the chip package defect classification result comprises a first defect grade mark, a second defect grade mark and a third defect grade mark.
Further, the measured electrical measurement value is one of a current value, a voltage value or a resistance value;
generating an electrical measurement coefficient of the target packaged chip according to a plurality of actually measured electrical measurement values, including:
acquiring a plurality of pre-stored standard electrical measurement values of each pin on a target packaging chip;
and comparing each standard electrical measurement value with a corresponding measured electrical measurement value, and calculating to obtain an electrical measurement coefficient.
Further, performing an integrated analysis based on the electrical measurement coefficients and the defect detection coefficients, including:
calculating a defect comprehensive evaluation coefficient based on the electrical measurement coefficient and the defect detection coefficient;
setting defect comprehensive evaluation thresholds Qt1 and Qt2, wherein Qt1 is less than Qt2, and comparing the defect comprehensive evaluation coefficient with the defect comprehensive evaluation threshold;
if the defect comprehensive evaluation coefficient is smaller than or equal to a defect comprehensive evaluation threshold value Qt1, marking a first defect grade mark corresponding to the target packaging chip; if the defect comprehensive evaluation coefficient is larger than the defect comprehensive evaluation threshold value Qt1 and smaller than the defect comprehensive evaluation threshold value Qt2, marking a second defect grade mark corresponding to the target packaging chip; and if the defect comprehensive evaluation coefficient is greater than or equal to a defect comprehensive evaluation threshold value Qt2, marking a third defect grade mark corresponding to the target packaging chip.
An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the semiconductor chip package defect detection method of any of the above when the computer program is executed.
A computer readable storage medium having stored thereon a computer program which when executed by a processor implements the semiconductor chip package defect detection method of any of the above.
The technical effects and advantages of the semiconductor chip packaging defect detection method of the invention are that:
firstly, when target packaging chips in K preset chip states are in preset detection areas, acquiring M chip reflection signals acquired in each reflection receiving area; determining at least one reflection receiving surface as a target reflection receiving surface according to the M chip reflection signals; calculating a reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, and calculating a reflection distribution density difference of the target reflection receiving surface; comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval or comparing the reflection distribution density difference of a target reflection receiving surface with a preset second density difference interval to obtain a defect detection result; in addition, the invention is favorable for realizing the defect classification of the packaged chip by acquiring the electrical measurement coefficient and the defect detection coefficient and carrying out comprehensive analysis, thereby being favorable for providing important data support for realizing the classification management of the packaged chip.
Drawings
Fig. 1 is a schematic diagram of a semiconductor chip package defect detection method according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a semiconductor chip package defect detection method according to embodiment 2 of the present invention;
FIG. 3 is a schematic diagram of a defect detection system according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1, the disclosure provides a semiconductor chip package defect detection method, which is applied to a defect detection system, wherein the defect detection system includes five reflection receiving surfaces, each of the reflection receiving surfaces includes a plurality of reflection receiving areas, and the method includes:
step 1: when the target packaged chips in the K preset chip states are in the preset detection areas, M chip reflection signals collected in each reflection receiving area are obtained, wherein K, M epsilon N ＊ ，N ＊ Is a positive integer set;
specifically, the five reflection receiving surfaces comprise a top reflection receiving surface and four side reflection receiving surfaces; the top reflection receiving surface and the four side reflection receiving surfaces form a semi-closed detection body 1, as shown in fig. 3;
specifically, the defect detection system further comprises a fusion component 2, a lifting module 3, a chip fixing module 4 and a control terminal;
it should be appreciated that: the fusion component 2 comprises a signal transmitter, a signal receiver, an industrial camera and a light source; the signal transmitter, the signal receiver, the lifting module 3, the industrial camera and the light source are respectively provided with a central control unit, and the control terminal is respectively in remote communication connection with the central control units in the signal transmitter, the signal receiver, the lifting module 3, the industrial camera and the light source; the lifting module 3 is internally provided with a motor, the top of the chip fixing module 4 is provided with a clamping groove, and the chip fixing module 4 is made of rubber materials or rubber composite materials; the signal receiver is arranged in each reflection receiving area in the five reflection receiving surfaces, and the signal transmitter is arranged on the inner wall of the top reflection receiving surface; it should be appreciated that: FIG. 3 is a schematic illustration made only for ease of understanding, and in fact the one top reflective receiving surface and four side reflective receiving surfaces present a bottomless semi-enclosed volume;
It should be noted that: the inner walls of the five reflection receiving surfaces are divided into a plurality of reflection receiving areas, each reflection receiving area is divided into equal parts, each reflection receiving area comprises at least one signal receiver, and the areas and the structures of the reflection receiving areas are consistent except the positions of the reflection receiving areas are different;
also to be described is: the M chip reflected signals are generated based on signal transmitters and are received and acquired based on signal receivers, wherein the signal transmitters comprise but are not limited to laser transmitters, ultrasonic transmitters, radar transmitters and the like, and the signal receivers comprise but are not limited to laser receivers, ultrasonic receivers, radar receivers and the like;
it should also be appreciated that: as shown in fig. 3, when the target packaged chip is placed on the chip fixing module 4, the control terminal remotely and wirelessly transmits a lifting control instruction to the lifting module 3, at this time, the central control unit in the lifting module 3 receives the lifting control instruction and lifts the target packaged chip located on the chip fixing module 4 into the semi-closed detection body 1, when reaching a predetermined lifting height, the lifting module 3 stops running, at this time, the control terminal remotely starts the signal transmitter and the signal receiver, and obtains the M chip reflection signals in the state of the preset chip marked by the 1 st serial number through the signal receiver located in each reflection receiving area in the five reflection receiving surfaces; after the M chip reflection signals in the preset chip state are marked by the 1 st serial number, the control terminal remotely and wirelessly transmits a lifting control instruction to the lifting module 3, at the moment, a central control unit in the lifting module 3 receives the lifting control instruction, and the target packaging chip on the chip fixing module 4 is lifted to the semi-closed detection body 1, after the form of the target packaging chip is adjusted, the target packaging chip is lifted to the semi-closed detection body 1 through the lifting module 3, and the signal transmitter and the signal receiver are started again to transmit and receive the reflection signals, and the links are repeated until the M chip reflection signals acquired in each reflection receiving area in the K preset chip states are obtained; for the sequence number labels, see description below;
Specifically, obtaining the M chip reflection signals collected in each reflection receiving area includes:
s1: extracting a standard chip image set of a prestored standard packaging chip, wherein the standard chip image set comprises standard chip images under multiple forms;
s2: the standard chip images in the multiple forms are marked by serial numbers, and the standard chip images in the multiple forms after the serial numbers are marked are used as K preset chip states;
it should be noted that: the standard packaged chip refers to a packaged chip without any defects and problems, the standard chip image set is pre-stored in a system database, the standard chip images in the multiple forms refer to images of the standard packaged chip in different placing postures, and further examples are: assuming that a standard packaging chip is in a form similar to a regular body or a regular body, for convenience of understanding, further assuming that the standard packaging chip is cuboid, marking each surface of the standard packaging chip to obtain six surfaces, namely a surface (1), a surface (2), a surface (3), a surface (4), a surface (5) and a surface (6), when the standard packaging chip is detected to be in a overlooking angle, taking the standard packaging chip in the form of the surface (1) as a preset chip state, turning over the standard packaging chip, and marking the standard packaging chip with the surface (1) in sequence to obtain K preset chip states of the standard packaging chip, wherein K=6, photographing and marking the standard packaging chip in the K preset chip states to obtain standard chip images in multiple forms, and it should be understood that the logic can be adopted for the packaging chips of different regular bodies to obtain the K preset chip states; it should be appreciated that: the overturning of the packaged chip is not the object of the invention, which can be realized through manual adjustment or through mechanical arm adjustment, and the problem is not repeated;
It is also necessary to explain that: standard chip images in a multi-mode after sequence number marking meet a certain sequence rule, and K preset chip states also meet a certain sequence rule;
s3: acquiring an image of the target packaged chip during detection to obtain an actual measurement image of the packaged chip;
s4: comparing the actual measurement image of the packaged chip with a standard chip image under a multi-form, judging whether the actual measurement image of the packaged chip is in a preset chip state marked by the (i+v) th serial number, and if the actual measurement image of the packaged chip is in the preset chip state marked by the (i+v) th serial number, acquiring M chip reflection signals in each reflection receiving area; if the state of the preset chip marked by the (i+v) th serial number is not the preset chip state, reminding the state adjustment of the target packaging chip;
it should be noted that: i is a positive integer greater than or equal to 1, v=0, 1, 2 …, i starts from 1, v starts from 0, and 0 < i+v is less than or equal to K;
s5: repeating the step S4 until i+v=K is stopped, and obtaining M chip reflection signals of the target packaging chip in each reflection receiving area under the state of K preset chips;
it should be further appreciated that: the predetermined detection area includes a fixed detection area and a fluctuation detection area, and the fluctuation detection area is located within the fixed detection area, for example: in the same way, assuming that a target packaging chip with six standard surfaces exists, if the surface (1) is the largest surface, when the target packaging chip is placed as the largest surface at this time, the tiled area of the target packaging chip just covers the fixed detection area, and the fixed detection area is taken as the preset detection area at this time; if the surface (2) is a side surface, when the target packaged chip is placed in the side surface, the tiled area can only cover the fluctuation detection area in the fixed detection area, so that the fluctuation detection area is taken as a preset detection area;
Step 2: according to the M chip reflection signals, determining at least one reflection receiving surface as a target reflection receiving surface; by determining the target reflection receiving surface, the reflection receiving surface which does not contain the comparison characteristic or contains less characteristic is prevented from being brought into the next analysis link, so that the accuracy of defect detection is guaranteed;
specifically, determining at least one reflective receiving surface as a target reflective receiving surface includes:
extracting M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
calculating the total number of reflection points in each reflection receiving surface according to M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
it will be appreciated that: when obtaining M chip reflection signals of the target package chip in each reflection receiving area under a certain preset chip state, obtaining all reflection receiving areas in each reflection receiving surface by summing up reflection points in all reflection receiving areas in each reflection receiving surfaceThe total number of the collected reflection points in the reflection receiving area is calculated as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: / >Indicate->Total number of reflection points collected in all reflection receiving areas in the reflection receiving surfaces, +.>=1, 2, 3, 4, 5, i.e. the total number of reflection points per reflection receiving surface; />Represents the total number of reflection points in the j-th reflection receiving area,/and>representing the total number of reflection receiving areas;
comparing the total number of reflection points in each reflection receiving surface with a reflection threshold value in a corresponding preset chip state;
if the total number of reflection points in a certain reflection receiving surface is larger than or equal to the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is taken as a target reflection receiving surface;
if the total number of reflection points in a certain reflection receiving surface is smaller than the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is not used as a target reflection receiving surface;
it is to be understood that: the reflection threshold values in different preset chip states are different, so that comparison is required according to the corresponding reflection threshold values in the corresponding preset chip states; also to be described is: if the total number of reflection points in all the reflection receiving surfaces is smaller than the reflection threshold value in each preset chip state, prompting that a system fault occurs;
step 3: calculating a reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, and calculating a reflection distribution density difference of the target reflection receiving surface;
Specifically, calculating the reflection distribution density difference of each reflection receiving area in the target reflection receiving surface includes:
acquiring the total number of reflection points of each reflection receiving area and the area of each reflection receiving area;
it should be noted that: the area of each reflection receiving area is pre-stored in a system database;
calculating based on the total number of reflection points and the area of each reflection receiving area to obtain the reflection distribution density of each reflection receiving area; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Indicate->Reflection distribution density of the individual reflection receiving areas, +.>Indicate->Area of each reflection receiving region;
calculating the difference value between the reflection distribution density of each reflection receiving area and the local reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of each reflection receiving area; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Indicate->Reflection distribution density difference of the individual reflection receiving areas, +.>Representing local reflection distribution density corresponding to a preset standard;
it should be noted that: under different preset chip states, and different preset standard local reflection distribution densities of different reflection receiving areas, the corresponding preset standard local reflection distribution densities are selected according to the corresponding preset chip states and the corresponding reflection receiving areas to calculate;
Specifically, calculating the reflection distribution density difference of the target reflection receiving surface includes:
acquiring the total number of reflection points of the target reflection receiving surface and the area of the reflection surface of the target reflection receiving surface;
it should be noted that: the reflection surface area of the target reflection receiving surface is pre-stored in a system database;
calculating based on the total number of reflection points of the target reflection receiving surface and the area of the reflection surface to obtain the reflection distribution density of the target reflection receiving surface; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Representing the reflection distribution density of the target reflection receiving surface, < >>Representing the total number of reflection points of the target reflection receiving surface, < + >>A reflection surface area representing a target reflection receiving surface;
calculating the difference value between the reflection distribution density of the target reflection receiving surface and the global reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of the target reflection receiving surface; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Reflection distribution density difference of target reflection receiving surface, +.>Representing global reflection distribution density corresponding to a preset standard;
it should be noted that: the preset standard global reflection distribution density is different from the preset standard local reflection distribution density in different preset chip states, so that the corresponding preset standard global reflection distribution density is selected according to the corresponding preset chip state to calculate;
Step 4: comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval, or comparing the reflection distribution density difference of the target reflection receiving surface with a preset second density difference interval, so as to obtain a defect detection result;
specifically, the defect detection result includes:
if the reflection distribution density difference of any reflection receiving area belongs to a preset first density difference interval, judging that the target packaging chip has no defect; if the reflection distribution density difference of any reflection receiving area does not belong to a preset first density difference interval, judging that the target packaging chip has defects;
specifically, the defect detection result further includes:
if the reflection distribution density difference of the target reflection receiving surface belongs to a preset second density difference interval, judging that the target packaging chip has no defect; if the reflection distribution density difference of the target reflection receiving surface does not belong to a preset second density difference interval, judging that the target packaging chip has defects;
it should be noted that: the preset first density difference intervals comprise a plurality of preset first density difference intervals, the specific number of the preset first density difference intervals is determined according to the preset chip state and the number of the reflection receiving areas, and the preset first density difference intervals are different when the chip state is different from the reflection receiving areas, so that the corresponding preset second density difference intervals are required to be selected for comparison according to the corresponding preset chip state and the corresponding reflection receiving areas; similarly, the selection of the preset second density difference interval is also the same, and redundant description is omitted.
Also to be described is: the corresponding preset first density difference interval is determined according to the corresponding preset chip state, the serial number of the corresponding reflection receiving area and the serial number matching table; the selection of the corresponding preset first density difference interval is determined according to the corresponding preset chip state, the serial number of the corresponding reflection receiving surface and the serial number matching table; the sequence number matching table is pre-stored in a system database, and the following is exemplified: assuming that the preset chip state of the detected target packaged chip is a serial number (1), the serial number corresponding to the reflection receiving area is a, and a preset first density difference interval corresponding to the serial number (1) and the serial number A in binding connection is a1, at the moment, extracting the preset first density difference interval corresponding to the a1 as a comparison object of the reflection distribution density difference of the reflection receiving area A; the same is true for the preset second density difference interval, and redundant description is not needed;
determining a target reflection receiving surface according to M chip reflection signals, calculating the reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, calculating the reflection distribution density difference of the target reflection receiving surface, and finally comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval or comparing the reflection distribution density difference of the target reflection receiving surface with a preset second density difference interval; compared with the existing image mode chip packaging defect detection method, the method has the advantages of less interference factors and high processing speed, and is favorable for realizing rapid and accurate detection of the chip packaging defects, thereby meeting the requirements of the existing large-scale chip packaging defect detection.
Example 2
Referring to fig. 2, based on the foregoing embodiment 2, this embodiment is a further design improvement for implementing defect classification for chip package defects, and this embodiment discloses a semiconductor chip package defect detection method, which further includes:
step 5: collecting actual measurement electrical measurement values of each pin on the target packaging chip to obtain a plurality of actual measurement electrical measurement values, and generating electrical measurement coefficients of the target packaging chip according to the plurality of actual measurement electrical measurement values;
specifically, the actually measured electrical measurement value is one of a current value, a voltage value or a resistance value;
it should be noted that: the acquisition of the actually measured electrical measurement value can be realized based on any prior art, and the invention does not limit the acquisition of the actually measured electrical measurement value excessively, for example, the acquisition of the actually measured electrical measurement value can be realized through equipment such as a universal meter;
specifically, generating the electrical measurement coefficient of the target packaged chip according to the measured electrical measurement values includes:
acquiring a plurality of pre-stored standard electrical measurement values of each pin on a target packaging chip;
it should be noted that: the standard electrical measurement value comprises a standard current value, a standard voltage value or a standard resistance value, the standard electrical measurement value is acquired according to a standard packaging chip, and the standard electrical measurement value is pre-stored in a system database;
Comparing each standard electrical measurement value with a corresponding actual measurement electrical measurement value, and calculating to obtain an electrical measurement coefficient; the calculation formula is as follows: a step ofThe method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Representing electrical measurement coefficients +.>Representing standard electrical measurements, < >>Representing the measured electrical measurement;
step 6: extracting the reflection distribution density difference of the target reflection receiving surface under the state of K preset chips, and calculating based on the reflection distribution density difference of the target reflection receiving surface to obtain a defect detection coefficient; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: />Representing defect detection coefficients,/-, and>representing the reflection distribution density difference of the target reflection receiving surface in the K-th preset chip state, wherein K is the total number of preset chip states of the target packaged chip;
step 7: performing comprehensive analysis based on the electrical measurement coefficient and the defect detection coefficient to obtain a chip package defect classification result; the chip packaging defect classification result comprises a first defect grade mark, a second defect grade mark and a third defect grade mark;
specifically, the comprehensive analysis is performed based on the electrical measurement coefficient and the defect detection coefficient, including:
calculating a defect comprehensive evaluation coefficient based on the electrical measurement coefficient and the defect detection coefficient; the calculation formula is as follows:the method comprises the steps of carrying out a first treatment on the surface of the Wherein: / >Representing defect comprehensive assessment coefficient, < >>And->A weight factor greater than zero;
setting defect comprehensive evaluation thresholds Qt1 and Qt2, wherein Qt1 is less than Qt2, and comparing the defect comprehensive evaluation coefficient with the defect comprehensive evaluation threshold;
if the defect comprehensive evaluation coefficient is smaller than or equal to a defect comprehensive evaluation threshold value Qt1, marking a first defect grade mark corresponding to the target packaging chip; if the defect comprehensive evaluation coefficient is larger than the defect comprehensive evaluation threshold value Qt1 and smaller than the defect comprehensive evaluation threshold value Qt2, marking a second defect grade mark corresponding to the target packaging chip; if the defect comprehensive evaluation coefficient is larger than or equal to a defect comprehensive evaluation threshold value Qt2, marking a third defect grade mark corresponding to the target packaging chip;
it should be noted that: the first defect grade mark indicates that the corresponding target packaged chip has no defect or has slight defect and does not influence the operation; the second defect grade mark indicates that partial defects exist in the corresponding target packaged chip, and the actual use of the target packaged chip can be influenced; the third defect grade mark indicates that a large number of defects exist in the corresponding target packaging chip, so that the actual use is necessarily influenced;
the invention is beneficial to realizing the defect classification of the packaged chip by acquiring the electrical measurement coefficient and the defect detection coefficient and carrying out comprehensive analysis, thereby being beneficial to providing important data support for realizing the classification management of the packaged chip.
Example 3
The embodiment discloses an electronic device, which comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor realizes the semiconductor chip packaging defect detection method provided by any one of the methods when executing the computer program.
Since the electronic device described in this embodiment is an electronic device used to implement the method for detecting a semiconductor chip package defect in this embodiment, based on the method for detecting a semiconductor chip package defect described in this embodiment, those skilled in the art can understand the specific implementation of the electronic device in this embodiment and various modifications thereof, so how this electronic device is implemented in this embodiment will not be described in detail herein. Any electronic device used by those skilled in the art to implement the method for detecting a defect in a semiconductor chip package according to the embodiments of the present application falls within the scope of protection intended by the present application.
Example 4
The embodiment discloses a computer readable storage medium, which comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor executes the computer program to realize the semiconductor chip packaging defect detection method provided by any one of the methods.
The above formulas are all formulas with dimensionality removed and numerical value calculated, the formulas are formulas with the latest real situation obtained by software simulation by collecting a large amount of data, and preset parameters, weights and threshold selection in the formulas are set by those skilled in the art according to the actual situation.
The above embodiments may be implemented in whole or in part by software, hardware, firmware, or any other combination. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the processes or functions described in accordance with embodiments of the present invention are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center over a wired network or a wireless network. The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more sets of available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium may be a solid state disk.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely one, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Finally: the foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (12)
1. The semiconductor chip packaging defect detection method is applied to a defect detection system and is characterized in that the defect detection system comprises five reflection receiving surfaces, wherein the five reflection receiving surfaces comprise a top reflection receiving surface and four side reflection receiving surfaces; the top reflective receiving surface and the four side reflective receiving surfaces form a semi-closed detector, each of the reflective receiving surfaces including a plurality of reflective receiving areas, the method comprising:
when the target packaged chips in the K preset chip states are in the preset detection areas, M chip reflection signals collected in each reflection receiving area are obtained, wherein K, M epsilon N ＊ ，N ＊ Is a positive integer set; comprising the following steps:
s1: extracting a standard chip image set of a prestored standard packaging chip, wherein the standard chip image set comprises standard chip images under multiple forms;
s2: the standard chip images in the multiple forms are marked by serial numbers, and the standard chip images in the multiple forms after the serial numbers are marked are used as K preset chip states;
s3: acquiring an image of the target packaged chip during detection to obtain an actual measurement image of the packaged chip;
s4: comparing the actual measurement image of the packaged chip with a standard chip image under a multi-form, judging whether the actual measurement image of the packaged chip is in a preset chip state marked by the (i+v) th serial number, and if the actual measurement image of the packaged chip is in the preset chip state marked by the (i+v) th serial number, acquiring M chip reflection signals in each reflection receiving area; if the state of the preset chip marked by the (i+v) th serial number is not the preset chip state, reminding the state adjustment of the target packaging chip;
Wherein i is a positive integer greater than or equal to 1, v=0, 1, 2 …, i starts from 1, v starts from 0, and 0 < i+v is less than or equal to K;
s5: repeating the step S4 until i+v=K is stopped, and obtaining M chip reflection signals of the target packaging chip in each reflection receiving area under the state of K preset chips;
according to the M chip reflection signals, determining at least one reflection receiving surface as a target reflection receiving surface;
calculating a reflection distribution density difference of each reflection receiving area in the target reflection receiving surface, and calculating a reflection distribution density difference of the target reflection receiving surface;
and comparing the reflection distribution density difference of each reflection receiving area with a preset first density difference interval, or comparing the reflection distribution density difference of the target reflection receiving surface with a preset second density difference interval, so as to obtain a defect detection result.
2. The method of claim 1, wherein the defect inspection system further comprises a fusion component, a lifting module, a chip fixing module, and a control terminal; the fusion component includes a signal transmitter, a signal receiver, an industrial camera, and a light source.
3. The method of claim 2, wherein determining at least one reflective receiving surface as the target reflective receiving surface comprises:
Extracting M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
calculating the total number of reflection points in each reflection receiving surface according to M chip reflection signals of a target packaging chip in each reflection receiving area under any preset chip state;
comparing the total number of reflection points in each reflection receiving surface with a reflection threshold value in a corresponding preset chip state;
if the total number of reflection points in a certain reflection receiving surface is larger than or equal to the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is taken as a target reflection receiving surface;
and if the total number of reflection points in one reflection receiving surface is smaller than the reflection threshold value corresponding to the preset chip state, the corresponding reflection receiving surface is not used as the target reflection receiving surface.
4. The method of claim 3, wherein calculating the difference in reflection distribution density for each of the reflection receiving areas in the target reflection receiving surface comprises:
acquiring the total number of reflection points of each reflection receiving area and the area of each reflection receiving area;
calculating based on the total number of reflection points and the area of each reflection receiving area to obtain the reflection distribution density of each reflection receiving area;
And calculating the difference value between the reflection distribution density of each reflection receiving area and the local reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of each reflection receiving area.
5. The method of claim 4, wherein calculating the difference in reflection distribution density of the target reflection receiving surface comprises:
acquiring the total number of reflection points of the target reflection receiving surface and the area of the reflection surface of the target reflection receiving surface;
calculating based on the total number of reflection points of the target reflection receiving surface and the area of the reflection surface to obtain the reflection distribution density of the target reflection receiving surface;
and calculating the difference value between the reflection distribution density of the target reflection receiving surface and the global reflection distribution density corresponding to the preset standard to obtain the reflection distribution density difference of the target reflection receiving surface.
6. The semiconductor chip package defect detection method of claim 5, wherein the defect detection result comprises:
if the reflection distribution density difference of any reflection receiving area belongs to a preset first density difference interval, judging that the target packaging chip has no defect; if the reflection distribution density difference of any one of the reflection receiving areas does not belong to the preset first density difference interval, judging that the target packaging chip has defects.
7. The method of claim 6, wherein the defect detection result further comprises:
if the reflection distribution density difference of the target reflection receiving surface belongs to a preset second density difference interval, judging that the target packaging chip has no defect; and if the reflection distribution density difference of the target reflection receiving surface does not belong to the preset second density difference interval, judging that the target packaging chip has defects.
8. The semiconductor chip package defect detection method of claim 7, further comprising:
collecting actual measurement electrical measurement values of each pin on the target packaging chip to obtain a plurality of actual measurement electrical measurement values, and generating electrical measurement coefficients of the target packaging chip according to the plurality of actual measurement electrical measurement values;
extracting the reflection distribution density difference of the target reflection receiving surface under the state of K preset chips, and calculating based on the reflection distribution density difference of the target reflection receiving surface to obtain a defect detection coefficient;
performing comprehensive analysis based on the electrical measurement coefficient and the defect detection coefficient to obtain a chip package defect classification result; the chip package defect classification result comprises a first defect grade mark, a second defect grade mark and a third defect grade mark.
9. The method for detecting a semiconductor chip package defect according to claim 8, wherein the measured electrical value is one of a current value, a voltage value, or a resistance value;
generating an electrical measurement coefficient of the target packaged chip according to a plurality of actually measured electrical measurement values, including:
acquiring a plurality of pre-stored standard electrical measurement values of each pin on a target packaging chip;
and comparing each standard electrical measurement value with a corresponding measured electrical measurement value, and calculating to obtain an electrical measurement coefficient.
10. The method of claim 9, wherein the performing the integrated analysis based on the electrical measurement coefficient and the defect detection coefficient comprises:
calculating a defect comprehensive evaluation coefficient based on the electrical measurement coefficient and the defect detection coefficient;
setting defect comprehensive evaluation thresholds Qt1 and Qt2, wherein Qt1 is less than Qt2, and comparing the defect comprehensive evaluation coefficient with the defect comprehensive evaluation threshold;
if the defect comprehensive evaluation coefficient is smaller than or equal to a defect comprehensive evaluation threshold value Qt1, marking a first defect grade mark corresponding to the target packaging chip; if the defect comprehensive evaluation coefficient is larger than the defect comprehensive evaluation threshold value Qt1 and smaller than the defect comprehensive evaluation threshold value Qt2, marking a second defect grade mark corresponding to the target packaging chip; and if the defect comprehensive evaluation coefficient is greater than or equal to a defect comprehensive evaluation threshold value Qt2, marking a third defect grade mark corresponding to the target packaging chip.
11. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the semiconductor chip package defect detection method of any of claims 1 to 10 when the computer program is executed by the processor.
12. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a computer program which, when executed by a processor, implements the semiconductor chip package defect detection method of any one of claims 1 to 10.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000105671A (en) * | 1998-05-11 | 2000-04-11 | Ricoh Co Ltd | Coordinate input and detecting device, and electronic blackboard system |
| CN102967607A (en) * | 2012-11-28 | 2013-03-13 | 上海华力微电子有限公司 | Defect detection method through optical signal acquisition in different chip areas |
| CN111025072A (en) * | 2019-12-31 | 2020-04-17 | 湘能华磊光电股份有限公司 | Device for detecting photoelectric performance and appearance of chip |
| CN114331980A (en) * | 2021-12-17 | 2022-04-12 | 合肥工业大学 | Non-vision single-pixel imaging system and gloss surface defect detection method |
| CN114813783A (en) * | 2022-03-31 | 2022-07-29 | 慧之安信息技术股份有限公司 | Chip surface flaw detection method |
-
2023
- 2023-09-25 CN CN202311240861.2A patent/CN116990319B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000105671A (en) * | 1998-05-11 | 2000-04-11 | Ricoh Co Ltd | Coordinate input and detecting device, and electronic blackboard system |
| CN102967607A (en) * | 2012-11-28 | 2013-03-13 | 上海华力微电子有限公司 | Defect detection method through optical signal acquisition in different chip areas |
| CN111025072A (en) * | 2019-12-31 | 2020-04-17 | 湘能华磊光电股份有限公司 | Device for detecting photoelectric performance and appearance of chip |
| CN114331980A (en) * | 2021-12-17 | 2022-04-12 | 合肥工业大学 | Non-vision single-pixel imaging system and gloss surface defect detection method |
| CN114813783A (en) * | 2022-03-31 | 2022-07-29 | 慧之安信息技术股份有限公司 | Chip surface flaw detection method |
Non-Patent Citations (1)
| Title |
|---|
| 稀疏重构 SAM 芯片焊点检测方法研究;陆向宁等;《机械工程学报》;第95-102页 * |
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