CN116940000A - Circuit board and manufacturing method thereof - Google Patents

Circuit board and manufacturing method thereof Download PDF

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Publication number
CN116940000A
CN116940000A CN202210364102.6A CN202210364102A CN116940000A CN 116940000 A CN116940000 A CN 116940000A CN 202210364102 A CN202210364102 A CN 202210364102A CN 116940000 A CN116940000 A CN 116940000A
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CN
China
Prior art keywords
board
sub
layer
core
metal layer
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Pending
Application number
CN202210364102.6A
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Chinese (zh)
Inventor
缪日健
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Shennan Circuit Co Ltd
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Shennan Circuit Co Ltd
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Application filed by Shennan Circuit Co Ltd filed Critical Shennan Circuit Co Ltd
Priority to CN202210364102.6A priority Critical patent/CN116940000A/en
Publication of CN116940000A publication Critical patent/CN116940000A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The application discloses a circuit board and a manufacturing method thereof, wherein the circuit board comprises a plurality of first core plates which are arranged in a lamination way, and a second core plate which comprises a first metal layer, a dielectric layer and a second metal layer which are arranged in a lamination way is arranged on the outer layer, the first metal layer is arranged towards the first core plate, and the second metal layer is arranged far away from the first core plate so as to form a first sub-board; drilling a through hole on the first daughter board, and plating metal on the surface of the hole wall of the drilled through hole; etching the second metal layer on the second core plate to expose the dielectric layer; and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer. When the circuit board manufacturing method is used for manufacturing the sub-board, after the copper deposition electroplating is carried out on the surface of the second metal layer on the through hole to form the metal layer with the uneven thickness, the second metal layer is directly etched, the dielectric layer is leaked, the second sub-board is pressed on the surface of the second metal layer, and the first metal layer with the even thickness is used as the signal layer, so that signal transmission among the sub-boards of the multi-layer circuit board is stable, and signal transmission loss is effectively reduced.

Description

Circuit board and manufacturing method thereof
Technical Field
The application relates to the field of circuit board manufacturing, in particular to a circuit board and a manufacturing method thereof.
Background
Printed circuit boards are important electronic connectors, and with the development of electronic products in the directions of multifunction, miniaturization and high performance, the development of circuit boards in the directions of high layering, high density and high signal integrity is also proceeding. The high-level circuit board is usually formed by laminating a plurality of sub-boards.
When the daughter board is manufactured, after the through holes are formed on the daughter board, copper deposition electroplating treatment is carried out on the through holes to enable the through holes to be metallized, in the process of plating metal on the through holes, uneven thickness of metal is covered on the surface of the daughter board, one surface of the daughter board, which is pressed with the other daughter board, is a signal layer, in order to enable signal transmission to be stable and signal transmission loss to be avoided after the two daughter boards are pressed, the thickness of the metal of the signal layer is required to be ensured to be uniform, the traditional treatment method is that after metallized holes are formed, the signal layer is formed into the metal layer with uneven thickness, metal layer thickness of the signal layer is continuously plated on one surface of the signal layer, then the metal layer is etched, so that the thickness of the metal layer serving as the signal layer is reduced, and finally the metal signal layer with uniform thickness is obtained.
However, in the process of increasing the thickness of the metal layer by electroplating and reducing the thickness of the metal layer by etching, it is still difficult to control the final thickness of the metal layer to be uniform, and after the metal layer is used as a signal layer and another sub-board is pressed on the surface of the metal layer, the problem of signal transmission fluctuation and signal transmission loss is unavoidable in the multilayer board.
Disclosure of Invention
The application mainly solves the technical problem of providing a circuit board and a manufacturing method thereof, and aims to solve the problems of signal transmission fluctuation and signal transmission loss caused by uneven thickness of a signal layer of the conventional multilayer board.
In order to solve the technical problems, a first technical scheme adopted by the application is to provide a circuit board manufacturing method, which comprises the following steps: laminating a plurality of first core plates, and arranging a second core plate on the outer layer, wherein the second core plate comprises a first metal layer, a dielectric layer and a second metal layer which are laminated, the first metal layer is arranged towards the first core plate, and the second metal layer is arranged away from the first core plate so as to form a first sub-plate; drilling a through hole on the first daughter board, and plating metal on the surface of the hole wall of the drilled through hole; etching the second metal layer on the second core plate to expose the dielectric layer; and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer.
Wherein, the step of laminating a plurality of first core boards and arranging a second core board on the outer layer specifically comprises: and arranging a second core plate on an outer layer, and bonding a plurality of first core plates and the second core plates through a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mils, the thickness of the first core plate is 6 mils, and the thickness of the second core plate is 2 mils.
Wherein before the step of etching the second metal layer on the second core plate to expose the dielectric layer, the method further comprises: and (3) performing film pasting treatment on the outer layer of the first sub-board far away from the second core board, so as to prevent the outer layer of the first sub-board far away from the second core board from being etched.
The step of laminating a second sub-board on the exposed surface of the dielectric layer specifically comprises the following steps: the second sub-board is another first sub-board, and one exposed surface of the dielectric layer of the first sub-board is contacted and pressed with one exposed surface of the dielectric layer of the other first sub-board.
And the first sub-board and the other first sub-board are contacted and pressed through the second adhesive layer, wherein the total thickness of the unetched part of the second core board of the first sub-board, the unetched part of the second core board of the other first sub-board and the second adhesive layer is controlled to be 6 mils.
Wherein, the step of laminating a plurality of first core boards and arranging a second core board on the outer layer specifically comprises: and arranging a second core plate on the two outer layers, and bonding a plurality of first core plates and the second core plates through a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mils, the thickness of the first core plate is 6 mils, and the thickness of the second core plate is 2 mils.
The second metal layer of the second core plate of the two outer layers of the first sub-plate is etched to expose the dielectric layer.
The second sub-board is a copper foil layer, and the exposed dielectric layers at the two outer layers of the first sub-board are respectively contacted with the pressed copper foil layer.
And the first sub-board and the copper foil layer are contacted and pressed through the third adhesive layer, wherein the total thickness of the unetched parts of the second core plates of the two outer layers of the first sub-board and the contacted third adhesive layer and the copper foil layer is 6 mils.
In order to solve the technical problems, a second technical scheme adopted by the application is to provide a circuit board, and the circuit board is manufactured by the circuit board manufacturing method described in any one of the above.
The beneficial effects of the application are as follows: different from the situation of the prior art, the application provides a circuit board manufacturing method, which comprises the steps of laminating a plurality of first core plates, arranging a second core plate on the outer layer, wherein the second core plate comprises a first metal layer, a dielectric layer and a second metal layer which are laminated, the first metal layer is arranged towards the first core plate, and the second metal layer is arranged away from the first core plate so as to form a first sub-board; drilling a through hole on the first daughter board, and plating metal on the surface of the hole wall of the drilled through hole; etching the second metal layer on the second core plate to expose the dielectric layer; and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer. The application takes the first metal layer of the second core plate as the signal layer and the second metal layer as the auxiliary layer, the first metal layer is a circuit pattern with uniform thickness, after the copper deposition plating is carried out on the surface of the second metal layer to form the metal layer with non-uniform thickness on the through holes in the process of manufacturing the sub-board, the second metal layer is directly etched, the dielectric layer is leaked, the second sub-board is pressed on the surface of the dielectric layer, and the first metal layer with uniform thickness is taken as the signal layer, so that the signal transmission among the sub-boards of the multi-layer circuit board is stable, and the signal transmission loss is effectively reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Wherein:
FIG. 1 is a schematic flow chart of a first embodiment of a circuit board manufacturing method according to the present application;
FIGS. 2 a-2 d are schematic flow diagrams illustrating a second embodiment of a method for fabricating a circuit board according to the present application;
FIG. 3 is a flow chart of a third embodiment of a method for fabricating a circuit board according to the present application;
fig. 4 is a schematic structural diagram of an embodiment of a circuit board of the present application.
Reference numerals: 200. a first sub-board; 210/410, a first core plate; 220. a second core plate; 221/421, a first metal layer; 222/422, dielectric layer; 223. a second metal layer; 230. a first adhesive layer; 240. a second adhesive layer; 450. and a copper foil layer.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to fall within the scope of the present application.
The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plurality" generally includes at least two, but does not exclude the case of at least one.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It should be understood that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
In the existing multilayer circuit board, uneven thickness of the metal layer of the outer layer is easy to cause when a daughter board metallization hole is manufactured, and after another daughter board is pressed, the uneven thickness of the metal layer is used as a signal layer, so that signal transmission fluctuation and signal transmission loss can be caused.
Based on the above problems, the present application provides a circuit board and a manufacturing method thereof, which can effectively solve the above problems.
The following describes a circuit board and a manufacturing method thereof in detail with reference to the drawings and embodiments.
Referring to fig. 1, fig. 1 is a flow chart of a first embodiment of a circuit board manufacturing method according to the present application. In one aspect of the application, a method of manufacturing a circuit board is provided. Referring to fig. 1 in combination, in a specific embodiment, the method for manufacturing a circuit board of the present application includes:
s11: and stacking a plurality of first core plates, and arranging a second core plate on the outer layer, wherein the second core plate comprises a first metal layer, a dielectric layer and a second metal layer which are stacked, the first metal layer is arranged towards the first core plate, and the second metal layer is arranged away from the first core plate so as to form a first sub-board.
Specifically, two first core plates are arranged in a stacked manner in the present embodiment, and three, four, or more first core plates may be arranged in a stacked manner in other embodiments. The first core plate is also coated with a metal layer on both sides. The metal layers on the two sides of the first core plate and the first metal layer and the second metal layer on the two sides of the second core plate can be made of one of copper, aluminum, gold, silver and other materials and alloys thereof or metal filling organic matters, in the embodiment, the metal materials are copper, and the first core plate and the second core plate are double-sided copper-clad plates. After the first sub-board is formed, the first metal layer of the second core board is used as a signal layer, and the metal layers on both sides of the first core board are conductive layers, so that the first sub-board has logic circuits meeting different functions, and the first metal layer and the metal layers on both sides of the first core board need to be subjected to pattern manufacturing before lamination, and specifically, etching treatment can be performed after film pasting, exposure and development. After the first core board and the second core board are pressed through graphic processing, the method further comprises blanking processing, specifically, the laminated and pressed plate is placed on a blanking machine, and a first sub-board with the required specification and size is cut out according to the required production size to form the first sub-board.
S12: and (3) drilling a through hole on the first daughter board, and plating metal on the surface of the hole wall of the drilled through hole.
This step is to form a metallized hole, and the layers of the first daughter board are electrically connected using the metallized hole formed. In order to improve the accuracy of the metallized holes, in this embodiment, a target is first shot at a preset position on the first daughter board by using a target shooting machine, and then a through hole is formed by drilling by using a special drilling machine. Wherein, the metal material can be one of copper, aluminum, gold, silver and other materials and alloys thereof or metal filling organic matters, in the embodiment, the metal material is copper, and the copper plating process can be specifically electroplating after copper deposition. The copper deposition is to soak the first sub-board in copper deposition liquid to make the hole wall of the through hole covered with a layer of thin copper, and then to thicken the thin copper layer by electroplating. The number and the positions of the through holes are adjusted according to the design requirements of the logic circuit.
It can be understood that, in the copper plating process of plating metal on the wall surface of the through hole, it is difficult to avoid forming a plurality of copper on the second metal layer of the second core board of the first daughter board, and the copper is a thin layer with uneven thickness, and finally the thickness of the second metal layer is uneven.
Further, in one embodiment, after the processing of the through holes and the metallized through holes on the first plate, the processing further includes back drilling the through holes. The back drilling treatment is to use a drill bit with larger hole diameter than the through hole to drill the depth control, and remove the metal on the wall of the metallized through hole in a certain depth. The back drilling treatment is performed because the electric connection between the signal layers of the conductive layers of the first daughter board is logically designed according to the requirements, not all the layers need to be electrically connected through a through hole, and the conductive layers which do not need to be electrically connected are disconnected by removing metal on the hole wall between the two through holes after the back holes are drilled, so that the design requirements of a logic circuit are met.
Further, after forming the metallized through holes, the through holes also need to be plugged with resin and leveled. Specifically, the process is that after the through holes are filled with resin materials, the resin materials are baked to be solidified, and finally the solidified resin overflowed from the through holes is shoveled. In this embodiment, the resin material is epoxy resin, and the advantage of plugging the resin is that the cured epoxy resin is formed to fill the metallized through holes to protect the through holes.
S13: the second metal layer on the second core plate is etched to expose the dielectric layer.
In the foregoing step, in the process of plating metal on the hole wall of the through hole, uneven metal is inevitably formed in the second metal layer, and when another plate is laminated on the uneven metal layer, the layer is used as a signal layer, which causes the problems of signal transmission fluctuation and signal transmission loss. The existing treatment scheme is to continuously electroplate the surface of the second metal layer with uneven thickness to increase the thickness of the second metal layer, and then etch and thin the second metal layer to the target layer thickness, but electroplating to thicken the second metal layer and etch and thin the second metal layer are difficult to make the second metal layer with even thickness finally. There are still problems of signal transmission loss and fluctuation.
In this embodiment, the second metal layer with uneven thickness on the outer surface of the second core plate is used as the auxiliary layer, the patterned first metal layer with even thickness on the inner surface is used as the signal layer, and the second metal layer with uneven thickness is directly etched and removed. The etching of the second metal layer on the second core plate is to chemically etch the second metal layer through etching liquid to remove the second metal layer, and the dielectric layer is leaked.
S14: and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer.
Specifically, one exposed surface of the dielectric layer of the first sub-board is pressed with the second sub-board, and the first sub-board and the second sub-board are pressed and fixed through an adhesive layer.
In this embodiment, after the first sub-board and the second sub-board are pressed together, the method further includes processing through holes and metallized through holes on the pressed board. The conductive layers and the signal layers of the first sub-board are electrically connected with the second sub-board through the metallized through holes. The number and the positions of the through holes are adjusted according to the requirements.
Further, in an embodiment, after the processing of drilling the through holes and the metallized through holes on the pressing plate, the method further includes drilling back the through holes. The back drilling treatment is to use a drill bit with larger hole diameter than the through hole to drill the depth control, and remove the metal on the wall of the metallized through hole in a certain depth. The drilling back drilling treatment is because the electric connection between the signal layers of all the conductive layers of the laminated plate is logically designed according to the requirement, not all the layers need to be electrically connected through a through hole, and the conductive layers which do not need to be electrically connected are disconnected by removing metal on the hole wall between the two through holes after the back holes are drilled, so that the design requirement of a logic circuit is met.
According to the circuit board manufacturing method, the second core board is arranged on one side of the first sub-board in a laminated mode, the second core board comprises the first metal layer of the inner layer and the second metal layer of the outer layer, the first metal layer is a circuit pattern with uniform thickness, in the manufacturing process of the sub-board, after copper deposition electroplating is carried out on the surface of the second metal layer through holes to form the metal layer with non-uniform thickness, the second metal layer is directly etched, the dielectric layer is leaked, the second sub-board is pressed on the surface of the dielectric layer, the first metal layer with uniform thickness is used as the signal layer, signal transmission among the sub-boards of the multi-layer circuit board is stable, and signal transmission loss is effectively reduced.
Referring to fig. 2 a-2 d, fig. 2 a-2 d are schematic flow diagrams of a second embodiment of a circuit board manufacturing method according to the present application.
Referring to fig. 2a, a plurality of first core plates 210 are stacked, and a second core plate 220 is disposed on an outer layer, the second core plate 220 includes a first metal layer 221, a dielectric layer 222 and a second metal layer 223 which are stacked, the first metal layer 221 is disposed towards the first core plate 210, the second metal layer 223 is disposed away from the first core plate 210 to form a first sub-plate 200, and the plurality of first core plates 210 and the second core plate 220 are bonded by a first adhesive layer 230, wherein the thickness of the first adhesive layer 230 is controlled to be 6 mils, the thickness of the first core plate 210 is 6 mils, and the thickness of the second core plate 220 is 2 mils.
In this embodiment, the first daughter board 200 includes two first core boards 210, and in other embodiments, the first daughter board 200 may include three, four, or more first core boards 210 stacked together. A second core board 220 is provided on one side of the first sub-board 200. The material of the first adhesive layer 230 is PP glue, and in other embodiments, the first adhesive layer 230 may be other insulating glue. Wherein, controlling the thickness of each first core board 210 to be the same as that of each first adhesive layer 230 can make the thickness between the layers of the final multi-layer board consistent, and ensure consistent and stable signal transmission rate between the layers.
In order to make the first sub-board 200 have logic circuits with different functions, the metal layers on both sides of the first metal layer 221 and the first core board 210 need to be patterned before lamination, which may be specifically performed by etching after film pasting, exposure and development, as in S11 in the first embodiment. After the first core board 210 and the second core board 220 are laminated by the graphics processing, the processing further includes a blanking process, specifically, the laminated and laminated board is placed on a blanking machine, and the first sub-board 200 with the required specification and size is cut out according to the required size of production, so as to form the first sub-board 200.
Referring to fig. 2b, the first sub-board 200 is processed by drilling a through hole (not shown) and plating metal on the wall surface of the drilled through hole.
The step is referred to step S12, and will not be described here.
Referring to fig. 2c, the outer layer of the first sub-board 200 away from the second core board (not shown) is coated to prevent the outer layer of the first sub-board 200 away from the second core board from being etched. A second metal layer (not shown) on the second core plate is etched to expose dielectric layer 222.
Specifically, in this embodiment, the second core board is laminated on one side of the first sub-board 200, the first core board 210 is laminated on the other side of the first sub-board 200, and then the other board is laminated on the side of the first sub-board 200 on which the second core board is disposed, so that the metal of the signal layer on the side of the other board needs to be ensured to be flat, only the second metal layer on the second core board needs to be etched during etching, and the dielectric layer 222 is leaked, so that the film is stuck on the first core board 210 on the other side of the first sub-board 200 to effectively protect the metal layer of the first core board 210 from being etched when being infected in the etching solution.
Referring to fig. 2d, a second sub-board is obtained, and the second sub-board is pressed on the exposed surface of the dielectric layer 222. The second sub-board is another first sub-board, and the exposed surface of the dielectric layer 222 of the first sub-board (not shown) is contacted and pressed together with the exposed surface of the dielectric layer 222 of the other first sub-board.
Specifically, in this embodiment, the dielectric layer 222 exposed after the etching of the two first sub-boards is pressed together by one surface contact, wherein the first sub-boards and the other first sub-boards are pressed by the second adhesive layer 240 by contact, and the total thickness of the unetched portion of the second core board (not shown) of the first sub-board, the unetched portion of the second core board of the other first sub-board and the second adhesive layer 240 is controlled to be 6 mils. The total thickness of the unetched portion of the second core board of the first sub-board, the unetched portion of the second core board of the other first sub-board, and the second adhesive layer 240 is controlled to be 6 mils, and the thickness is the same as the thickness of the first core board 210 and the thickness of the first adhesive layer 230 in the first sub-board, and the thickness between the layers of the final multi-layer board is consistent, so that the consistent and stable signal transmission rate between the layers is ensured. The second adhesive layer 240 is made of PP glue, and in other embodiments, the second adhesive layer 240 may be other insulating glue.
The step S14 is the same as that of the first embodiment, and the step S further includes drilling and metallizing the through holes on the laminated board after laminating the first sub-board and the other first sub-board. Each conductive layer and the signal layer of the first sub-board are electrically connected with the other first sub-board through the metallized through holes. The number and the positions of the through holes are adjusted according to the requirements. Further, the back drilling treatment of the metallized through holes can be included, and the description is not repeated here.
Further, in this embodiment, after the second core board is disposed on one side of the first sub-board, the second metal layer of the second core board is etched, and another first sub-board, which is also disposed on one side of the second core board, is pressed onto the exposed dielectric layer 222. In other embodiments, the second core plates may be disposed on two sides of the first sub-board, the second core plates on two sides are etched to remove the second metal layer, and then another sub-board is laminated on two sides of the first sub-board, where the difference between the other sub-board and the first sub-board is that only one side of the other sub-board is disposed with the second core plate and is processed by etching the second metal layer, and finally the composite board is composed of three sub-boards, and the sub-board located in the middle layer and the sub-boards on two sides are laminated together as the signal layer through the first metal layer 221 with uniform thickness.
According to the circuit board manufacturing method, the second core board is arranged on one side of the first sub-board in a laminated mode, the second core board comprises the first metal layer of the inner layer and the second metal layer of the outer layer, the first metal layer is a circuit pattern with uniform thickness, in the manufacturing process of the sub-board, after copper deposition electroplating is carried out on the surface of the second metal layer through holes to form the metal layer with non-uniform thickness, the second metal layer is directly etched, the dielectric layer is leaked, another first sub-board which is processed in the same mode is pressed on the surface of the dielectric layer, the first metal layer with the uniform thickness is used as the signal layer, signal transmission among the multi-layer circuit board sub-boards formed by the sub-boards is stable, and signal transmission loss is effectively reduced.
Referring to fig. 3, fig. 3 is a flow chart of a third embodiment of a circuit board manufacturing method according to the present application.
S31: and laminating a plurality of first core plates, arranging second core plates on two outer layers, wherein the second core plates comprise first metal layers, dielectric layers and second metal layers which are laminated, the first metal layers are arranged towards the first core plates, the second metal layers are arranged far away from the first core plates so as to form first sub-plates, bonding the plurality of first core plates and the second core plates through first adhesive layers, and arranging the second core plates on the two outer layers, wherein the thickness of the first adhesive layers is controlled to be 6 mils, the thickness of the first core plates is controlled to be 6 mils, and the thickness of the second core plates is controlled to be 2 mils.
In this embodiment, the first sub-board includes two first core boards, and in other embodiments, the first sub-board may also include three, four or more first core boards stacked together. In this embodiment, the second core board is disposed on both sides of the first sub-board, and in order to make the first sub-board have logic circuits with different functions, the first metal layer and the metal layers on both sides of the first core board need to be patterned before lamination, which may be specifically performed by etching after film pasting, exposure and development. After the first core board and the second core board are pressed through graphic processing, the method further comprises blanking processing, specifically, the laminated and pressed plate is placed on a blanking machine, and a first sub-board with the required specification and size is cut out according to the required production size to form the first sub-board.
S32: and (3) drilling a through hole on the first daughter board, and plating metal on the surface of the hole wall of the drilled through hole.
The step is referred to step S12, and will not be described here.
S33: etching the second metal layer of the second core plate of the two outer layers of the first sub-plate to expose the dielectric layer.
Specifically, unlike the second embodiment, in this embodiment, the second core board is pressed on both sides of the first daughter board, and before etching treatment, the second metal layers of the second core board on the two outer layers of the first daughter board are etched without dry film protection treatment, so that the dielectric layers on both sides are leaked.
S34: and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer. The second sub-board is a copper foil layer, and the exposed dielectric layers at the two outer layers of the first sub-board are respectively contacted with and pressed with the copper foil layer.
Specifically, in this embodiment, the copper foil layer is pressed on the dielectric layers on both sides exposed after the etching of the first sub-board. And the first sub-board and the copper foil layer are contacted and pressed through the third adhesive layer, and the total thickness of the unetched parts of the second core plates of the two outer layers of the first sub-board and the contacted third adhesive layer and the copper foil layer is controlled to be 6 mils. The unetched part of the second core plate of the outer layer of the first sub-board and the total thickness of the third adhesive layer and the copper foil layer which are contacted with the unetched part are controlled to be 6-density, the thickness of the unetched part is the same as the thickness of the first core plate in the first sub-board and the thickness of the first adhesive layer, the thickness of the interlayer dielectric thicknesses of the final multi-layer boards are consistent, and the consistent and stable signal transmission rate among all layers is ensured. The third adhesive layer is made of PP glue, and in other embodiments, the third adhesive layer may be other insulating glue.
The step S14 is the same as that of the first embodiment, and the step S further includes drilling and metallizing the through holes on the laminated board after laminating the first sub-board and the copper foil layer. The conductive layers and the signal layers of the first sub-board are electrically connected with the copper foil layer through metallized through holes. The number and the positions of the through holes are adjusted according to the requirements. Further, the back drilling treatment of the metallized through holes can be included, and the description is not repeated here.
According to the circuit board manufacturing method, the second core boards are arranged on the two sides of the first sub-board in a laminated mode, the second core boards comprise the first metal layer of the inner layer and the second metal layer of the outer layer, the first metal layer is a circuit pattern with uniform thickness, in the manufacturing process of the sub-board, after copper deposition electroplating is carried out on the surfaces of the second metal layers through holes to form the metal layers with non-uniform thickness, the second metal layers on the two sides are directly etched, the dielectric layers are leaked, copper foil layers are pressed on the two surfaces, the first metal layers with the two uniform thicknesses are used as signal layers, so that signal transmission between the multi-layer circuit board and the multi-layer circuit board is stable, and signal transmission loss is effectively reduced.
Correspondingly, the application further provides a circuit board. Referring to fig. 4 in combination, in one embodiment, the circuit board of the present application includes:
the first sub-board (not shown) includes a first core board 410 stacked and provided with a first metal layer 421 on both sides thereof, and a copper foil layer 450 on both sides of the first metal layer 421. The circuit board provided by the application is characterized in that the second core plates are arranged on two sides of the first sub-board in a lamination manner, the second core plates comprise the first metal layer 421 of an inner layer and the second metal layer of an outer layer, the first metal layer 421 is a circuit pattern with uniform thickness, in the manufacturing process of the sub-board, after copper deposition and electroplating are carried out on the surfaces of the second metal layers to form the metal layers with non-uniform thickness, the second metal layers on the two sides are directly etched, a medium layer is leaked, the copper foil layers 450 are laminated on the two surfaces, and the first metal layers 421 with the two uniform thicknesses are used as signal layers, so that the signal transmission between the multi-layer circuit board and the multi-layer circuit board is stable, and the signal transmission loss is effectively reduced.
The foregoing description is only of embodiments of the present application and is not intended to limit the scope of the application, and all equivalent structures or equivalent principle changes made by the specification and drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the present application.

Claims (10)

1. A method of manufacturing a circuit board, comprising:
laminating a plurality of first core plates, and arranging a second core plate on the outer layer, wherein the second core plate comprises a first metal layer, a dielectric layer and a second metal layer which are laminated, the first metal layer is arranged towards the first core plate, and the second metal layer is arranged far away from the first core plate so as to form a first sub-board;
drilling a through hole on the first daughter board, and plating metal on the surface of the wall of the drilled through hole;
etching the second metal layer on the second core plate to expose the dielectric layer;
and obtaining a second sub-board, and pressing the second sub-board on the exposed surface of the dielectric layer.
2. The method of manufacturing a circuit board according to claim 1, wherein the step of stacking a plurality of first core boards and disposing a second core board on an outer layer comprises:
and arranging a second core board on one outer layer, and bonding a plurality of first core boards and the second core boards through a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mils, the thickness of the first core board is 6 mils, and the thickness of the second core board is 2 mils.
3. The method of claim 2, wherein prior to the step of etching the second metal layer on the second core plate to expose the dielectric layer, further comprising:
and the outer layer of the first sub-board far away from the second core board is prevented from being etched by the outer layer film pasting treatment.
4. The method for manufacturing a circuit board according to claim 3, wherein the step of laminating the second sub-board on the exposed surface of the dielectric layer specifically comprises:
the second sub-board is another first sub-board, and one exposed surface of the dielectric layer of the first sub-board is contacted and pressed with one exposed surface of the dielectric layer of the other first sub-board.
5. The method of manufacturing a circuit board as defined in claim 4, wherein,
and pressing the first sub-board and the other first sub-board through contact of a second adhesive layer, wherein the total thickness of the unetched part of the second core board of the first sub-board, the unetched part of the second core board of the other first sub-board and the second adhesive layer is controlled to be 6 mils.
6. The method of manufacturing a circuit board according to claim 1, wherein the step of stacking a plurality of first core boards and disposing a second core board on an outer layer comprises:
and arranging a second core plate on the two outer layers, and bonding a plurality of first core plates and the second core plates through a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mils, the thickness of the first core plate is 6 mils, and the thickness of the second core plate is 2 mils.
7. The method of manufacturing a circuit board according to claim 6, wherein,
etching the second metal layer of the second core plate of the two outer layers of the first sub-board to expose the dielectric layer.
8. The method of manufacturing a circuit board according to claim 7, wherein,
the second sub-board is a copper foil layer, and the dielectric layers exposed on the two outer layers of the first sub-board are respectively contacted and pressed with the copper foil layer.
9. The method of manufacturing a circuit board according to claim 8, wherein,
and pressing the first sub-board and the copper foil layer through contact of a third adhesive layer, wherein the unetched parts of the second core boards of the two outer layers of the first sub-board and the total thickness of the third adhesive layer and the copper foil layer contacted with the unetched parts are controlled to be 6 mils.
10. A circuit board, characterized in that the circuit board is manufactured by the circuit board manufacturing method according to any one of claims 1-9.
CN202210364102.6A 2022-04-07 2022-04-07 Circuit board and manufacturing method thereof Pending CN116940000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210364102.6A CN116940000A (en) 2022-04-07 2022-04-07 Circuit board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210364102.6A CN116940000A (en) 2022-04-07 2022-04-07 Circuit board and manufacturing method thereof

Publications (1)

Publication Number Publication Date
CN116940000A true CN116940000A (en) 2023-10-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210364102.6A Pending CN116940000A (en) 2022-04-07 2022-04-07 Circuit board and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN116940000A (en)

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