CN116825874A - Photodiode, manufacturing method thereof and electronic element - Google Patents

Photodiode, manufacturing method thereof and electronic element Download PDF

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Publication number
CN116825874A
CN116825874A CN202311043382.1A CN202311043382A CN116825874A CN 116825874 A CN116825874 A CN 116825874A CN 202311043382 A CN202311043382 A CN 202311043382A CN 116825874 A CN116825874 A CN 116825874A
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China
Prior art keywords
dielectric layer
layer
pinning
photodiode
region
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CN202311043382.1A
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施长治
司华青
闫旭亮
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Shanghai Lianying Microelectronics Technology Co ltd
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Shanghai Lianying Microelectronics Technology Co ltd
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Priority to CN202311043382.1A priority Critical patent/CN116825874A/en
Publication of CN116825874A publication Critical patent/CN116825874A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

The invention relates to a photodiode, a method for manufacturing the same, and an electronic component. The photodiode includes: the first dielectric layer is provided with a first doping type; the second dielectric layer extends into the first dielectric layer along the first direction and has a second doping type; and the pinning layer extends into the second dielectric layer along the first direction, has a first doping type and a doping concentration greater than that of the first dielectric layer, and comprises a pinning region body and mesh channels corresponding to the second dielectric layer. The photodiode can realize the improvement of quantum efficiency while clamping dark current.

Description

Photodiode, manufacturing method thereof and electronic element
Technical Field
The present invention relates to the field of semiconductor technology, and in particular, to a photodiode, a method of manufacturing the photodiode, and an electronic component.
Background
Photodiodes are used in electronic products such as image sensors, and the performance of the photodiodes affects imaging performance. The depletion region width of the photodiode and the interface states have a decisive influence on the quantum efficiency and dark current performance of the device.
In the conventional photodiode technology, in order to effectively suppress the dark current, a heavily doped thin layer structure having the same conductivity type as that of the epitaxial layer is generally prepared on the upper layer of the minority carrier collecting region (injection region) of the photodiode, so-called a pinned diode structure is formed. On one hand, the width of the depletion region can be clamped by fully depleting the minority carrier collecting region, and the change of dark current along with bias voltage is also inhibited; on the other hand, the depletion region boundary of the photodiode is not contacted with the interface of the surface passivation layer, so that the influence of interface states is reduced or eliminated. However, the photodiode having the pinning structure is generally a shallow junction device, i.e., the width of the minority carrier collecting region and the width of the depletion region are limited. This causes the quantum efficiency of the front-side incident type device for long wavelength light and the quantum efficiency of the back-side incident type device for short wavelength light to be affected.
In the case of a fully depleted photodiode, the entire epitaxial layer is fully depleted in order to increase the collection efficiency of the photo-generated carriers and minimize the transit time and length of the minority carriers. So that generally the dark current level is very low which is difficult to control.
Disclosure of Invention
Accordingly, it is necessary to provide a photodiode, a method of manufacturing the same, and an electronic device for improving the overall performance of the photodiode.
The present invention provides a photodiode including: the first dielectric layer is provided with a first doping type; the second dielectric layer extends into the first dielectric layer along the first direction and has a second doping type; and the pinning layer extends into the second dielectric layer along the first direction, has a first doping type and a doping concentration greater than that of the first dielectric layer, and comprises a pinning region body and mesh channels corresponding to the second dielectric layer.
According to the photodiode provided by the invention, the pinning layer is arranged, so that the full depletion of the minority carrier collecting area corresponding to the pinning area body is ensured to inhibit dark current; meanwhile, an unpinned island-shaped array structure is formed in the minority carrier collecting area through the arrangement of the mesh channels, and the width of the depletion area at the minority carrier collecting area corresponding to the island-shaped array structure is locally widened, so that the collection efficiency of photo-generated minority carriers is improved, and the overall quantum efficiency of the device is improved. The photodiode provided by the invention can realize the improvement of quantum efficiency while clamping dark current. Illustratively, the quantum efficiency may be improved by 10%.
In some embodiments, the plurality of mesh channels are arranged in an array within a vertical plane of the first direction.
The mesh channels can be distributed more uniformly, different positions of the second dielectric layer are regulated and controlled, the collection effect of photo-generated minority carriers is ensured, and meanwhile, the coverage range of the pinning area body is ensured, so that dark current is comprehensively controlled, and an unpinned island-shaped array structure can be surrounded.
Illustratively, the spacing between two adjacent mesh channels is greater than the dimension of the mesh channel in the second direction along a second direction perpendicular to the first direction.
By the arrangement, the working performance of the photodiode can be ensured.
In some embodiments, the ratio of the area of all mesh channels in the perpendicular to the first direction to the area of the pinning region body ranges from 1% to 40%.
By the arrangement, the dark current can not be increased obviously while the quantum efficiency is improved.
Illustratively, the value of the doping concentration of the pinning layer is greater than the value of the doping concentration of the second dielectric layer.
This arrangement helps to ensure the pinning effect of the pinning layer on the second dielectric layer.
Illustratively, the ratio of the area of the overall mesh channel in the perpendicular to the first direction to the area of the pinning region body ranges from 2.5% to 10%.
By the arrangement, distribution of mesh channels can be better realized, quantum efficiency is guaranteed, and dark current is clamped.
In some embodiments, the photodiode further comprises a first contact region, a second contact region, an insulating layer, a first electrode, and a second electrode; the first contact region extends into the first dielectric layer along the first direction, and has a first doping type and a doping concentration greater than that of the first dielectric layer; the second contact region extends into the second dielectric layer along the first direction, and has a second doping type and a doping concentration greater than that of the second dielectric layer; the pinning layer comprises an electrode window, and the second contact region is positioned in the electrode window; the pinning layer protrudes out of the second dielectric layer and is electrically connected with the first dielectric layer along a second direction perpendicular to the first direction; the insulating layer is positioned on one side of the pinning layer, which is opposite to the first dielectric layer, along the first direction; the first electrode penetrates through the insulating layer along the first direction and is in electrical contact with the first contact area so as to be electrically connected with the first dielectric layer; the second electrode penetrates through the insulating layer along the first direction and is electrically contacted with the second contact region so as to be electrically connected with the second dielectric layer.
The photodiode provided by the invention has a simple structure and is easy to manufacture. The first electrode and the second electrode are arranged on the same side, and in addition, the pinning layer is electrically connected with the first dielectric layer, so that the first electrode can be shared, and the compact design of the circuit structure is facilitated. In addition, the first contact region and the second contact region are easy to form, and the electrical performance of the photodiode can be improved.
In some embodiments, the photodiode further includes a first anti-reflection film, a first passivation layer, and a substrate, the first anti-reflection film and the first passivation layer are sequentially stacked on a side of the insulating layer facing away from the pinning layer, and the substrate is located on a side of the first dielectric layer facing away from the pinning layer along the first direction.
Embodiments of the present invention provide a front-side-incident photodiode that is easy to manufacture and reliable in performance.
In some embodiments, the photodiode further includes a passivation film, a second anti-reflection film, and a second passivation layer, which are sequentially stacked on a side of the first dielectric layer opposite to the pinning layer along the first direction.
Embodiments of the present invention provide a back-side-incident photodiode having a large incident area and high quantum efficiency.
The present invention also provides an electronic component including: a circuit; and the photodiode is electrically connected with the circuit.
The electronic element provided by the invention has reliable electrical performance and can realize higher quantum efficiency.
Another aspect of the present invention provides a method for manufacturing a photodiode, the method comprising: forming a first dielectric layer, wherein the first dielectric layer has a first doping type; forming a second dielectric layer extending into the first dielectric layer along the first direction, wherein the second dielectric layer has a second doping type; and forming a pinning layer extending into the second dielectric layer along the first direction, the pinning layer having a first doping type and a doping concentration greater than that of the first dielectric layer, the pinning layer including a pinning region body and mesh channels corresponding to the second dielectric layer.
The method provided by the invention forms the pinning region body and the mesh channel through the ion implantation process, can easily and accurately form the pinning layer, and the manufactured photodiode has the advantages of controllable cost, stable performance and high quantum efficiency.
Illustratively, the value of the doping concentration of the pinning layer is greater than the value of the doping concentration of the second dielectric layer.
This arrangement helps to ensure the pinning effect of the pinning layer on the second dielectric layer.
In some embodiments, the step of forming the first dielectric layer includes: forming a first dielectric layer positioned on one side of a substrate; the method further comprises the steps of: removing the substrate; forming an antireflection film which is positioned on one side of the first dielectric layer, which is back to the pinning layer, along the first direction; and forming a passivation layer positioned on one side of the antireflection film, which is opposite to the first dielectric layer, along the first direction.
The method provided by the invention can manufacture the back incidence type photodiode.
Drawings
Fig. 1 is a schematic structural diagram of a front-side incident photodiode according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a backside incident photodiode according to an embodiment of the present invention;
FIG. 3 is a schematic block diagram of an electronic component provided in an embodiment of the invention;
fig. 4 is a flow chart of a method for manufacturing a photodiode according to an embodiment of the present invention.
Reference numerals illustrate: 1. a first dielectric layer; 2. a second dielectric layer; 21. a first portion; 22. a second portion; 23. a third section; 3. pinning the layer; 31. a pinning region body; 32. mesh channels; 33. an electrode window; 4. a first contact region; 5. a second contact region; 6. an interconnect layer; 7. a first electrode; 8. a second electrode; 9. an insulating layer; 10. a depletion region; 11. a substrate; 12. a second passivation layer;
100. a photodiode; 200. a circuit; 300. an electronic component.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the invention. The embodiments of the invention may be implemented in many other ways than those herein described, and similar modifications may be made by one skilled in the art without departing from the spirit of the invention, so that the embodiments of the invention are not limited to the specific examples of embodiments disclosed below.
In the description of the embodiments of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the embodiments of the present invention and simplify description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the embodiments of the present invention.
In embodiments of the invention, unless expressly specified and limited otherwise, a first feature "up" or "down" on a second feature may be that the first and second features are in direct contact, or that the first and second features are in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. The first passivation layer may also be referred to as a second passivation layer, and the second passivation layer may also be referred to as a first passivation layer, for example. In the description of the embodiments of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the embodiments of the present invention, unless explicitly specified and limited otherwise, the terms "connected," "connected," and the like are to be construed broadly and include, for example, fixedly connected, detachably connected, or integrally formed therewith; can be flexible connection or rigid connection along at least one direction; can be mechanically or electrically connected; either directly, indirectly, through intermediaries, or both, or in which case the intermediaries are present, or in which case the two elements are in communication or in which case they interact, unless explicitly stated otherwise. The terms "mounted," "disposed," "secured," and the like may be construed broadly as connected. The specific meaning of the above terms in the embodiments of the present invention will be understood by those skilled in the art according to specific circumstances.
As used herein, the terms "layer," "region" and "regions" refer to portions of material that include regions having a certain thickness. The layers can extend horizontally, vertically and/or along a tapered surface. The layer can be a region of uniform or non-uniform continuous structure, whose thickness perpendicular to the direction of extension may be no greater than the thickness of the continuous structure. The layer can include multiple layers. The various regions in the figures, the shapes of the layers and their relative sizes and positional relationships are exemplary only, as may be subject to variations due to manufacturing tolerances or technical limitations, and may be adjusted to actual requirements.
Referring to fig. 1, fig. 1 illustrates a photodiode in an embodiment of the present invention, which may be a front-side-incident photodiode. The photodiode 100 provided by the embodiment of the invention comprises a first dielectric layer 1, a second dielectric layer 2 and a pinning layer 3 which are sequentially stacked along the Z-axis direction. The Z-axis direction may be referred to as a first direction.
The photodiode 100 may be fabricated as a unitary structure, and illustratively, its upper end surface in the figures may be referred to as the front surface, and its lower end surface as the back surface, the designations of front and back surfaces being for convenience and not necessarily limiting or implying the pose of the photodiode 100 at the time of fabrication or use. The photodiode 100 may have a first region a, a second region B, and a third region C in the XY plane. The first dielectric layer 1, the second dielectric layer 2 and the pinning layer 3 are stacked at least at the first region a.
The first dielectric layer 1 may have a first doping type, which is one of N-type doping and P-type doping, or one of electron-type doping and hole-type doping, for example hole-type doping. The second dielectric layer 2 may have a second doping type, which is different from the first doping type. In other words, the second dielectric layer 2 has a conductivity type opposite to that of the first dielectric layer 1.
At the first area a and the third area C, the first dielectric layer 1 and the second dielectric layer 2 may be stacked along the Z-axis direction, and form a pn junction therebetween, so as to form a photodetection structure, and realize the function of a photodetection diode. Illustratively, the second dielectric layer 2 extends into the first dielectric layer 1 as a whole, and the upper end of the portion of the first dielectric layer 1 at the second region B may be coplanar with the upper end of the second dielectric layer 2.
The pinning layer 3 has a first doping type, the doping concentration of the pinning layer 3 being, for example, greater than the doping concentration of the first dielectric layer 1. The doping concentration herein may refer to an effective doping concentration. The pinning layer 3 and the second dielectric layer 2 may be used to form a pinning structure, and may implement a pinning diode effect. Illustratively, the value of the doping concentration of the pinning layer 3 is greater than the value of the doping concentration of the second dielectric layer 2 to ensure the pinning effect of the pinning layer 3 on the second dielectric layer 2. The circuit structure of the pinned diode and the photodiode may be a parallel structure.
As shown in fig. 1, the pinning layer 3 includes a pinning region body 31 and mesh channels 32 corresponding to the second dielectric layer 2. The pinning layer 3 extends into the second dielectric layer 2 in a first direction, illustratively the pinning region body 31 extends into the second dielectric layer 2 in stacked and electrical connection with the first portion 21 of the second dielectric layer 2; and mesh channels 32 are used to receive second portions 22 of second dielectric layer 2. The upper end of the second portion 22 may be coplanar with the upper end of the pinning region body 31.
As shown in fig. 1, the photodiode 100 provided in the embodiment of the present invention can realize the depletion region 10 by integrating a photodiode and a local pinned diode. In the pinning region body 31, the boundary of the depletion region 10 is far away from the front surface of the pinning layer 3 due to the higher doping concentration of the pinning region body 31, so that the influence of interface states and surface recombination on the performance of the photodiode 100 is suppressed. Full depletion of the portion of the first portion 21 of the second dielectric layer 2 corresponding to the pinning region body 31 may occur with little expansion of the depletion region 10 to the second portion 22. The portion of the first portion 21 corresponding to the mesh channel 32 may realize an island region. The island region is surrounded by the depletion region 10 in the vertical plane of the Z axis. A wider depletion region width is obtained in the first dielectric layer 1 in the portion corresponding to the mesh channel 32, i.e. the boundary in the depletion region 10 at the corresponding mesh channel 32 is more convex than the boundary at the corresponding pinning region body 31. The widening of the width of the depletion region 10 achieves a local quantum efficiency enhancement effect of the photodiode 100.
The photodiode provided by the invention realizes the improvement of quantum efficiency, and meanwhile, dark current is not obviously increased.
Alternatively, the material of photodiode 100 may include at least one of silicon carbide, silicon germanium, III-V compounds such as indium arsenide and gallium arsenide, and II-VI compounds.
Illustratively, the pinning layer 3 includes a plurality of mesh channels 32. The plurality of mesh channels 32 are distributed, for example, discretely, in a vertical plane in the Z-axis direction; the pinning region body 31 may be of unitary construction or may comprise a partial construction. The mesh channel 32 may be provided according to the shape and the entire range of the second dielectric layer 2 and the shape and the entire range of the pinning layer 3.
Alternatively, a plurality of mesh channels 32 are arrayed in a vertical plane in the Z-axis direction. As shown in fig. 1, a plurality of mesh channels 32 may constitute a rectangular array, and on the one hand, a plurality of mesh channels 32 may be arranged in rows in the X-axis direction, and on the other hand, a plurality of mesh channels 32 may be arranged in columns in the Y-axis direction. The distance between any two adjacent mesh channels 32 may be the same or different in the direction of arrangement. The distribution of the at least one mesh channel 32 may also be other, such as a honeycomb arrangement. The photodiode 100 can achieve high quantum efficiency and electrical properties are balanced and stable.
Illustratively, the mesh channel 32 may have a rectangular profile in the XY-plane. The side length direction of the rectangular outline may be along the X-axis direction or the Y-axis direction. The cross-sectional areas of the different mesh channels 32 may be different. In other embodiments, mesh channel 32 may have a non-concave shape that is achievable by any semiconductor process. The plurality of mesh channels 32 may each have a different shape.
Illustratively, the pinning layer 3 protrudes from the second dielectric layer 2 and extends into the first dielectric layer in a second direction perpendicular to the first direction, e.g. in the X-axis direction. The pinning layer 3 may be electrically connected to the first dielectric layer 1. The mesh channel 32 corresponds to the second dielectric layer 2. Illustratively, in the cross section in the Z-axis direction, a space is left between the mesh channel 32 and the boundary of the second dielectric layer 2 to ensure that the island region is located in the second dielectric layer 2.
Alternatively, the interval between two adjacent mesh channels 32 may be larger than the size of the mesh channel 32 in the second direction along the second direction perpendicular to the first direction; but not limited thereto, the plurality of mesh channels 32 may include mesh channels 32 that are adjacent to each other, and a space between two adjacent mesh channels 32 may be smaller than or equal to a size of the mesh channels 32 in the second direction. Controlling the size of the pinning region body 31 may enhance the effect of clamping dark current.
Illustratively, the ratio of the area of the overall mesh channel 32 in the perpendicular to the first direction to the area of the pinning region body 31 ranges from 1% to 40%. Illustratively, the ratio may range from 2.5% to 10%, for example approximately 3%, 5% or 8%. In other embodiments, the ratio of the projected area of all mesh channels 32 in the perpendicular to the first direction to the projected area of the second dielectric layer 2 may range from 2.5% to 10%. Alternatively, the area ratio of the single mesh channel 32 to the second dielectric layer 2 may be, for example, 1% to 2.5%; other values, either smaller or larger, may not be present.
As shown in fig. 1, the photodiode 100 further includes an interconnect layer 6. The interconnection layer 6 is located on a side of the pinning layer 3 facing away from the second dielectric layer 2 in the Z-axis direction, and the interconnection layer 6 may be a multilayer structure. Illustratively, the interconnect layer 6 may include an insulating layer 9, a first electrode 7, and a second electrode 8. The material of the insulating layer 9 may include an insulating material, and the material of the first electrode 7 and the material of the second electrode 8 may include a metal. The first electrode 7 and the second electrode 8 may include a conductive pattern extending in a Z-axis vertical plane and a conductive path extending in a Z-axis direction, respectively. The conductive pattern may be electrically connected to a plurality of conductive vias, which may be used to make ohmic contact with the semiconductor structure.
The first electrode 7 may be electrically connected to a portion of the first dielectric layer 1 located in the second region B. The first electrode 7 may be electrically connected to the pinning layer 3 through the first dielectric layer 1. The second electrode 8 is electrically connected to the second dielectric layer 2. Illustratively, the pinned layer 3 includes an electrode window 33, and the electrode window 33 may be located at the third region C. The second dielectric layer 2 comprises a third portion 23 located within the electrode window 33. The second electrode 8 may be electrically connected to the electrode window 33. The electrode window 33 may be located at a central position of the pinning layer 3 or at a central position corresponding to the second dielectric layer 2. The mesh channel 32 is spaced from the electrode window 33 by the pinning region body 31.
Illustratively, the photodiode 100 further includes a first contact region 4 and a second contact region 5. The first contact region 4 extends into the first dielectric layer 1 in the Z-axis direction, the first contact region 4 having a first doping type and a doping concentration which is greater than the doping concentration of the first dielectric layer 1. The first contact region 4 may have a heavy doping. The second contact region 5 extends into the second dielectric layer 2 in the Z-axis direction, the second contact region 5 having a second doping type and a doping concentration which is greater than the doping concentration of the second dielectric layer 2. The second contact region 5 may have a heavy doping. The second contact region 5 is located within the electrode window 33.
The first electrode 7 may penetrate the insulating layer 9 in a first direction. The first electrode 7 may be in ohmic contact with the first contact region 4 to be electrically connected with the first dielectric layer 1. The second electrode 8 may penetrate the insulating layer 9 in the first direction. The second electrode 8 may be ohmic-contacted with the second contact region 5 to be electrically connected with the second dielectric layer 2. The depletion region 10 may be achieved by applying a reverse bias voltage to the semiconductor structure exceeding the pinning threshold voltage through the first electrode 7 and the second electrode 8.
As shown in fig. 1, the photodiode 100 further includes a substrate 11. The substrate 11 is located on the side of the first dielectric layer 1 facing away from the pinning layer 3 in the Z-axis direction. The substrate 11 may have a first doping type and the doping concentration may be greater than the doping concentration of the first dielectric layer 1. The photodiode 100 may generate an electrical signal in response to front-side incident light. Due to the arrangement of the mesh channels 32, the depletion region 10 is locally widened, which in turn enhances the local quantum efficiency, the photodiode 100 having a higher quantum efficiency and a smaller dark current.
Illustratively, the first dielectric layer 1 has a p-type doping, the second dielectric layer 2 has an n-type doping, and the pinning layer 3 has a p++ type doping. Illustratively, the first contact region 4 has a p++ type doping, the second contact region has an n++ type doping, and the substrate 11 may have a p+ type doping. The photodiode 100 of this embodiment has an n-p structure, and the first electrode 7 may be an anode electrode and the second electrode 8 may be a cathode electrode. In other embodiments, the photodiode 100 may also be formed as a p-n structure.
Illustratively, the photodiode 100 further includes a first anti-reflection film (not shown) and a first passivation layer (not shown). For front-side incident photodiode 100, a first anti-reflection film and a first passivation layer may be stacked on interconnect layer 6 in sequence, i.e., the side of interconnect layer 6 facing away from pinning layer 3. The first anti-reflection film helps to improve light transmittance, and the first passivation layer can be used for protecting the functional layer on the lower side of the first passivation layer.
Referring to fig. 2, fig. 2 illustrates a photodiode in an embodiment of the present invention, which may be back-side incident. In some embodiments, the photodiode 100 shown in fig. 2 may have the substrate 11 removed and the first dielectric layer 1 may be thinner compared to a front-side incident photodiode. The photodiode 100 may be provided with passivation layers on both the front and back sides.
Illustratively, the photodiode 100 also includes a second passivation layer 12. The second passivation layer 12 is located on the side of the first dielectric layer 1 facing away from the pinning layer 3 in the Z-axis direction. The photodiode 100 may generate an electrical signal in response to light passing through the second passivation layer 12. Illustratively, the photodiode 100 further includes a second anti-reflection film (not shown), which may be located between the second passivation layer 12 and the first dielectric layer 1.
Illustratively, the photodiode 100 further includes a passivation film (not shown). The passivation film, the second anti-reflection film and the second passivation layer 12 may be stacked in order in a direction in which the first dielectric layer 1 faces away from the second dielectric layer 2. A shallow interface p+ heavily doped region may be included between the passivation film and the first dielectric layer 1. The passivation film is a SiO2/Al2O3 composite passivation film system capable of introducing fixed negative charges, and can prevent the depletion region of the pn junction from contacting the passivation interface and reduce the influence of the interface state on the dark current performance of the photodiode 100.
Referring to fig. 3, an embodiment of the present invention further provides an electronic component 300, where the electronic component 300 may include: a circuit 200 and a photodiode 100. The photodiode 100 may be the photodiode 100 provided in the foregoing embodiment, which is electrically connected to the circuit 200. Illustratively, the first electrode 7 and the second electrode 8 may be electrically connected to the circuit 200, respectively. The electronic component 300 may implement a photoelectric effect, for example, the photodiode 100 generates a photocurrent signal based on the optical signal, the circuit 200 may collect the photocurrent signal, and then the photocurrent signal may be subjected to integrating, amplifying, analog-to-digital conversion, and the like, and the electronic component 300 may implement a digitized electrical signal output of the optical signal.
Referring to fig. 4, an embodiment of the present invention provides a method 1000 for manufacturing a photodiode, and the method 1000 may include steps S101 to S103 described below.
In step S101, a first dielectric layer is formed. The first dielectric layer has a first doping type. The first dielectric layer may be obtained by epitaxial growth on a substrate, followed by an ion implantation process, for example. In other embodiments, the first dielectric layer may be epitaxially grown on the substrate and in situ doping is achieved. The first dielectric layer may be layered.
Step S102, forming a second dielectric layer. In some embodiments, the second dielectric layer having the second doping type may be formed by an ion implantation process. The second dielectric layer extends into the first dielectric layer along the Z-axis direction, it being understood that extending herein refers to the overall trend and does not preclude situations such as angled implants.
Step S103, forming a pinning layer. The pinning layer extending into the second dielectric layer in the first direction may be formed by an ion implantation process. The pinning layer includes a pinning region body and mesh channels corresponding to the second dielectric layer, and illustratively, also includes electrode windows. The pinning area body and the mesh channel can be synchronously formed through an injection process; other semiconductor processes may also be utilized. The method 1000 provided by the invention can form the pinning layer with the composite function in fewer steps. The pinning layer has a first doping type and a doping concentration greater than that of the first dielectric layer. Illustratively, the value of the doping concentration of the pinning layer is greater than the value of the doping concentration of the first dielectric layer.
The present invention provides a method for manufacturing a photodiode that can form a photodiode that can improve quantum efficiency while maintaining clamp dark current, which is easy to perform and has high cost performance.
In other embodiments, a thinner pre-formed first dielectric layer may be formed first; then forming a prefabricated second dielectric layer stacked thereon; and then compensating doping is carried out on a part of the prefabricated second dielectric layer, so that the part is provided with the first doping type and forms an integrated first dielectric layer with the prefabricated first dielectric layer, and the second dielectric layer extending into the first dielectric layer is obtained according to the prefabricated second dielectric layer.
Illustratively, the step of forming the first dielectric layer includes: a first dielectric layer is formed on one side of the substrate. Epitaxial growth can be performed well based on the substrate. The method is easy to execute, and can form a semiconductor structure with stable structure and good performance and a photodiode device.
Illustratively, the method 1000 for fabricating a photodiode further includes: forming a first contact region; forming a second contact region; an interconnect layer is formed. The method 1000 may further include forming a first anti-reflection film system. The first anti-reflection film is disposed on the interconnection layer and may include at least one film layer stacked for increasing light transmittance. A first passivation layer on the first anti-reflection film system may also be formed.
In other embodiments, the method 1000 for fabricating a photodiode further includes: step S104, removing the substrate; illustratively, a passivation film is formed; forming an antireflection film which is positioned on one side of the first dielectric layer, which is back to the pinning layer, along the first direction and can be called a second antireflection film system; and step S105, forming a passivation layer located on a side of the antireflection film facing away from the first dielectric layer along the first direction, which may be referred to as a second passivation layer. The method can be used to fabricate back-side incident photodiodes.
Illustratively, after removing the substrate, the first dielectric layer may be ground, polished, and anti-reflection treated. It will be appreciated that the first dielectric layer prior to the grinding step may be referred to as a pre-formed first dielectric layer, and that the photodiodes provided by the present invention may also be further processed in a subsequent process. The structure formed by the front-end process may be referred to as a pre-fabricated structure in the back-end process.
The technical features of the embodiments disclosed above may be combined in any way, and for brevity, all of the possible combinations of the technical features of the embodiments described above are not described, however, they should be considered as the scope of the description provided in this specification as long as there is no contradiction between the combinations of the technical features.
In the embodiments disclosed above, the order of execution of the steps is not limited, and may be performed in parallel, or performed in a different order, unless explicitly stated and defined otherwise. The sub-steps of the steps may also be performed in an interleaved manner. Various forms of procedures described above may be used and steps may be reordered, added, or deleted as long as the desired results of the technical solutions provided by the present invention are achieved, and are not limited herein.
The above disclosed examples represent only a few embodiments of the invention, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that modifications and improvements can be made by those skilled in the art without departing from the inventive concept, which falls within the scope of the invention as claimed. The scope of the invention should, therefore, be determined with reference to the appended claims.

Claims (10)

1. A photodiode, comprising:
a first dielectric layer (1) having a first doping type;
a second dielectric layer (2) extending into the first dielectric layer (1) in a first direction, having a second doping type; and
-a pinning layer (3) extending into the second dielectric layer (2) along the first direction, having the first doping type and a doping concentration being greater than the doping concentration of the first dielectric layer (1), the pinning layer (3) comprising a pinning region body (31) and mesh channels (32) corresponding to the second dielectric layer (2).
2. The photodiode according to claim 1, wherein a plurality of the mesh channels (32) are arrayed in a vertical plane of the first direction; the spacing between two adjacent mesh channels (32) is greater than the dimension of the mesh channels (32) in a second direction perpendicular to the first direction.
3. Photodiode according to claim 1, wherein the ratio of the area of all the mesh channels (32) in the perpendicular to the first direction to the area of the pinning region body (31) ranges from 1% to 40%;
the value of the doping concentration of the pinning layer (3) is greater than the value of the doping concentration of the second dielectric layer (2).
4. Photodiode according to claim 1, wherein the ratio of the area of all the mesh channels (32) in the perpendicular to the first direction to the area of the pinning region body (31) ranges from 2.5% to 10%.
5. The photodiode according to any of claims 1 to 4, further comprising a first contact region (4), a second contact region (5), an insulating layer (9), a first electrode (7) and a second electrode (8);
the first contact region (4) extends into the first dielectric layer (1) along the first direction, and the first contact region (4) has the first doping type and has a doping concentration greater than that of the first dielectric layer (1); the second contact region (5) extends into the second dielectric layer (2) along the first direction, the second contact region (5) having the second doping type and a doping concentration greater than that of the second dielectric layer (2);
-the pinning layer (3) comprises an electrode window (33), the second contact region (5) being located within the electrode window (33); along a second direction perpendicular to the first direction, the pinning layer (3) protrudes from the second dielectric layer (2) and is electrically connected with the first dielectric layer (1); the insulating layer (9) is positioned on one side of the pinning layer (3) facing away from the first dielectric layer (1) along the first direction;
the first electrode (7) penetrates through the insulating layer (9) along the first direction and is in electrical contact with the first contact region (4) so as to be electrically connected with the first dielectric layer (1); the second electrode (8) penetrates the insulating layer (9) along the first direction and is in electrical contact with the second contact region (5) so as to be electrically connected with the second dielectric layer (2).
6. The photodiode according to claim 5, further comprising a first antireflection film, a first passivation layer and a substrate (11), the first antireflection film and the first passivation layer being sequentially stacked on a side of the insulating layer (9) facing away from the pinning layer (3), the substrate (11) being located on a side of the first dielectric layer (1) facing away from the pinning layer (3) in the first direction.
7. The photodiode according to claim 5, further comprising a passivation film, a second anti-reflection film and a second passivation layer (12), the passivation film, the second anti-reflection film and the second passivation layer (12) being stacked in this order on a side of the first dielectric layer (1) facing away from the pinning layer (3) in the first direction.
8. An electronic component, comprising:
a circuit (200); a kind of electronic device with high-pressure air-conditioning system
The photodiode (100) according to any of claims 1 to 7, being electrically connected to the circuit (200).
9. A method for fabricating a photodiode, comprising:
forming a first dielectric layer (1), wherein the first dielectric layer (1) has a first doping type;
forming a second dielectric layer (2) extending into the first dielectric layer (1) in a first direction, the second dielectric layer (2) having a second doping type; and
-forming a pinning layer (3) extending into the second dielectric layer (2) in the first direction, the pinning layer (3) having the first doping type and a doping concentration being greater than that of the first dielectric layer (1), the pinning layer (3) comprising a pinning region body (31) and mesh channels (32) corresponding to the second dielectric layer (2).
10. Method for manufacturing a photodiode according to claim 9, wherein the step of forming the first dielectric layer (1) comprises: forming the first dielectric layer (1) on one side of a substrate (11);
the method further comprises the steps of: -removing the substrate (11); forming an antireflection film which is positioned on one side of the first dielectric layer (1) opposite to the pinning layer (3) along the first direction; and forming a passivation layer which is positioned on one side of the antireflection film, which is opposite to the first dielectric layer (1), along the first direction.
CN202311043382.1A 2023-08-17 2023-08-17 Photodiode, manufacturing method thereof and electronic element Pending CN116825874A (en)

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