KR20230112262A - Broadband photodiode using highly doped epitaxial layer and manufacturing method the same - Google Patents

Abstract

The present invention relates to a photodiode and a method for manufacturing the same, and relates to a low-concentration p-type ion implantation layer implanted with a dose of 10 ¹³ cm ^{-2 or less located on the upper side of a low-concentration n-type semiconductor substrate containing n-type impurities at a concentration of 10 12 to 10 15 cm -3 , and a p-type epitaxial layer in contact with the upper portion of the low-concentration p-type ion implantation layer and having an impurity concentration of 10 19 to 10 20 cm -3 , a high-concentration p-type guard ring implanted with a dose of 10 15 cm −2 or more formed deeper than the low -} concentration p-type ion implantation layer at the edge of the low-concentration p-type ion implantation layer, and an antireflection film formed on the p-type epitaxial layer.

Description

Broadband photodiode using highly doped epitaxial layer and manufacturing method the same}

The present invention relates to a broadband photodiode and a method for manufacturing the same, and more particularly, to a broadband photodiode having a light receiving wavelength ranging from UV to IR as an optical sensor and a method for manufacturing the same.

As a prior art related to the present invention, Patent Registration No. 10-0595876 (registered on June 23, 2006, method for manufacturing a photodiode of an image sensor, hereinafter abbreviated as prior art 1) is known.

Prior art 1 relates to a photodiode for an image sensor, and describes a technique of forming a p-n junction in a wave form with a p ion implantation layer by forming a wave pattern. However, difficulties are expected in securing wave-shaped transfer uniformity and reproducibility.

Prior Art 2 has US Patent No. 06,809,391 (registered on October 26, 2004, Short-wavelength photodiode of enhanced sensitivity with low leak current and method of manufacturing photodiode).

Prior Art 2 describes a configuration in which a recess etched region is formed on a wafer surface and a p-n junction is formed through ion implantation.

In addition, in the prior art 3, “J. Ghasemi, AJ Chowdhury, A. Neumann, B. Fahs, M. Hella, SRJ Brueck, P. Zarkesh-Ha, “A novel blue-enhanced photodetector using honeycomb structure,” IEEE (2015)”, an n+ layer is formed in a honeycomb shape as an ion implantation layer on the surface, wherein the concentration is as high as 1.5x10 ¹⁹ cm ^-3 and the depth is also It forms a very deep structure with 1 μm.

Under these conditions, the structure has a low UV light receiving efficiency of 400 nm wavelength or less.

An example of another prior art is “A. Ghazi, H. Zimmermann, P. Seegebrecht, “CMOS photodiode with enhanced responsivity for the UV/blue spectral range,” IEEE Trans. on Electron Devices, Vol. 49, No. 7 (JULY 2002), hereinafter abbreviated as prior art 4”.

In the prior art 4, an n- epitaxial layer is grown on a substrate, a p+ ion implantation layer is formed in a grid form, the width and spacing of the grid are adjusted, and the concentration of the substrate is variously controlled to study the effect.

Finally, "M.L.F. Lerch, A.B. Rosenfeld, P.E. Simmonds, G.N. Taylor, V.L. Perevertailo, “Spectral Charaterization of a blue-enhanced silicon photodetector,” IEEE Trans. on Nuclear Science, Vol. 48, No. 4, (Aug. 2001), hereinafter abbreviated as prior art 5" is known.

Prior Art 5 describes a structure in which a shallow p layer and a p+ stripe are formed by ion implantation, but is useful in a wavelength range of 360 nm or more due to limitations in doping concentration and junction depth, but has a problem in that the light receiving performance is very low in the UV wavelength range of 350 nm or less.

As such, the prior art has a limit in that the depletion region in the p-n junction is very deep at the bottom of the substrate, and thus the responsivity is severely reduced in the short wavelength (UV) band of 400 nm or less.

In addition, since the concentration of the p-type impurity is high in the formed p-n junction, the Auger recombination phenomenon becomes severe, and the width of the depletion region is narrow, so that a large capacitance is applied, which adversely affects the operation speed.

A technical problem to be solved by the present invention in view of the above conventional problems is to provide a photodiode useful in the UV-IR band and a manufacturing method thereof.

Particularly, an object of the present invention is to provide a photodiode that has high response from a UV wavelength band to an IR band having a longer wavelength and minimizes capacitance and parasitic resistance to improve operating speed and a manufacturing method thereof.

A photodiode according to one aspect of the present invention includes: a low-concentration p-type ion implantation layer implanted with a dose of 10 ¹³ cm ^-2 or less located on an upper side of a low-concentration n-type semiconductor substrate containing n-type impurities at a concentration of ^{10 12} to ^{10 15 cm -3} ; A high-concentration p-type guard ring implanted with a dose of 10 ¹⁵ cm ⁻² or ^more formed deeper than the low-concentration p-type ion implantation layer at an edge of the low-concentration p-type ion implantation layer, and an antireflection film formed on the p-type epitaxial layer.

In an embodiment of the present invention, the top of the p-type epitaxial layer may be located within 100 nm from the device surface.

In an embodiment of the present invention, a junction termination region in which n-type impurity ions having a dose of 10 ¹⁵ cm ⁻² is implanted may further be included in a portion of the semiconductor substrate spaced apart from the low-concentration p-type ion implantation layer.

In an embodiment of the present invention, the semiconductor substrate may be a bulk substrate implanted with low-concentration n-type ions or an epitaxial layer grown to include low-concentration n-type ions on top of the n-type substrate.

In an embodiment of the present invention, the low-concentration p-type ion implantation layer may have a junction depth of 0.1 to 0.4 um.

In an embodiment of the present invention, the guard ring may have an impurity concentration of 10 ¹⁵ to 10 ²⁰ cm ^-3 .

In addition, in the photodiode manufacturing method according to another aspect of the present invention, a) the n-type impurity is 10¹²~10¹⁵ cm^-3 After depositing an oxide film on the upper part of the low-concentration n-type semiconductor substrate containing¹³ cm^-2Forming a low-concentration p-type ion-implanted layer into which the following dose is implanted, and b) 10 formed deeper than the low-concentration p-type ion-implanted layer at the edge of the low-concentration p-type ion-implanted layer through impurity ion implantation.¹⁵cm^-2forming a high-concentration p-type guard ring into which the above-mentioned dose is implanted; c) removing a portion of the oxide film to expose an inner low-concentration p-type ion implantation layer of the guard ring, and having an impurity concentration in contact with the exposed low-concentration p-type ion implantation layer of¹⁹~10²⁰ cm^-3Depositing a p-type epitaxial layer, and d) forming a metal layer as an anode on a portion of the p-type epitaxial layer and forming an antireflection film.

In an embodiment of the present invention, step c) is,

An upper portion of the p-type epitaxial layer may be formed to be located within 100 nm from the device surface.

In an embodiment of the present invention, a step of forming a junction termination region implanted with n-type impurity ions having a dose of 10 ¹⁵ cm ⁻² in a portion of the semiconductor substrate spaced apart from the low-concentration p-type ion implantation layer may be further included.

In an embodiment of the present invention, the semiconductor substrate may be formed by implanting low-concentration n-type ions into a bulk substrate, or may be formed by growing an epitaxial layer on the n-type substrate to include low-concentration n-type ions.

In an embodiment of the present invention, the low-concentration p-type ion implantation layer may be ion-implanted to have a junction depth of 0.1 to 0.4 um.

In an embodiment of the present invention, impurity ions may be implanted in the guard ring such that the impurity concentration is 10 ¹⁵ to 10 ²⁰ cm ⁻³ .

The photodiode of the present invention and its manufacturing method form the depth of the depletion layer at a depth of 50 to 100 nm from the surface of the device, thereby increasing light reception sensitivity and reducing capacitance, thereby enabling broadband photodetection and improving the operating speed.

In addition, the present invention has an effect of improving speed and reliability by arranging a high-concentration guard ring at the edge of the active region to reduce leakage current and ohmic resistance.

1 is a cross-sectional configuration diagram of a photodiode according to a preferred embodiment of the present invention.
2 to 9 are cross-sectional views of the manufacturing process of the photodiode of the present invention.
10 to 15 are characteristic comparison graphs of the present invention and the prior art, respectively.

Hereinafter, the photodiode of the present invention and its manufacturing method will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art, and the embodiments described below may be modified in many different forms, and the scope of the present invention is not limited to the following examples. Rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey the spirit of the invention to those skilled in the art.

Terms used in this specification are used to describe specific embodiments and are not intended to limit the present invention. As used herein, the singular form may include the plural form unless the context clearly indicates otherwise. Further, "comprise" and/or "comprising" when used herein specifies the presence of the recited shapes, numbers, steps, operations, elements, elements and/or groups thereof, and does not exclude the presence or addition of one or more other shapes, numbers, operations, elements, elements and/or groups. As used herein, the term "and/or" includes any one and all combinations of one or more of the listed items.

Although terms such as first and second are used in this specification to describe various members, regions, and/or regions, it is apparent that these members, parts, regions, layers, and/or regions are not limited by these terms. These terms do not imply any particular order, top or bottom, or superiority or inferiority, and are used only to distinguish one element, region or region from another element, region or region. Thus, a first element, region or region described in detail below may refer to a second element, region or region without departing from the teachings of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to drawings schematically illustrating embodiments of the present invention. In the drawings, variations of the depicted shape may be expected, depending, for example, on manufacturing techniques and/or tolerances. Therefore, the embodiments of the present invention should not be construed as being limited to the specific shape of the region shown in this specification, but should include, for example, a change in shape caused by manufacturing.

1 is a cross-sectional configuration diagram of a photodiode according to a preferred embodiment of the present invention, and FIGS. 2 to 9 are cross-sectional views of a manufacturing process according to the present invention.

Referring to Figures 1 to 9, respectively, the present invention,

As shown in FIG. 2, a semiconductor substrate 1 doped with n ^- type impurities at a low concentration is prepared.

The semiconductor substrate 1 is prepared by doping a bulk wafer with an n-type impurity at a concentration of 10 ¹² to 10 ¹⁵ cm ^-3 at a very low concentration.

Next, an oxide film 2 is grown on the entire upper surface of the semiconductor substrate 1, and then a low-concentration p ^- type ion implantation layer 3 is partially formed in contact with the upper surface of the semiconductor substrate 1 using photolithography.

The concentration of the n ^- type impurity doped into the semiconductor substrate 1 is 10 ¹⁴ cm ^-3 or less, and a low-concentration pn junction is formed between the semiconductor substrate 1 and the ion implantation layer 3 by implanting B ⁺ ions, which are p ^- type impurities, with high energy (100 keV or more) and a low dose (10 ¹³ cm ^-2 or less).

Subsequently, the ion implantation layer 3 is diffused at a high temperature of 1100 ^° C. or higher using a furnace.

FIG. 3 is an exemplary view of a process of preparing a semiconductor substrate 1 and forming an ion implantation layer 3 by a manufacturing method different from that of FIG. 2 .

A semiconductor substrate 1 in which n ⁻ layers are epitaxially grown on an n ⁺ wafer 1-1 is used.

Then, the n ^- epi layer is grown at an extremely low concentration of 10 ¹² to 10 ¹⁴ cm ⁻³ impurity concentration, and the ion implantation layer 3 is formed by performing subsequent manufacturing processes as described with reference to FIG. 2 .

As a difference between FIGS. 2 and 3 , in the case of the example of FIG. 3 using the n+ wafer 1-1, the manufacturing process of the n ⁺ ion implantation layer by backside ion implantation can be omitted.

That is, the n+ wafer 1-1 and the n+ ion implantation layer by backside ion implantation, which will be described later, may be used interchangeably in description.

Then, as shown in FIG. 4, a guard ring 4 is formed downwardly penetrating the circumference of the ion implantation layer 3. The guard ring 4 at this time defines an active area, and has a shape of a square ring or a circular ring on a plane.

In addition, the guard ring 4 becomes an ohmic contact high-concentration bonding area.

The guard ring 4 is formed by implanting B ⁺ ions with high energy (200 keV or more) and a large dose (~ 10 ¹⁵ cm ⁻² ). The depth (D _GR ) of the guard ring 4 is controlled to a level of 2 to 4 μm through a drive-in heat treatment process.

The concentration of the guard ring 4 may be 10 ¹⁵ to 10 ²⁰ cm ^-3 .

Then, as shown in FIG. 5, ions such as As ⁺ and P ⁺ are ion-implanted at an appropriate energy (80 keV or more) at a dose (10 ¹⁵ cm ^-2 ) at the edge of the junction element into the semiconductor substrate 1 spaced apart from the ion implantation layer 3 to form a junction termination region 5 of the n ⁺ junction.

Then, as shown in FIG. 6, a part of the guard ring 4 and the oxide film 2 located on the upper portion of the ion implantation layer 3 therein are patterned to expose a part of the lower guard ring 4 and the upper part of the ion implantation layer 3 located inside the guard ring 4.

Then, a high concentration ( _NH ) p-type epitaxial layer 6 is grown.

At this time, the impurity concentration of the p-type epitaxial layer 6 is assumed to be 10 ¹⁹ to 10 ²⁰ cm ^-3 .

At this time, a polycrystalline thin film is deposited on the unpatterned oxide film 2, and an epitaxial layer is grown on the exposed surface of the ion implantation layer 3 and the Si semiconductor of the guard ring 4.

At this time, the junction depth of the p-type epitaxial layer 6 is adjusted to 100 nm or less, which is USJ (Ultra Shallow Junction).

The content of Ge (X _Ge ) and the doping concentration of boron can be variously controlled and manufactured.

In order to increase the efficiency in growing the p-type epitaxial layer 6, various epitaxial structures can be applied. This will be described in more detail later.

Then, as shown in FIG. 7, the p-type epitaxial layer 6 is patterned to leave the p-type epitaxial layer 6 located on top of the guard ring 4 and the ion implantation layer 3, and the surrounding oxide film 2. The p-type epitaxial layer 6 is also left on the upper part.

At this time, the p-type epitaxial layer 6 positioned above the oxide film 2 is substantially a polycrystalline layer, but the name is uniformly described as the p-type epitaxial layer 6.

Then, a metal layer 7 pattern is formed on the p-type epitaxial layer 6 positioned above the oxide film 2 to form a metal-semiconductor junction.

As the metal used at this time, various metals such as Al, Ti/Al, and Ti/Ai/TiN can be used in a multi-layered structure.

In the present invention, process techniques and steps such as optical lithography, dielectric thin film deposition and etching, and metal thin film deposition and etching corresponding to typical semiconductor processes are not described in detail.

Next, as shown in FIG. 8 , an antireflection film ARC 8 is formed by depositing a dielectric of SiO ₂ or Si ₃ N ₄ on the entire upper surface of the structure of FIG. 7 .

Thereafter, the anti-reflection film 8 is patterned to expose the metal layer 7 .

The antireflection film 8 is deposited to a thickness of 20 nm to 200 nm to maximize transmission in the IR region in consideration of the refractive index.

Then, as shown in FIG. 9 , the back side of the semiconductor substrate 1 is polished to adjust the thickness T _w of the semiconductor substrate 1 at 100 to 300 um.

Next, after forming the n ⁺ ion implantation layer 9 by backside ion implantation, the backside metal layer 10 is deposited. The rear metal layer 10 may be formed in a multilayer structure of various metals such as Al, Ti/Al, Ti/Ai/TiN, Cr/Au, or Ni/Al.

As described above, when the structure of FIG. 3 is used, the process of forming the n+ ion implantation layer 9 by backside ion implantation can be omitted.

Subsequent manufacturing processes include steps such as stabilization heat treatment, but since conventional process techniques used in the past are used in subsequent processes, a detailed description thereof will be omitted.

Referring back to Figure 1, the photodiode of the present invention, n^-A semiconductor substrate 1, which is an active layer of the type, a low-concentration p-type ion implantation layer 3 formed in a predetermined area and reaching the upper surface of the semiconductor substrate 1, a high-concentration p-type epitaxial layer 6, which is a depletion layer in contact with the upper surface of the ion implantation layer 3, a guard ring 4 formed on the semiconductor substrate 1 at the edge and lower portion of the ion implantation layer 3, and a metal layer 7 formed on a part of the p-type epitaxial layer 6 ), an antireflection film 8 covering the epitaxial layer 6 so that the metal layer 7 is exposed, an n+ ion implantation layer 9 formed on the lower side of the semiconductor substrate 1, and a rear metal layer 10. It is configured to include.

The thickness of the semiconductor substrate 1 as an active layer (to T _active ) is controlled by an epitaxial growth or backside lapping process.

In the drawing, D _H is the thickness or depth of the high-concentration p-type epitaxial layer 6, and D _L is the thickness or depth of the low-concentration p-type ion implantation layer 3.

In addition, the epi layer 6, which is a depleted region, is arranged so that depletion starts from 100 nm from the lower side from the surface, and the depletion width (W _d ) is 10 to 60 um in an open circuit state of 0V.

The guard ring 4 formed at the edge of the active region by ion implantation of high concentration is formed at a predetermined depth (D _GR ) into the semiconductor substrate 1 to reduce leakage current, reduce the resistance of the ohmic contact, and adjust the reverse breakdown voltage to 100V or more.

This device structure can maximize the light-receiving efficiency up to a short wavelength in the UV band with a wavelength of 200 nm.

In addition, according to the present invention, the capacitance (C) applied to the pn junction is controlled to 10 nF/cm ² or less as the depletion width of the pn junction is wide and the external parasitic resistance component is also controlled to a minimum, thereby minimizing the time constant due to the RC delay.

10 is a graph showing the difference in light response according to the wavelength of light in the device of the present invention compared to the prior art.

In the prior art, a high concentration (N _h ~ 10 ²⁰ cm ^-3 ) is formed on the surface by ion implantation once or twice, and the junction where the depletion layer is created is deep and the width of the depletion region (W _d ) is narrow.

On the other hand, the present invention uses ion implantation and epitaxial growth processes to form a USJ (Ultra Shallow Junction), which is an extremely shallow location where the depletion region of the pn junction is wide and the depletion region is located at the lower 100 nm of the device surface, and the doping concentration is also high ( _NH = 10 ¹⁹ ~ 10 ²⁰ cm ^-3 ) and low concentration ( _NL = 10 ¹³ ~ 0 ¹⁵ cm ^-3 ). Therefore, the low concentration (N _L ) has a higher doping concentration than the substrate concentration (N _sub ) by a very small amount, so that the width (W _d ) of the depletion region can be widened.

In addition, an epitaxial layer of high concentration (N _H ) is formed at a depth (D _H ) to minimize ohmic resistance, reduce dark current, and maximize photocurrent as a signal, contributing to increasing operation speed.

The wavelength of the signal light absorbs a wide band of UV-IR to maximize the light receiving performance.

11 is a graph showing the difference in light absorption according to the junction structure in the device of the present invention compared to the prior art.

In the prior art, the depth of the junction where the depletion region starts is deep and the width (W _d ) of the depletion region is narrow, whereas in the present invention, the depth of the junction where the depletion region starts is very shallow, less than 100 nm, and at the same time, the impurity concentration is controlled to an extremely minimum, so that the width (W _d ) of the depletion region is formed with a wide width.

Due to this difference in structure, for example, in the case of light having a wavelength of 300 nm, most of the light is absorbed at a depth of 100 nm at the bottom of the surface, and electron-hole pairs, which are carriers, are generated. In order to collect the generated electron-hole pairs (carriers) and receive them as a signal of photocurrent (I _ph ), recombination that occurs severely on the surface or recombination caused by collision between carriers during conduction (movement) must be reduced.

To this end, the depletion region should be brought as close to the surface as possible, but a structure in which the doping concentration of impurities at the bottom of the surface is kept as low as possible is advantageous in order to prevent recombination. Therefore, in the present invention, by controlling the concentration and depth distribution of such impurity doping with an optimized structure, the light absorption area is maximized in the wavelength bands of UV (360 nm or less), Green (530 nm), Red (660 nm), IR (940 nm or more), and the collection probability of generated carriers can also be increased.

12 is an example of a structure of a high-concentration epitaxial layer applied in the present invention. In the present invention, the epitaxial layer is composed of three layers (L1, L2, L3) for high quality, L1 is a seed layer, L2 is a doped layer, and L3 is a cap layer. The L1 and L3 layers are undoped and have a very thin thickness of 5 to 20 nm, and the thickness of the L2 layer is adjusted to 40 to 100 nm.

In addition, Ge and p-typ dopant (Boron) are injected into the L2 layer to form a high-concentration p ⁺ -layer.

The Ge content (X _Ge ) of the L2 layer is controlled in a rectangular to triangle shape to form a Si _1-x Ge _x layer.

The Ge content (X _Ge ) of the L2 layer is used in the range of 0.1 to 0.3, and is adjusted along with the thickness and doping concentration (N _Boron ) of the L2 epitaxial layer.

13 is a comparison graph of energy band structures of the prior art and the present invention.

A high-concentration SiGe epitaxial layer is formed to a thickness of less than 100 nm on the lower part of the surface insulating film, showing a difference in the structure of the conduction & valence energy band. Compared to the prior art, in the case of the present invention, the depletion region is large, and the band at the interface between the insulating film and the semiconductor shows a severely discontinuous shape.

Therefore, electrons and holes generated by light absorption rapidly move to the n-type on the right side and the p-type on the left side, respectively, and contribute to the photocurrent.

When a SiGe layer is used by adding Ge to the epitaxial layer, the concentration of boron, which is a dopant, can be increased. The SiGe layer has a larger lattice constant than Si, so it is subjected to compressive stress, thereby adjusting the band structure and increasing the mobility of holes. When the mobility of the holes is increased, the holes are rapidly collected into the metal layer 7, which is an anode electrode, to provide an effect of increasing the conductivity of the photocurrent.

14 is a graph comparing response according to wavelength between the present invention and the prior art.

In the case of the prior art, responsiveness is increased at long wavelengths of 400 nm or more, but in the case of the present invention, responsiveness is greatly increased even in the UV band of 400 nm or less, and even shorter wavelengths show useful characteristics up to 200 nm band.

In addition, it can be confirmed that the light receiving characteristics of the visible light and IR bands are generally improved by about 30 to 80% due to the increase in the width of the depletion region.

15 is a graph comparing responsiveness according to the intensity of input light between the present invention and the prior art.

As a result of the prior art, the photocurrent (I _ph ) is low and the difference between wavelengths is large.

In the prior art, the sensitivity of ultraviolet (UV) is very low, and in the case of the green dotted line, the performance and linearity of the device are saturated as the intensity of the input light (P _ph,input ) increases and the slope of I _ph decreases. It is characterized by a serious deterioration.

As described above, in the prior art, the linearity of the photocurrent (I _ph ) in the short wavelength (Green) band is poor as the input light intensity (P _ph,input ) increases due to the severe recombination loss of high concentration carriers occurring on the surface of the device.

In the case of the present invention, it shows a photocurrent (I _ph ) that increases at a fairly linear and similar level according to the input optical power (P _ph,input ) for light corresponding to each wavelength of UV, Green, Red, and IR.

In particular, the short-wavelength UV and green photocurrents greatly increase, approaching red, as well as greatly improving the linearity of the incident light power. Moreover, the sensitivity of IR increases as the corresponding wavelength increases to a longer wavelength, showing performance that can be used up to a wavelength range of 100 to 1200 nm.

In the case of the present invention, as described above, for example, for each wavelength of UV, Green, Red, and IR, the photocurrent is increased by 50% or more. In addition, the light receiving efficiency is high up to high optical power (P _ph,input ), and thus, excellently improved linearity is maintained.

The improved optical characteristics of the device provided by the present invention are very useful because they enable simple and stable design and implementation in a circuit for manufacturing an optical sensor.

As such, the device structure and manufacturing process of the present invention are very different from those of the prior art, and thus operate with stable control of gain characteristics and improved reliability, as well as very reproducible and stable production around breakdown voltage. It provides the advantage.

It is obvious to those skilled in the art that the present invention is not limited to the above embodiments and can be variously modified or modified without departing from the technical gist of the present invention.

1: semiconductor substrate 2: oxide film
3: ion implantation layer 4: guard ring
5: junction termination area 6: epitaxial layer
7: metal layer 8: antireflection film
9: n+ ion implantation layer 10: rear metal layer

Claims (12)

a low-concentration p-type ion implantation layer implanted with a dose of 10 ¹³ cm ^-2 or less located on an upper side of a low-concentration n-type semiconductor substrate including n-type impurities at a concentration of 10 ¹² to 10 ¹⁵ cm ^-3 ;
a p-type epitaxial layer in contact with an upper portion of the low-concentration p-type ion implantation layer and having an impurity concentration of 10 ¹⁹ to 10 ²⁰ cm ^-3 ;
a high-concentration p-type guard ring implanted with a dose of 10 ¹⁵ cm ^-2 or more formed deeper than the low-concentration p-type ion implantation layer at the edge of the low-concentration p-type ion implantation layer; and
A photodiode comprising an antireflection film formed on the p-type epitaxial layer. According to claim 1,
The upper portion of the p-type epitaxial layer is located within 100 nm from the device surface. According to claim 1 or 2,
and a junction termination region in which n-type impurity ions having a dose of 10 ¹⁵ cm ⁻² are implanted in a portion of the semiconductor substrate spaced apart from the low-concentration p-type ion implantation layer. According to claim 1 or 2,
The semiconductor substrate,
A photodiode characterized in that it is an epitaxial layer grown to contain low-concentration n-type ions on a bulk substrate implanted with low-concentration n-type ions or an upper portion of an n-type substrate. According to claim 1 or 2,
The low-concentration p-type ion implantation layer,
A photodiode characterized in that the junction depth is 0.1 to 0.4um. According to claim 1 or 2,
The guard ring,
A photodiode characterized in that the impurity concentration is 10 ¹⁵ to 10 ²⁰ cm ^-3 . a) depositing an oxide film on an upper portion of a low-concentration n-type semiconductor substrate containing n-type impurities at a concentration of 10 ¹² to 10 ¹⁵ cm ^-3 , and then forming a low-concentration p-type ion implantation layer implanted with a dose of 10 ¹³ cm ^-2 or less;
b) forming a high-concentration p-type guard ring at the edge of the low-concentration p-type ion-implantation layer through impurity ion implantation and implanted with a dose of 10 ¹⁵ cm ^-2 or more formed deeper than the low-concentration p-type ion-implantation layer;
c) removing a portion of the oxide film to expose the inner low-concentration p-type ion implantation layer of the guard ring, and having an impurity concentration of 10 ¹⁹ to 10 ²⁰ cm ^-3 in contact with the exposed low-concentration p-type ion implantation layer Depositing a p-type epitaxial layer; and
d) forming a metal layer serving as an anode on a portion of the p-type epitaxial layer and forming an antireflection layer. According to claim 7,
c) step is,
A photodiode manufacturing method in which the upper portion of the p-type epitaxial layer is formed to be located within 100 nm from the device surface. According to claim 7 or 8,
and forming a junction termination region implanted with n-type impurity ions having a dose of 10 ¹⁵ cm ^-2 on a portion of the semiconductor substrate spaced apart from the low-concentration p-type ion implantation layer. According to claim 7 or 8,
The semiconductor substrate,
A photodiode manufacturing method characterized in that it is formed by implanting low-concentration n-type ions into a bulk substrate or by growing an epitaxial layer to include low-concentration n-type ions on top of the n-type substrate. According to claim 7 or 8,
The low-concentration p-type ion implantation layer,
A method for manufacturing a photodiode, characterized in that the ion implantation is performed so that the junction depth is 0.1 to 0.4 μm. According to claim 7 or 8,
The guard ring,
A photodiode manufacturing method characterized by implanting impurity ions such that the impurity concentration is 10 ¹⁵ to 10 ²⁰ cm ⁻³ .

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