CN116741757A - Packaging structure, processing method of packaging structure and electronic equipment - Google Patents

Packaging structure, processing method of packaging structure and electronic equipment Download PDF

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Publication number
CN116741757A
CN116741757A CN202211145958.0A CN202211145958A CN116741757A CN 116741757 A CN116741757 A CN 116741757A CN 202211145958 A CN202211145958 A CN 202211145958A CN 116741757 A CN116741757 A CN 116741757A
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CN
China
Prior art keywords
layer
substrate
groove
packaging
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211145958.0A
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Chinese (zh)
Inventor
郭学平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honor Device Co Ltd
Original Assignee
Honor Device Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honor Device Co Ltd filed Critical Honor Device Co Ltd
Priority to CN202211145958.0A priority Critical patent/CN116741757A/en
Publication of CN116741757A publication Critical patent/CN116741757A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package

Abstract

The application provides a packaging structure, a processing method of the packaging structure and electronic equipment, relates to the technical field of packaging, and is used for improving the integration level of the packaging structure and realizing the miniaturization design of the electronic equipment. The package structure includes: the antenna comprises a substrate, an electronic component, a first packaging layer, a second packaging layer, an antenna structure and a shielding layer, wherein the substrate comprises a first surface, and a grounding layer is arranged in the substrate; the electronic component is arranged on the first surface; the first packaging layer is arranged on the first surface and wraps the electronic components; the second packaging layer is arranged on the outer side of the first packaging layer and comprises laser sensitive plastic; the antenna structure is formed on the second packaging layer through a laser direct structuring technology; the shielding layer is arranged between the first packaging layer and the second packaging layer, and the shielding layer is electrically connected with the grounding layer.

Description

Packaging structure, processing method of packaging structure and electronic equipment
Technical Field
The present application relates to the field of device packaging technologies, and in particular, to a packaging structure, a processing method of the packaging structure, and an electronic device.
Background
With the continuous development of electronic devices, antennas are generally disposed in the electronic devices to implement wireless communication functions. However, in the related art, the antenna structure and the radio frequency device in the electronic device are separately designed, and the structure size is large, which occupies a large space, and is not beneficial to realizing the miniaturization design of the electronic device.
Disclosure of Invention
The embodiment of the application provides a packaging structure, a processing method of the packaging structure and electronic equipment, which are used for improving the integration level of the packaging structure and realizing the miniaturization design of the electronic equipment.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
in a first aspect, the present application provides a package structure, comprising: the antenna comprises a substrate, an electronic component, a first packaging layer, a second packaging layer, an antenna structure and a shielding layer, wherein the substrate comprises a first surface, and a grounding layer is arranged in the substrate; the electronic component is arranged on the first surface; the first packaging layer is arranged on the first surface and wraps the electronic components; the second packaging layer is arranged on the outer side of the first packaging layer and comprises laser sensitive plastic; the antenna structure is formed on the second packaging layer through a laser direct structuring technology; the shielding layer is arranged between the first packaging layer and the second packaging layer, and the shielding layer is electrically connected with the grounding layer.
According to the packaging structure provided by the embodiment of the application, the second plastic sealing layer comprising the laser sensitive plastic is arranged outside the first packaging layer of the packaging structure, and the antenna structure is integrally formed on the outer surface of the second packaging layer, so that the integration level of the packaging structure can be improved, the purposes of realizing miniaturization of electronic equipment, increasing functions of the electronic equipment and further improving the core competitiveness of the electronic equipment are achieved. Meanwhile, the shielding layer is arranged between the first packaging layer and the second packaging layer, and is electrically connected with the grounding layer in the substrate, so that electromagnetic interference between the antenna structure and electronic components in the first packaging layer can be avoided, other grounding components are not required to be arranged in the packaging structure, the overall size of the packaging structure can be reduced, the signal quality of the antenna structure can be improved, and the performance of the electronic components can be guaranteed.
In one implementation manner of the first aspect, the first packaging layer includes a first top surface facing away from the substrate, a first groove recessed toward the substrate is provided on the first top surface, the first groove includes a first groove bottom wall, the orientation of the first groove bottom wall is the same as the orientation of the first surface, and the orthographic projection of the first groove bottom wall on the first surface is a first projection; the second packaging layer comprises a second top wall, the second top wall is located at one side, away from the substrate, of the first packaging layer, the antenna structure comprises a first antenna portion, the first antenna portion is located at the second top wall, orthographic projection of the first antenna portion on the first surface is second projection, and the second projection is overlapped with the first projection. Specifically, the first projection and the second projection overlap, including both cases where the first projection and the second projection partially overlap and where the first projection and the second projection completely overlap. Therefore, by overlapping the first projection and the second projection, at least a part of the first antenna part is opposite to the first groove, the distance between the antenna structure and the first packaging layer can be increased, the clearance area of the antenna structure can be increased, and the performance of the antenna structure is ensured.
In one implementation of the first aspect, the first surface includes a first region, the first region not overlapping the first projection. That is, the orthographic projection of the bottom wall of the first groove on the first surface is staggered from the first area. The electronic component with the largest height on the first surface is a first component, and the first component is located in the first area. The height of the electronic component refers to the distance between one end of the electronic component, which is far away from the substrate, and the substrate. Therefore, the first component with the largest height is arranged in the first area, the packaging effect of the first packaging layer can be guaranteed, and meanwhile, the first groove can be formed on the first packaging layer conveniently, so that the clearance area of the antenna structure can be increased on the basis that the whole thickness of the first packaging layer is not increased, and the performance of the antenna structure can be guaranteed on the basis that the miniaturized design of the packaging structure is achieved.
In one implementation of the first aspect, the first region and the second region are arranged in a direction parallel to the first surface. Illustratively, the first and second regions are arranged in a length or width direction of the substrate.
In one implementation of the first aspect, the first surface includes a first region and a second region, the first region not overlapping the first projection. That is, the orthographic projection of the bottom wall of the first groove on the first surface is staggered from the first area. Optionally, the first projection overlaps the second region. The electronic component with the smallest height in the first area is a second component, the electronic component with the largest height in the second area is a third component, and the height of the third component is smaller than or equal to that of the second component. Specifically, the height of the second component is a first height h1, the height of the third component is a second height h2, and the first height h1 is greater than or equal to the second height h2. Thus, the first groove is more convenient to form on the first packaging layer, so that the clearance area of the antenna structure can be increased on the basis of not increasing the whole thickness of the first packaging layer, and the performance of the antenna structure can be ensured on the basis of realizing the miniaturized design of the packaging structure.
In one implementation of the first aspect, the first encapsulation layer includes a first encapsulation portion and a second encapsulation portion. The first packaging part and the second packaging part are arranged in a direction parallel to the first surface. The thickness of the first encapsulation part is larger than that of the second encapsulation part. The thickness of the first package portion refers to a distance between a surface of the first package portion, which is away from the substrate, and the first surface, and the thickness of the second package portion refers to a distance between a surface of the second package portion, which is away from the substrate, and the first surface. In this way, a first recess may be defined between the first and second package portions.
In one implementation of the first aspect, the first groove is a stepped groove. Simple structure and convenient processing.
In one implementation manner of the first aspect, the second packaging layer includes a second top wall, the second top wall is located at a side of the first packaging layer facing away from the substrate, and a mounting groove recessed toward the substrate is formed in the second top wall; the packaging structure further comprises a touch assembly, and the touch assembly is arranged in the mounting groove. Illustratively, the touch assembly may be secured within the mounting slot by way of embedding, clamping, bonding, or the like. Therefore, the occupied space of the touch assembly in the electronic equipment can be saved, and the whole volume of the electronic equipment is further reduced.
In one implementation manner of the first aspect, an appearance film layer is disposed on an outer surface of the second packaging layer. Thus, the appearance aesthetic degree of the electronic device can be improved.
In one implementation of the first aspect, the appearance coating layer is a wear layer. Therefore, the wear resistance of the packaging structure can be improved, and the packaging structure is prevented from being scratched.
In one implementation of the first aspect, the appearance of the appearance film layer is consistent with the appearance of the electronic device. Specifically, the package structure and the electronic device may use the same surface treatment process. Therefore, the appearance of the packaging structure is consistent with the appearance of the electronic equipment, so that when at least part of the packaging structure is arranged outside the accommodating space inside the electronic equipment, at least part of the outer surface of the packaging structure forms the appearance surface of the electronic equipment, the occupied space of the packaging structure can be saved, and the appearance attractiveness of the electronic equipment can be improved.
In one implementation manner of the first aspect, the color difference Δeab between the color of the appearance film layer and the color of the outer shell is 0-5. Therefore, the appearance color of the packaging structure is substantially the same as that of the shell, and the appearance consistency of the electronic equipment can be improved.
In one implementation of the first aspect, the color of the appearance coating layer is different from the color of the electronic device.
In an implementation manner of the first aspect, the package structure further includes: the first conductive piece and the second conductive piece are arranged in the first packaging layer and are electrically connected with the substrate; the second conductive piece is arranged in the second packaging layer, is electrically connected with the first conductive piece, and is electrically connected with the antenna structure. A feed point connection method of an antenna structure and a substrate is provided.
In an implementation manner of the first aspect, the first packaging layer includes a first top surface facing away from the substrate, a protruding portion is provided on the first top surface, the protruding portion protrudes towards a direction away from the substrate, and a portion of the first conductive element is located in the protruding portion. Therefore, through setting up the bellying at the one side surface that deviates from the base plate of first encapsulation layer, can increase the local thickness of first encapsulation layer, be favorable to increasing the height of first conductive piece, reduce the distance between the terminal surface that deviates from the base plate of first conductive piece and the surface of second encapsulation layer, on the one hand can shorten the length of the interconnection passageway between antenna structure and the first conductive piece, can reduce the loss of antenna structure in the feed point department, optimize antenna structure's performance, on the other hand, can reduce the local thickness of second encapsulation layer, in the scheme that antenna structure passes through TMV structure realization and is connected with first conductive piece electricity, can reduce the trompil degree of depth of first through-hole, reduce the processing degree of difficulty of first through-hole, improve the machining precision of first through-hole.
In one implementation manner of the first aspect, the first packaging layer includes a first top surface facing away from the substrate, a protruding portion and a first groove are disposed on the first top surface, protruding toward a direction away from the substrate, a portion of the first conductive element is located in the protruding portion, the first groove is recessed toward the substrate by the first top surface of the first packaging layer, and the first groove is disposed at a distance from the protruding portion.
In one implementation of the first aspect, the ground layer extends to a side of the substrate, and the shielding layer extends to a side of the substrate and is electrically connected to the ground layer.
In one implementation manner of the first aspect, a first routing layer is disposed in the substrate, and the first routing layer extends to a side surface of the substrate; the packaging structure further comprises a third conductive piece, the third conductive piece is used for electrically connecting the antenna structure and the first wiring layer, and the third conductive piece is located on the outer side of the second packaging layer. Like this, through exposing the first wiring layer outside the side of base plate, can realize through the third conductive part that is located the second encapsulation layer outside that the feed between base plate and the antenna structure is connected, need not to set up first conductive part in first encapsulation layer, also need not to set up the second conductive part in the second encapsulation layer, on the one hand can reduce the occupation space of first conductive part and second conductive part, be favorable to reducing the whole volume of packaging structure, on the other hand is favorable to shortening the distance of interconnection channel between antenna structure and the base plate, reduce antenna structure's feed loss, improve antenna structure's performance.
In an implementation manner of the first aspect, the substrate further includes a second surface, the second surface is disposed opposite to the first surface, a second groove is disposed on the substrate, the second groove is recessed from the first surface toward the second surface, the second groove penetrates through a side surface of the substrate, and a portion of the second packaging layer is located in the second groove. Therefore, the second peripheral wall of the second packaging layer and the side face of the substrate are coplanar, and the connection difficulty between the antenna structure and the third conductive piece is reduced.
In one implementation manner of the first aspect, a second groove is provided on the substrate, the second groove is recessed from the first surface toward the second surface, and the second groove penetrates through a side surface of the substrate; the grounding layer is exposed out of the inner wall of the second groove, and a part of the shielding layer is positioned in the second groove and is electrically connected with the grounding layer. The second groove comprises a second groove bottom wall and a second groove side wall, and the grounding layer is exposed out of the second groove bottom wall and/or the second groove side wall. In this way, it is convenient to achieve an electrical connection between the shield layer and the ground layer.
In one implementation of the first aspect, the second encapsulation layer includes a second top wall and a second peripheral wall, the second top wall being located on a side of the first encapsulation layer facing away from the substrate, the second peripheral wall surrounding an outer periphery of the second top wall; the antenna structure comprises a second antenna portion, at least part of which is located on the second peripheral wall. Thus, the distance between the antenna structure and the substrate is shortened, the feed loss of the antenna structure is reduced, and the performance of the antenna structure is improved.
In one implementation of the first aspect, the second encapsulation layer includes a second top wall and a second peripheral wall, the second top wall being located on a side of the first encapsulation layer facing away from the substrate, the second peripheral wall surrounding an outer periphery of the second top wall; the second peripheral wall is coplanar with the side surface of the substrate. Thus, the difficulty in electrical connection between the third conductive element and the antenna structure can be further reduced.
In one implementation of the first aspect, the second antenna portion extends to be flush with an end face of the second peripheral wall facing away from the second top wall. In this way, the third conductive member can be integrally provided on the side surface of the substrate. In this way, the electric connection between the antenna structure and the third conductive piece is convenient to realize, and the electric connection between the antenna structure and the third conductive piece can be realized only by arranging the third conductive piece on the side surface of the substrate, so that the processing difficulty of the third conductive piece can be reduced, the electric connection difficulty between the third conductive piece and the antenna structure can be reduced, the processing cost of the packaging structure can be reduced, and the processing efficiency of the packaging structure can be improved.
In one implementation of the first aspect, the third conductive member includes a first conductive portion and a second conductive portion connected to each other, the first conductive portion being located on a side surface of the substrate, the second conductive portion being located on the second peripheral wall. The first conductive part is electrically connected with the first wiring layer, and the second conductive part is electrically connected with the second antenna part.
In one implementation of the first aspect, the first conductive portion and the second conductive portion are coplanar. Like this, first conductive part and second conductive part can directly link to each other, can improve the connection reliability between first conductive part and the second conductive part when reducing the connection degree of difficulty between first conductive part and the second conductive part, avoid the third conductive part to take place the fracture between first conductive part and the second conductive part, and then can guarantee the connection reliability between antenna structure and the first wiring layer, be favorable to improving antenna structure's signal quality.
In one implementation of the first aspect, the groove inner wall of the second groove includes a second groove bottom wall and a second groove side wall, the second groove bottom wall facing the same direction as the first surface, the second groove side wall being located between the first surface and the second groove bottom wall; the substrate is provided with a third groove, the third groove comprises a third groove bottom wall, the orientation of the third groove bottom wall is the same as that of the second groove bottom wall, the third groove is recessed from the second groove bottom wall towards the second surface, the third groove penetrates through the side face of the substrate, the first wiring layer is exposed out of the third groove bottom wall and extends to the side face of the substrate, and a part of the second packaging layer is located in the third groove. Thus, the third conductive element may be integrally formed with the antenna structure during processing. Therefore, the connection reliability between the antenna structure and the first wiring layer can be improved, the processing technology of the packaging structure can be further simplified, and the processing cost is reduced.
In an implementation manner of the first aspect, the third conductive element and the second antenna portion are integrally formed. Therefore, the connection reliability between the antenna structure and the first wiring layer can be improved, the processing technology of the packaging structure can be further simplified, and the processing cost is reduced.
In one implementation manner of the first aspect, the antenna structure includes a first antenna portion and a second antenna portion, and the second antenna portion is L-shaped. The first antenna part is positioned on the second top wall of the second packaging layer, the second antenna part comprises a first part and a second part which are connected, the first part is positioned on the second top wall of the second packaging layer, and the second part is positioned on the second peripheral wall of the second packaging layer. The second portion extends to the side surface of the substrate and is electrically connected with the third conductive member. The second antenna portion may be electrically connected to the first antenna portion by means of the first portion. Therefore, by arranging one part of the antenna structure on the second top wall of the second packaging layer and arranging the other part of the antenna structure on the second peripheral wall of the second packaging layer, the arrangement area of the antenna structure can be increased on the premise of not increasing the whole volume of the packaging structure, and the signal quality of the antenna structure can be improved.
In a second aspect, the present application provides a method for processing a package structure, including: providing a substrate blank, wherein the substrate blank comprises one or more substrates, and a grounding layer is arranged in the substrates; arranging electronic components on the first surface of the substrate, so that the electronic components on the first surface are electrically connected with the substrate; forming a first packaging layer on the first surface, so that the electronic components on the first surface are covered and molded by the first packaging layer; forming a shielding layer on the outer surface of the first packaging layer, and enabling the shielding layer to be electrically connected with the grounding layer; forming a second encapsulation layer on the outer surface of the shielding layer, the second encapsulation layer comprising a laser sensitive plastic; and forming an antenna structure on the second packaging layer by adopting a laser direct structuring technology, and enabling the antenna structure to be electrically connected with the substrate.
In a possible implementation manner of the second aspect, before forming the first encapsulation layer on the first surface, the method further includes: a first conductive member is disposed on the first surface and electrically connected to the substrate.
In a possible implementation manner of the second aspect, before forming the shielding layer on the first packaging layer, the method further includes: and covering the end surface of the first conductive piece, which is far away from the substrate, with a protective piece. In this way, the first conductive member can be shielded by the protective member, so that metal pollution of the shielding layer to the first conductive member is avoided.
In a possible implementation manner of the second aspect, before forming the second encapsulation layer on the outer surface of the shielding layer, the method further includes: and removing the protective piece covering the second end of the first conductive piece. Thus, a first avoidance opening can be formed on the shielding layer, so that the end face, deviating from the substrate, of the first conductive element is exposed, and the second conductive element is electrically connected with the first conductive element.
In a possible implementation manner of the second aspect, after forming the second encapsulation layer on the outer surface of the shielding layer, the method further includes: and forming a first through hole in the second packaging layer, and filling a conductive material in the first through hole to form a second conductive piece.
In a possible implementation manner of the second aspect, before forming the second encapsulation layer on the outer surface of the shielding layer, the method further includes: and providing a second conductive member, and electrically connecting the second conductive member to one end of the first conductive member, which is far away from the substrate.
In a possible implementation manner of the second aspect, the substrate includes a second surface, where the second surface is disposed opposite to the first surface, and before the forming the shielding layer on the outer surface of the first packaging layer, the method further includes: the substrate is provided with a second groove, and the grounding layer is exposed out of the inner wall of the second groove. The second groove is recessed from the first surface towards the second surface, and penetrates through the side surface of the substrate.
In a possible implementation manner of the second aspect, before forming the second encapsulation layer on the outer surface of the shielding layer, the method further includes: forming a third groove on the substrate, and exposing the first wiring layer in the substrate to the third groove bottom wall of the third groove, wherein the third groove is recessed from the second groove bottom wall of the second groove towards the second surface, and the third groove penetrates through the side surface of the substrate, and the orientation of the second groove bottom wall and the orientation of the third groove bottom wall are consistent with the orientation of the first surface.
In a possible implementation manner of the second aspect, the processing method further includes: and a mounting groove is formed in the second packaging layer, and the touch module is arranged in the mounting groove. Therefore, the integration level of the packaging structure can be improved, the size of the electronic equipment is further reduced, and the miniaturization and light-weight design of the electronic equipment are realized.
In a possible implementation manner of the second aspect, forming the antenna structure on the second packaging layer by using a laser direct structuring technology includes: irradiating the area to be formed with the antenna structure on the second packaging layer by adopting laser, and ablating circuit trace traces on the outer surface of the second packaging layer so as to activate metal ions in the second packaging layer; and (3) adopting a chemical metal plating deposition process to perform metal patterning on the circuit trace to form the antenna structure.
In a possible implementation manner of the second aspect, the processing method further includes: and arranging electronic components on the second surface of the substrate, electrically connecting the electronic components on the second surface with the substrate, and forming a third packaging layer on the second surface of the substrate, so that the electronic components on the second surface are all covered and packaged by the third packaging layer.
In a third aspect, the present application provides an electronic device comprising: the packaging structure comprises a shell and a packaging structure, wherein a main board is arranged in the shell; the packaging structure is the packaging structure in any one of the technical schemes, or the packaging structure is the packaging structure prepared by any one of the processing methods, at least part of the packaging structure is positioned in the shell, and the packaging structure is electrically connected with the main board.
In a possible implementation manner of the third aspect, an opening is provided on the housing, the package structure is provided at the opening, and at least a part of a surface of the package structure forms an outer surface of the electronic device.
In a possible implementation manner of the third aspect, an appearance film layer is provided on an outer surface of the second packaging layer. Therefore, the occupied space of the packaging structure is saved, and the appearance attractiveness of the electronic equipment is improved.
In a possible implementation manner of the third aspect, the electronic device is a headset.
In a possible implementation manner of the third aspect, the housing includes an earplug housing and an earstem housing, a first accommodating space is defined in the earplug housing, a second accommodating space is defined in the earstem housing, the first accommodating space is communicated with the second accommodating space, and the first accommodating space and the second accommodating space together form an accommodating space in the housing.
In one possible implementation of the third aspect, the earplug housing includes a front shell and a rear shell.
In one possible implementation of the third aspect, the earstem housing includes first and second detachably connected shell portions. The first shell portion and the second shell portion are arranged in a thickness direction (i.e., a Z-axis direction) of the ear handle shell.
In one possible implementation of the third aspect, the earstem housing includes first and second detachably connected shell portions. The first shell portion and the second shell portion are arranged in a length direction (i.e., a Y-axis direction) of the ear handle housing.
In one possible implementation manner of the third aspect, the second shell portion and the rear shell of the earplug shell are of an integrally formed structure.
The technical effects caused by any implementation manner of the second aspect to the third aspect may refer to the technical effects caused by different implementation manners of the first aspect, which are not described herein.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to some embodiments of the present application;
FIG. 2 is an exploded view of the earphone body of the electronic device shown in FIG. 1;
fig. 3 is a schematic view of an earphone body according to other embodiments of the present application;
FIG. 4 is an exploded view of the earphone body shown in FIG. 3;
fig. 5 is an assembly schematic diagram of a package structure and a motherboard according to some embodiments of the present application;
FIG. 6 is a cross-sectional view of a substrate in the package structure of FIG. 5;
fig. 7 is an assembly schematic diagram of an antenna structure, a package structure and a motherboard according to some embodiments of the present application;
FIG. 8 is a schematic diagram of a package structure according to some embodiments of the present application;
FIG. 9 is a cross-sectional view of a package structure provided by other embodiments of the present application;
FIG. 10 is a schematic view of a substrate and a first package layer in the package structure shown in FIG. 9;
FIG. 11 is a schematic diagram illustrating a positional relationship between a first projection and a second projection according to some embodiments of the present application;
FIG. 12 is a schematic view showing the positional relationship between a first projection and a second projection according to other embodiments of the present application;
FIG. 13 is a schematic view showing a positional relationship between a first projection and a second projection according to still other embodiments of the present application;
FIG. 14 is a schematic view showing a positional relationship between a first projection and a second projection according to still other embodiments of the present application;
FIG. 15 is a cross-sectional view of a package structure provided by further embodiments of the present application;
FIG. 16 is a cross-sectional view of a package structure provided by further embodiments of the present application;
FIG. 17 is a cross-sectional view of a package structure provided by further embodiments of the present application;
FIG. 18 is a schematic view of a substrate in the package structure shown in FIGS. 16-17;
FIG. 19 is a cross-sectional view of a package structure provided by further embodiments of the present application;
FIG. 20 is a schematic view of a substrate in the package structure shown in FIG. 19;
FIG. 21 is a schematic view of a partial structure of the substrate shown in FIG. 20;
FIG. 22 is a cross-sectional view of a package structure provided by further embodiments of the present application;
FIG. 23 is a flowchart of a method for fabricating a package structure according to some embodiments of the present application;
FIG. 24 is a partial flow chart of a method of fabricating a package structure according to other embodiments of the present application;
FIG. 25 is a flowchart of a method for fabricating a package structure according to still other embodiments of the present application;
fig. 26 is a flowchart of a processing method of a package structure according to still other embodiments of the present application;
fig. 27 is a partial flow chart of a processing method of a package structure according to still other embodiments of the present application.
Reference numerals:
100. an electronic device; 100a, earphone body;
1. A housing; 11. an earplug shell; 11a, a first accommodating space; 111. a front shell; 111a, a first accommodation chamber; 111b, sound outlet holes; 1111. a main body portion; 1112. an extension; 112. a rear case; 112a, a second accommodation chamber;
12. an ear stem housing; 120. an opening portion; 121. a first shell portion; 1211. a charging contact; 122. a second shell portion;
13. a contact sleeve;
2. a speaker module; 3. a microphone; 4. a battery; 5. a main board;
6. a package structure; 6a, a protection piece;
61. a substrate; 610. a chip die; 611. a metal wiring layer; 612. an insulating dielectric layer; 613. a solder mask layer; 614. a bonding pad; 615. a hollow structure; 616. a ground layer; 617. a first wiring layer; 618. a second groove; 6181. a second trough bottom wall; 6182. a second groove sidewall; 619. a third groove; 6191. a third groove bottom wall; 6192. a third groove sidewall;
601. a first surface; 601a, a first region; 601b, a second region; 602. a second surface; 603. a side surface;
62. an electronic component; 62a, a first component; 62b, a second component; 62c, a third component;
63. a first encapsulation layer; 631. a first top surface; 632. a first outer peripheral surface; 633. a first groove; 6331. a first slot bottom wall; 6332. a first slot sidewall; 634. a boss; 63a, a first encapsulation part; 63b, a second encapsulation part;
64. A second encapsulation layer; 640. a first through hole; 641. a second top wall; 642. a second peripheral wall; 643. a mounting groove;
65. a third encapsulation layer; 651. a third top surface; 652. a third outer peripheral surface;
66. an adapter plate;
67. a shielding layer; 671. a first avoidance opening;
681. a first conductive member; 682. a second conductive member; 683. a third conductive member; 683a, a first conductive portion; 683b, a second conductive portion; 69. an appearance coating layer;
7. an antenna structure; 71. a first antenna section; 72. a second antenna section; 721. a first portion; 722. a second portion;
8. a circuit board; 9. a touch assembly.
Detailed Description
In embodiments of the present application, the terms "exemplary" or "such as" and the like are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
In embodiments of the present application, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
In the description of embodiments of the application, the term "at least one" means one or more, and "a plurality" means two or more. In the description of embodiments of the present application, the term "and/or" refers to and encompasses any and all possible combinations of one or more of the associated listed items. The term "and/or" is an association relationship describing an associated object, and means that there may be three relationships, for example, a and/or B, and may mean: a exists alone, A and B exist together, and B exists alone. In the present application, the character "/" generally indicates that the front and rear related objects are an or relationship.
In describing embodiments of the present application, it should be noted that, unless explicitly stated and limited otherwise, the terms "mounted," "connected," and "connected" should be construed broadly, and for example, "connected" may be either detachably connected or non-detachably connected; may be directly connected or indirectly connected through an intermediate medium. Wherein, "fixedly connected" means that the relative positional relationship is unchanged after being connected with each other. Furthermore, the term "coupled" may be a means of electrical connection for achieving signal transmission. "coupled" may be directly connected electrically, or indirectly connected electrically through an intermediary.
The application provides electronic equipment, which is internally provided with a packaging structure for improving the integration level of electronic components in the electronic equipment. In order to further reduce the volume of the electronic equipment and increase the functions of the electronic equipment, the second plastic sealing layer comprising the laser sensitive plastic is arranged outside the first sealing layer of the sealing structure, and the antenna structure is integrally formed on the outer surface of the second sealing layer, so that the integration level of the sealing structure can be improved, the purposes of realizing miniaturization of the electronic equipment, increasing the functions of the electronic equipment and further improving the core competitiveness of the electronic equipment are achieved. Meanwhile, the shielding layer is arranged between the first packaging layer and the second packaging layer, and is electrically connected with the grounding layer in the substrate, so that electromagnetic interference between the antenna structure and electronic components in the first packaging layer can be avoided, other grounding components are not required to be arranged in the packaging structure, the overall size of the packaging structure can be reduced, the signal quality of the antenna structure can be improved, and the performance of the electronic components can be guaranteed.
The electronic equipment provided by the application can be a product or a component with any display function, such as a mobile phone, a tablet personal computer, a display, a television, a digital photo frame, a personal digital assistant (personal digital assistant, PDA), a notebook computer, a vehicle-mounted computer, a navigator, a car stereo, a wearable device and the like. Wherein the wearable device includes, but is not limited to, headphones, smart bracelets, smart watches, smart head mounted displays, smart glasses, and the like.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device 100 according to some embodiments of the present application, where the electronic device 100 is an earphone. Optionally, the headphones are truly wireless stereo (true wireless stereo, TWS) headphones. Specifically, in the example of fig. 1, the electronic apparatus 100 includes two earphone bodies 100a, and the two earphone bodies 100a function as a left-ear earphone and a right-ear earphone, respectively. It will be appreciated that in other embodiments of the application, the electronic device 100 may be other types of headphones. Alternatively, in other embodiments, the electronic device 100 may also include only one earphone body 100a.
Referring to fig. 2, fig. 2 is an exploded view of a camera body 100a of the electronic device 100 shown in fig. 1. In the present embodiment, the earphone body 100a includes a housing 1, a speaker module 2, a microphone 3, a battery 4, a main board 5, and a package structure 6. It will be appreciated that fig. 2 and the following related drawings only schematically illustrate some of the components comprised by the earphone body 100a, and the actual shape, actual size, actual position and actual configuration of these components are not limited by fig. 2 and the following drawings.
The housing 1 has an accommodating space in which functional devices such as the speaker module 2, the microphone 3, the battery 4, and the main board 5 of the earphone body 100a are located. The housing 1 serves as a carrier for functional devices within the earphone body 100a for protecting the functional devices located within the housing 1.
Referring to fig. 1 and 2, the housing 1 may include an earplug housing 11 and an earstem housing 12. The earplug shell 11 defines a first accommodating space 11a therein, the earstem shell 12 defines a second accommodating space therein, the first accommodating space 11a is communicated with the second accommodating space, and the first accommodating space 11a and the second accommodating space together form an accommodating space in the shell 1.
Referring to fig. 2, the earplug housing 11 includes a front shell 111 and a rear shell 112. When the user wears the earphone body 100a, the front case 111 is positioned on a side facing the human ear, and the rear case 112 is positioned on a side facing away from the human ear. The earplug shell 11 is formed by assembling the front shell 111 and the rear shell 112, so that the front shell 111 and the rear shell 112 can be processed respectively, and the mold structure of the front shell 111 and the rear shell 112 is facilitated to be simplified, so that the molding difficulty of the front shell 111 and the rear shell 112 is reduced, and the processing and manufacturing difficulty of the earplug shell 11 is further reduced. Specifically, the front case 111 may be fixedly connected to the rear case 112 by a snap-fit manner. The front case 111 may also be coupled to the rear case 112 by screws. Alternatively, in other embodiments, the front case 111 may be fixedly coupled to the rear case 112 by glue or tape.
It should be noted that all directional indicators (such as front, rear, top, bottom … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicators are changed accordingly.
Referring to fig. 2, a first receiving chamber 111a is formed in the front case 111, and one side of the first receiving chamber 111a adjacent to the rear case 112 is opened. The rear shell 112 may have a second receiving cavity 112a formed therein, and a side of the second receiving cavity 112a adjacent to the front shell 111 is opened, so that the second receiving cavity 112a may communicate with the first receiving cavity 111a, and the second receiving cavity 112a and the first receiving cavity 111a may together constitute the first receiving space 11a in the earplug shell 11.
With continued reference to fig. 2, the front case 111 is formed with a sound outlet 111b in communication with the first accommodating cavity 111a, and sound in the earphone body 100a can be conducted to the outside of the earphone body 100a through the sound outlet 111 b. Specifically, the front case 111 may include a main body portion 1111 and an extension portion 1112. The extension portion 1112 may be provided at a side of the body portion 1111 away from the rear case 112, and extend in a direction away from the body portion 1111.
Referring to fig. 2, the main body 1111 may have the first receiving cavity 111a formed therein, and the sound outlet 111b is formed in the extension 1112. The body portion 1111 and the extension portion 1112 may be integrally formed. That is, the body portion 1111 and the extension portion 1112 are of a unitary structure. This can simplify the manufacturing process of the front case 111 while improving the connection strength between the body portion 1111 and the extension portion 1112.
Of course, the present application is not limited thereto, and the body portion 1111 and the extension portion 1112 may be formed by assembly. It will be appreciated that in other embodiments, the front shell 111 may not include the extension 1112, but may be directly provided with the sound hole 111b on the wall surface of the main body 1111.
In order to improve the comfort of the user wearing the earphone body 100a, with continued reference to fig. 2, the earphone body 100a may also be provided with a contact sleeve 13, which contact sleeve 13 may be used to contact the ear of the user. For example, the contact sleeve 13 may be disposed around the outer peripheral surface of the extension 1112, and the contact sleeve 13 may be similar in shape to the human auditory canal to improve the fit of wearing the earphone body 100 a. Meanwhile, the contact sleeve 13 may be made of a flexible material such as silicone rubber, etc., to further improve the comfort of the user wearing the earphone body 100 a. Of course, the earphone body 100a may not include the contact sleeve 13 in order to reduce the cost.
The material of the earplug housing 11 includes, but is not limited to, rigid plastic, metal, and a combination of plastic and metal. In order to achieve the light weight of the earphone body 100a, the earplug housing 11 may be made of hard plastic. The material of the ear stem housing 12 may be the same as that of the earplug housing 11 described above. Of course, the material of the ear stem housing 12 may be different from that of the earplug housing 11.
Referring to fig. 1-2, the earstem housing 12 is coupled to the earplug housing 11. Specifically, the earstem housing 12 may be attached to the side of the rear housing 112 remote from the front housing 111. In the embodiment shown in fig. 1 and 2, the ear stem housing 12 is elongated. The lug shell 12 is illustratively generally cube-shaped. For convenience of description of the embodiments below, an XYZ coordinate system is established. Specifically, the width direction of the ear stem case 12 is defined as the X-axis direction, the length direction of the ear stem case 12 is defined as the Y-axis direction, and the thickness direction of the ear stem case 12 is defined as the Z-axis direction. It will be appreciated that the coordinate system of the ear stem housing 12 may be flexibly set according to actual needs, and is not specifically limited herein. It will be appreciated that in other embodiments, the ear stem housing 12 may be formed in a cylindrical shape or the like.
In some embodiments, with continued reference to fig. 1-2, the earstem housing 12 includes a first shell portion 121 and a second shell portion 122 that are detachably connected. The first shell portion 121 and the second shell portion 122 are arranged in the thickness direction (i.e., Z-axis direction) of the ear handle shell 12. Specifically, the first shell portion 121 is located at a front side of the second shell portion 122. That is, the first shell portion 121 is located on a side of the second shell portion 122 adjacent to the human ear. Optionally, the first shell portion 121 and the second shell portion 122 are connected in a clamping manner through a clamping structure, so that the structure is simple, and the disassembly and the assembly are convenient. In this way, by providing the ear handle housing 12 with a structure including the first shell portion 121 and the second shell portion 122 that are detachable, the first shell portion 121 and the second shell portion 122 can be fastened after the internal structure of the earphone body 100a is mounted, so that the internal structure of the earphone body 100a can be mounted conveniently.
In some embodiments, the second shell portion 122 is of unitary construction with the rear shell 112 of the earplug housing 11. In this way, the process of the housing 1 can be simplified, and the connection strength of the second shell portion 122 and the rear shell 112 can be improved. It is understood that in other embodiments, the first and second shell portions 121, 122 may be aligned in the length direction (i.e., the Y-axis direction) of the earstem housing 12.
The battery 4 is used to supply electric power to electronic devices such as the main board 5, the speaker module 2, and the like in the earphone body 100 a. The battery 4 may be located in the first receiving space 11 a. The battery 4 may include, but is not limited to, a nickel cadmium battery, a nickel hydrogen battery, a lithium battery, or other types of batteries. In addition, the number of the batteries 4 in the embodiment of the present application may be plural or one. The mounting of the battery 4 in the housing 1 includes, but is not limited to, clamping, screwing or gluing. Referring to fig. 2, a charging contact 1211 may be provided on the ear stem housing 12, and the charging contact 1211 is electrically connected to the battery 4 to enable charging of the battery 4 by an external power source.
The speaker module 2 is an electroacoustic transducer device, and converts the acquired audio electric signal into a sound signal, and the sound signal is conducted to the outside of the earphone body 100a through the sound outlet 111 b. The speaker module 2 is electrically connected to the motherboard 5 to obtain audio signals such as music and voice. The speaker module 2 may be installed in the accommodating space. Specifically, referring to fig. 2, the speaker module 2 may be installed in the first accommodating space 11 a. The speaker module 2 is located on the side of the battery 4 close to the sound outlet 111 b. In this way, the battery 4 can be prevented from blocking the speaker module 2. The assembly between the speaker module 2 and the housing 1 includes, but is not limited to, clamping, screwing, gluing, etc.
The microphone 3 serves as a sound pickup device and may be used for collecting sound signals of a user. In different implementations, the number of microphones 3 may be one or more. The microphone 3 can convert a sound signal into an electrical signal to realize a function of inputting voice. On this basis, one or more pick-up holes corresponding to the microphone 3 can be arranged on the ear handle shell 12, and the sound of the user can be transmitted to the microphone 3 through the pick-up holes, so that the function of voice input is realized. The sound pick-up aperture may be provided at an end of the earstem housing 12 facing away from the earplug housing 11. Here, the sound pickup hole may be formed on the first casing portion 121 or on the second casing portion 122.
The main board 5 is used for integrating a main control chip, a Bluetooth chip and the like, and can be used for charging management, signal transmission and the like. The main board 5 is electrically connected with the battery 4, the speaker module 2 and other functional devices so as to realize signal control, data signal processing and other operations among different functional devices. Referring to fig. 2, the main board 5 may be accommodated in the accommodating space. Specifically, the main board 5 may be installed in the second accommodating space. The mounting of the main board 5 in the housing 1 includes, but is not limited to, clamping, screwing or gluing. The main board 5 may be a hard circuit board, a flexible circuit board, or a combination of a hard circuit board and a soft circuit board.
The package structure 6 encapsulates a plurality of electronic components. In some embodiments, the package structure 6 is a system in package (system in a package, SIP) structure. The system-in-package structure refers to packaging chips with different functions, such as a bluetooth chip, an audio decoding chip, and the like, in one package structure 6. In this way, by packaging a plurality of chips with different functions in one package structure 6, the space occupied by the chips in the earphone body 100a can be reduced as much as possible. In addition, since chips with different functions are packaged in one packaging structure 6, the number of rigid circuit boards in the main board 5 can be reduced, the structure of the main board 5 can be simplified, and the mounting process of the internal structure of the earphone body 100a can be simplified.
The packaging structure 6 is electrically connected with the main board 5, and the packaging structure 6 is electrically connected with the speaker module 2, the microphone 3 and the battery 4, so that the electronic components 62 in the packaging structure 6 are communicated to control each functional module to work.
In some embodiments, the package structure 6 and the motherboard 5 are electrically connected through a board-to-board (BTB) connector. Thus, the detachable electric connection between the packaging structure 6 and the main board 5 can be realized, the assembly between the packaging structure 6 and the main board 5 is convenient, and the subsequent maintenance and other works of the packaging structure 6 are convenient. In other embodiments, the package structure 6 and the motherboard 5 may be electrically connected by hot-pressing, soldering, or other manners.
In some embodiments, the encapsulation structure 6 is located entirely inside the housing 1. In other embodiments, at least a portion of the package structure 6 is exposed to the housing 1, in which case at least a portion of the surface of the package structure 6 may form an exterior surface of the earphone body 100 a.
Referring to fig. 3-4, fig. 3 is a schematic diagram of an earphone body 100a according to another embodiment of the application, and fig. 4 is an exploded view of the earphone body 100a shown in fig. 3. One side of the ear handle shell 12 in the present embodiment is opened to form an opening 120, the packaging structure 6 is disposed at the opening 120, and at least part of the packaging structure 6 is located outside the ear handle shell 12. Specifically, the packaging structure 6 may be located entirely outside the earstem housing 12, or a portion of the packaging structure 6 may be located within the earstem housing 12 and another portion of the packaging structure 6 may be located outside the earstem housing 12. In this way, the exterior surface of the package structure 6 forms the exterior surface of the earphone body 100a, so that the space of the package structure 6 in the ear stem case 12 can be reduced, and the space can be further saved by avoiding the gap and tolerance due to assembly.
Alternatively, the ear handle housing 12 in this embodiment is of an integral structure, and is simple in structure and convenient to process.
Referring to fig. 5, fig. 5 is an assembly schematic diagram of a package structure 6 and a motherboard 5 according to some embodiments of the present application. The package structure 6 includes a substrate 61, an electronic component 62, and a first package layer 63. It should be noted that fig. 5 only schematically illustrates some components included in the package structure 6, and the actual shape, actual size, actual position, and actual configuration of these components are not limited by fig. 5. In addition, the coordinate system in fig. 5 is represented as the same coordinate system as the coordinate systems in fig. 2 and 3. That is, the positional relationship of each component in the package structure 6 in fig. 5 in the coordinate system shown in fig. 5 is the same as the positional relationship of each component in the package structure 6 in the coordinate systems shown in fig. 2 and 3 when the package structure 6 is applied to the earphone body 100a shown in fig. 2 or 3.
The substrate 61 is a carrier for the encapsulation of the electronic component 62. The substrate 61 has a plate shape. The thickness direction of the substrate 61 is parallel to the Z-axis direction. In some embodiments, substrate 61 is a multi-layer high density package substrate fabricated by a printed circuit board process. Referring to fig. 6, fig. 6 is a cross-sectional view of a substrate 61 in the package structure 6 shown in fig. 5. The substrate 61 includes a metal wiring layer 611 and an insulating medium layer 612 that are alternately arranged in sequence, and a signal line is disposed on the metal wiring layer 611, so that electrical connection can be provided for a plurality of electronic components 62 disposed on the substrate 61, so as to realize the function of the packaged electronic components 62. The signal lines between the different metal trace layers 611 may be electrically connected by metallized vias.
Referring to fig. 6, the substrate 61 includes a first surface 601, a second surface 602, and a side 603. Specifically, the first surface 601 and the second surface 602 are disposed opposite to each other in the Z-axis direction, and the side 603 of the substrate 61 is connected between the first surface 601 and the second surface 602. The side 603 may be annular.
In some embodiments, pads 614 are provided on the first surface 601 and the second surface 602, the pads 614 being electrically connected to signal or ground lines within the substrate 61. Further, as shown in fig. 6, the substrate 61 further includes a solder mask layer 613, the solder mask layer 613 is disposed on the first surface 601 and the second surface 602, the solder mask layer 613 is provided with a hollow structure 615, and the bonding pad 614 is disposed at the hollow structure 615, such that the bonding pad 614 is exposed. The solder mask 613 may be green ink, black ink, or the like. The solder mask layer 613 can prevent solder from being deposited on the surface of the substrate 61 during the subsequent soldering process.
Referring to fig. 5, the electronic component 62 is disposed on the first surface 601 and the second surface 602 and is electrically connected to the substrate 61. Specifically, the electronic component 62 may be electrically connected to the substrate 61 via the pad 614. It will be appreciated that in other embodiments, the electronic components 62 may be disposed on only the first surface 601 or only the second surface 602.
Electronic components 62 may include active devices and passive devices. Wherein an active device is an element or means capable of providing or giving energy to a circuit. Illustratively, the active devices include Bluetooth chips, power chips, memory chips (e.g., flash memory chips), codecs, and the like. Passive components are devices that do not require any external power source to operate and are capable of storing energy in the form of voltage or current (e.g., capacitance) in a circuit. Illustratively, passive devices include R resistors, L inductors, C capacitors, radio frequency filters (RF Filter filters), and the like.
In some embodiments, the electrical connection between electronic component 62 and substrate 61 may be achieved through surface mount technology (surface mounted technology, SMT), wire bonding (also known as bonding), flip chip (flip chip), reflow soldering, laser soldering, and the like.
In some embodiments, in order to further improve the integration of the package structure 6 and save layout space, referring to fig. 5, a chip die 610 (also referred to as a chip die) is embedded in the substrate 61. In other embodiments, passive devices may also be embedded within substrate 61.
With continued reference to fig. 5, the first encapsulation layer 63 is disposed on the first surface 601 and encapsulates the electronic components 62 on the first surface 601. After the electronic components 62 are electrically connected to the first surface 601 of the substrate 61, the electronic components 62 may be wrapped by the first encapsulation layer 63, so as to isolate different electronic components 62 on the first surface 601 and isolate the electronic components 62 on the first surface 601 from external devices.
Referring to fig. 5, the first package layer 63 includes a first top surface 631 and a first peripheral surface 632, the first top surface 631 is a side surface of the first package layer 63 facing away from the substrate 61, the first top surface 631 faces the same direction as the first surface 601, and the first peripheral surface 632 surrounds the periphery of the first top surface 631. The first outer circumferential surface 632 may be connected between the first top surface 631 and the first surface 601. The first top surface 631 may include at least one of a plane surface and a cambered surface. That is, the first top surface 631 may include only a plane, may include only an arc surface, and may include both a plane and an arc surface.
The first encapsulation layer 63 may be formed on the first surface 601 by a molding (molding) process. The material of the first encapsulation layer 63 may be epoxy molding compound (epoxy molding compound, EMC). The epoxy plastic package material is a mixture composed of various components such as epoxy resin, filler, curing agent, additive and the like, the hardness of the epoxy plastic package material can be adjusted by adjusting the dosage and the characteristics of the filler and the additive, and the material characteristics of high heat conduction, high melting point and low thermal expansion coefficient (coefficient of thermal expansion, CTE) can be realized. Wherein the filler may be silicon oxide (SiO 2 ) Or inorganic materials such as Boron Nitride (BN). Of course, the material of the first encapsulation layer 63 may be other types of materials, such as ceramic or glass, which is not limited in particular.
Further, referring to fig. 5, the package structure 6 further includes a third package layer 65, where the third package layer 65 is disposed on the second surface 602 and wraps the electronic component 62 on the second surface 602. The third encapsulation layer 65 includes a third top surface 651 facing away from the substrate 61 and a third peripheral surface 652 surrounding the outer periphery of the third top surface 651. In this case, the package structure 6 is a double-sided package structure. The material and the processing technology of the third encapsulation layer 65 may be the same as those of the first encapsulation layer 63, and will not be described herein. It will be appreciated that in other embodiments, the third encapsulation layer 65 may not be disposed on the second surface 602, and in this case, the encapsulation structure 6 is a single-sided encapsulation structure.
In order to realize signal interconnection of the entire system of the package structure 6 with peripheral devices (such as the battery 4, the speaker module 2, the microphone 3, etc.), the second surface 602 of the substrate 61 is provided with a frame board 66 for realizing signal interconnection with the motherboard 5. The interposer 66 is electrically connected to the substrate 61 and the motherboard 5, respectively, so as to implement interconnection communication between the package structure 6 and the peripheral device.
The antenna structure 7 is used for transmitting and receiving electromagnetic wave signals to enable wireless communication between the earphone body 100a and external devices (e.g., a mobile phone, a tablet computer, etc.). In some embodiments, the antenna structure 7 is a bluetooth antenna. The earphone body 100a transmits data with an external device through bluetooth signals.
When the earphone body 100a is in an operating state, a radio frequency signal sent by the bluetooth chip can be transmitted to the antenna structure 7 through the radio frequency device so as to communicate with external equipment. Of course, the earphone body 100a may also receive signals through the antenna structure 7 and transmit the signals to the bluetooth chip through the radio frequency device, so as to realize the transceiver communication between the earphone body 100a and the external device. For example, the external device may transmit an audio signal to the earphone body 100a through the antenna structure 7, so as to play audio. As another example, the external device may receive an audio signal from the earphone body 100a through the antenna structure 7, and implement functions such as voice input. Thus, unlike the conventional wired earphone, separation of the earphone body 100a from the audio input/output device can be achieved, and the use is more convenient.
Referring to fig. 7, fig. 7 is an assembly schematic diagram of an antenna structure 7, a package structure 6 and a motherboard 5 according to some embodiments of the present application. The package structure 6 and the antenna structure 7 are electrically connected to opposite sides of the motherboard 5, respectively. Specifically, the antenna structure 7 is electrically connected to the main board 5 through the circuit board 8. Wherein the antenna structure 7 may be located on the side of the circuit board 8 facing away from the main board 5. The antenna structure 7 and the circuit board 8 and the main board 5 can be connected by gluing, welding and the like.
In the above embodiment, during assembly, the antenna structure 7, the motherboard 5 and the packaging structure 6 may be assembled together to form a module, and then the module is integrally assembled in the earphone body 100 a. In this way, the assembling steps of the earphone body 100a can be simplified, and the assembling efficiency can be improved. However, in the above embodiment, the antenna structure 7 and the packaging structure 6 are separate structures, and there is assembly tolerance in the assembly process, which occupies a large space, and is not beneficial to realizing the miniaturized design of the earphone body 100 a.
In order to solve the above-mentioned problems, please refer to fig. 8, fig. 8 is a schematic diagram of a package structure 6 according to some embodiments of the present application. The package structure 6 in the present embodiment is different from the package structure 6 in the embodiment shown in fig. 7 in that the package structure 6 in the present embodiment includes a second package layer 64 and an antenna structure 7 in addition to the substrate 61, the electronic component 62 and the first package layer 63.
Specifically, a ground layer 616 is provided in the substrate 61. The ground layer is used for grounding. The ground layer 616 may be one or more metal trace layers 611 of the plurality of metal trace layers 611. The shielding layer 67 is disposed on an outer surface of the first encapsulation layer 63 and is electrically connected to the ground layer 616 within the substrate 61. In this embodiment, referring to fig. 8, a shielding layer 67 is disposed on the entire outer surface of the first encapsulation layer 63. That is, the shielding layer 67 is provided on both the first top surface 631 and the first outer peripheral surface 632 of the first encapsulation layer 63. Illustratively, the first encapsulation layer 63 of the first encapsulation layer 63 has a substantially cubic structure, and shielding layers 67 are disposed on five surfaces of the first encapsulation layer 63. Thus, the electronic component 62 in the first encapsulation layer 63 can be electromagnetically shielded by the shielding layer 67.
In some embodiments, the shielding layer 67 may also cover the third outer peripheral surface 652 of the third encapsulation layer 65, or cover the third outer peripheral surface 652 and the third top surface 651 of the third encapsulation layer 65. Thus, the shielding layer 67 can not only electromagnetically shield the electronic component 62 in the first package layer 63, but also shield the electronic component 62 in the third package layer 65.
It will be appreciated that in other embodiments, the shielding layer 67 may be provided on only a portion of the outer surface of the first encapsulation layer 63.
The shielding layer 67 may be manufactured by a sputtering (sputtering) process, and the shielding layer 67 may have a three-layer metal film structure, such as a stainless steel layer (steel use stainless, SUS), a copper layer, and a stainless steel layer. Of course, the manufacturing of the shielding layer 67 may also be implemented by using a spraying process, a film coating process, or other processes, and the shielding layer 67 manufactured by using a spraying process may be made of a shielding material such as conductive silver paste.
In some embodiments, referring to fig. 8, the ground layer 616 extends to the side 603 of the substrate 61 and is exposed to the side 603 of the substrate 61, and the shielding layer 67 extends to the side 603 of the substrate 61 and is electrically connected to the ground layer 616. In this way, the shielding layer 67 can be directly electrically connected with the grounding layer 616 in the substrate 61, so as to realize the grounding arrangement of the shielding layer 67, ensure the shielding effect of the shielding layer 67, and reduce the occupied space of the grounding component without additionally arranging the grounding component in the packaging structure 6, thereby being beneficial to reducing the volume of the packaging structure 6, realizing the miniaturization design of the packaging structure 6 and further being beneficial to realizing the miniaturization design of the electronic device 100.
With continued reference to fig. 8, the second encapsulation layer 64 is disposed outside the first encapsulation layer 63, and specifically, the second encapsulation layer 64 may cover the outer surface of the shielding layer 67, where the shielding layer 67 is located between the first encapsulation layer 63 and the second encapsulation layer 64. The second encapsulation layer 64 may be formed on the outer surface of the shielding layer 67 through secondary molding. The second encapsulation layer 64 includes a second top wall 641 and a second peripheral wall 642. The second top wall 641 is positioned on the side of the first encapsulation layer 63 facing away from the substrate 61, and a second peripheral wall 642 surrounds the periphery of the second top wall 641. Specifically, the second top wall 641 is located on a side of the first encapsulation layer 63 facing away from the first surface 601 of the substrate 61.
The "outer side" of each component in the present application refers to the side of the component away from the center of the package structure 6. Specifically, "the outside of the first encapsulation layer 63" refers to the side of the first encapsulation layer 63 away from the encapsulation structure 6.
In this embodiment, the second encapsulation layer 64 is located on the side of the first encapsulation layer 63 facing away from the substrate 61 and on the circumferential outer side of the first encapsulation layer 63. That is, the second encapsulation layer 64 is located outside the first top surface 631 and outside the first outer peripheral surface 632 of the first encapsulation layer 63. It is understood that in other embodiments, the second encapsulation layer 64 may be disposed only outside the first top surface 631 of the first encapsulation layer 63, or the second encapsulation layer 64 may be disposed only outside at least one surface of the first outer peripheral surface 632.
The material of the second encapsulation layer 64 comprises a laser sensitive plastic, and the antenna structure 7 is formed on the outer surface of the second encapsulation layer 64. Specifically, the material of the second encapsulation layer 64 includes a mixture of a polymer material and a metal additive (metal additive), wherein the metal additive is sensitive to laser light. In this way, the antenna structure 7 may be formed on the second encapsulation layer 64 using a laser direct structuring technique (laser direct structuring, LDS).
The laser direct forming technology is to utilize a computer to control the movement of laser according to a circuit pattern track, irradiate the laser onto a molded three-dimensional plastic device, quickly activate a 3D circuit (three-dimensional circuit) pattern and form a metal circuit after electroless plating. During the processing, the surface of the second encapsulation layer 64 may be irradiated with laser light, a desired pattern or line may be formed on the surface of the second encapsulation layer 64, and the metal additive in the second encapsulation layer 64 may be excited to release metal particles by irradiation with laser energy, so that the second encapsulation layer 64 has electroless plating properties, and thus the antenna structure 7 may be formed on the surface of the second encapsulation layer 64 by electroless plating.
In some embodiments, referring to fig. 8, in order to form a feeding connection between the antenna structure 7 and the substrate 61, a first conductive element 681 is disposed in the first package layer 63, and a second conductive element 682 is disposed in the second package layer 64. The first conductive member 681 is electrically connected to the substrate 61, and the first conductive member 681 is electrically connected to the second conductive member 682, and the antenna structure 7 is electrically connected to the second conductive member 682. Specifically, the first conductive member 681 may be electrically connected to the rf device on the substrate 61. The radio frequency device includes a filter device, a signal amplifying device, and the like. The radio frequency device can be integrated in the Bluetooth chip or can be arranged in a split way with the Bluetooth chip.
In some embodiments, referring to fig. 8, the first conductive member 681 is a metal pillar. Illustratively, the first conductive member 681 is a copper pillar. The first conductive member 681 has a cylindrical shape. One end of the first conductive member 681 may be electrically connected to the substrate 61 by soldering, conductive adhesive bonding, or the like.
In order to facilitate the electrical connection between the first conductive element 681 and the second conductive element 682, after the first encapsulation layer 63 is formed on the first surface 601, the first encapsulation layer 63 may be locally thinned, so that an end surface of the first conductive element 681 facing away from the substrate 61 is exposed. Illustratively, an end surface of the first conductive member 681 facing away from the substrate 61 may be flush with the first top surface 631 of the first encapsulation layer 63. In other embodiments, the end surface of the first conductive member 681 facing away from the substrate 61 may be slightly lower than the first top surface 631.
Further, the shielding layer 67 is provided with a first escape opening 671, and the first conductive member 681 is opposite to the first escape opening 671. In this way, the end surface of the first conductive member 681 facing away from the substrate 61 may be exposed to the first escape opening 671, thereby facilitating the electrical connection between the first conductive member 681 and the second conductive member 682.
With continued reference to fig. 8, the second package layer 64 has a first through hole 640, the first through hole 640 penetrates through the second top wall 641 of the second package layer 64, and the second conductive member 682 is disposed in the first through hole 640. Specifically, a mechanical drilling or laser drilling method may be used to form the first through hole 640 on the second packaging layer 64, so as to form a molded through hole (through molding via, TMV) structure. The second conductive member 682 covers the inner wall surface of the first through hole 640, or the second conductive member 682 is filled in the second through hole. For example, the second conductive member 682 may be formed within the first through-hole 640 using evaporation, plating, coating, hole filling, and the like.
It is understood that in other embodiments, the second conductive member 682 may be a copper pillar. In this case, the second conductive member 682 may be electrically connected to the first conductive member 681 by welding, bonding, or the like, and then the second package layer 64 may be formed by performing a secondary plastic package on the outer side of the first package layer 63.
According to the packaging structure 6 in the embodiment of the application, the second packaging layer 64 comprising the laser sensitive plastic is arranged on the outer side of the first packaging layer 63, so that the antenna structure 7 can be integrated on the second packaging layer 64, the integrated packaging of the antenna structure 7 and the radio frequency device is realized, the integration level of the packaging structure 6 can be improved, the assembly process of the electronic equipment 100 can be simplified, gaps and tolerances caused by assembly can be avoided, the installation space of the antenna structure 7 is not required to be additionally designed, the whole occupied space of the packaging structure 6 can be reduced, the miniaturization design of the earphone body 100a can be realized, more space can be provided for the arrangement of other components in the earphone body 100a, the rear sound cavity space of the loudspeaker module 2 can be increased, the audio performance of the earphone body 100a can be improved, and the functions of the earphone body 100a can be increased.
In addition, in the package structure 6 in the embodiment of the present application, by disposing the shielding layer 67 between the first package layer 63 and the second package layer 64 and electrically connecting the shielding layer 67 with the ground layer 616 on the substrate 61, electromagnetic interference caused by the metal additive in the second package layer 64 to the electronic component 62 in the first package layer 63 can be avoided, electromagnetic interference caused by the electronic component 62 to the signal of the antenna structure 7 can be avoided, and performance of the electronic component 62 and signal quality of the antenna structure 7 can be ensured. In addition, since the shielding layer 67 is electrically connected with the ground layer 616 on the substrate 61, there is no need to additionally provide a grounding component in the package structure 6, which can reduce the occupied space of the ground structure, thereby being beneficial to reducing the volume of the package structure 6, realizing the miniaturized design of the package structure 6, and further being beneficial to realizing the miniaturized design and the light-weight design of the electronic device 100.
In some embodiments, referring to fig. 9, fig. 9 is a cross-sectional view of a package structure 6 according to other embodiments of the present application for further improving signal quality of an antenna structure 7. The package structure 6 in this embodiment is different from the package structure 6 shown in fig. 8 in that, in this embodiment, a first groove 633 is disposed on a first top surface 631 on the first package layer 63, and the first groove is recessed from a side surface (i.e., the first top surface 631) of the first package layer 63 facing away from the substrate 61 toward the substrate 61.
Referring to fig. 10, fig. 10 is a schematic structural diagram of a substrate 61 and a first package layer 63 in the package structure 6 shown in fig. 9. The first groove 633 comprises a first groove bottom wall 6331 and a first groove side wall 6332, the first groove bottom wall 6331 being oriented in line with the orientation of the first surface 601. In some embodiments, the first groove 633 forms a stepped groove through the first outer circumferential surface 632 of the first encapsulation layer 63. Thus, the packaging difficulty of the first packaging layer 63 can be reduced, and the processing efficiency can be improved. It is understood that in other embodiments, the first groove 633 may not penetrate the first outer peripheral surface 632 of the first encapsulation layer 63.
Referring to fig. 9 in combination with fig. 10, the first encapsulation layer 63 includes a first encapsulation portion 63a and a second encapsulation portion 63b. The first and second encapsulation portions 63a and 63b are arranged in a direction parallel to the first surface 601. The thickness of the first encapsulation portion 63a is greater than the thickness of the second encapsulation portion 63b. Here, the "thickness of the first encapsulation portion 63 a" refers to a distance between a side surface of the first encapsulation portion 63a facing away from the substrate 61 and the first surface 601, and the "thickness of the second encapsulation portion 63 b" refers to a distance between a side surface of the second encapsulation portion 63b facing away from the substrate 61 and the first surface 601. In this way, a first groove 633 may be defined between the first and second package parts 63a and 63b.
Further, at least part of the antenna structure 7 is formed on the second top wall 641 of the second encapsulation layer 64. In some embodiments, the antenna structure 7 is integrally formed in the second top wall 641. In other embodiments, a portion of the antenna structure 7 is formed on the second top wall 641 of the second encapsulation layer 64, and another portion may be formed on the second peripheral wall 642 of the second encapsulation layer 64. Referring to fig. 9, the antenna structure 7 includes a first antenna portion 71, and the first antenna portion 71 is located on the second top wall 641.
Wherein, the front projection of the first groove bottom wall 6331 on the first surface 601 is a first projection S1, the front projection of the antenna structure 7 (i.e., the first antenna portion 71) on the second top wall 641 on the first surface 601 is a second projection S2, and the first projection S1 overlaps the second projection S2. In this way, at least part of the antenna structure 7 can be opposite to the first groove 633, so that the distance between the antenna structure 7 and the first packaging layer 63 can be increased, the clearance area of the antenna structure 7 can be increased, the performance of the antenna structure 7 is ensured, and the signal quality of the antenna structure 7 is improved.
Specifically, the first projection S1 overlaps the second projection S2, including two cases where the first projection S1 overlaps the second projection S2 partially and where the first projection S1 overlaps the second projection S2 completely.
Referring to fig. 11, fig. 11 is a schematic diagram illustrating a positional relationship between a first projection S1 and a second projection S2 according to some embodiments of the application. In this embodiment, the first projection S1 and the second projection S2 partially overlap, and the outer contour of the second projection S2 is located within the outer contour of the first projection S1, that is, the second projection S2 may be included in the first projection S1, where the area of the second projection S2 is smaller than the area of the first projection S1. In this way, the antenna structures 7 on the second top wall 641 are opposite to the first grooves 633, so that the distance between the antenna structures 7 and the first packaging layer 63 can be increased, the clearance area of the antenna structures 7 can be increased, and the performance of the antenna structures 7 can be ensured.
Referring to fig. 12, fig. 12 is a schematic diagram illustrating a positional relationship between a first projection S1 and a second projection S2 according to another embodiment of the application. In this embodiment, the first projection S1 partially overlaps the second projection S2, and the first projection S1 and the second projection S2 intersect, where a portion of the first projection S1 coincides with a portion of the second projection S2, while another portion of the first projection S1 does not coincide with another portion of the second projection S2. S3 in fig. 12 is an overlapping portion of the first projection S1 and the second projection S2. In this way, a portion of the antenna structure 7 located on the second top wall 641 is opposite to the first groove 633, so that the distance between a portion of the antenna structure 7 and the first packaging layer 63 can be increased, and further the clearance area of the antenna structure 7 can be increased, and the performance of the antenna structure 7 is ensured.
Referring to fig. 13, fig. 13 is a schematic diagram illustrating a positional relationship between a first projection S1 and a second projection S2 according to still another embodiment of the application. In this embodiment, the first projection S1 and the second projection S2 are partially overlapped, and the outer contour of the first projection S1 is located within the outer contour of the second projection S2, that is, the first projection S1 is included in the second projection S2, and the area of the second projection S2 is larger than the area of the first projection S1. In this way, a portion of the antenna structure 7 located on the second top wall 641 is opposite to the first groove 633, so that the distance between a portion of the antenna structure 7 and the first packaging layer 63 can be increased, and further the clearance area of the antenna structure 7 can be increased, and the performance of the antenna structure 7 is ensured.
Referring to fig. 14, fig. 14 is a schematic diagram illustrating a positional relationship between a first projection S1 and a second projection S2 according to still another embodiment of the application. In this embodiment, the first projection S1 and the second projection S2 completely overlap, i.e. the outer contours of the first projection S1 and the second projection S2 completely overlap, and the area of the first projection S1 is equal to the area of the second projection S2. In this way, the antenna structures 7 on the second top wall 641 are opposite to the first grooves 633, so that the distance between the antenna structures 7 and the first packaging layer 63 can be increased, the clearance area of the antenna structures 7 can be increased, and the performance of the antenna structures 7 can be ensured.
It should be noted that, the term "the first projection S1 and the second projection S2 overlap completely" in the present application should be understood in a broad sense, that is, the first projection S1 and the second projection S2 overlap completely when the area of the first projection S1 is slightly larger or slightly smaller than the area of the second projection S2 due to the process error.
In some embodiments, referring back to fig. 10, the first surface 601 of the substrate 61 includes a first region 601a and a second region 601b. The first region 601a does not overlap the first projection S1. That is, the first region 601a is offset from the first projection S1. Optionally, the first projection S1 overlaps the second region 601b. The first encapsulation 63a is formed on the first region 601a, and the second encapsulation 63b is formed on the second region 601b.
Among the electronic components 62 on the first surface 601, the electronic component 62 with the largest height is a first component 62a, and the first component 62a is located in the first area 601a. The height of the electronic component 62 refers to a distance between an end of the electronic component 62 facing away from the substrate 61 and the substrate 61.
In this way, by disposing the first component 62a having the largest height in the first region 601a, the first groove 633 can be formed on the first package layer 63 conveniently while ensuring the packaging effect of the first package layer 63, so that the clearance region of the antenna structure 7 can be increased without increasing the overall thickness of the first package layer 63, and the performance of the antenna structure 7 can be ensured while realizing the miniaturization design of the package structure 6.
In some embodiments, among the electronic components 62 on the first region 601a, the electronic component 62 with the smallest height is the second component 62b, among the electronic components 62 on the second region 601b, the electronic component 62 with the largest height is the third component 62c, and the height of the third component 62c is smaller than or equal to the height of the second component 62 b. That is, the height of all the electronic components 62 on the second region 601b is less than or equal to the height of the electronic components 62 on the first region 601 a.
Referring to fig. 10, the second component 62b has a first height h1, the third component 62c has a second height h2, and the first height h1 is greater than or equal to the second height h2. In this way, it is more convenient to form the first grooves 633 on the first encapsulation layer 63.
In still other embodiments, referring to fig. 15, fig. 15 is a cross-sectional view of a package structure 6 according to still other embodiments of the present application. The package structure 6 in the present embodiment is different from the package structure 6 in the embodiment shown in fig. 9 in that the structure of the first package layer 63 in the present embodiment is different from the structure of the first package layer 63 shown in fig. 9. It is understood that the structure of the first encapsulation layer 63 in the embodiment of the present application may be combined with the encapsulation structure 6 in any of the embodiments of the present application.
Referring to fig. 15, in the present embodiment, a side surface of the first encapsulation layer 63 facing away from the substrate 61 (i.e. the first top surface 631) is provided with a protrusion 634. The boss 634 projects in a direction away from the substrate 61. Specifically, the first encapsulation layer 63 in the present embodiment includes a first encapsulation portion 63a and a second encapsulation portion 63b, and the protrusion 634 is provided on a side surface of the second encapsulation portion 63b facing away from the substrate 61. A portion of the first conductive member 681 is positioned within the boss 634. That is, in this embodiment, the first packaging layer 63 is provided with the protruding portion 634 in addition to the first groove 633.
The end surface of the first conductive member 681 facing away from the substrate may be flush with the side surface of the protrusion 634 facing away from the substrate 61, or the end surface of the first conductive member 681 facing away from the substrate may be slightly lower than the side surface of the protrusion 634 facing away from the substrate 61. In this way, by providing the protruding portion 634 on the surface of the side of the first packaging layer 63 facing away from the substrate 61, the local thickness of the first packaging layer 63 can be increased, which is favorable for increasing the height of the first conductive element 681, reducing the distance between the end surface of the first conductive element 681 facing away from the substrate and the outer surface of the second packaging layer 64, on the one hand, the length of the interconnection channel between the antenna structure 7 and the first conductive element 681 can be shortened, on the other hand, the loss of the antenna structure 7 at the feed point can be reduced, the performance of the antenna structure 7 can be optimized, on the other hand, the local thickness of the second packaging layer 64 (for example, the local thickness of the second top wall 641 can be reduced), and in the scheme that the antenna structure 7 is electrically connected with the first conductive element 681 through the TMV structure, the opening depth of the first through hole 640 can be reduced, the processing difficulty of the first through hole 640 can be reduced, and the processing precision of the first through hole 640 can be improved.
It will be appreciated that in other embodiments, only the above-mentioned protrusion 634 may be provided on the surface of the first encapsulation layer 63 facing away from the substrate 61, and the first recess 633 may not be provided.
In still other embodiments, referring to fig. 16, fig. 16 is a cross-sectional view of a package structure 6 according to still other embodiments of the present application. The package structure 6 in the present embodiment is different from the package structure 6 in the embodiment shown in fig. 9 in that the manner of electrical connection between the antenna structure 7 and the substrate 61 in the present embodiment is different.
Specifically, referring to fig. 16, a first wiring layer 617 is disposed in the substrate 61, and the rf device is electrically connected to the first wiring layer 617. That is, the plurality of metal trace layers 611 within the substrate 61 includes a first trace layer 617. The first trace layer 617 extends to the side 603 of the substrate 61 and is exposed at the side 603 of the substrate 61. The package structure 6 comprises a third conductive element 683 for electrically connecting the antenna structure 7 and the first wiring layer 617. The third conductive member 683 is located outside the second encapsulation layer 64. In this way, by exposing the first routing layer 617 to the side 603 of the substrate 61, the feeding connection between the substrate 61 and the antenna structure 7 can be achieved through the third conductive element 683 located outside the second packaging layer 64, there is no need to provide the first conductive element 681 in the first packaging layer 63 and the second conductive element 682 in the second packaging layer 64, on one hand, the occupied space of the first conductive element 681 and the second conductive element 682 can be reduced, which is beneficial to reducing the overall volume of the packaging structure 6, on the other hand, the distance of the interconnection channel between the antenna structure 7 and the substrate 61 can be reduced, the feeding loss of the antenna structure 7 can be reduced, and the performance of the antenna structure 7 can be improved.
Specifically, referring to fig. 16, at least a portion of the third conductive element 683 is located on the side 603 of the substrate 61 and is connected to the first trace layer 617. Illustratively, the third conductive member 683 may be formed on the side 603 of the substrate 61 by evaporation, spraying, coating, or the like. In this way, an electrical connection between third conductive element 683 and first trace layer 617 may be achieved.
On this basis, in order to facilitate the electrical connection between the antenna structure 7 and the first trace layer 617, at least part of the antenna structure 7 is located on the second peripheral wall 642 of the second encapsulation layer 64. In this way, the connection path between the antenna structure 7 and the third conductive member 683 can be shortened, so that the difficulty in electrical connection between the antenna structure 7 and the third conductive member 683 can be reduced, the feed point loss of the antenna structure 7 can be reduced, and the antenna quality can be improved.
For example, referring to fig. 16, the antenna structure 7 includes a first antenna portion 71 and a second antenna portion 72, the first antenna portion 71 is formed on the second top wall 641 of the second package layer 64, and the second antenna portion 72 has an L shape. The second antenna portion 72 includes a first portion 721 and a second portion 722 connected, the first portion 721 being located on the second top wall 641 of the second encapsulation layer 64, and the second portion 722 being located on the second peripheral wall 642 of the second encapsulation layer 64. The second portion 722 extends to the side 603 of the substrate 61 and is electrically connected to the third conductive element 683. The second antenna portion 72 may be electrically connected to the first antenna portion 71 via the first portion 721.
In this way, by disposing a portion of the antenna structure 7 on the second top wall 641 of the second package layer 64 and disposing another portion of the antenna structure 7 on the second peripheral wall 642 of the second package layer 64, the disposition area of the antenna structure 7 can be increased without increasing the overall volume of the package structure 6, which is advantageous for improving the signal quality of the antenna structure 7.
It will be appreciated that in other embodiments the antenna structure 7 may not include the first antenna portion 71, or that in still other embodiments the antenna structure may be disposed only on the second peripheral wall 642 of the second encapsulation layer 64. In this case, the antenna structure 7 includes only the second portion 722 of the second antenna portion 72.
With continued reference to fig. 16, the second peripheral wall 642 of the second encapsulation layer 64 is coplanar with the side 603 of the substrate 61. In this way, the difficulty of electrical connection between the third conductive member 683 and the antenna structure 7 can be further reduced.
On this basis, referring to fig. 16, the third conductive member 683 may be integrally disposed on the side 603 of the substrate 61, and the second antenna portion 72 may be extended to be flush with an end surface of the second peripheral wall 642 facing away from the second top wall 641, so that the second antenna portion 72 is connected to the third conductive member 683. In this way, the electric connection between the antenna structure 7 and the third conductive member 683 is convenient to be realized, and the electric connection between the antenna structure 7 and the third conductive member 683 can be realized only by arranging the third conductive member 683 on the side 603 of the substrate 61, so that the processing difficulty of the third conductive member 683 can be reduced, the electric connection difficulty between the third conductive member 683 and the antenna structure 7 can be reduced, the processing cost of the packaging structure 6 can be reduced, and the processing efficiency of the packaging structure 6 can be improved.
In still other embodiments, referring to fig. 17, fig. 17 is a cross-sectional view of a package structure 6 according to still other embodiments. The package structure 6 in the present embodiment is different from the package structure 6 shown in fig. 16 in that the package structure 6 in the embodiment shown in fig. 16, the third conductive member 683 is entirely located on the side surface of the substrate 61, whereas a part of the third conductive member 683 in the present embodiment is disposed on the side surface 603 of the substrate 61, and another part of the third conductive member 683 is disposed on the second peripheral wall 642.
Specifically, referring to fig. 17, the third conductive member 683 includes a first conductive portion 683a and a second conductive portion 683b connected to each other, the first conductive portion 683a is located on the side surface 603 of the substrate 61, and the second conductive portion 683b is located on the second peripheral wall 642. The first conductive portion 683a is electrically connected to the first wiring layer 617, and the second conductive portion 683b is electrically connected to the second antenna portion 72. Since the second peripheral wall 642 is coplanar with the side 603 of the substrate 61, the first conductive portion 683a and the second conductive portion 683b may be coplanar, so that the first conductive portion 683a and the second conductive portion 683b may be directly connected, so that the connection difficulty between the first conductive portion 683a and the second conductive portion 683b can be reduced, and meanwhile, the connection reliability between the first conductive portion 683a and the second conductive portion 683b can be improved, and the third conductive member 683 is prevented from breaking between the first conductive portion 683a and the second conductive portion 683b, so that the connection reliability between the antenna structure 7 and the first routing layer 617 can be ensured, thereby being beneficial to improving the signal quality of the antenna structure 7.
In order to achieve the co-planar arrangement of the second peripheral wall 642 and the side 603 of the substrate 61 and reduce the processing difficulty of the second encapsulation layer 64, refer to fig. 18, and fig. 18 is a schematic structural diagram of the substrate 61 in the encapsulation structure 6 shown in fig. 16-17. The substrate 61 is provided with a second groove 618, the second groove 618 is recessed from the first surface 601 of the substrate 61 toward the second surface 602, and the second groove 618 penetrates through the side 603 of the substrate 61. That is, the second groove 618 is formed as a stepped groove. A portion of the second encapsulation layer 64 is located within the second recess 618. The second groove 618 may be formed as a stepped groove around the periphery of the substrate 61, or may be formed as a stepped groove penetrating one side, two sides, three sides, or the like in the circumferential direction of the substrate 61.
With continued reference to fig. 18, the second groove 618 includes a second groove bottom wall 6181 and a second groove side wall 6182, the second groove bottom wall 6181 facing the same direction as the first surface 601, and the second groove side wall 6182 connected between the first surface 601 and the second groove bottom wall 6181. In this embodiment, the ground layer 616 is exposed on the second trench sidewall 6182, so, referring to fig. 16-17, the shielding layer 67 may cover the second trench sidewall 6182 and be connected to the ground layer 616. Specifically, the ground layer 616 may extend to the second trench sidewall 6182, such that the ground layer 616 is exposed from the second trench sidewall 6182. In this way, an electrical connection between the shield 67 and the ground layer 616 may be achieved.
It is understood that in other embodiments, the ground layer 616 may be exposed at the second groove bottom wall 6181. Alternatively, in still other embodiments, the ground layer 616 is exposed to the second trench sidewalls 6182 and exposed to the second trench bottom walls 6181. The shielding layer 67 may cover the inner walls of the grooves of the second grooves 618.
In still other embodiments, referring to fig. 19-20, fig. 19 is a cross-sectional view of a package structure 6 according to still other embodiments of the present application, and fig. 20 is a schematic structural diagram of a substrate 61 in the package structure 6 shown in fig. 19. The package structure 6 in this embodiment is different from the package structure 6 shown in fig. 16 in that the substrate 61 of the package structure 6 in this embodiment is provided with a third groove 619 in addition to the second groove 618.
Specifically, referring to fig. 21, fig. 21 is a schematic partial structure of the substrate shown in fig. 20. The third groove 619 is recessed from the second groove bottom wall 6181 of the second groove 618 toward the second surface 602 and the third groove 619 penetrates the side 603 of the substrate 61. The third groove 619 includes a third groove bottom wall 6191 and a third groove side wall 6192, the third groove bottom wall 6191 oriented in line with the orientation of the first surface 601, the third groove side wall 6192 located between the second groove bottom wall 6181 and the third groove bottom wall 6191.
The first wiring layer 617 is exposed at the third groove bottom wall 6191, and the first wiring layer 617 extends to the side 603 of the substrate 61, so that the first wiring layer 617 can be exposed at the third groove bottom wall 6191 and the side 603 of the substrate 61. Specifically, the end surface of the first trace layer 617 may extend to be flush with the side 603 of the substrate 61. On the basis of this, the antenna structure 7 may extend to the end face of the second peripheral wall 642 facing away from the second top wall 641. In this way, the third conductive element 683 may be integrally formed with the antenna structure 7 during processing. Thereby, the connection reliability between the antenna structure 7 and the first routing layer 617 can be improved, and the processing technology of the packaging structure 6 can be further simplified, and the processing cost can be reduced.
With reference to fig. 22, fig. 22 is a cross-sectional view of a package structure 6 according to still another embodiment of the present application. The package structure 6 in the present embodiment includes an exterior coating layer 69 in addition to the substrate 61, the electronic component 62, the first package layer 63, the shielding layer 67, the second package layer 64, and the antenna structure 7. It is understood that the appearance coating layer 69 in the embodiment of the present application may be combined with the package structure 6 in any of the embodiments of the present application.
An appearance coating layer 69 covers the outer surface of the second encapsulation layer 64. Specifically, the second top wall 641 and the second peripheral wall 642 of the second encapsulation layer 64 are each provided with an appearance film layer 69. The appearance of the appearance coating layer 69 may be identical to the appearance of the ear stem housing 12. Specifically, the packaging structure 6 and the ear stem housing 12 may use the same surface treatment process. In this way, when the packaging structure 6 is applied to the earphone body 100a shown in fig. 3-4, the appearance of the packaging structure 6 is kept consistent with the appearance of the earphone body 100a, so that the occupied space of the packaging structure 6 is saved and the appearance aesthetic degree of the earphone body 100a is improved.
In some embodiments, the color difference ΔEab of the appearance film layer 69 to the color of the earstem housing 12 is 0-5. That is, the color difference Δeab satisfies: ΔEab is 0.ltoreq.5, and further, ΔEab satisfies 0.ltoreq.ΔEab.ltoreq.2. The color difference is hardly visible when observed under macroscopic conditions. Thus, by controlling the color difference Δeab between the color of the exterior coating layer 69 and the color of the ear stem case 12 to be within 0 to 5, the color of the exterior coating layer 69 can be made substantially the same as the color of the ear stem case 12, and the exterior appearance of the electronic device 100 can be improved.
Taking two color samples as an example, if the two color samples are calibrated according to L, a and b, wherein L represents brightness, the range is 0-100, the darkest is 0, and the brightest is 100; a is the color change from green to red, the range is-128 to +128, pure green is negative 128, pure red is positive 128, and the range is divided into 256 levels; b is the color change from blue to yellow, the range is-128- +128, pure blue is negative 128, pure yellow is positive 128, and the interval is divided into 256 levels, and then the color calibration of two color samples is respectively as follows: the first color sample is marked as L1, a1 and b1; color sample two was designated L2, a2 and b2. The color difference Δeab between two color samples can be calculated using the following formula: color difference Δeab= [ (Δl) 2+ (Δa) 2+ (Δb) 2]1/2.
It will be appreciated that in other embodiments, the color of the outer cover 69 may be substantially different from the color of the earstem housing 12.
Optionally, the outer appearance coating layer 69 is a wear layer. In this way, the wear resistance of the package structure 6 can be improved.
In some embodiments, in order to further increase the integration level of the package structure 6 and reduce the volume of the earphone body 100a, referring to fig. 22, a mounting groove 643 recessed toward the substrate 61 is provided on the second top wall 641 of the second package layer 64, and the touch assembly 9 may be disposed in the mounting groove 643. Illustratively, the touch assembly 9 may be secured within the mounting slot 643 by way of a snap fit, an adhesive, or the like.
The touch assembly 9 may implement a touch control function of the earphone body 100 a. For example, the earphone body 100a may receive an instruction of the user through the touch assembly 9. The user's instruction may be inputted by touching, pressing, or the like. Thus, the integration level of the packaging structure 6 can be improved, the occupied space of the touch assembly 9 in the ear handle shell 12 is saved, the whole volume of the earphone body 100a is further reduced, the rear sound cavity space of the earphone body 100a is increased, and the audio performance of the earphone body 100a is improved.
The following describes a processing method of the package structure 6 according to some embodiments of the present application. The processing method is used to process the package structure 6, and the package structure 6 may be the package structure 6 in the above embodiment.
Referring to fig. 23, fig. 23 is a flowchart illustrating a processing method of the package structure 6 according to some embodiments of the present application. In the package structure 6 of the present embodiment, the first conductive member 681 is disposed in the first package layer 63, the second conductive member 682 is disposed in the second package layer 64, and the antenna structure 7 is connected to the substrate 61 by the second conductive member 682 and the first conductive member 681.
Specifically, the processing method of the packaging structure 6 includes:
step S100: providing a substrate blank comprising a plurality of substrates 61;
The plurality of substrates 61 may be sequentially connected as a unit to form a substrate blank. Alternatively, a plurality of substrates 61 may be placed side by side or arranged in an array. Thus, mass production of the package structure 6 can be realized, and the processing efficiency can be improved, and the cost can be reduced.
Referring to fig. 23, the substrate 61 includes a first surface 601 and a second surface 602 opposite to each other. A ground layer 616 is provided in the substrate 61.
Step S200: the electronic component 62 and the first conductive member 681 are disposed on the first surface 601 of the substrate 61, such that the electronic component 62 and the first conductive member 681 on the first surface 601 are electrically connected to the substrate 61;
referring to fig. 23, in performing step S200, the electronic components 62 may be arranged in regions according to the height of the electronic components 62. The electronic component 62 having a smaller height is provided in the same region of the substrate 61, and the electronic component 62 having a larger height is provided in another region of the substrate 61. In this way, in the subsequent packaging process, the first packaging layer 63 with different thickness is conveniently formed, and then the first groove 633 is conveniently formed on the first top surface 631 of the first packaging layer 63.
Of course, in other embodiments, the electronic components 62 may not be arranged in areas when the step S200 is performed.
With continued reference to fig. 23, the processing method of the package structure 6 further includes:
step S300: forming a first encapsulation layer 63 on the first surface 601, so that the electronic component 62 on the first surface 601 is encapsulated by the first encapsulation layer 63, and the end surface of the first conductive element 681 facing away from the substrate 61 is exposed out of the first encapsulation layer 63;
illustratively, the first encapsulation layer 63 may be formed on the first surface 601 by a molding (molding) process. The thickness of the first encapsulation layer 63 may be the same or different in different regions of the substrate 61. In this embodiment, a first groove 633 is formed on the first encapsulation layer 63. It is understood that in other embodiments, the first grooves 633 may not be formed on the first encapsulation layer 63. In addition, in the case where the first encapsulation layer 63 is provided with the protrusion 634, the protrusion 634 may also be formed in this step.
In order to enable the end surface of the first conductive element 681 facing away from the substrate 61 to be exposed to the first encapsulation layer 63, so as to facilitate the electrical connection between the first conductive element 681 and the second conductive element 682 in a subsequent process, in some embodiments, after the first encapsulation layer 63 is formed on the first surface 601, a local thinning process may be performed on the first encapsulation layer 63, so that the end surface of the first conductive element 681 facing away from the substrate 61 is exposed to the first encapsulation layer 63.
Since the substrate blank in the present embodiment includes a plurality of substrates 61, when the first encapsulation layer 63 is formed on the first surface 601 by a molding (molding) process in the process of performing step S300, the first encapsulation layers 63 corresponding to the different substrates 61 are connected as a whole. In order to facilitate formation of the shielding layer 67 on the outer peripheral surface of the first encapsulation layer 63, in a subsequent process, the first encapsulation layer 63 may be processed such that the first encapsulation layers 63 corresponding to the different substrates 61 are disposed at intervals.
With continued reference to fig. 23, the processing method further includes: step S301: processing the first encapsulation layer 63 such that the first encapsulation layers 63 on different substrates 61 are disposed at intervals;
referring to fig. 23, after step S301 is performed, first separation grooves 604 are formed between two first package layers 63 corresponding to two adjacent substrates 61, so that the first package layers 63 corresponding to different substrates 61 can be disposed at intervals. In this way, the shielding layer 67 is facilitated to be formed on the outer peripheral surface of the first encapsulation layer 63.
Further, referring to fig. 23, in order to facilitate electrical connection between the shielding layer 67 and the ground layer 616 in the substrate 61, the first spacer 604 penetrates the first surface 601 and the second surface 602 of the substrate 61, such that the side 603 of the substrate 61 is exposed, and such that the ground layer 616 is exposed on the side 603 of the substrate 61.
Step S302: the end face of the first conductive member 681 facing away from the substrate 61 is covered with the protective member 6a; in this way, the first conductive member 681 may be shielded by the protecting member 6a, so as to avoid metal contamination of the shielding layer 67 to the first conductive member 681, and after the shielding layer 67 is formed on the outer surface of the first packaging layer 63, the protecting member 6a is removed, so that an end surface of the first conductive member 681 facing away from the substrate 61 is exposed.
Optionally, the protective member 6a is a hydrosol or a high temperature adhesive tape. The hydrosol and the high-temperature adhesive tape have enough viscosity, good high-temperature resistance, can be used in an operation environment higher than 100 ℃ (at the temperature), are easy to remove and have less residues.
Step S400: forming a shielding layer 67 on an outer surface of the first encapsulation layer 63, and electrically connecting the shielding layer 67 with the ground layer 616;
in step S400, the shielding layer 67 may be simultaneously formed on the plurality of first encapsulation layers 63, and thus, the production efficiency may be improved. Of course, in other embodiments, the shielding layer 67 may also be formed on the first encapsulation layer 63, respectively.
Referring to fig. 23, the shielding layer 67 covers the entire outer surface of the first encapsulation layer 63, and the shielding layer 67 extends to the side 603 of the substrate 61 to be electrically connected to the ground layer 616.
Step S401: removing the protector 6a covering the second end of the first conductive member 681; in this way, the first escape opening 671 may be formed on the shielding layer 67 such that an end surface of the first conductive member 681 facing away from the substrate 61 is exposed.
Step S500: forming a second encapsulation layer 64 on an outer surface of the shielding layer 67, the second encapsulation layer 64 comprising a laser sensitive plastic;
specifically, the second encapsulation layer 64 may be formed on the outer surface of the shielding layer 67 using a two-shot molding process.
Referring to fig. 23, when the second encapsulation layers 64 are formed outside the shielding layers 67 corresponding to the different substrates 61 simultaneously, the second encapsulation layers 64 corresponding to the different substrates 61 are connected as a whole. In a subsequent process, the second encapsulation layer 64 may be processed such that the second encapsulation layers 64 corresponding to the different substrates 61 are separated from each other.
Step S501: forming a first through hole 640 in the second packaging layer 64, and filling a conductive material in the first through hole 640 to form a second conductive element 682 (also referred to as an antenna feed point); wherein the second conductive member 682 is electrically connected with the first conductive member 681;
by way of example, the first via 640 may be formed in the second encapsulation layer 64 using laser drilling or mechanical drilling.
Step S502: forming an antenna structure 7 on the second encapsulation layer 64 by using a laser direct structuring technology, wherein the antenna structure 7 is electrically connected with the second conductive member 682;
specifically, laser may be used to irradiate the area of the second packaging layer 64 where the antenna structure 7 is to be formed, and ablate the trace of the circuit trace on the outer surface of the second packaging layer 64, so as to activate the metal ions in the second packaging layer 64; and then, adopting a chemical metal plating deposition process to perform metal patterning on the circuit trace to form the antenna structure 7. In this embodiment, the antenna structure 7 is formed on the second top wall 641 of the second encapsulation layer 64.
Step S503: the second encapsulation layers 64 corresponding to the different substrates 61 are separated to form a plurality of independent encapsulation structures 6.
It is to be understood that in the processing method of the present application, the sequence of each step may be adjusted according to actual needs, and the sequence of the processing steps is not specifically limited in the present application.
In other embodiments, referring to fig. 24, fig. 24 is a partial flowchart of a processing method of the package structure 6 according to other embodiments of the present application. The processing method of the package structure 6 in the present embodiment is different from the processing method in the embodiment shown in fig. 23 in that the processing method in the present embodiment is used to manufacture a double-layer package structure 6, and the processing method shown in fig. 23 is used to manufacture a single-layer package structure 6.
Specifically, in the processing method of the package structure 6 in this embodiment, after forming the first package layer 63 on the first surface 601 of the substrate 61, the processing method further includes:
step S400b: arranging the electronic components 62 on the second surface 602 of the substrate 61, electrically connecting the electronic components 62 on the second surface 602 with the substrate 61, and forming a third packaging layer 65 on the second surface 602 of the substrate 61, so that the electronic components 62 on the second surface 602 are encapsulated by the third packaging layer 65;
on the basis of this, when the shielding layer 67 is formed on the first encapsulation layer 63, the shielding layer 67 may be formed on the outer peripheral wall of the third encapsulation layer 65 at the same time.
In still other embodiments, referring to fig. 25, fig. 25 is a flowchart illustrating a processing method of the package structure 6 according to still other embodiments of the present application. The processing method of the package structure 6 in the present embodiment is different from the processing method in the embodiment shown in fig. 23 in that in the processing method of the present embodiment, the substrate blank includes one substrate 61.
Specifically, the processing method of the package structure 6 in this embodiment includes:
step S100c: providing a substrate blank comprising a substrate 61;
referring to fig. 25, the substrate 61 includes a first surface 601 and a second surface 602 opposite to each other, and a side 603 between the first surface 601 and the second surface 602; a ground layer 616 is disposed in the substrate 61, and the ground layer 616 is exposed on the side 603 of the substrate 61;
Step S200c: the electronic component 62 and the first conductive member 681 are disposed on the first surface 601 of the substrate 61 such that the electronic component 62 and the first conductive member 681 on the first surface 601 are electrically connected to the substrate 61;
step S300c: forming a first encapsulation layer 63 on the first surface 601, so that the electronic component 62 and the first conductive element 681 on the first surface 601 are encapsulated by the first encapsulation layer 63, and the end surface of the first conductive element 681 facing away from the substrate 61 is exposed out of the first encapsulation layer 63;
step S301c: the end face of the first conductive member 681 facing away from the substrate 61 is covered with the protective member 6a;
step S400c: forming a shielding layer 67 on an outer surface of the first encapsulation layer 63, and electrically connecting the shielding layer 67 with the ground layer 616;
step S401c: removing the protector 6a covering the first conductive member 681;
step S500c: forming a second encapsulation layer 64 on an outer surface of the shielding layer 67, the second encapsulation layer 64 comprising a laser sensitive plastic;
step S501c: forming a first through hole 640 in the second packaging layer 64, and filling a conductive material in the first through hole 640 to form a second conductive piece 682;
step S502: an antenna structure 7 is formed on the second encapsulation layer 64 using a laser direct structuring technique, the antenna structure 7 being electrically connected to the second conductive member 682.
In still other embodiments, referring to fig. 26, fig. 26 is a flowchart illustrating a processing method of the package structure 6 according to still other embodiments of the present application.
Specifically, the processing method of the package structure 6 in this embodiment includes:
step S100d: providing a substrate blank comprising a plurality of substrates 61; the plurality of substrates 61 are placed side by side or arranged in an array.
Step S200d: disposing an electronic component 62 on a first surface 601 of the substrate 61 such that the electronic component 62 on the first surface 601 is electrically connected to the substrate 61;
step S300d: forming a first encapsulation layer 63 on the first surface 601, so that the electronic component 62 is encapsulated by the first encapsulation layer 63;
step S301d: forming a second groove 618 on the substrate 61, and exposing the ground layer 616 in the substrate 61 to a second groove sidewall 6182 of the second groove 618;
step S400d: forming a shielding layer 67 on an outer surface of the first encapsulation layer 63;
referring to fig. 26, the shielding layer 67 covers the outer surface of the first packaging layer 63 and covers the inner wall of the groove reaching the second groove 618, and the shielding layer 67 is electrically connected with the ground layer 616;
step S401d: forming a third groove 619 on the second groove bottom wall 6181 of the second groove 618, such that the first wiring layer 617 in the substrate 61 is exposed to the third groove side wall 6192 and the third groove bottom wall 6191 of the third groove 619;
Step S501d: forming a second encapsulation layer 64 on the outer surface of the shielding layer 67 and within the third recess 619, the second encapsulation layer 64 comprising a laser sensitive plastic;
step S502d: separating the second encapsulation layers 64 corresponding to the different substrates 61;
step S503d: the first antenna portion 71, the second antenna portion 72, and the third conductive member 683 are formed on the second encapsulation layer 64, resulting in the encapsulation structure 6.
On the basis of any of the above embodiments, please refer to fig. 27, fig. 27 is a partial flowchart of a processing method of the package structure 6 according to still other embodiments of the present application.
The processing method of the package structure 6 in the present embodiment is different from the processing method in the embodiment shown in fig. 26 in that, after forming the second package layer 64 on the shielding layer 67, the processing method of the package structure 6 further includes:
step S700: forming a mounting groove 643 recessed toward the substrate 61 on the second top wall 641 of the second encapsulation layer 64, and disposing the touch assembly 9 in the mounting groove 643;
step S800: an appearance coating layer 69 is formed on the outer surface of the second encapsulation layer 64. Therefore, the integration level of the packaging structure can be improved, the size of the electronic equipment is further reduced, and the miniaturization and light-weight design of the electronic equipment are realized.
It will be appreciated that steps S700 and S800 may be combined with the processing methods of any of the embodiments described above.
In the description of the present specification, a particular feature, structure, material, or characteristic may be combined in any suitable manner in one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims (22)

1. A package structure, comprising:
the substrate comprises a first surface, and a grounding layer is arranged in the substrate;
the electronic component is arranged on the first surface of the substrate;
the first packaging layer is arranged on the first surface and wraps the electronic component;
The second packaging layer is arranged on the outer side of the first packaging layer and comprises laser sensitive plastics;
the antenna structure is arranged on the second packaging layer and is formed by a laser direct structuring technology;
the shielding layer is arranged between the first packaging layer and the second packaging layer, and the shielding layer is electrically connected with the grounding layer.
2. The package structure of claim 1, wherein the first package layer includes a first top surface facing away from the substrate, the first top surface having a first groove recessed toward the substrate, the first groove including a first groove bottom wall facing the same direction as the first surface, an orthographic projection of the first groove bottom wall on the first surface being a first projection;
the second packaging layer comprises a second top wall, the second top wall is positioned on one side of the first packaging layer, which is away from the substrate, the antenna structure comprises a first antenna part, the first antenna part is positioned on the second top wall, and the orthographic projection of the first antenna part on the first surface is a second projection; wherein,
The second projection overlaps the first projection.
3. The package structure of claim 2, wherein the first surface includes a first region, the first region does not overlap the first projection, and the electronic component having the largest height on the first surface is a first component, wherein the first component is located in the first region.
4. The package structure of claim 2 or 3, wherein the first surface includes a first region and a second region, the first region and the first projection do not overlap, the electronic component with the smallest height on the first region is a second component, and the electronic component with the largest height on the second region is a third component, wherein the height of the third component is less than or equal to the height of the second component.
5. The package structure according to any one of claims 1 to 4, wherein the second package layer comprises a second top wall, the second top wall is located on a side of the first package layer facing away from the substrate, and a mounting groove recessed toward the substrate is formed in the second top wall;
the packaging structure further comprises a touch assembly, and the touch assembly is arranged in the mounting groove.
6. The package structure according to any one of claims 1 to 5, wherein an exterior coating layer is provided on an outer surface of the second package layer.
7. The package structure of any one of claims 1-6, further comprising:
the first conductive piece is arranged in the first packaging layer and is electrically connected with the substrate;
the second conductive piece is arranged in the second packaging layer, is electrically connected with the first conductive piece, and is electrically connected with the antenna structure.
8. The package structure of claim 7, wherein the first package layer includes a first top surface facing away from the substrate, the first top surface having a protrusion thereon, the protrusion protruding away from the substrate, a portion of the first conductive element being located within the protrusion.
9. The package structure of any one of claims 1-8, wherein the ground layer extends to a side of the substrate and the shield layer extends to a side of the substrate and is electrically connected to the ground layer.
10. The package structure according to any one of claims 1-6, wherein a first wiring layer is provided in the substrate, the first wiring layer extending to a side surface of the substrate;
The packaging structure further comprises a third conductive piece, wherein the third conductive piece is used for electrically connecting the antenna structure and the first wiring layer, and the third conductive piece is located on the outer side of the second packaging layer.
11. The package structure of claim 10, wherein the substrate further comprises a second surface, the second surface is opposite to the first surface, a second groove is formed on the substrate, the second groove is recessed from the first surface toward the second surface, and the second groove penetrates through a side surface of the substrate;
the grounding layer is exposed out of the inner wall of the second groove, and a part of the shielding layer is positioned in the second groove and is electrically connected with the grounding layer.
12. The package structure of claim 11, wherein the second encapsulation layer includes a second top wall and a second peripheral wall, the second top wall being located on a side of the first encapsulation layer facing away from the substrate, the second peripheral wall surrounding an outer periphery of the second top wall;
the antenna structure includes a second antenna portion, at least a portion of which is located on the second peripheral wall.
13. The package structure of claim 12, wherein the second antenna portion extends to be flush with an end surface of the second peripheral wall facing away from the second top wall.
14. The package structure according to any one of claims 11-13, wherein the second package layer comprises a second top wall and a second peripheral wall, the second top wall being located on a side of the first package layer facing away from the substrate, the second peripheral wall surrounding an outer periphery of the second top wall;
the second peripheral wall is coplanar with a side surface of the substrate.
15. The package structure of claim 14, wherein the second groove inner wall includes a second groove bottom wall and a second groove side wall, the second groove bottom wall facing the same direction as the first surface, the second groove side wall being located between the first surface and the second groove bottom wall;
the substrate is provided with a third groove, the third groove is recessed from the bottom wall of the second groove towards the second surface, the third groove penetrates through the side face of the substrate, the third groove comprises a third groove bottom wall, the direction of the third groove bottom wall is the same as the direction of the second groove bottom wall, the first wiring layer is exposed out of the third groove bottom wall, and a part of the second packaging layer is located in the third groove.
16. The processing method of the packaging structure is characterized by comprising the following steps of:
Providing a substrate blank, wherein the substrate blank comprises one or more substrates, and a grounding layer is arranged in each substrate;
arranging an electronic component on a first surface of the substrate, and electrically connecting the electronic component on the first surface with the substrate;
forming a first packaging layer on the first surface, so that the electronic component on the first surface is covered and packaged by the first packaging layer;
forming a shielding layer on the outer surface of the first packaging layer, and enabling the shielding layer to be electrically connected with the grounding layer;
forming a second encapsulation layer on the outer surface of the shielding layer, wherein the second encapsulation layer comprises laser sensitive plastics;
and forming an antenna structure on the second packaging layer by adopting a laser direct structuring technology, and enabling the antenna structure to be electrically connected with the substrate.
17. The method of processing of claim 16, further comprising, prior to forming the first encapsulation layer on the first surface: a first conductive member is disposed on the first surface and electrically connected to the substrate.
18. The method of processing of claim 16, wherein the substrate includes a second surface disposed opposite the first surface, the second surface further comprising, prior to forming the shielding layer on the outer surface of the first encapsulation layer:
And a second groove is formed in the substrate, and the grounding layer is exposed out of the inner wall of the second groove, wherein the second groove is recessed from the first surface towards the second surface, and the second groove penetrates through the side surface of the substrate.
19. The method of processing of claim 18, further comprising, prior to forming the second encapsulation layer on the outer surface of the shielding layer: forming a third groove on the substrate, and enabling the first wiring layer in the substrate to be exposed out of the third groove bottom wall of the third groove, wherein the third groove is recessed from the second groove bottom wall of the second groove towards the second surface, and the third groove penetrates through the side surface of the substrate, and the orientation of the second groove bottom wall and the orientation of the third groove bottom wall are consistent with the orientation of the first surface.
20. An electronic device, comprising:
the shell is internally provided with a main board;
the packaging structure is any one of the packaging structures 1-15, at least part of the packaging structure is positioned in the shell, and the packaging structure is electrically connected with the main board.
21. The electronic device of claim 20, wherein an opening is provided in the housing, and a packaging structure is provided at the opening, at least a portion of a surface of the packaging structure forming an outer surface of the electronic device.
22. The electronic device of claim 21, wherein an exterior coating layer is disposed on an exterior surface of the second encapsulation layer.
CN202211145958.0A 2022-09-20 2022-09-20 Packaging structure, processing method of packaging structure and electronic equipment Pending CN116741757A (en)

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