CN116706684A - Preparation method of semiconductor laser - Google Patents
Preparation method of semiconductor laser Download PDFInfo
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- CN116706684A CN116706684A CN202310844969.6A CN202310844969A CN116706684A CN 116706684 A CN116706684 A CN 116706684A CN 202310844969 A CN202310844969 A CN 202310844969A CN 116706684 A CN116706684 A CN 116706684A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 73
- 238000002360 preparation method Methods 0.000 title abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 91
- 239000002313 adhesive film Substances 0.000 claims abstract description 79
- 238000002161 passivation Methods 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims abstract description 48
- 238000005530 etching Methods 0.000 claims abstract description 41
- 230000008569 process Effects 0.000 claims abstract description 36
- 239000003292 glue Substances 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 238000002347 injection Methods 0.000 claims abstract description 14
- 239000007924 injection Substances 0.000 claims abstract description 14
- 238000004049 embossing Methods 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims description 12
- 238000004528 spin coating Methods 0.000 claims description 7
- 238000003848 UV Light-Curing Methods 0.000 claims description 6
- 238000001029 thermal curing Methods 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 5
- 238000001020 plasma etching Methods 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 238000001723 curing Methods 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 239000007853 buffer solution Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2202—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure by making a groove in the upper laser structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0425—Electrodes, e.g. characterised by the structure
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Semiconductor Lasers (AREA)
Abstract
A method of fabricating a semiconductor laser, comprising: forming passivation layers on the bottom surfaces of the grooves, the side wall surfaces of the ridge regions and the tops of the ridge regions; forming a glue film on the surface of the passivation layer, wherein the surface of the glue film in the groove is lower than the surface of the glue film on the top of the ridge area; providing a flat substrate, embossing the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, so that the thickness of the adhesive film at the top of the ridge area is far smaller than that of the adhesive film in the groove; then, curing the adhesive film, and removing the flat substrate; then, removing the adhesive film on the top of the ridge area by adopting a maskless etching process; and then, etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer at the bottom surface of the groove and the side wall surface of the ridge region as a mask to form a current injection window. The preparation method of the semiconductor laser can obtain a high-efficiency high-quality current injection window.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a semiconductor laser.
Background
Gallium nitride (GaN) semiconductor laser has monochromaticity, high efficiency, high power density, good directivity, low cost, small volume, and spectrum coverage of near infrared, visible light and ultraviolet full wave bands, and is a novel semiconductor high-efficiency light source indispensable for the strategic emerging industries such as laser display, laser illumination, laser direct writing, laser processing, visible light communication and the like. The single-mode gallium nitride laser has the advantages of good beam quality, convenient thermal management, compact structure, convenient use and huge market prospect.
The width of the ridge waveguide of the single-mode gallium nitride laser is generally below 2um, and the low threshold current single-mode lasing greatly depends on whether a narrow ridge waveguide can be made or not.
There are two conventional methods for fabricating the current injection window: the first is an alignment method, in which a ridge waveguide structure is etched by an ICP process, and then a layer of SiO is deposited on the ridge waveguide structure by a PECVD process 2 Layer of SiO 2 Spin-coating photoresist on the surface of the layer, performing overlay exposure by using a mask plate with a line width smaller than the width of the ridge waveguide structure, and etching off SiO at the top of the ridge waveguide structure by using ammonium fluoride buffer solution after development 2 And a layer forming a current injection window. For narrow ridge waveguide structures with the width of less than 2um, due to the precision of a photoetching machine, the alignment is difficult, and the alignment is difficult to SiO 2 The layer is easy to cause defects such as over-corrosion and the like; the second method is stripping method, which uses photoresist as mask to etch out ridge region, and does not remove photoresist after etching, directly deposits SiO on the photoresist and semiconductor film around ridge region 2 The layer is finally stripped to obtain a current injection window, and the method has the defects of difficult stripping and SiO at the edge of the current injection window 2 And the layer is easy to fall off. Therefore, the current injection window is obtained by stripping or sleeving the narrow ridge waveguide, the process difficulty is high, the efficiency is low, and the quality is poor.
Disclosure of Invention
The invention aims to solve the technical problem of how to obtain a high-efficiency high-quality current injection window in the prior art, thereby providing a preparation method of a semiconductor laser.
The invention provides a preparation method of a semiconductor laser, which comprises the following steps: providing a semiconductor substrate layer; forming a device structure layer on the semiconductor substrate layer; etching part of the device structure layer to form a plurality of grooves in the device structure layer, wherein the device structure layer between adjacent grooves forms a ridge area; forming passivation layers on the bottom surfaces of the grooves, the side wall surfaces of the ridge areas and the tops of the ridge areas; forming a glue film on the surface of the passivation layer, wherein the surface of the glue film in the groove is lower than the surface of the glue film on the top of the ridge region; providing a flat substrate, embossing the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, so that the thickness of the adhesive film at the top of the ridge area is far smaller than that of the adhesive film in the groove; after imprinting the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, solidifying the adhesive film, and removing the flat substrate; solidifying the adhesive film, removing the flat substrate, and removing the adhesive film at the top of the ridge area by adopting a maskless etching process; and after removing the adhesive film at the top of the ridge region by adopting a maskless etching process, etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region as a mask, so as to form a current injection window.
Optionally, the step of forming a device structure layer on the semiconductor substrate layer includes: sequentially forming a lower limit layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limit layer which are stacked on the semiconductor substrate layer; etching a portion of the device structure layer to form a plurality of grooves in the device structure layer, the device structure layer between adjacent grooves forming a ridge region, the step of including: the upper confinement layer is etched to form a plurality of recesses in the upper confinement layer, the upper confinement layer between adjacent recesses constituting a ridge region.
Optionally, the step of forming a device structure layer on the semiconductor substrate layer further includes: forming an additional confinement layer on a surface of the upper confinement layer on a side facing away from the semiconductor substrate layer; etching a portion of the device structure layer to form a plurality of grooves in the device structure layer, the device structure layer between adjacent grooves forming a ridge region, the step of including: the additional confinement layer and the upper confinement layer are etched to form a plurality of grooves in the additional confinement layer and the upper confinement layer, the additional confinement layer and the upper confinement layer between adjacent grooves constituting a ridge region.
Optionally, the additional confinement layer comprises a transparent conductive film, or the additional confinement layer comprises one or more of a Ni layer, a Ti layer, a Pd layer, a Pt layer, and an Au layer.
Optionally, the thickness of the additional limiting layer is 100 nm-300 nm.
Optionally, the ridge region has a width of less than or equal to 2 microns.
Optionally, the material of the flat substrate includes quartz or sapphire.
Optionally, the thickness of the flat substrate is 100 micrometers to 500 micrometers.
Optionally, in the step of imprinting the flat substrate on a side of the ridge region facing away from the semiconductor substrate layer, a pressure of 100mbar to 500mbar is applied to the flat substrate.
Optionally, after the flat substrate is stamped on the side of the ridge region away from the semiconductor substrate layer, the thickness of the adhesive film on the top of the ridge region is 10 nm-50 nm.
Optionally, the step of forming a glue film on the surface of the passivation layer includes: spin-coating an initial adhesive film on the surface of the passivation layer; and soft baking the initial adhesive film to form the adhesive film.
Optionally, the parameters of spin-coating the initial adhesive film on the surface of the passivation layer include: the rotation speed is 2000-3000 rpm, and the time is 30-60 seconds.
Optionally, the parameters for soft baking the initial adhesive film include: the temperature is 50-100 ℃ and the time is 30-40 seconds.
Optionally, in the step of forming a glue film on the surface of the passivation layer, the thickness of the glue film is 100nm-500nm.
Optionally, the thickness of the passivation layer is 100nm-500nm.
Optionally, the process of curing the adhesive film is thermal curing or UV light curing.
Optionally, the parameters of thermal curing include: the temperature is 100-200 ℃.
Optionally, the parameters of UV light curing include: the wavelength is 365nm-405nm, and the optical power is 100mW/cm 2 －500mW/cm 2 。
Optionally, the maskless etching process is a plasma etching process.
Optionally, the parameters of the plasma etching process include: the sampled gas includes oxygen and the source rf power is 100W-300W.
Optionally, the method further comprises: etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region as a mask, and removing the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region; and after removing the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region, forming a front electrode layer on the top surface of the ridge region.
The technical scheme of the invention has the following technical effects:
according to the preparation method of the semiconductor laser, the adhesive film is formed on the surface of the passivation layer, the surface of the adhesive film in the groove is lower than the surface of the adhesive film at the top of the ridge region, the flat substrate is stamped on one side of the ridge region, which is far away from the semiconductor substrate layer, so that the thickness of the adhesive film at the top of the ridge region is far smaller than that of the adhesive film in the groove, then the adhesive film at the top of the ridge region is removed by adopting a maskless etching process, and the passivation layer at the top of the ridge region is removed by taking the adhesive film covered on the passivation layer at the bottom surface of the groove and the side wall surface of the ridge region as a mask. And etching to remove the passivation layer on the top of the ridge region, and forming a current injection window. Because no overlay is needed, the overlay offset is formed by imprinting the flat substrate on one side of the ridge region away from the semiconductor substrate layer and removing the adhesive film on the top of the ridge region by adopting a maskless etching process, so that the passivation layer on the top of the ridge region can be accurately positioned and exposed. And in the step of etching and removing the passivation layer at the top of the ridge region by taking the residual adhesive film as a mask, the passivation layer on the side wall surface of the ridge region is not stripped. The method is simple and efficient, the current injection window of the ridge region can be obtained rapidly and efficiently, and the difficulty of obtaining the low-threshold current single-mode lasing semiconductor laser is greatly reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for fabricating a semiconductor laser according to an embodiment of the present invention;
fig. 2 to 10 are schematic structural diagrams illustrating a semiconductor laser manufacturing process according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
The embodiment provides a method for manufacturing a semiconductor laser, referring to fig. 1, including:
step S1: providing a semiconductor substrate layer;
step S2: forming a device structure layer on the semiconductor substrate layer;
step S3: etching part of the device structure layer to form a plurality of grooves in the device structure layer, wherein the device structure layer between adjacent grooves forms a ridge area;
step S4: forming passivation layers on the bottom surfaces of the grooves, the side wall surfaces of the ridge areas and the tops of the ridge areas;
step S5: forming a glue film on the surface of the passivation layer, wherein the surface of the glue film in the groove is lower than the surface of the glue film on the top of the ridge region;
step S6: providing a flat substrate, embossing the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, so that the thickness of the adhesive film at the top of the ridge area is far smaller than that of the adhesive film in the groove;
step S7: after imprinting the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, solidifying the adhesive film, and removing the flat substrate;
step S8: solidifying the adhesive film, removing the flat substrate, and removing the adhesive film at the top of the ridge area by adopting a maskless etching process;
step S9: and after removing the adhesive film at the top of the ridge region by adopting a maskless etching process, etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region as a mask, so as to form a current injection window.
In this embodiment, since no overlay is required, the overlay offset is formed by imprinting the flat substrate on the side of the ridge region away from the semiconductor substrate layer, and removing the adhesive film on the top of the ridge region by using a maskless etching process, so that the passivation layer on the top of the ridge region can be accurately positioned and exposed. And in the step of etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer at the bottom surface of the groove and the side wall surface of the ridge region as a mask, the passivation layer at the side wall surface of the ridge region is not stripped. The method is simple and efficient, the current injection window of the ridge region can be obtained rapidly and efficiently, and the difficulty of obtaining the low-threshold current single-mode lasing semiconductor laser is greatly reduced.
The preparation process of this embodiment will be described in detail with reference to fig. 2 to 10.
Referring to fig. 2, a semiconductor substrate layer 100 is provided; a device structure layer is formed on the semiconductor substrate layer 100.
The material of the semiconductor substrate layer 100 includes gallium nitride. In other embodiments, the semiconductor substrate layer may also be selected from substrates of other semiconductor materials.
The step of forming a device structure layer on the semiconductor substrate layer 100 includes: a lower confinement layer 110, a lower waveguide layer 120, an active layer 130, an upper waveguide layer 140, and an upper confinement layer 150 are sequentially formed on the semiconductor substrate layer 100.
The materials of the lower confinement layer 110, the lower waveguide layer 120, the active layer 130, the upper waveguide layer 140, and the upper confinement layer 150 are all three-five materials.
In this embodiment, the step of forming a device structure layer on the semiconductor substrate layer 100 further includes: an additional confinement layer 160 is formed on a surface of the upper confinement layer 150 facing away from the semiconductor substrate layer 100.
The functions of the additional confinement layer 160 include: the light field is limited.
The refractive index of the additional confinement layer 160 is smaller than that of the upper confinement layer 150.
In one embodiment, the additional confinement layer 160 comprises a transparent conductive film. Or the additional confinement layer includes one or more of a Ni layer, a Ti layer, a Pd layer, a Pt layer, and an Au layer.
In one embodiment, the thickness of the additional confinement layer 160 is 100nm to 300nm, such as 100nm, 150nm, 200nm, 250nm, or 300nm.
In other embodiments, no additional confinement layer may be formed.
In this embodiment, the method further includes: a mask layer 170 is formed on a side of the upper confinement layer 150 facing away from the semiconductor substrate layer 100, and in particular, a mask layer 170 is formed on a surface of a portion of a side of the additional confinement layer 160 facing away from the semiconductor substrate layer 100.
The material of the mask layer 170 includes silicon oxide.
In one embodiment, the thickness of the mask layer 170 is 100nm to 500nm.
Referring to fig. 3, a portion of the device structure layer is etched to form a plurality of grooves a in the device structure layer, and the device structure layer between adjacent grooves a forms a ridge region.
In this embodiment, the step of etching a portion of the device structure layer to form a plurality of grooves a in the device structure layer, where the device structure layer between adjacent grooves a forms a ridge region includes: the additional confinement layer 160 and the upper confinement layer 150 are etched to form a plurality of grooves a in the additional confinement layer 160 and the upper confinement layer 150, and the additional confinement layer 160 and the upper confinement layer 150 between adjacent grooves a form a ridge region.
The additional confinement layer 160 and the upper confinement layer 150 are etched using the mask layer 170 as a mask to form a plurality of grooves a in the additional confinement layer 160 and the upper confinement layer 150.
In other embodiments, when the additional confinement layer 160 is not formed, the step of etching a portion of the device structure layer to form a plurality of recesses in the device structure layer, the device structure layer between adjacent recesses forming a ridge region includes: the upper confinement layer is etched to form a plurality of recesses in the upper confinement layer, the upper confinement layer between adjacent recesses constituting a ridge region.
In one embodiment, the width of the ridge region is less than or equal to 2 microns, such as 1 micron.
Referring to fig. 4, a passivation layer 180 is formed on the bottom surface of the groove a, the sidewall surfaces of the ridge region, and the top of the ridge region.
The material of the passivation layer 180 includes silicon oxide.
In one embodiment, the passivation layer 180 has a thickness of 100nm to 500nm.
Referring to fig. 5, a glue film 190 is formed on the surface of the passivation layer 180, and the surface of the glue film 190 in the groove a is lower than the surface of the glue film 190 on the top of the ridge region.
The material of the adhesive film 190 includes a photoresist material or an embossed adhesive film.
A glue film 190 is conformally formed on the entire upper surface of the passivation layer 180.
The step of forming the adhesive film 190 on the surface of the passivation layer 180 includes: spin-coating an initial adhesive film on the surface of the passivation layer 180; and soft baking the initial adhesive film to form an adhesive film 190.
The adhesive film 190 has a certain deformability under the action of external force.
In one embodiment, the parameters of spin-coating the initial adhesive film on the surface of the passivation layer 180 include: the rotation speed is 2000-3000 rpm, and the time is 30-60 seconds.
In one embodiment, the parameters for soft baking the initial adhesive film include: the temperature is 50-100 ℃ and the time is 30-40 seconds.
In one embodiment, in the step of forming the glue film 190 on the surface of the passivation layer 180, the thickness of the glue film 190 is 100nm to 500nm, for example, 100nm, 200nm, 250nm, 300nm, 350nm, 400nm, or 500nm.
The passivation layer 180 is formed by a deposition process, such as a plasma chemical vapor deposition process, at a deposition temperature of 200-300 c.
Referring to fig. 6, a flat substrate 200 is provided; the flat substrate 200 is embossed on the side of the ridge region facing away from the semiconductor substrate layer 100 such that the thickness of the glue film 190 on top of the ridge region is much smaller than the thickness of the glue film 190 in the recess.
Both side surfaces of the flat substrate 200 in the thickness direction are flat surfaces.
In one embodiment, the material of the flat substrate 200 includes quartz or sapphire, which has a relatively high hardness and can withstand relatively high forces.
In one embodiment, the flat substrate 200 has a thickness of 100 microns to 500 microns, such as 100 microns, 200 microns, 300 microns, 400 microns, or 500 microns. The thickness of the flat substrate 200 is not too small, so that the capability of the flat substrate 200 to bear pressure is strong, and the thickness of the flat substrate 200 is not too large, so that the material cost is avoided.
In an embodiment, the flat substrate 200 is embossed in the step of embossing the side of the ridge region facing away from the semiconductor substrate layer 100, with a pressure of 100mbar-500mbar, such as 100mbar, 200mbar, 300mbar, 400mbar or 500mbar, being applied to the flat substrate 200.
The flat substrate 200 is stamped on the side of the ridge region facing away from the semiconductor substrate layer 100, and the flat substrate 200 applies a force to the adhesive film 190 on the top of the ridge region, but does not apply a force to the adhesive film 190 on the bottom of the groove a and the side wall of the groove a, so that the adhesive film 190 on the top of the ridge region is deformed under the action of an external force, and thus the thickness of the adhesive film 190 on the top of the ridge region is much smaller than the thickness of the adhesive film 190 in the groove.
In one embodiment, the thickness of the glue film 190 on top of the ridge region is 10nm to 50nm after imprinting the flat substrate 200 on the side of the ridge region facing away from the semiconductor substrate layer 100.
Referring to fig. 7, after the flat substrate 200 is embossed on the side of the ridge region facing away from the semiconductor substrate layer 100, the adhesive film 190 is cured, and the flat substrate 200 is removed.
The process of curing the adhesive film 190 is thermal curing or UV light curing.
In one embodiment, the parameters of thermal curing include: the temperature is 100-200 ℃.
In one embodiment, the parameters of UV light curing include: the wavelength is 365nm-405nm, and the optical power is 100mW/cm 2 －500mW/cm 2 。
Referring to fig. 8, the adhesive film 190 is cured, and after the flat substrate 200 is removed, the adhesive film 190 on top of the ridge region is removed using a maskless etching process.
In one embodiment, the maskless etching process is a plasma etching process.
In one embodiment, the parameters of the plasma etch process include: the sampled gas includes oxygen and the source rf power is 100W-300W.
Since the thickness of the glue film 190 on top of the ridge area is much smaller than the thickness of the glue film 190 in the groove, after the glue film 190 on top of the ridge area is removed by using a maskless etching process, the side wall of the groove still retains the glue film 190 with a certain thickness.
Referring to fig. 9, after removing the glue film 190 on the top of the ridge region using a maskless etching process, the passivation layer 180 on the top of the ridge region is etched using the glue film 190 covered on the passivation layer 180 on the bottom surface of the groove and the sidewall surface of the ridge region as a mask.
The process of etching to remove the passivation layer 180 on the top of the ridge region using the adhesive film 190 covered on the passivation layer 180 on the bottom surface of the groove and the sidewall surface of the ridge region as a mask includes a wet etching process or a dry etching process.
When the passivation layer 180 on top of the ridge region is etched by a wet etching process, an etching solution used in the wet etching process includes an ammonium fluoride solution. When the passivation layer 180 on top of the ridge region is etched and removed by a dry etching process, an etching gas used for the dry etching process includes a fluorine-based gas.
Referring to fig. 10, the adhesive film 190 covering the passivation layer 180 of the bottom surface of the groove and the sidewall surface of the ridge region is removed.
In this embodiment, the method further includes: after removing the adhesive film 190 covering the passivation layer 180 of the bottom surface of the groove and the sidewall surface of the ridge region, a front electrode layer (not shown) is formed on the top surface of the ridge region.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.
Claims (12)
1. A method of fabricating a semiconductor laser, comprising:
providing a semiconductor substrate layer;
forming a device structure layer on the semiconductor substrate layer;
etching part of the device structure layer to form a plurality of grooves in the device structure layer, wherein the device structure layer between adjacent grooves forms a ridge area;
forming passivation layers on the bottom surfaces of the grooves, the side wall surfaces of the ridge areas and the tops of the ridge areas;
forming a glue film on the surface of the passivation layer, wherein the surface of the glue film in the groove is lower than the surface of the glue film on the top of the ridge region;
providing a flat substrate, embossing the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, so that the thickness of the adhesive film at the top of the ridge area is far smaller than that of the adhesive film in the groove;
after imprinting the flat substrate on one side of the ridge area, which is away from the semiconductor substrate layer, solidifying the adhesive film, and removing the flat substrate;
solidifying the adhesive film, removing the flat substrate, and removing the adhesive film at the top of the ridge area by adopting a maskless etching process;
and after removing the adhesive film at the top of the ridge region by adopting a maskless etching process, etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region as a mask, so as to form a current injection window.
2. The method of manufacturing a semiconductor laser according to claim 1, wherein the step of forming a device structure layer on the semiconductor substrate layer comprises: sequentially forming a lower limit layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limit layer which are stacked on the semiconductor substrate layer;
etching a portion of the device structure layer to form a plurality of grooves in the device structure layer, the device structure layer between adjacent grooves forming a ridge region, the step of including: etching the upper limiting layer to form a plurality of grooves in the upper limiting layer, wherein the upper limiting layer between adjacent grooves forms a ridge area;
preferably, the step of forming a device structure layer on the semiconductor substrate layer further includes: forming an additional confinement layer on a surface of the upper confinement layer on a side facing away from the semiconductor substrate layer; etching a portion of the device structure layer to form a plurality of grooves in the device structure layer, the device structure layer between adjacent grooves forming a ridge region, the step of including: etching the additional limiting layer and the upper limiting layer to form a plurality of grooves in the additional limiting layer and the upper limiting layer, wherein the additional limiting layer and the upper limiting layer between adjacent grooves form a ridge region;
preferably, the additional confinement layer includes a transparent conductive film, or the additional confinement layer includes one or more of a Ni layer, a Ti layer, a Pd layer, a Pt layer, and an Au layer;
preferably, the thickness of the additional limiting layer is 100 nm-300 nm;
preferably, the width of the ridge region is less than or equal to 2 microns.
3. The method of manufacturing a semiconductor laser according to claim 1, wherein the material of the flat substrate comprises quartz or sapphire.
4. The method of manufacturing a semiconductor laser according to claim 1, wherein the thickness of the flat substrate is 100 μm to 500 μm.
5. A method of manufacturing a semiconductor laser according to claim 1, characterized in that in the step of embossing the flat substrate on the side of the ridge region facing away from the semiconductor substrate layer, a pressure of 100mbar-500mbar is applied to the flat substrate.
6. The method of manufacturing a semiconductor laser according to claim 1, wherein the thickness of the adhesive film on top of the ridge region is 10nm to 50nm after the flat substrate is embossed on the side of the ridge region facing away from the semiconductor substrate layer.
7. The method of manufacturing a semiconductor laser according to claim 1, wherein the step of forming a glue film on the surface of the passivation layer comprises: spin-coating an initial adhesive film on the surface of the passivation layer; soft baking is carried out on the initial adhesive film, so that the initial adhesive film forms an adhesive film;
preferably, the parameters of spin-coating the initial adhesive film on the surface of the passivation layer include: the rotating speed is 2000-3000 rpm, and the time is 30-60 seconds;
preferably, the parameters for soft baking the initial adhesive film include: the temperature is 50-100 ℃ and the time is 30-40 seconds.
8. The method of manufacturing a semiconductor laser according to claim 1, wherein in the step of forming a glue film on the surface of the passivation layer, the thickness of the glue film is 100nm to 500nm.
9. The method of manufacturing a semiconductor laser according to claim 1, wherein the passivation layer has a thickness of 100nm to 500nm.
10. The method of manufacturing a semiconductor laser according to claim 1, wherein the process of curing the adhesive film is thermal curing or UV light curing;
preferably, the parameters of the thermal curing include: the temperature is 100-200 ℃;
preferably, the parameters of UV light curing include: the wavelength is 365nm-405nm, and the optical power is 100mW/cm 2 －500mW/cm 2 。
11. The method of manufacturing a semiconductor laser of claim 1, wherein the maskless etching process is a plasma etching process;
preferably, the parameters of the plasma etching process include: the sampled gas includes oxygen and the source rf power is 100W-300W.
12. The method for manufacturing a semiconductor laser according to claim 1, further comprising: etching and removing the passivation layer at the top of the ridge region by taking the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region as a mask, and removing the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region; and after removing the adhesive film covered on the passivation layer on the bottom surface of the groove and the side wall surface of the ridge region, forming a front electrode layer on the top surface of the ridge region.
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| JP2007335564A (en) * | 2006-06-14 | 2007-12-27 | Toyoda Gosei Co Ltd | Manufacturing method of semiconductor element with ridge section |
| JP2014192507A (en) * | 2013-03-28 | 2014-10-06 | Japan Oclaro Inc | Nitride semiconductor optical element and manufacturing method of the same |
| CN109300905A (en) * | 2018-10-08 | 2019-02-01 | 长江存储科技有限责任公司 | The forming method of semiconductor devices |
| CN109326955A (en) * | 2018-09-25 | 2019-02-12 | 中国科学院半导体研究所 | Semiconductor laser device high-frequency electrode device and production method |
| CN113991428A (en) * | 2021-10-27 | 2022-01-28 | 苏州长光华芯光电技术股份有限公司 | Method for manufacturing semiconductor laser |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007335564A (en) * | 2006-06-14 | 2007-12-27 | Toyoda Gosei Co Ltd | Manufacturing method of semiconductor element with ridge section |
| JP2014192507A (en) * | 2013-03-28 | 2014-10-06 | Japan Oclaro Inc | Nitride semiconductor optical element and manufacturing method of the same |
| CN109326955A (en) * | 2018-09-25 | 2019-02-12 | 中国科学院半导体研究所 | Semiconductor laser device high-frequency electrode device and production method |
| CN109300905A (en) * | 2018-10-08 | 2019-02-01 | 长江存储科技有限责任公司 | The forming method of semiconductor devices |
| CN113991428A (en) * | 2021-10-27 | 2022-01-28 | 苏州长光华芯光电技术股份有限公司 | Method for manufacturing semiconductor laser |
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