CN116565059A - Solar cell and preparation method, assembly and system thereof - Google Patents

Solar cell and preparation method, assembly and system thereof Download PDF

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Publication number
CN116565059A
CN116565059A CN202210112013.2A CN202210112013A CN116565059A CN 116565059 A CN116565059 A CN 116565059A CN 202210112013 A CN202210112013 A CN 202210112013A CN 116565059 A CN116565059 A CN 116565059A
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layer
seed metal
solar cell
oxide thin
passivation
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沈承焕
陈程
季根华
张耕
曹俊
赵影文
包杰
胡圣杰
黄策
陈嘉
马丽敏
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Jolywood Taizhou Solar Technology Co ltd
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Jolywood Taizhou Solar Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The invention discloses a solar cell, a preparation method, a module and a system thereof. The solar cell comprises a silicon substrate, a doped layer and a passivation layer which are sequentially overlapped on the back surface of the silicon substrate, wherein the passivation layer is provided with an electrode groove with a local exposed doped layer, and the electrode groove is provided with a back electrode; the back electrode comprises a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back of the locally exposed doped layer; the seed metal silicide layer is one or more of a molybdenum silicide layer, a nickel silicide layer and a titanium silicide layer, the seed metal oxide thin layer is one or more of a molybdenum oxide thin layer, a nickel oxide thin layer and a titanium oxide thin layer, and the thickness of the seed metal oxide thin layer is not more than 20nm. The solar cell has a novel electrode structure, can promote the improvement of the electrode structure and performance, and reduces the cost, and the novel electrode structure of the solar cell has good current transmission performance and small metal composite loss.

Description

Solar cell and preparation method, assembly and system thereof
Technical Field
The invention relates to the technical field of photovoltaic cells, in particular to a solar cell and a preparation method, a module and a system thereof.
Background
A solar cell, also called a photovoltaic cell, is a cell capable of directly converting sunlight into electric energy, and may be classified into a single crystal silicon, a polycrystalline silicon, and an amorphous silicon solar cell. In the existing photovoltaic cell field, the crystalline silicon solar cell technology is relatively mature, and the application of the crystalline silicon solar cell is the widest. However, existing crystalline silicon solar cells still have some drawbacks; for example, existing industrialized crystalline silicon solar cells typically complete the metallization process by screen printing silver paste in combination with a high temperature sintering process to form electrodes; however, this process requires the use of a large amount of expensive silver paste, which increases the material cost of the crystalline silicon solar cell.
Accordingly, in order to reduce the cost of the solar cell, the electrode structure of the solar cell is gradually improved by the research and development personnel, such as a crystalline silicon solar cell provided in publication No. CN113629155a, the gate electrode of which includes a first metal layer (e.g. titanium silicide paste) formed on the doped conductive layer, a dielectric conductive layer (e.g. titanium nitride paste) formed on the first metal layer, and a second metal layer (e.g. metal aluminum paste) formed on the dielectric conductive layer. The grid line electrode does not need to use expensive silver paste, so that the raw material cost can be reduced; the first metal layer, the dielectric conductive layer and the second metal layer in the grid line electrode are all conductive structures, so that good conductive performance can be ensured, and besides conductivity, the dielectric conductive layer can also block metal diffusion to a certain extent, so that the formed first metal layer-silicon contact is prevented from being damaged by the second metal layer. Therefore, in the existing crystalline silicon solar cell, a dielectric conductive layer with good conductivity is adopted to block metal diffusion; however, since the seed metal oxide layer (e.g., titanium metal oxide layer) at normal temperature is substantially non-conductive and has insulation properties at normal temperature, no electrode structure has been known in the art in which the seed metal oxide layer (e.g., titanium metal oxide layer) insulated at normal temperature is disposed in an electrode to block diffusion of metal; this makes the choice of materials for the electrode structure very limited, thereby limiting to some extent the improvement of the structure and performance of the electrode and the reduction of the battery cost.
Disclosure of Invention
One of the purposes of the present invention is to overcome the shortcomings of the prior art and provide a solar cell with a novel electrode structure, so as to promote improvement of the structure and performance of the electrode and reduction of the cell cost.
The second purpose of the invention is to provide a preparation method of the solar cell, which has simple, stable and reliable preparation procedures and is suitable for mass production.
The third object of the present invention is to provide a solar cell module.
The fourth object of the present invention is to provide a solar cell system.
Based on the above, the invention discloses a solar cell, which comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially overlapped on the back surface of the silicon substrate, the passivation layer is provided with an electrode groove for locally exposing the doped layer, and the electrode groove is provided with a back electrode; the back electrode comprises a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back of the locally exposed doped layer; the seed metal silicide layer is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, the seed metal oxide thin layer is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
Preferably, the outer metal layer is a copper layer, an aluminum layer, a silver layer or an alloy layer thereof;
the mixed conducting layer is formed by interdiffusion of seed metal oxide and external metal.
Preferably, the thickness of the seed metal silicide layer is less than or equal to 30nm; the thickness of the mixed conducting layer is 10-130nm; the thickness of the outer metal layer is 5-20um.
Further preferably, the outer metal layer is a copper layer, an aluminum layer or an alloy layer thereof.
Preferably, the passivation layer is further provided with a passivation scratch-resistant layer on the back surface.
Further preferably, the passivation scratch-resistant layer is a seed metal oxide formed structure.
Further preferably, the seed metal silicide layer, the seed metal oxide thin layer, the mixed conducting layer and the passivation scratch-resistant layer are in an integrated structure.
Further preferably, the thickness of the passivation scratch resistant layer is 10-150nm.
Preferably, the doped layer comprises a tunneling oxide layer and a doped polysilicon layer which are sequentially stacked on the back surface of the silicon substrate.
Preferably, the solar cell further comprises a front electrode located on the front surface of the silicon substrate.
The invention also discloses a solar cell, which comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially overlapped on the back surface of the silicon substrate, the passivation layer is provided with an electrode groove for locally exposing the doped layer, and the electrode groove is provided with a back electrode; the back electrode comprises a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back of the locally exposed doped layer; the seed metal silicide layer is an alloy layer formed by at least two of molybdenum silicide, nickel silicide and titanium silicide, the seed metal oxide thin layer is an alloy thin layer formed by at least two of molybdenum oxide, nickel oxide and titanium oxide, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
The invention also discloses a solar cell, which comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially overlapped on the back surface of the silicon substrate, the doped layer comprises P-type doped regions and N-type doped regions which are sequentially and alternately arranged, an isolation region is arranged between the P-type doped regions and the N-type doped regions, the passivation layer is provided with a first electrode groove and a second electrode groove which are respectively exposed locally and are respectively provided with a positive electrode contacting the P-type doped regions and a negative electrode contacting the N-type doped regions; the positive electrode and the negative electrode respectively comprise a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back surface of the doped layer; the seed metal silicide layer is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, the seed metal oxide thin layer is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
The invention also discloses a preparation method of the solar cell, which comprises the following steps:
step S1, preparing a doped layer on the back surface of a silicon substrate;
s2, preparing a passivation layer on the back surface of the doped layer;
step S3, performing laser film opening on the passivation layer to obtain an electrode groove for locally exposing the doped layer;
s4, preparing seed metal on the passivation layer and the back surface of the locally exposed doped layer;
step S5, carrying out first heat treatment on the seed metal to oxidize the back surface part of the seed metal into seed metal oxide, and enabling the seed metal to react with the doped layer at the interface to form a seed metal silicide layer;
and S6, selectively preparing external metal on the back surface of the seed metal oxide corresponding to the electrode groove, and performing a second heat treatment to enable the seed metal to be completely oxidized into the seed metal oxide, wherein the seed metal oxide and the external metal are mutually diffused at an interface to form a mixed conducting layer, the seed metal oxide far away from the mixed conducting layer forms a seed metal oxide thin layer, the seed metal oxide on the back surface of the passivation layer forms a passivation scratch-resistant layer, and the external metal far away from the mixed conducting layer forms an external metal layer.
Preferably, the first heat treatment and the second heat treatment are performed in an oxygen-containing atmosphere having a temperature of 700 to 900 ℃.
Preferably, before the step S1, the method further includes a step of pre-treating the back surface of the silicon substrate to form a planar structure on the back surface of the silicon substrate.
The invention also discloses a solar cell module which comprises a front layer, a packaging layer, a cell and a photovoltaic backboard which are sequentially stacked, and is characterized in that the cell is the solar cell.
The invention also discloses a solar cell system which comprises one or more than one solar cell module, wherein the solar cell module is the solar cell module.
Compared with the prior art, the invention at least comprises the following beneficial effects:
in the solar cell of the invention, the back electrode comprises a four-layer structure of a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially stacked, and the back electrode is a novel electrode structure. (1) In the novel electrode structure, the seed metal silicide layer, the mixed conducting layer and the outer metal layer are all conducting layers, good conducting performance is provided, and the seed metal silicide layer and the doped layer have good electric contact capability and can reduce contact resistivity; (2) The seed metal silicide layer close to the doped layer and the mixed conducting layer close to the outer metal layer can separate the doped layer from the outer metal layer, so that the outer metal layer can be prevented from burning through the doped layer in the heat treatment process to pollute the silicon substrate, and the metal recombination loss can be reduced; (3) The seed metal oxide thin layer is a normal-temperature insulating layer with better metal burning-through resistance compared with the seed metal silicide layer and the mixed conducting layer because one or more layers of the molybdenum oxide thin layer, the nickel oxide thin layer and the titanium oxide thin layer are overlapped, and the seed metal oxide thin layer with insulating property at normal temperature is arranged between the seed metal silicide layer and the mixed conducting layer and is matched with the seed metal silicide layer and the mixed conducting layer, so that the separation effect of the doped layer and the outer metal layer can be greatly improved, and the metal composite loss is further reduced; (4) Furthermore, it was found that when the thickness of the seed metal oxide thin layer between the seed metal silicide layer and the mixed conductive layer is thin (i.e., less than or equal to 20 nm), it also performs normal current transmission performance without affecting the current transmission effect of the battery.
(5) In addition, the seed metal silicide layer of the back electrode is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, and the seed metal oxide thin layer is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, which are all free of expensive silver, so that the raw material cost of the electrode can be reduced.
In summary, the back electrode with the four-layer structure is arranged on the doped layer, so that the current transmission is not affected, the metal burn-through resistance is remarkably improved, the metal composite loss is greatly reduced, and the electrode cost is reduced; and a new thought is provided for the arrangement of the electrode structure, namely, a normal-temperature insulating layer like a seed metal oxide thin layer is arranged on the electrode structure to improve the electrode performance and reduce the cost.
Drawings
Fig. 1 is a schematic structural diagram of a solar cell of embodiment 1.
Fig. 2 is a schematic structural diagram of the solar cell according to embodiment 1 after step 1.
Fig. 3 is a schematic structural diagram of the solar cell according to embodiment 1 after step 2.
Fig. 4 is a schematic structural diagram of the solar cell according to the embodiment 1 after the step 3.
Fig. 5 is a schematic structural diagram of the solar cell according to embodiment 1 after step 4.
Fig. 6 is a schematic structural diagram of the solar cell according to embodiment 1 after step 5.
Fig. 7 is a schematic structural diagram of the solar cell according to the method of embodiment 1 after the step 6.
Fig. 8 is a schematic structural diagram of a solar cell of embodiment 2.
Reference numerals illustrate: a silicon substrate 1; a doped layer 2; a P-type doped region 21; isolation regions 22; an N-type doped region 23; a passivation layer 3; passivation scratch resistant layer 4; a seed metal silicide layer 5; a seed metal oxide thin layer 6; a mixed conductive layer 7; an outer metal layer 8; an electrode groove 9; seed metal 10; seed metal oxide 11.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
Example 1
A solar cell of the present embodiment, see fig. 1, includes a silicon substrate 1, a doped layer 2 and a passivation layer 3 sequentially stacked on the back surface of the silicon substrate 1. In practical application, the back surface of the silicon substrate 1 is sequentially overlapped with the doped layer 2 and the passivation layer 3, and a back electrode is arranged on the back surface of the silicon substrate 1; in addition, according to the design requirements of different battery structures, the doped layer 2 and the passivation layer 3 can be sequentially stacked on the front surface of the silicon substrate 1, and a front electrode can be arranged on the front surface of the silicon substrate 1. The structural design of the back electrode is described in detail below. Of course, the following structure of the back electrode can be applied to the front electrode.
The passivation layer 3 on the back of the silicon substrate 1 is provided with an electrode groove 9 (as shown in fig. 5) of the locally exposed doped layer 2, and the electrode groove 9 is provided with the back electrode for transmitting current. The back electrode comprises a seed metal silicide layer 5, a seed metal oxide thin layer 6, a mixed conducting layer 7 and an outer metal layer 8 which are sequentially overlapped on the back of the locally exposed doped layer 2. In one example of this embodiment, the seed metal silicide layer 5 in the back electrode is one or more of a molybdenum silicide layer, a nickel silicide layer, and a titanium silicide layer superimposed; in another example of the present embodiment, the seed metal silicide layer 5 may be an alloy layer formed of at least two of molybdenum silicide, nickel silicide and titanium silicide (e.g., an alloy layer formed of titanium silicide and nickel silicide). The thickness of the seed metal silicide layer 5 is less than or equal to 30nm, more preferably 0.1-20nm, for example the thickness of the seed metal silicide layer 5 is 0.1nm, 0.5nm, 1nm, 3nm, 5nm, 10nm, 15nm, 20nm, 25nm or 30nm; the seed metal silicide layer 5 is a conductive layer, has good conductivity, and the seed metal silicide layer 5 and the doped layer 2 have good electrical contact capability, so that the contact resistivity can be reduced.
Wherein the width of the grid line of the outer metal layer 8 is larger than the width of the electrode groove 9; the ratio of the projected area of the outer metal layer 8 on the silicon substrate 1 to the area of the silicon substrate 1 is preferably greater than 1:10000. further, the outer metal layer 8 is a copper layer, an aluminum layer, a silver layer or an alloy layer thereof (such as a copper-aluminum alloy layer), and the thickness of the outer metal layer 8 is 5-20um, for example, the thickness of the outer metal layer 8 is 5um, 8um, 10um, 15um or 20um. In one example of the present embodiment, the seed metal oxide thin layer 6 is one or more of a molybdenum oxide thin layer, a nickel oxide thin layer, and a titanium oxide thin layer stacked; in another example of the present embodiment, the seed metal oxide thin layer 6 is an alloy thin layer formed of at least two of molybdenum oxide, nickel oxide, and titanium oxide (e.g., an alloy thin layer formed of titanium oxide and nickel oxide). The thickness of the seed metal oxide thin layer 6 is less than or equal to 20nm, for example, the thickness of the seed metal oxide thin layer 6 is 0.1nm, 0.5nm, 3nm, 5nm, 8nm, 10nm, 12nm, 15nm, 18nm or 20nm. The mixed conducting layer 7 is formed by interdiffusion of the seed metal oxide 11 and the external metal. Specifically, the mixed conductive layer 7 is formed by interdiffusion of the seed metal oxide 11 and the external metal at the interface during a high temperature heat treatment such as 700-900 ℃. The thickness of the mixed conducting layer 7 is 10 to 130nm, for example, the thickness of the mixed conducting layer 7 is 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm or 130nm.
In the solar cell of the present embodiment, the back electrode includes a four-layer structure of a seed metal silicide layer 5, a seed metal oxide thin layer 6, a mixed conductive layer 7, and an outer metal layer 8 stacked in this order, which is a new electrode structure. (1) In the novel electrode structure, the seed metal silicide layer 5, the mixed conducting layer 7 and the outer metal layer 8 are all conducting layers, good conducting performance is provided, and the seed metal silicide layer 5 and the doped layer 2 have good electric contact capability and can reduce contact resistivity; (2) The seed metal silicide layer 5 near the doped layer 2 and the mixed conductive layer 7 near the outer metal layer 8 can also separate the doped layer 2 from the outer metal layer 8 so as to prevent the outer metal layer 8 from burning through the doped layer 2 in the heat treatment process to pollute the silicon substrate 1, thus being capable of reducing metal recombination loss; (3) The seed metal oxide thin layer 6 is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer are overlapped, so that compared with the seed metal silicide layer 5 and the mixed conducting layer 7, the seed metal oxide thin layer 6 is a normal-temperature insulating layer with better metal burning-through prevention performance, the seed metal oxide thin layer 6 with insulating performance at normal temperature is arranged between the seed metal silicide layer 5 and the mixed conducting layer 7 and is matched with the seed metal silicide layer 5 and the mixed conducting layer 7 together, the separation effect of the doped layer 2 and the outer metal layer 8 can be greatly improved, and the metal composite loss is further reduced; (4) Furthermore, it was found that when the thickness of the seed metal oxide thin layer 6 between the seed metal silicide layer 5 and the mixed conductive layer 7 is thin (i.e., less than or equal to 20 nm), it can perform normal current transmission performance without affecting the current transmission effect of the battery. (5) In addition, the seed metal silicide layer 5 of the back electrode is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, and the seed metal oxide thin layer 6 is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, which are all free of expensive silver, so that the raw material cost of the electrode can be reduced.
Therefore, the arrangement of the back electrode in this embodiment provides a new idea for improving electrode performance and reducing cost by arranging a normal temperature insulating layer like the seed metal oxide thin layer 6 in the electrode structure, and particularly, the arrangement of the back electrode in the four-layer structure on the doped layer 2 does not affect current transmission, can also remarkably improve metal burn-through resistance, greatly reduces metal recombination loss, and can reduce electrode cost.
Further, the outer metal layer 8 is preferably a copper layer, an aluminum layer or an alloy layer thereof (e.g., copper-aluminum alloy layer), so that the back electrode is completely free of expensive silver, which can further reduce the raw material cost of the electrode.
Wherein, the back of the passivation layer 3 is also provided with a passivation scratch-resistant layer 4; the thickness of the passivation scratch resistant layer 4 is 10-150nm, for example the thickness of the passivation scratch resistant layer 4 is 10nm, 20nm, 30nm, 50nm, 60nm, 80nm, 100nm, 110nm, 120nm, 130nm or 150nm. The thin passivation scratch-resistant layer 4 is additionally arranged, so that the thickness of a passivation structure can be increased, the passivation and antireflection effects of the battery are enhanced, the battery can be well protected, the back of the battery is not easily scratched by mechanical equipment, the production yield of the battery is effectively improved, and the production cost of the battery is further reduced.
The passivation scratch-resistant layer 4 may be a material layer having both passivation, antireflection and scratch-resistant functions, and is preferably a structure formed of a seed metal oxide 11, i.e., a molybdenum oxide layer, a nickel oxide layer, a titanium oxide layer or an alloy oxide layer thereof (e.g., an alloy layer of titanium oxide and nickel oxide), and more preferably a molybdenum oxide layer, a titanium oxide layer or an alloy oxide layer thereof. The seed metal oxide 11 can form a structure which can be well adhered to the back surface of the doped layer 2, has better mechanical property than a conventional passivation film (such as a silicon nitride film), has more excellent scratch resistance, and can greatly improve the production yield of the battery.
The embodiment also provides a preparation method of the solar cell, which comprises the following steps in sequence:
step 1, pretreatment is carried out on the back surface of the silicon substrate 1. Among them, the silicon substrate 1 is preferably an N-type silicon substrate.
An example of this embodiment is to pretreat the back surface of the silicon substrate 1 so that the back surface of the silicon substrate 1 forms a planar structure, as shown in fig. 2.
Step 2, preparing a doped layer 2 on the back surface of the planar structure of the silicon substrate 1, as shown in fig. 3. In order to improve the passivation contact performance of the solar cell, the doped layer 2 is preferably a tunneling oxide layer and a doped polysilicon layer (such as an n+ doped polysilicon layer) sequentially stacked on the back surface of the silicon substrate 1.
Step 3, preparing a passivation layer 3 on the back surface of the doped layer 2, as shown in fig. 4. Wherein the passivation layer 3 is preferably a silicon nitride layer.
And 4, performing laser film opening on the passivation layer 3 positioned on the back surface of the silicon substrate 1 to remove the passivation layer 3 in a local area to form an electrode groove 9 with the doped layer 2 exposed in the local area, as shown in fig. 5.
In step 5, a seed metal 10 is prepared on the passivation layer 3 and the entire back surface of the locally exposed doped layer 2, as shown in fig. 6. The seed metal 10 is prepared by screen printing or deposition, preferably PVD equipment.
Step 6, performing a first heat treatment on the seed metal 10 in an oxygen-containing atmosphere at 700-900 ℃ to enable the seed metal 10 to react with the doped layer 2 at the interface to form a seed metal silicide layer 5, and enabling the back surface part of the seed metal 10 to be oxidized into a seed metal oxide 11, as shown in fig. 7. Wherein the temperature of the first heat treatment is 700 ℃, 730 ℃, 750 ℃, 770 ℃, 800 ℃, 830 ℃, 860 ℃ or 900 ℃.
And 7, selectively preparing an external metal on the back surface of the seed metal oxide 11 corresponding to the electrode groove 9, and performing a second heat treatment (for example, the temperature of the second heat treatment is 700 ℃, 720 ℃, 750 ℃, 780 ℃, 800 ℃, 830 ℃, 850 ℃, 880 ℃ or 900 ℃) in an oxygen-containing atmosphere of 700-900 ℃ so that the seed metal 10 is completely oxidized into the seed metal oxide 11, the seed metal oxide 11 and the external metal are mutually diffused at an interface to form a mixed conducting layer 7, the seed metal oxide 11 far away from the mixed conducting layer 7 in a back electrode area forms a seed metal oxide thin layer 6, the seed metal oxide 11 positioned on the back surface (namely, a non-back electrode area) of the passivation layer 3 forms a passivation scratch-resistant layer 4, and the external metal far away from the mixed conducting layer 7 forms an external metal layer 8. In this way, the back electrode is obtained by sequentially preparing the seed metal 10, performing the first heat treatment, preparing the external metal and performing the second heat treatment, as shown in fig. 1, the seed metal silicide layer 5, the seed metal oxide thin layer 6, the mixed conducting layer 7 and the passivation scratch-resistant layer 4 are in an integrated structure, that is, the passivation scratch-resistant layer 4 and the seed metal silicide layer 5, the seed metal oxide thin layer 6 and the mixed conducting layer 7 in the back electrode are all formed by converting the seed metal 10 through the steps, so that the structure of the back electrode can be simplified, the preparation process of the back electrode is greatly reduced, and the preparation method is stable and reliable and suitable for mass production. The preparation method of the external metal is screen printing, deposition or other modes such as evaporation, preferably screen printing.
The embodiment also discloses a solar cell module, which comprises a front layer, a packaging layer, a cell and a photovoltaic backboard, wherein the front layer, the packaging layer, the cell and the photovoltaic backboard are sequentially stacked.
The embodiment also discloses a solar cell system, which comprises one or more than one solar cell module, wherein the solar cell module is one of the solar cell modules in the embodiment.
Example 2
A solar cell of this embodiment, the structure, manufacturing method, assembly and system of which refer to embodiment 1, see fig. 8, differs from embodiment 1 in that:
the front side of the silicon substrate 1 of the solar cell is not provided with an electrode, the doped layer 2 on the back side of the silicon substrate 1 comprises P-type doped regions 21 and N-type doped regions 23 which are alternately arranged in sequence, and an isolation region 22 is arranged between the P-type doped regions 21 and the N-type doped regions 23; the passivation layer 3 is provided with an electrode groove of the local exposed doped layer 2, specifically, the electrode groove comprises a first electrode groove of the local exposed P-type doped region 21 and a second electrode groove of the local exposed N-type doped region 23, the first electrode groove is provided with a positive electrode contacting the P-type doped region 21, and the second electrode groove is provided with a negative electrode contacting the N-type doped region 23; the positive electrode comprises a seed metal silicide layer 5, a seed metal oxide thin layer 6, a mixed conducting layer 7 and an outer metal layer 8 which are sequentially overlapped on a P-type doped region 21 on the back surface of the doped layer 2, and the negative electrode comprises a seed metal silicide layer 5, a seed metal oxide thin layer 6, a mixed conducting layer 7 and an outer metal layer 8 which are sequentially overlapped on an N-type doped region 23 on the back surface of the doped layer 2. Both the positive electrode and the negative electrode are referred to the back electrode of embodiment 1, and thus are not described in detail.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
The foregoing has outlined rather broadly the more detailed description of the invention in order that the detailed description of the invention that follows may be better understood, and in order that the present principles and embodiments may be better understood; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (17)

1. A solar cell, characterized in that: the semiconductor device comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially overlapped on the back surface of the silicon substrate, the passivation layer is provided with an electrode groove for locally exposing the doped layer, and the electrode groove is provided with a back electrode; the back electrode comprises a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back of the locally exposed doped layer; the seed metal silicide layer is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, the seed metal oxide thin layer is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
2. A solar cell according to claim 1, wherein the outer metal layer is a copper layer, an aluminum layer, a silver layer or an alloy layer thereof;
the mixed conducting layer is formed by interdiffusion of seed metal oxide and external metal.
3. A solar cell according to claim 1 or 2, wherein the thickness of the seed metal silicide layer is less than or equal to 30nm; the thickness of the mixed conducting layer is 10-130nm; the thickness of the outer metal layer is 5-20um.
4. A solar cell according to claim 2, wherein the outer metal layer is a copper layer, an aluminum layer or an alloy layer thereof.
5. The solar cell of claim 1, wherein the passivation layer is further provided with a passivation scratch resistant layer on the back side.
6. The solar cell of claim 5, wherein the passivation scratch resistant layer is a seed metal oxide formed structure.
7. A solar cell according to claim 5 or 6, wherein the seed metal silicide layer, the seed metal oxide thin layer, the hybrid conductive layer and the passivation scratch resistant layer are in an integrally formed structure.
8. A solar cell according to claim 5 or 6, wherein the passivation scratch-resistant layer has a thickness of 10-150nm.
9. The solar cell of claim 1, wherein the doped layer comprises a tunneling oxide layer and a doped polysilicon layer sequentially stacked on the back side of the silicon substrate.
10. The solar cell of claim 1, further comprising a front electrode on the front side of the silicon substrate.
11. A solar cell, characterized in that: the semiconductor device comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially overlapped on the back surface of the silicon substrate, the passivation layer is provided with an electrode groove for locally exposing the doped layer, and the electrode groove is provided with a back electrode; the back electrode comprises a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back of the locally exposed doped layer; the seed metal silicide layer is an alloy layer formed by at least two of molybdenum silicide, nickel silicide and titanium silicide, the seed metal oxide thin layer is an alloy thin layer formed by at least two of molybdenum oxide, nickel oxide and titanium oxide, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
12. A solar cell, characterized in that: the semiconductor device comprises a silicon substrate, a doped layer and a passivation layer, wherein the doped layer and the passivation layer are sequentially stacked on the back surface of the silicon substrate, the doped layer comprises P-type doped regions and N-type doped regions which are sequentially and alternately arranged, an isolation region is arranged between the P-type doped regions and the N-type doped regions, the passivation layer is provided with a first electrode groove and a second electrode groove which are respectively exposed locally and are respectively provided with a positive electrode which is contacted with the P-type doped regions and a negative electrode which is contacted with the N-type doped regions; the positive electrode and the negative electrode respectively comprise a seed metal silicide layer, a seed metal oxide thin layer, a mixed conducting layer and an outer metal layer which are sequentially overlapped on the back surface of the doped layer; the seed metal silicide layer is one or more layers of molybdenum silicide layer, nickel silicide layer and titanium silicide layer, the seed metal oxide thin layer is one or more layers of molybdenum oxide thin layer, nickel oxide thin layer and titanium oxide thin layer, and the thickness of the seed metal oxide thin layer is less than or equal to 20nm.
13. A method of manufacturing a solar cell, comprising the steps of:
step S1, preparing a doped layer on the back surface of a silicon substrate;
s2, preparing a passivation layer on the back surface of the doped layer;
step S3, performing laser film opening on the passivation layer to obtain an electrode groove for locally exposing the doped layer;
s4, preparing seed metal on the passivation layer and the back surface of the locally exposed doped layer;
step S5, carrying out first heat treatment on the seed metal to oxidize the back surface part of the seed metal into seed metal oxide, and enabling the seed metal to react with the doped layer at the interface to form a seed metal silicide layer;
and S6, selectively preparing external metal on the back surface of the seed metal oxide corresponding to the electrode groove, and performing a second heat treatment to enable the seed metal to be completely oxidized into the seed metal oxide, wherein the seed metal oxide and the external metal are mutually diffused at an interface to form a mixed conducting layer, the seed metal oxide far away from the mixed conducting layer forms a seed metal oxide thin layer, the seed metal oxide on the back surface of the passivation layer forms a passivation scratch-resistant layer, and the external metal far away from the mixed conducting layer forms an external metal layer.
14. The method of claim 13, wherein the first and second heat treatments are performed in an oxygen-containing atmosphere at a temperature of 700-900 ℃.
15. The method of claim 13, further comprising the step of pre-treating the back surface of the silicon substrate to form a planar structure on the back surface of the silicon substrate prior to the step S1.
16. A solar cell module comprising a front layer, an encapsulant layer, a cell and a photovoltaic backsheet, which are laminated in this order, wherein the cell is a solar cell according to any one of claims 1 to 12.
17. A solar cell system comprising one or more solar cell modules, characterized in that: the solar cell module is a solar cell module according to claim 16.
CN202210112013.2A 2022-01-29 2022-01-29 Solar cell and preparation method, assembly and system thereof Pending CN116565059A (en)

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