CN116544255A - Backside illuminated image sensor and preparation method thereof - Google Patents

Backside illuminated image sensor and preparation method thereof Download PDF

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Publication number
CN116544255A
CN116544255A CN202310662371.5A CN202310662371A CN116544255A CN 116544255 A CN116544255 A CN 116544255A CN 202310662371 A CN202310662371 A CN 202310662371A CN 116544255 A CN116544255 A CN 116544255A
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layer
semiconductor substrate
metal
dielectric layer
back surface
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李梦
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Shanghai Weijing Electronic Technology Co ltd
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Shanghai Weijing Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention discloses a back-illuminated image sensor and a preparation method thereof, wherein the back-illuminated image sensor comprises a semiconductor substrate with a front surface and a back surface; the first dielectric layer is overlapped on the front surface, and the metal interconnection layer is arranged in the first dielectric layer; the second dielectric layer covers the back surface; the conductive layer is covered on the second dielectric layer; the third dielectric layer is covered on the conductive layer, and the metal grid is arranged in the third dielectric layer and corresponds to the all-pass isolation groove in position; the photosensitive unit is arranged in the semiconductor substrate and is close to the front surface of the semiconductor substrate; the all-pass isolation groove and the transistor circuits are arranged in the semiconductor substrate, extend from the front surface to the back surface of the semiconductor substrate and are positioned beside the photosensitive unit, and the all-pass isolation groove is conducted with the metal pad on the front surface or the back surface of the semiconductor substrate. The structure is used for improving optical crosstalk and electrical crosstalk among pixel structures and reducing dark current.

Description

Backside illuminated image sensor and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor integrated circuits, in particular to a back-illuminated image sensor and a preparation method thereof.
Background
Currently, as complementary metal oxide semiconductor (complementary metal oxide semiconductor, CMOS) image sensors are increasingly used in industry, vehicle-mounted, road monitoring, and high-speed cameras, the demand for image sensors that can capture images of high-speed moving objects is further increasing. The CMOS image sensor is widely applied to a plurality of fields such as mobile phones, digital cameras, medical appliances, automobile electronics, security monitoring, aerospace and the like. The pixel structure of the CMOS image sensor also experiences a trend from the front-illuminated pixel structure to the back-illuminated pixel structure, and the back-illuminated pixel structure is now becoming the main stream. Because of the front-illuminated structure, the incident light needs to pass through the metal interconnection layer and the dielectric layer before reaching the photosensitive area, and the incident light is lost to a certain extent in the process. The incident light of the back-illuminated pixel structure can directly enter the photosensitive area, almost no loss exists in the middle, and the filling factor can basically reach hundred percent, so that the sensitivity performance is greatly improved.
Two types of crosstalk, optical crosstalk and electronic crosstalk, respectively, exist mainly in image sensors. The optical crosstalk is mainly caused by light incident on adjacent pixels. Electron crosstalk refers to the diffusion or drift of electrons to other pixels. In order to reduce crosstalk between pixels, the conventional back-illuminated image sensor structure reduces optical crosstalk generated by incident light by forming a metal grid 700 as shown in fig. 1; the electrical crosstalk to the photosensitive cells 200 is reduced by forming the front side trench isolation 300 and the back side trench isolation 400 in the semiconductor substrate 100. However, in the conventional structure, a certain distance exists between the front trench isolation 300, the back trench isolation 400 and the metal grid 700, so that optical and electrical crosstalk can be generated, and the imaging quality of the image sensor is reduced. In the conventional structure, a negative charge layer 500 such as aluminum oxide or hafnium oxide is deposited on the back surface of the semiconductor substrate, and holes are attracted to fill the silicon-oxygen interface through the negative charge layer 500, so that the interface state is reduced, and the dark current is reduced to a certain extent. However, the introduction of the negative charge layer 500 not only increases the process steps, but also requires fine adjustment of the thickness of the negative charge layer 500 in combination with process feasibility, so that the suppression effect on dark current is limited.
Therefore, how to improve the optical crosstalk and the electrical crosstalk between pixel structures, and reduce the dark current, is a problem to be solved by those skilled in the art.
Disclosure of Invention
The embodiment of the invention provides a back-illuminated image sensor and a preparation method thereof, which are used for improving optical crosstalk and electrical crosstalk among pixel structures and reducing the problem of dark current.
In a first aspect, the present invention provides a backside illuminated image sensor comprising: a semiconductor substrate having a front surface and a back surface; the first dielectric layer is overlapped on the front surface of the semiconductor substrate, and the metal interconnection layer is arranged in the first dielectric layer; the second dielectric layer covers the back surface of the semiconductor substrate; the conductive layer is covered on the second dielectric layer; the third dielectric layer covers the conductive layer, and the metal grid is arranged in the third dielectric layer and corresponds to the all-pass isolation groove in position; the photosensitive unit is arranged in the semiconductor substrate and is close to the front surface of the semiconductor substrate; the all-pass isolation groove and the transistor circuits are arranged in the semiconductor substrate, extend from the front surface to the back surface of the semiconductor substrate and are positioned beside the photosensitive unit, the injection depth of the all-pass isolation groove is deeper than that of the photosensitive unit, and the all-pass isolation groove is conducted with the metal pad on the front surface or the back surface of the semiconductor substrate.
The back-illuminated image sensor provided by the invention has the beneficial effects that: because the all-pass isolation groove replaces the traditional front shallow groove isolation and back groove isolation, the problem of gaps is solved, so that a physical isolation effect can be achieved between adjacent photosensitive units to improve the effects of optical crosstalk and electrical crosstalk between pixels, the imaging quality of an image sensor is improved, the isolation groove structure is communicated with a metal pad on the front surface or the back surface, a negative voltage can be applied to the back surface of a semiconductor, the negative voltage can attract holes to fill silicon back surface interface defects, and dark current can be reduced; and the applied negative voltage value can be flexibly changed, such as 0 to-2V. The negative voltage applied on the back surface of the semiconductor can play a role in repelling electrons, so that the electrons are pushed towards the front surface direction of the semiconductor substrate, and the charge transmission efficiency is improved.
In a possible implementation manner, the film layer structure in the all-pass isolation trench comprises an oxide layer and a metal composite layer formed by stacking a plurality of metal layers from outside to inside. In the embodiment, the metal stack structure of the all-pass isolation groove can effectively block light and electron diffusion, and improve optical crosstalk and electrical crosstalk between pixels.
In another possible embodiment, the metal composite layer formed by stacking a plurality of metal layers includes a titanium layer, a titanium nitride layer, and a metal layer stacked one on top of another.
In other possible embodiments, the trench width of the all-pass isolation trench is greater than or equal to 0.2um, and the trench depth is greater than or equal to 2um.
In yet another possible embodiment, electrical conduction is provided between the bottom of the all-pass isolation trench and the conductive layer.
In yet another possible embodiment, the conductive layer is a titanium nitride film.
In a second aspect, the present invention provides a method for preparing a backside illuminated image sensor, the method comprising the steps of: providing a semiconductor substrate, wherein the semiconductor substrate has a front surface and a back surface; etching the semiconductor substrate to form a groove, sequentially depositing films in the groove to form an oxide layer and a metal composite layer, wherein the oxide layer and the metal composite layer form an all-pass isolation groove; injecting the light sensing unit into the front surface of the semiconductor substrate to form a light sensing unit, wherein the light sensing unit is arranged in the semiconductor substrate and is close to the front surface of the semiconductor substrate, and the depth of the all-pass isolation groove is deeper than the injection depth of the light sensing unit; forming a first dielectric layer and a metal interconnection layer on the front surface of the semiconductor substrate; thinning the back surface of the semiconductor substrate to expose part of the metal composite layer of the all-pass isolation groove, wherein the all-pass isolation groove is conducted with a metal pad on the front surface or the back surface of the semiconductor substrate; forming a second dielectric layer on the thinned back surface; forming a conductive layer on the second dielectric layer; forming a third dielectric layer on the conductive layer, and etching the third dielectric layer to form a metal grid, wherein the position of the metal grid corresponds to the conducting groove structure, and the all-pass isolation groove is connected to a metal bonding pad on the front surface of the semiconductor substrate through a metal wire; or to metal pads on the back surface of the semiconductor substrate.
In one possible embodiment, forming a second dielectric layer on the thinned back surface includes: and forming a second dielectric layer on the thinned back surface through thermal oxidation or deposition.
In another possible embodiment, forming a second dielectric layer on the thinned back surface includes: and forming a second dielectric layer on the thinned back surface through thermal oxidation or deposition.
In other possible embodiments, an oxide layer and a metal composite layer are formed in the trench by sequential thin film deposition, where the oxide layer and the metal composite layer form an all-pass isolation trench, and the method includes: and sequentially depositing an oxide layer, a titanium nitride layer and a metal layer in the groove, wherein the oxide layer, the titanium nitride layer and the metal layer are stacked layer by layer to form an all-pass isolation groove.
In yet another possible embodiment, the thickness of the second dielectric layer is less than or equal to 10nm.
The preparation method provided by the invention has the beneficial effects that: according to the preparation method of the back-illuminated image sensor, the formed isolation groove structure is of a full-communication structure, so that the complete isolation between the photosensitive units is realized. The isolation groove structure is conducted with the metal bonding pad on the front surface or the back surface, so that negative voltage can be applied to the back surface of the semiconductor, and the negative voltage can attract holes to fill interface defects on the back surface of the silicon, so that dark current can be reduced; and the applied negative voltage value can be flexibly changed, such as 0 to-2V. The negative voltage applied on the back surface of the semiconductor can play a role in repelling electrons, so that the electrons are pushed towards the front surface direction of the semiconductor substrate, and the charge transmission efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic cross-sectional view of a backside-illuminated image sensor according to the prior art;
fig. 2 is a schematic cross-sectional structure of a backside-illuminated image sensor according to an embodiment of the present invention;
fig. 3 is a schematic flow chart of a method for manufacturing an illumination image sensor according to an embodiment of the present invention;
fig. 4A to fig. 4G are schematic diagrams illustrating an intermediate stage of a manufacturing process of a backside illuminated image sensor according to an embodiment of the present invention.
Description of element reference numerals
110 a semiconductor substrate; 101 a front surface; 102 a back surface;
210 a photosensitive unit; 310 all-pass isolation trenches; 410 a first dielectric layer; 510 a metal interconnect layer;
610 a second dielectric layer; a 710 conductive layer; 810 a third dielectric layer; 910 a metal grid.
Detailed Description
In order to make the contents of the present invention more clear and understandable, the contents of the present invention will be further described with reference to the accompanying drawings. Of course, the invention is not limited to this particular embodiment, and common alternatives known to those skilled in the art are also encompassed within the scope of the invention.
In the following detailed description of the embodiments of the present invention, the structures of the present invention are not drawn to a general scale, and the structures in the drawings are partially enlarged, deformed, and simplified, so that the present invention should not be construed as being limited thereto.
According to the gist of the present invention, there is provided a backside illuminated image sensor, as shown in fig. 2, comprising: the semiconductor substrate 110, the photosensitive unit 210, the all-pass isolation trench 310, the first dielectric layer 410, the metal interconnection layer 510, the second dielectric layer 610, the conductive layer 710, the third dielectric layer 810, and the metal grid 910.
Specifically, the semiconductor substrate 110 has a front surface 101 and a back surface 102. The second dielectric layer 610 covers the back surface 102 of the semiconductor substrate 110. The photo-sensing unit 210 is disposed in the semiconductor substrate 110 and near the front surface of the semiconductor substrate 110, and the implantation depth of the photo-sensing unit 210 is shallower than the bottom of the all-pass isolation trench 310. The second dielectric layer 610 covers the back surface 102, the conductive layer 710 covers the second dielectric layer 610, and illustratively, the thickness of the second dielectric layer 610 is less than or equal to 10nm, and the conductive layer 710 is a TiN film. Alternatively, the TiN film layer thickness is adjustable, but not less than 10 angstroms thick. A third dielectric layer 810 overlies the conductive layer 710. The metal grid 910 is disposed in the third dielectric layer 810 and is located opposite to the all-pass isolation trench 310.
In addition, a plurality of transistor circuits (not shown) for signal transmission and processing are disposed in the semiconductor substrate 110, the all-pass isolation trench 310 is located beside the photosensitive unit 210, the all-pass isolation trench 310 extends from the front surface 101 to the back surface 102 of the semiconductor substrate 110, and the implantation depth of the all-pass isolation trench 310 is deeper than the implantation depth of the photosensitive unit 210. The first dielectric layer 410 is overlapped on the front surface of the semiconductor substrate 110, and the metal interconnection layer 510 is located in the first dielectric layer 410.
Wherein, the all-pass isolation trench 310 is equivalent to one-step formation of the conventional front shallow trench isolation and the conventional back deep trench isolation, and simultaneously plays a physical isolation role between the adjacent photosensitive units 210 to improve the effects of optical crosstalk and electrical crosstalk between pixels, improve the imaging quality of the image sensor, and conduct the all-pass isolation trench 310 with a metal pad on the front or the back, so that a negative voltage can be applied to the back surface of the semiconductor substrate 110, and the negative voltage can attract holes to fill the interface defect on the back surface of the semiconductor substrate 110, so that dark current can be reduced; the negative voltage applied to the back surface of the semiconductor substrate 110 can repel electrons, pushing the electrons in the positive direction of silicon, improving the charge transport efficiency.
In a possible embodiment, the film structure in the all-pass isolation trench 310 is an oxide layer and a metal composite layer sequentially from outside to inside. For example, the inner film structure of the all-pass isolation trench 310 is a silicon dioxide layer, a titanium (Ti) layer, a titanium nitride (TiN) layer, and a metal layer from the outside to the inside, wherein the metal of the metal layer may be copper, aluminum, tungsten, etc. Optionally, the bottom of the all-pass isolation trench 310 is in electrically conductive relation to the conductive layer 710, and the all-pass isolation trench 310 may be connected to a metal pad on the front surface 101 of the semiconductor substrate 110 by a metal wire or may be connected to a metal pad on the back surface 102 of the semiconductor substrate 110 by a metal wire.
Optionally, the trench width of the all-pass isolation trench 310 is greater than or equal to 0.2um, and the trench depth is greater than or equal to 2um.
In one possible embodiment, the second dielectric layer 610 is used to serve as a transition between the back surface 102 of the semiconductor substrate 110 and the conductive layer 710, where the second dielectric layer 610 is a very thin layer, for example, having a thickness less than or equal to 10nm.
A schematic flow chart of a method for manufacturing a backside illuminated image sensor is further shown in the following with reference to fig. 3. Referring to fig. 4A to 4G, the preparation process of the backside illuminated image sensor provided by the embodiment of the invention includes the following steps:
s301, a semiconductor substrate 110 is provided, the semiconductor substrate having a front surface 101 and a back surface 102.
As shown in fig. 4A, the semiconductor substrate 110 may be an N-type or P-type silicon substrate. The material of the semiconductor substrate 110 includes one or more of silicon, germanium, silicon carbide, gallium arsenide, and indium gallium, and the semiconductor substrate 110 may also be a silicon-on-insulator semiconductor substrate or a germanium-on-insulator semiconductor substrate.
S302, etching the semiconductor substrate 110 to form a trench.
Wherein, as shown in fig. 4A, the trench extends from the front surface 101 to the back surface 102, optionally, the trench has a width greater than 0.1um and a depth greater than 2um.
S303, forming an all-pass isolation groove 310 after sequentially depositing an oxide layer and a metal composite layer in the groove.
Illustratively, as shown in fig. 4B, an all-pass isolation trench 310 is formed after sequentially depositing a silicon dioxide layer, a titanium (Ti) layer, a titanium nitride (TiN) layer, and a metal layer within the trench, wherein the metal of the metal layer may be copper, aluminum, tungsten, or the like.
S304, implanting and forming a photosensitive unit 210 on the front surface 101 of the semiconductor substrate 110.
Illustratively, as shown in fig. 4C, the photosensitive cells 210 are formed by photolithography and ion implantation processes, and the trench depth of the all-pass isolation trenches 310 is deeper than the implantation depth of the photosensitive cells 210.
S305, forming a first dielectric layer 410 and a metal interconnection layer 510 on the front surface 101 of the semiconductor substrate 110.
Illustratively, as shown in fig. 4D, a first dielectric layer 410 is formed on the front surface 101 of the semiconductor substrate 110 by thin film deposition, and then a metal interconnection layer 510 is formed by a march process; or the metal interconnection layer 510 is formed by metal deposition and then the first dielectric layer 410 is formed by thin film deposition.
S306, the back surface 102 of the semiconductor substrate is thinned so that the metal composite layer of the all-pass isolation trench 310 is exposed.
Exemplary, as shown in fig. 4E, the current silicon wafer including the photosensitive cells 210 is subjected to a backside thinning process, the silicon wafer is thinned to a thickness of several tens um by grinding, then fine thinned by chemical mechanical polishing, and the time of polishing is adjusted so that the all-pass isolation trench 310 is close to SiO at the bottom of the back surface of the semiconductor substrate 2 Is polished off to expose the sub-film Ti, and the polishing stops on the Ti surface. Because of the different polishing rates of the different materials, when the Ti surface is exposed, the silicon will be more polished off to a level below the trench bottom.
S307, forming the second dielectric layer 610 on the thinned back surface 102 by thermal oxidation or deposition.
Exemplary, as shown in FIG. 4F, the thinned back surface 102 is formed with a second dielectric layer 610, such as SiO, by thermal oxidation or deposition 2 ，SiO 2 The thickness of the layer is less than or equal to 10nm.
S308, a conductive layer 710 is formed on the second dielectric layer 610.
Illustratively, as shown in fig. 4G, the film material of the conductive layer 710 may be TiN, which in turn may communicate with the metal in the all-pass isolation trench 310.
S309, forming a third dielectric layer 810 on the conductive layer 710, and etching the third dielectric layer 810 to form a metal grid 910, where the position of the metal grid 910 corresponds to the conducting trench structure 510.
Illustratively, the metal grid fabrication may be completed by photolithography, etching, and the backside metal pad process may be completed after forming the third dielectric layer 810, with the final effect shown in fig. 2.
S310, connecting the all-pass isolation groove 310 to a metal pad on the front surface of the semiconductor substrate through a metal wire; or to metal pads on the back surface of the semiconductor substrate.
Alternatively, the all-pass isolation trench 310 may be connected to the metal pad on the front side by a metal wire, or may be connected to the metal pad on the back side by a metal wire.
According to the preparation method of the backside illuminated image sensor, the formed isolation groove structure is of a full-communication structure, so that complete isolation between photosensitive units is realized, the isolation groove structure is conducted with a metal pad on the front surface or the back surface, and then negative voltage can be applied to the back surface of a semiconductor, and the negative voltage can attract holes to fill silicon back surface interface defects, so that dark current can be reduced; and the applied negative voltage value can be flexibly changed, such as 0 to-2V. The negative voltage applied on the back surface of the semiconductor can play a role in repelling electrons, so that the electrons are pushed towards the front surface direction of the semiconductor substrate, and the charge transmission efficiency is improved.
The foregoing description is only of the preferred embodiments of the present invention, and the embodiments are not intended to limit the scope of the invention, so that all changes made in the equivalent structures of the present invention described in the specification and the drawings are included in the scope of the invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A backside illuminated image sensor, comprising:
a semiconductor substrate having a front surface and a back surface;
the first dielectric layer is overlapped on the front surface of the semiconductor substrate, and the metal interconnection layer is arranged in the first dielectric layer;
the second dielectric layer covers the back surface of the semiconductor substrate;
the conductive layer is covered on the second dielectric layer;
the third dielectric layer covers the conductive layer, and the metal grid is arranged in the third dielectric layer and corresponds to the all-pass isolation groove in position;
the photosensitive unit is arranged in the semiconductor substrate and is close to the front surface of the semiconductor substrate;
the all-pass isolation groove and the transistor circuits are arranged in the semiconductor substrate, extend from the front surface to the back surface of the semiconductor substrate and are positioned beside the photosensitive unit, the injection depth of the all-pass isolation groove is deeper than that of the photosensitive unit, and the all-pass isolation groove is conducted with the metal pad on the front surface or the back surface of the semiconductor substrate.
2. The backside illuminated image sensor according to claim 1, wherein the film layer structure in the all-pass isolation trench includes an oxide layer and a metal composite layer formed by stacking a plurality of metal layers from outside to inside.
3. The backside illuminated image sensor according to claim 2, wherein the metal composite layer formed by stacking a plurality of metal layers includes a titanium layer, a titanium nitride layer, and a metal layer stacked one on another.
4. The backside illuminated image sensor according to claim 3, wherein a trench width of the all-pass isolation trench is greater than or equal to 0.2um and a trench depth is greater than or equal to 2um.
5. The backside illuminated image sensor of claim 4, wherein the bottom of the all-pass isolation trench is in electrical communication with the conductive layer.
6. The backside illuminated image sensor according to any one of claims 1 to 5, wherein the conductive layer is a titanium nitride thin film.
7. A method for manufacturing a backside illuminated image sensor, comprising:
providing a semiconductor substrate, wherein the semiconductor substrate has a front surface and a back surface;
etching the semiconductor substrate to form a groove, sequentially depositing films in the groove to form an oxide layer and a metal composite layer, wherein the oxide layer and the metal composite layer form an all-pass isolation groove;
injecting the light sensing unit into the front surface of the semiconductor substrate to form a light sensing unit, wherein the light sensing unit is arranged in the semiconductor substrate and is close to the front surface of the semiconductor substrate, and the depth of the all-pass isolation groove is deeper than the injection depth of the light sensing unit;
forming a first dielectric layer and a metal interconnection layer on the front surface of the semiconductor substrate;
thinning the back surface of the semiconductor substrate to expose part of the metal composite layer of the all-pass isolation groove, wherein the all-pass isolation groove is conducted with a metal pad on the front surface or the back surface of the semiconductor substrate;
forming a second dielectric layer on the thinned back surface;
forming a conductive layer on the second dielectric layer;
forming a third dielectric layer on the conductive layer, and etching the third dielectric layer to form a metal grid, wherein the position of the metal grid corresponds to the conducting groove structure;
connecting the all-pass isolation groove to a metal pad on the front surface of the semiconductor substrate through a metal wire; or to metal pads on the back surface of the semiconductor substrate.
8. The method of claim 7, wherein forming a second dielectric layer on the thinned back surface comprises:
and forming a second dielectric layer on the thinned back surface through thermal oxidation or deposition.
9. The method of claim 7, wherein the forming of an oxide layer and a metal composite layer in the trench by sequential thin film deposition, the oxide layer and metal composite layer comprising an all-pass isolation trench, comprises:
and sequentially depositing an oxide layer, a titanium nitride layer and a metal layer in the groove, wherein the oxide layer, the titanium nitride layer and the metal layer are stacked layer by layer to form an all-pass isolation groove.
10. The method of any of claims 7 to 9, wherein the thickness of the second dielectric layer is less than or equal to 10nm.
CN202310662371.5A 2023-06-05 2023-06-05 Backside illuminated image sensor and preparation method thereof Pending CN116544255A (en)

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CN202310662371.5A CN116544255A (en) 2023-06-05 2023-06-05 Backside illuminated image sensor and preparation method thereof

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