CN116527161A - Method, system, equipment, medium and chip module for testing higher harmonic power - Google Patents
Method, system, equipment, medium and chip module for testing higher harmonic power Download PDFInfo
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- H—ELECTRICITY
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- H04B17/00—Monitoring; Testing
- H04B17/0082—Monitoring; Testing using service channels; using auxiliary channels
- H04B17/0085—Monitoring; Testing using service channels; using auxiliary channels using test signal generators
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/309—Measuring or estimating channel quality parameters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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Abstract
The disclosure provides a method, a system, a device, a medium and a chip module for testing higher harmonic power, wherein the method comprises the steps of receiving a test instruction; the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency; transmitting target power corresponding to the fundamental wave frequency based on the test instruction; acquiring higher harmonic power corresponding to the frequency doubling point based on the target power; and sending the higher harmonic power outwards to realize the test of the higher harmonic power. According to the method and the device, the higher harmonic power can be tested through the communication device to be tested, a harmonic power testing environment is not required to be built for the communication device to be tested, the self-test of the communication device to be tested on the harmonic power is achieved, the performance of the harmonic is verified, the efficiency of testing conducted harmonic power is improved, and the testing cost is reduced.
Description
Technical Field
The disclosure relates to the field of communication technologies, and in particular, to a method, a system, a device, a medium and a chip module for testing higher harmonic power.
Background
In complex periodic oscillations, fundamental and harmonics (several higher harmonics) are involved, the harmonics being spurious signals generated by single frequency tones and nonlinear elements or single tone intermodulation distortion in the radio frequency/microwave signal chain, and besides harmonic spurious signals, also non-harmonic spurious signals, commonly referred to collectively as spurious signals. Harmonics can cause severe interference to communication devices and electronic devices, distorting signal waveforms.
The communication device is required to be subjected to network access detection so as to ensure that stray signals of the communication device accord with regulations, the network access test is required to measure conducted harmonic power (harmonic stray), the test harmonic power is required to be tested in a test environment formed by a frequency spectrograph, a comprehensive tester, a power divider, a shielding room and the like, the communication device is connected with the comprehensive tester and the frequency spectrograph through the power divider, the comprehensive tester sets channels and power, and the power value of harmonic is read on the frequency spectrograph, but the test environment is built more complicated, the cost is higher and the measurement time is longer. Meanwhile, some manufacturers of communication devices have no test environment, so that the correction and verification cost is high when the laboratory network access test fails.
Disclosure of Invention
The technical problem to be solved by the present disclosure is to overcome the defects of complex test environment, high cost and long measurement time in the prior art for constructing test harmonic power, and provide a test method, system, device, medium and chip module for higher harmonic power.
The technical problems are solved by the following technical scheme:
in a first aspect, a method for testing harmonic power is provided, where the method is applied to a communication device to be tested, and the method includes:
receiving a test instruction;
the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency;
transmitting target power corresponding to the fundamental wave frequency based on the test instruction;
acquiring higher harmonic power corresponding to the frequency doubling point based on the target power;
and sending the higher harmonic power outwards to realize the test of the higher harmonic power.
Preferably, the transmitting the target power corresponding to the fundamental wave frequency based on the test instruction includes:
transmitting initial power corresponding to the fundamental wave frequency based on the test instruction;
and amplifying and filtering the initial power to obtain the target power.
Preferably, the step of sending the higher harmonic power to the outside to realize the test of the higher harmonic power includes:
obtaining an actual insertion loss value corresponding to the higher harmonic power based on a preset mapping relation;
calibrating the higher harmonic power based on the actual insertion loss value to obtain updated higher harmonic power;
the updated higher harmonic power is sent outwards, so that the higher harmonic power is tested;
the preset mapping relation is used for representing test insertion loss values corresponding to the communication device to be tested under different preset frequencies.
Preferably, the step of receiving the test instruction includes:
receiving the test instruction in response to the communication device to be tested being in an engineering mode;
and/or, the target power is the maximum power corresponding to the fundamental wave frequency;
and/or the communication device to be tested is a communication device with failed network access test.
In a second aspect, there is provided a test system for higher harmonic power, the test system being applied to a communication device under test, the test system comprising:
the radio frequency front end module is used for receiving the test instruction;
the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency;
the power transmitting module is used for transmitting target power corresponding to the fundamental wave frequency based on the test instruction;
the power detection circuit is used for acquiring higher harmonic power corresponding to the frequency doubling point based on the target power;
the radio frequency front-end module is also used for sending the higher harmonic power outwards so as to realize the test of the higher harmonic power.
Preferably, the power transmitting module includes:
the power transmitting unit is used for transmitting initial power corresponding to the fundamental wave frequency based on the test instruction;
and the power processing unit is used for amplifying and filtering the initial power to obtain the target power.
Preferably, the radio frequency front end module includes:
the insertion loss acquisition unit is used for obtaining an actual insertion loss value corresponding to the higher harmonic power based on a preset mapping relation in a matching mode;
the power updating unit is used for calibrating the higher harmonic power based on the actual insertion loss value so as to obtain updated higher harmonic power;
the power transmitting unit is used for transmitting the updated higher harmonic power outwards so as to realize the test of the higher harmonic power;
the preset mapping relation is used for representing test insertion loss values corresponding to the communication device to be tested under different preset frequencies.
Preferably, the radio frequency front end module is specifically configured to receive the test instruction in response to the to-be-tested communication device being in an engineering mode;
and/or, the target power is the maximum power corresponding to the fundamental wave frequency;
and/or the communication device to be tested is a communication device with failed network access test.
In a third aspect, a communication device is provided, where the communication device includes a system for testing the harmonic power of any of the above.
Preferably, the communication device is a chip module or a wireless communication terminal.
In a fourth aspect, a chip module is further provided, and the chip module is applied to an electronic device, where the chip module includes a transceiver component and a chip, and the chip is configured to execute the method for testing the harmonic power.
In a fifth aspect, there is also provided an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method for testing higher harmonic power as described in any of the preceding claims when the computer program is executed.
In a sixth aspect, there is also provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of testing for higher harmonic power as described in any of the above.
On the basis of conforming to the common knowledge in the art, the preferred conditions can be arbitrarily combined to obtain the preferred examples of the disclosure.
The positive progress effect of the present disclosure is:
the method for testing the higher harmonic power is applied to a communication device to be tested, a test instruction is received through the communication device to be tested, the higher harmonic power corresponding to a frequency doubling point is obtained based on target power corresponding to the self-emission fundamental frequency of the communication device to be tested, and the higher harmonic power is sent outwards; the method has the advantages that the test of the higher harmonic power can be realized through the communication device to be tested, the harmonic power test environment is not required to be built for the communication device to be tested, the spontaneous self-test of the communication device to be tested on the harmonic power is realized, the performance of the harmonic is verified, the efficiency of testing the conducted harmonic power is improved, and the test cost is reduced.
Drawings
Fig. 1 is a first flow chart of a testing method of higher harmonic power provided in embodiment 1 of the disclosure;
fig. 2 is a second flow chart of a method for testing higher harmonic power according to embodiment 1 of the present disclosure;
fig. 3 is a third flow chart of the method for testing higher harmonic power according to embodiment 1 of the present disclosure;
fig. 4 is a schematic diagram of test results of a test method for higher harmonic power provided in embodiment 1 of the disclosure;
fig. 5 is a first structural schematic diagram of a test system for higher harmonic power provided in embodiment 2 of the present disclosure;
FIG. 6 is a second schematic diagram of a test system for higher harmonic power according to embodiment 2 of the present disclosure;
fig. 7 is a schematic structural diagram of a communication device provided in embodiment 3 of the present disclosure;
fig. 8 is a schematic structural diagram of an electronic device provided in embodiment 4 of the present disclosure.
Detailed Description
The present disclosure is further illustrated by way of examples below, but is not thereby limited to the scope of the examples described.
Example 1
The embodiment provides a method for testing higher harmonic power, which is applied to a communication device to be tested, as shown in fig. 1, and includes:
s101, receiving a test instruction.
The test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency.
S102, transmitting target power corresponding to the fundamental wave frequency based on the test instruction.
S103, obtaining higher harmonic power corresponding to the frequency doubling point based on the target power.
S104, the higher harmonic power is sent outwards, so that the higher harmonic power is tested.
When the communication device is used for communication, a plurality of higher harmonics can appear on the basis of a fundamental wave, the frequency of the higher harmonics is 2 times or more than that of the fundamental wave, and the corresponding higher harmonics such as a second harmonic frequency, a third harmonic frequency, a fourth harmonic frequency and the like can be obtained by multiplying the corresponding frequency doubling point on the basis of the fundamental wave frequency. Each higher harmonic corresponds to higher harmonic power, and the harmonic conduction performance of the communication device to be tested is tested by measuring the higher harmonic power.
The method for testing the higher harmonic power is applied to a communication device to be tested, a test instruction is received through the communication device to be tested, the higher harmonic power corresponding to a frequency doubling point is obtained based on target power corresponding to the self-emission fundamental frequency of the communication device to be tested, and the higher harmonic power is sent outwards; the method has the advantages that the test of the higher harmonic power can be realized through the communication device to be tested, the harmonic power test environment is not required to be built for the communication device to be tested, the spontaneous self-test of the communication device to be tested on the harmonic power is realized, the performance of the harmonic is verified, the efficiency of testing the conducted harmonic power is improved, and the test cost is reduced.
In an alternative embodiment, as shown in fig. 2, the step S102 includes:
s1021, transmitting initial power corresponding to the fundamental wave frequency based on the test instruction.
And S1022, amplifying and filtering the initial power to obtain the target power.
Because the initial power corresponding to the fundamental wave frequency is smaller and does not meet the test requirement, the initial power needs to be amplified and filtered to obtain the target power.
According to the method for testing the higher harmonic power, the initial power corresponding to the fundamental wave frequency is transmitted based on the test instruction, amplification and filtering processing are carried out on the initial power to obtain the target power, further subsequent harmonic power testing is carried out, and testing accuracy is improved.
In an alternative embodiment, the target power is the maximum power corresponding to the fundamental frequency.
For testing harmonic spurious, the relevant regulations of the communication industry are to test at maximum power, so in practical testing, the maximum power corresponding to the fundamental wave frequency can be transmitted according to the testing instruction, and thus the harmonic power can be tested.
In an alternative embodiment, as shown in fig. 3, the step S104 includes:
s1041, obtaining an actual insertion loss value corresponding to the higher harmonic power based on a preset mapping relation.
S1042, calibrating the higher harmonic power based on the actual insertion loss value to obtain updated higher harmonic power.
S1043, the updated higher harmonic power is sent outwards, so that the higher harmonic power is tested.
The preset mapping relation is used for representing the corresponding test insertion loss values of the communication device to be tested under different preset frequencies.
The method comprises the steps of constructing test insertion loss values corresponding to the same communication device to be tested under different preset frequencies in advance to form a preset mapping relation, and matching the corresponding actual insertion loss values for the higher harmonic power according to the preset mapping relation when the higher harmonic power is tested. The preset mapping relationship may be obtained based on a plurality of measurements.
The insertion loss is also called path loss, and corresponds to a loss of a certain power, and after the harmonic power is obtained, the insertion loss value corresponding to the harmonic power needs to be tested.
For example, a test socket and a test meter may be connected at the output of the coupler of the communication device under test, and the power value of the output, referred to as the meter measured power value, may be measured.
The higher harmonic power measured by the power detector of the communication device to be measured is called as a readback power value, the updated higher harmonic power is equal to the readback power value plus an actual insertion loss value, namely, the insertion loss value is increased to the readback power, and the calibration of the higher harmonic power can be realized, so that the updated higher harmonic power is obtained.
The principles of the present disclosure are further described below by way of a few examples of its application.
Taking B8 (a communication band) as an example, the fundamental frequency is 902.4Mhz (megahertz), the second harmonic frequency is 1805Mhz, the third harmonic frequency is 2706Mhz, and the fourth harmonic frequency is 3610Mhz.
If the second harmonic power corresponding to B8 needs to be tested, the test instruction comprises the fundamental wave frequency 902.4Mhz of B8 and the frequency doubling point 2. For the second harmonic 1805Mhz of the fundamental frequency 902.4Mhz, the read back second harmonic power value of the communication device under test is-58 dBm (decibel milliwatts), with a1 milliwatt (1 mW) conversion component Bei Haowa of 0dBm. Based on a preset mapping relation, the test insertion loss value of the communication device to be tested for 1805Mhz is 28dBm, namely the actual insertion loss value of the communication device to be tested for 1805Mhz is 28dBm, and the updated fundamental wave power value of-30 dBm can be obtained by adding the second harmonic readback power value of-58 dBm and the actual insertion loss value of 28 dBm. And sending the updated fundamental wave power value of-30 dBm outwards to realize the test of the second harmonic power. The power of the third and fourth harmonics can be calculated in the same way.
The method for testing the higher harmonic power can also test the fundamental wave power, and the specific method is that the step of obtaining the higher harmonic power corresponding to the frequency doubling point based on the target power is replaced by the step of obtaining the fundamental wave power based on the target power and the step of obtaining the fundamental wave power and the step of sending the fundamental wave power outwards to realize the test of the fundamental wave power, and meanwhile, the updated fundamental wave power can be obtained by subtracting the insertion loss value of the communication device to be tested on the fundamental wave power from the target power.
Taking B5 (a communication band) as an example, the fundamental frequency is 836.5Mhz (megahertz), the second harmonic frequency is 1673Mhz, the third harmonic frequency is 2510Mhz, and the fourth harmonic frequency is 3346Mhz.
If the second harmonic power corresponding to B5 needs to be tested, the test instruction includes the fundamental frequency 836.5Mhz of B5 and the frequency doubling point 2. The communication device to be tested receives the test instruction, emits the target power corresponding to the fundamental frequency 836.5Mhz, such as 22.5dBm (decibel milliwatt), for the fundamental wave, the instrument measures the fundamental power value to be 22.5dBm, based on the preset mapping relation, the test insertion loss value of the communication device to be tested for 836.5Mhz is 28dBm, namely the actual insertion loss value of the communication device to be tested for 836.5Mhz is 28dBm, and the updated fundamental power value 22.5dBm can be obtained by adding the fundamental readback power value-5.5 dBm to the actual insertion loss value of 28 dBm. And sending the updated fundamental wave power value of 22.5dBm outwards to realize the test of the fundamental wave power.
For the second harmonic 1673Mhz with the fundamental wave frequency of 836.5Mhz, the read-back second harmonic power value of the communication device to be tested is-60 dBm, based on the preset mapping relation, the test insertion loss value of the communication device to be tested for 1673Mhz is 40dBm, that is, the actual insertion loss value of the communication device to be tested for the fundamental wave frequency of 1673Mhz is 40dBm, and the updated fundamental wave power value of-20 dBm can be obtained by adding the second harmonic read-back power value-60 dBm to the actual insertion loss value of 40 dBm. And sending the updated fundamental wave power value of-20 dBm outwards to realize the test of the second harmonic power. The power of the third and fourth harmonics can be calculated in the same way.
As shown in fig. 4, the X-axis represents frequency values, the Y-axis represents power values, curve a is a curve of the meter measured power values, A1 is fundamental frequency (i.e., main frequency), A2 is second harmonic frequency, A3 is third harmonic frequency, and A4 is fourth harmonic frequency; curve B is a curve of read-back power values, B1 is fundamental frequency (i.e., main frequency), B2 is second harmonic frequency, B3 is third harmonic frequency, and B4 is fourth harmonic frequency; the meter measuring power value and the readback power value have good following effect, and the readback power value has higher test precision.
The method for testing the higher harmonic power is applied to the communication device to be tested, the actual insertion loss value corresponding to the higher harmonic power is obtained based on the preset mapping relation matching, the higher harmonic power is calibrated based on the actual insertion loss value, so that updated higher harmonic power is obtained, the higher harmonic power is calibrated, the precision and accuracy of harmonic power testing are improved, the efficiency of testing conducted harmonic power is improved, and the testing cost is reduced.
In an alternative embodiment, the step S101 includes:
s1011, receiving a test instruction in response to the communication device to be tested being in the engineering mode.
The engineering mode is a working mode for testing various index parameters of the communication device to be tested, and when the communication device to be tested is in the engineering mode, a test instruction is received so as to realize the test of the harmonic power corresponding to the communication device to be tested.
In an alternative embodiment, the communication device under test is a communication device that fails the network access test.
Before entering the market, the communication device needs to be subjected to network access test to ensure that the communication device meets the requirements of related communication standards, wherein one important test is harmonic power test, and if the network access test of the communication device fails, the communication device needs to be modified.
For the communication device with failed network access test, the method for testing the harmonic power can be adopted to test the harmonic power of the communication device, so that the product with unqualified harmonic test can be modified conveniently, a harmonic power test environment is not required to be built for the communication device, the self-test of the harmonic power can be realized, the efficiency of testing and transmitting the harmonic power is improved, and the test cost is reduced.
Example 2
The present embodiment provides a test system of higher harmonic power, which corresponds to the test method of higher harmonic power in embodiment 1, and is applied to a communication device to be tested, as shown in fig. 5, and includes:
the radio frequency front end module 1 is used for receiving a test instruction;
the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequencies corresponding to the fundamental wave frequency;
the power transmitting module 2 is used for transmitting target power corresponding to the fundamental wave frequency based on the test instruction;
a power detection circuit 3 for acquiring higher harmonic power corresponding to the frequency doubling point based on the target power;
the radio frequency front-end module 1 is further used for sending out the higher harmonic power so as to realize the test of the higher harmonic power.
The radio frequency front end module 1 can receive a test instruction sent by an application layer or an upper computer at a higher stage, and control the power transmitting module 2 to transmit target power corresponding to fundamental wave frequency based on the test instruction.
The power detection circuit 3 may perform operations such as coupling loop, attenuation, etc. on the target power to obtain the harmonic power of the harmonic corresponding to the fundamental wave.
In an alternative embodiment, the power transmission module 2 comprises:
a power transmitting unit 21 for transmitting initial power corresponding to the fundamental frequency based on the test instruction;
the power processing unit 22 is configured to perform amplification processing and filtering processing on the initial power to obtain a target power.
In an alternative embodiment, the radio frequency front end module 1 comprises:
the insertion loss obtaining unit 11 is configured to obtain an actual insertion loss value corresponding to the higher harmonic power based on matching of a preset mapping relationship;
a power updating unit 12, configured to calibrate the higher harmonic power based on the actual insertion loss value, so as to obtain updated higher harmonic power;
a power transmitting unit 13, configured to transmit the updated harmonic power to the outside, so as to implement a test of the harmonic power;
the preset mapping relation is used for representing the corresponding test insertion loss values of the communication device to be tested under different preset frequencies.
In an alternative embodiment, the radio frequency front end module 1 is specifically configured to receive a test instruction in response to the communication device under test being in an engineering mode.
In an alternative embodiment, the target power is the maximum power corresponding to the fundamental frequency.
In an alternative embodiment, the communication device under test is a communication device that fails the network access test.
Fig. 6 is a second schematic diagram of a test system for higher harmonic power provided in this embodiment, as shown in fig. 6, the radio frequency front end module 1 may also be referred to as BB (Baseband, fundamental frequency, abbreviated as Baseband), the power transmitting unit 21 in the power transmitting module 2 corresponds to Tx gain (power transmission) in fig. 6, the power processing unit 22 corresponds to PA (power amplifier) and DUP (duplexer) in fig. 6, and the power detecting circuit 3 includes a TXM (transmitting end) formed by a coupler, a resistance attenuator formed by resistors R1, R2, R3, and a PDET (power detector).
The test socket and the test meter may be connected at the output of the coupler of the communication device under test, and the power value at the output, referred to as the meter measured power value, may be measured.
The PDET outputs the higher harmonic power value to the radio frequency front end module 1, and the radio frequency front end module 1 transmits the higher harmonic power to an application layer or an upper computer outwards, so that the automatic test of the higher harmonic power is realized.
The working principle of the system for testing the harmonic power of the present embodiment is the same as that of the method for testing the harmonic power of embodiment 1, and will not be described here again.
The system for testing the higher harmonic power is applied to a communication device to be tested, receives a testing instruction through the communication device to be tested, obtains the higher harmonic power corresponding to a frequency multiplication point based on target power corresponding to the fundamental wave frequency emitted by the communication device to be tested, and sends the higher harmonic power outwards; the method has the advantages that the test of the higher harmonic power can be realized through the communication device to be tested, the harmonic power test environment is not required to be built for the communication device to be tested, the spontaneous self-test of the communication device to be tested on the harmonic power is realized, the performance of the harmonic is verified, the efficiency of testing the conducted harmonic power is improved, and the test cost is reduced.
The test system for higher harmonic power provided in this embodiment may be a separate chip module or an electronic device, or may be a chip module integrated in an electronic device.
The test system for higher harmonic power described in this embodiment includes each module/unit, which may be a software module/unit, a hardware module/unit, or a software module/unit, or a hardware module/unit.
The test system for the higher harmonic power in this embodiment may be operated in an android device, which may include components such as a key, a display screen, and a housing, in addition to the test system for the higher harmonic power in this embodiment.
Example 3
The present embodiment provides a communication device, as shown in fig. 7, which includes the test system of the higher harmonic power in embodiment 2.
Specifically, the communication device may be a chip module or a wireless communication terminal.
The communication device of the embodiment, based on the test system of the higher harmonic power in the embodiment 2, receives a test instruction through the communication device to be tested, obtains the higher harmonic power corresponding to the frequency multiplication point based on the target power corresponding to the fundamental wave frequency emitted by the communication device to be tested, and sends the higher harmonic power outwards; the method has the advantages that the test of the higher harmonic power can be realized through the communication device to be tested, the harmonic power test environment is not required to be built for the communication device to be tested, the spontaneous self-test of the communication device to be tested on the harmonic power is realized, the performance of the harmonic is verified, the efficiency of testing the conducted harmonic power is improved, and the test cost is reduced.
The communication device of the present embodiment may further include other components, which are not particularly limited by the present disclosure.
Example 4
Fig. 8 is a schematic structural diagram of an electronic device according to the present embodiment. The electronic device includes a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the method of testing higher harmonic power as in embodiment 1 above when executing the program. The electronic device 80 shown in fig. 8 is merely an example and should not be construed to limit the functionality and scope of use of embodiments of the present disclosure in any way.
As shown in fig. 8, the electronic device 80 may be in the form of a general purpose computing device, which may be a server device, for example. Components of the electronic device 80 may include, but are not limited to: the at least one processor 81, the at least one memory 82, a bus 83 connecting the various system components, including the memory 82 and the processor 81.
The bus 83 includes a data bus, an address bus, and a control bus.
The memory 82 may include volatile memory such as Random Access Memory (RAM) 821 and/or cache memory 822, and may further include Read Only Memory (ROM) 823.
Memory 82 may also include a program/utility 825 having a set (at least one) of program modules 824, such program modules 824 include, but are not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment.
The processor 81 executes various functional applications and data processing, such as the method of testing the higher harmonic power in embodiment 1 of the present disclosure, by executing a computer program stored in the memory 82.
The electronic device 80 may also communicate with one or more external devices 84 (e.g., keyboard, pointing device, etc.). Such communication may occur through an input/output (I/O) interface 85. Also, model-generating device 80 may also communicate with one or more networks, such as a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet, through network adapter 86. As shown in fig. 8, the network adapter 86 communicates with other modules of the model-generating device 80 via the bus 83. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in connection with the model-generating device 80, including, but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, data backup storage systems, and the like.
It should be noted that although several units/modules or sub-units/modules of an electronic device are mentioned in the above detailed description, such a division is merely exemplary and not mandatory. Indeed, the features and functionality of two or more units/modules described above may be embodied in one unit/module in accordance with embodiments of the present disclosure. Conversely, the features and functions of one unit/module described above may be further divided into ones that are embodied by a plurality of units/modules.
Example 5
The present embodiment provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps in the method of testing higher harmonic power as in embodiment 1 above.
More specifically, among others, readable storage media may be employed including, but not limited to: portable disk, hard disk, random access memory, read only memory, erasable programmable read only memory, optical storage device, magnetic storage device, or any suitable combination of the foregoing.
In a possible implementation, the disclosure may also be implemented in the form of a program product comprising program code for causing a terminal device to carry out the steps of the test method for implementing higher harmonic power as in example 1 above, when the program product is executed on the terminal device.
Wherein the program code for carrying out the present disclosure may be written in any combination of one or more programming languages, and the program code may execute entirely on the user device, partly on the user device, as a stand-alone software package, partly on the user device, partly on a remote device or entirely on the remote device.
While specific embodiments of the present disclosure have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and the scope of the disclosure is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the principles and spirit of the disclosure, but such changes and modifications fall within the scope of the disclosure.
Claims (13)
1. A method for testing higher harmonic power, wherein the method is applied to a communication device to be tested, and the method comprises:
receiving a test instruction;
the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency;
transmitting target power corresponding to the fundamental wave frequency based on the test instruction;
acquiring higher harmonic power corresponding to the frequency doubling point based on the target power;
and sending the higher harmonic power outwards to realize the test of the higher harmonic power.
2. The method according to claim 1, wherein the transmitting the target power corresponding to the fundamental wave frequency based on the test instruction includes:
transmitting initial power corresponding to the fundamental wave frequency based on the test instruction;
and amplifying and filtering the initial power to obtain the target power.
3. The method of claim 1, wherein the step of transmitting the harmonic power to the outside to perform the test of the harmonic power comprises:
obtaining an actual insertion loss value corresponding to the higher harmonic power based on a preset mapping relation;
calibrating the higher harmonic power based on the actual insertion loss value to obtain updated higher harmonic power;
the updated higher harmonic power is sent outwards, so that the higher harmonic power is tested;
the preset mapping relation is used for representing test insertion loss values corresponding to the communication device to be tested under different preset frequencies.
4. The method of claim 1, wherein the step of receiving test instructions comprises:
receiving the test instruction in response to the communication device to be tested being in an engineering mode;
and/or, the target power is the maximum power corresponding to the fundamental wave frequency;
and/or the communication device to be tested is a communication device with failed network access test.
5. A test system for higher harmonic power, the test system being applied to a communication device under test, the test system comprising:
the radio frequency front end module is used for receiving the test instruction;
the test instruction comprises fundamental wave frequency to be tested and a plurality of frequency multiplication points of higher harmonic frequency corresponding to the fundamental wave frequency;
the power transmitting module is used for transmitting target power corresponding to the fundamental wave frequency based on the test instruction;
the power detection circuit is used for acquiring higher harmonic power corresponding to the frequency doubling point based on the target power;
the radio frequency front-end module is also used for sending the higher harmonic power outwards so as to realize the test of the higher harmonic power.
6. The system for testing higher harmonic power according to claim 5, wherein the power transmitting module comprises:
the power transmitting unit is used for transmitting initial power corresponding to the fundamental wave frequency based on the test instruction;
and the power processing unit is used for amplifying and filtering the initial power to obtain the target power.
7. The system for testing higher harmonic power according to claim 5, wherein the radio frequency front end module comprises:
the insertion loss acquisition unit is used for obtaining an actual insertion loss value corresponding to the higher harmonic power based on a preset mapping relation in a matching mode;
the power updating unit is used for calibrating the higher harmonic power based on the actual insertion loss value so as to obtain updated higher harmonic power;
the power transmitting unit is used for transmitting the updated higher harmonic power outwards so as to realize the test of the higher harmonic power;
the preset mapping relation is used for representing test insertion loss values corresponding to the communication device to be tested under different preset frequencies.
8. The system of claim 5, wherein the radio frequency front end module is specifically configured to receive the test instruction in response to the communication device under test being in an engineering mode;
and/or, the target power is the maximum power corresponding to the fundamental wave frequency;
and/or the communication device to be tested is a communication device with failed network access test.
9. A communication device comprising a test system of higher harmonic power according to any of claims 5-8.
10. The communication device according to claim 9, wherein the communication device is a chip module or a wireless communication terminal.
11. A chip module for use in an electronic device, the chip module comprising a transceiver component and a chip for performing the method of testing the higher harmonic power of any of claims 1-4.
12. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of testing higher harmonic power as claimed in any one of claims 1-4 when the computer program is executed.
13. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the method of testing the higher harmonic power according to any of claims 1-4.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117833953A (en) * | 2024-03-06 | 2024-04-05 | 上海安其威微电子科技有限公司 | Radio frequency circuit capable of detecting second harmonic, proportion acquisition method and detection method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117833953A (en) * | 2024-03-06 | 2024-04-05 | 上海安其威微电子科技有限公司 | Radio frequency circuit capable of detecting second harmonic, proportion acquisition method and detection method |
| CN117833953B (en) * | 2024-03-06 | 2024-05-28 | 上海安其威微电子科技有限公司 | Radio frequency circuit capable of detecting second harmonic, proportion acquisition method and detection method |
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