CN116504853A - Low-capacitance and low-noise pixel array detector and preparation method thereof - Google Patents

Low-capacitance and low-noise pixel array detector and preparation method thereof Download PDF

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CN116504853A
CN116504853A CN202310382287.8A CN202310382287A CN116504853A CN 116504853 A CN116504853 A CN 116504853A CN 202310382287 A CN202310382287 A CN 202310382287A CN 116504853 A CN116504853 A CN 116504853A
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electrode
doped region
insulating layer
substrate
annular
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李志华
刘曼文
成文政
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Institute of Microelectronics of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1443Devices controlled by radiation with at least one potential jump or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1446Devices controlled by radiation in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/115Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

The application belongs to the technical field of radiation detection, and particularly relates to a low-capacitance and low-noise pixel array detector and a preparation method thereof. The pixel array detector comprises a pixel unit, wherein the pixel unit comprises a substrate, the substrate is provided with a reading surface and a receiving surface, and the reading surface and the receiving surface are arranged at two ends of the substrate in the thickness direction; a cathode electrode is arranged on the reading surface, an anode electrode is arranged on the receiving surface, and at least one of the anode electrode and the cathode electrode comprises a center electrode, an annular electrode and a connecting electrode, wherein the annular electrode is circumferentially arranged around the center electrode, and the connecting electrode is used for connecting the center electrode and the annular electrode; an insulating layer is formed on the reading face and/or the receiving face in a region where the electrode is not arranged. The electrode area of the pixel array detector designed by the application is effectively reduced, and the capacitance of the pixel array detector is reduced on the premise of not affecting the uniformity of electric field distribution, and the sensitivity of the detector is improved.

Description

Low-capacitance and low-noise pixel array detector and preparation method thereof
Technical Field
The application belongs to the technical field of radiation detection, and particularly relates to a low-capacitance and low-noise pixel array detector and a preparation method thereof.
Background
Hybrid Pixel Array Detectors (HPAD) have a significant impact on scientific research conducted on X-ray synchrotron radiation light sources. In a broad sense, HPAD is typically of the photon counting or integrating type. They are called "hybrids" because their two components, the semiconductor detector and the Application Specific Integrated Circuit (ASIC) readout chip, are fabricated separately, and the detector pixels are electrically connected to the pixels of the readout ASIC by bump bonding. A schematic diagram of a Hybrid Photon Counting (HPC) pixel detector is shown in fig. 1, measuring X-ray intensity by individually counting photons of light in electromagnetic radiation. The top sensor element is typically made of doped silicon or cadmium telluride. It absorbs X-ray photons and converts them directly into electron-hole pairs. The bottom readout ASIC is segmented into pixels of the same size as the detector. Each pixel contains electronic circuitry for amplifying and counting the electrical signals induced by the X-ray photons in the sensor layer. Parameters such as capacitance of the detector pixels, electronic noise of the pre-amplifier, the beam shaper and the comparator, and leakage current of the detector affect the detection result. For conventional pixel detectors, the collection electrode is typically a complete rectangular or square structure, as shown in FIG. 2, which covers nearly the entire surface. The large electrode area results in high capacitance, which is a major factor affecting the noise of the detector, and larger noise signals can reduce the detection performance of the detector and the signal-to-noise ratio of the system.
Disclosure of Invention
The technical purpose of the application is to at least solve the technical problems that the existing collecting electrode has high capacitance due to large area, and then the detection performance of the detector and the signal to noise ratio of the system are reduced.
The aim is achieved by the following technical scheme:
in a first aspect, the present application provides a low capacitance, low noise pixel array detector comprising a pixel cell comprising:
the substrate is provided with a reading surface and a receiving surface, the reading surface and the receiving surface are arranged at two ends of the substrate in the thickness direction, the reading surface is provided with a cathode electrode, the receiving surface is provided with an anode electrode, at least one of the anode electrode and the cathode electrode comprises a center electrode, an annular electrode and a connecting electrode, the annular electrode is circumferentially arranged around the center electrode, and the connecting electrode is positioned between the center electrode and the annular electrode and is used for connecting the center electrode and the annular electrode;
an insulating layer is formed on the reading face and/or the receiving face in a region where the electrode is not arranged.
Compared with the existing rectangular or square electrode, the pixel array detector designed by the application has the advantages that the electrode area is effectively reduced, and the capacitance of the detector array is reduced on the premise that the electric field distribution uniformity is not affected.
In some embodiments of the present application, the center electrode is any one of a circular electrode, an elliptical electrode, and a polygonal electrode.
In some embodiments of the present application, the ring electrode is any one of a circular ring electrode, an elliptical ring electrode, and a polygonal ring electrode.
In some embodiments of the present application, the number of sides of the polygon is three or more.
In some embodiments of the present application, the polygon is a positive polygon.
In some embodiments of the present application, the center electrode is equal in thickness to the ring electrode.
In some embodiments of the present application, the cathode electrode includes a first doped region and a first conductive metal layer, the first doped region is embedded in the reading surface, and the first conductive metal layer is disposed on a surface of the first doped region;
the anode electrode comprises a second doped region and a second conductive metal layer, the second doped region is embedded into the receiving surface, and the second conductive metal layer is arranged on the surface of the second doped region.
In some embodiments of the present application, the substrate is an n-type substrate, the first doped region is a p-type doped region, and the second doped region is an n-type doped region;
or alternatively, the first and second heat exchangers may be,
the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region.
In some embodiments of the present application, the substrate has a thickness of 100 μm to 900 μm;
the thickness of the first doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ~1×10 20 /cm 2
The thickness of the second doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ~1×10 20 /cm 2
In some embodiments of the present application, the first conductive metal layer or the second conductive metal layer is made of Al or Cu or an al—cu alloy.
In some embodiments of the present application, the substrate is made of a semiconductor material, and the semiconductor material is Si, ge, gaN, siC, hgI 2 、GaAs、TiBr、CdTe、CdZnTe、CdSe、GaP、HgS、PbI 2 Or one or two or more of AlSb.
In some embodiments of the present application, the Si is any one of ultra-pure high-resistance silicon, epitaxial silicon, or SOI.
In some embodiments of the present application, the material of the insulating layer is silicon dioxide, and may be other insulating materials.
In some embodiments of the present application, the matrix is a cylinder or a polygonal cylinder, and the polygonal cylinder is any one of a triangular prism, a square or a hexagonal prism.
In some embodiments of the present application, the pixel elements make up an mxn detector array, and M, N are positive integers.
In a second aspect, the present application provides a method for manufacturing a low capacitance, low noise pixel detector array, the method comprising:
providing a substrate, thinning and polishing the substrate;
growing an insulating layer at the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, and forming a cathode electrode and/or an anode electrode in the groove, wherein at least one of the anode electrode and the cathode electrode comprises a central electrode, an annular electrode and a connecting electrode, the annular electrode is circumferentially arranged around the central electrode, and the connecting electrode is positioned between the central electrode and the annular electrode and is used for connecting the central electrode and the annular electrode.
In some embodiments of the present application, the cathode electrode and/or anode electrode is formed as follows:
etching the insulating layer to form a groove, and reserving the insulating layer with partial thickness at the bottom of the groove;
ion implantation is carried out on the groove to form a first doped region in an embedded mode on the end surface of the reading surface and/or a second doped region in an embedded mode on the end surface of the receiving surface;
etching the reserved insulating layer with partial thickness at the bottom of the groove, and growing a new insulating layer, wherein the thickness of the new insulating layer is larger than that of the reserved insulating layer with partial thickness;
photoetching, developing and etching the new insulating layer to form a central through hole penetrating through the insulating layer, forming an annular hole at the periphery of the central through hole, and forming a residual part of the new insulating layer between the central through hole and the annular hole;
growing conductive metal on the surfaces of the central through hole, the annular hole and the rest part of the new insulating layer to form a first conductive metal layer and/or a second conductive metal layer;
the first conductive metal layer is matched with the first doped region to form a cathode electrode;
the second conductive metal layer and the second doped region cooperate to form an anode electrode.
In some embodiments of the present application, the method further comprises etching the remaining portion of the newly insulating layer surface grown conductive metal layer to form a gap between the annular electrode of the cathode electrode and/or anode electrode and the wall of the trench.
The beneficial effects of the technical scheme disclosed by the application are mainly shown as follows:
in the detector designed by the application, compared with the electrode with the rectangular or square structure in the prior art, the electrode area is effectively reduced, the capacitance of the pixel array detector is reduced on the premise that the electric field uniform distribution is not affected, and the sensitivity of the detector is improved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 schematically illustrates a schematic diagram of the main components of a pixel array detector in the background art;
FIG. 2 schematically illustrates a schematic structure of a pixel array detector in the background art;
FIG. 3 schematically illustrates a simplified schematic of a sensor element with a charge-sensitive amplifier;
FIG. 4 schematically illustrates a top view of the pixel array detector of FIG. 2;
fig. 5 schematically shows a schematic structural diagram of a pixel array detector according to an embodiment of the present application;
FIG. 6 schematically illustrates a top view of the pixel array detector of FIG. 5;
FIG. 7 schematically illustrates a top view of the pixel array detector of FIG. 5;
fig. 8 schematically shows a schematic structural view of a pixel array detector according to an embodiment of the present application;
fig. 9 schematically shows a schematic structural view of a pixel array detector according to an embodiment of the present application;
fig. 10 schematically shows a schematic structural view of a pixel array detector according to an embodiment of the present application;
FIG. 11 schematically illustrates a top view of the pixel array detector of FIG. 10;
fig. 12 schematically illustrates a schematic structure of the pixel unit of fig. 5;
fig. 13 schematically shows a cross-sectional view of the pixel cell of fig. 12 along the thickness direction of the substrate;
FIG. 14 schematically illustrates a process flow diagram of the pixel cell of FIG. 12;
FIG. 15 schematically illustrates a physical photograph of a pixel array detector according to an embodiment of the present application;
FIG. 16 schematically illustrates a C-V test curve for a pixel array detector according to an embodiment of the present application;
FIG. 17 schematically illustrates a C-V test curve for a pixel array detector according to the background of the present application;
the reference numerals in the drawings are as follows:
100. a pixel unit;
200. a base; 210. a reading surface; 220. a receiving surface; 230. an insulating layer; 240. a groove;
300. a cathode electrode; 310. a center electrode; 320. a ring electrode; 330. connecting the electrodes; 340. a first doped region; 350. a first conductive metal layer;
400. an anode electrode; 410. a center electrode; 420. a ring electrode; 430. connecting the electrodes; 440. a second doped region; 450. a second conductive metal layer;
coordinate axis x direction: the width or length direction of the pixel unit;
coordinate axis y direction: the length or width direction of the pixel unit;
coordinate axis z direction: the height or thickness direction of the pixel unit.
Detailed Description
The pixel detector in the prior art is formed by an ordered array of pixel units, and the basic principle is a PN junction or a PIN junction as in many other types of detector. Each pixel detector unit is composed of a sensitive area with a sensing function and an outer end electron reading part, when charged particles enter the sensitive area, electron-hole pairs are generated, drift motion is carried out to positive and negative poles under the action of an external electric field, and after the drift motion is collected by the positive and negative poles, information about energy, position, motion track and the like of the incident particles can be obtained after feedback current signals are processed through an outer end integrated circuit.
In the conventional pixel detector, the collecting electrode is usually in a complete rectangular or square structure, and the rectangular or square structure electrode covers almost the whole surface as shown in fig. 2. The large electrode area results in high capacitance, which is a major factor affecting the noise of the detector, and larger noise signals can reduce the detection performance of the detector and the signal-to-noise ratio of the system.
To further illustrate the need to reduce capacitance, the present application is described in connection with a sensor element with a charge-sensitive amplifier as shown in fig. 3. The analog part of the pixel unit consists of a charge sensitive amplifier and a comparator, and as can be seen in conjunction with fig. 3, each photon generates a small amount of charge Qs. The amplifier has a voltage gain A= -Vout/Vin, the output is Vout, and the input voltage is Vin. For a much greater than 1, vf=vin-vout≡a·vin, the charge stored on the feedback capacitor Cf is thus equal to qf=cf·vf≡cf·a·vin. Since no current flows into the amplifier we have qf=qin and get the effective input capacitance cin=qin/vin≡cf·a, the charge Qs being split between the detector and the amplifier. Effective input capacitance cin=qin/Vin, if Cdet is smaller than input capacitance Cin, charge is mostly collected in the amplifier, i.e., qin≡qs. Vout= -a·qs/cin=qs/Cf is obtained. If transient behavior of the amplifier is considered, the charge pulse Qs at the input of the amplifier is integrated and a step function of the voltage step Qs/Cf is generated at the output, where Cdet can be expressed as junction capacitance. Therefore, reducing the capacitance of the detector is particularly necessary to reduce noise charge and to increase sensitivity. Further, the capacitance of the dynamic P-N junction detector is inferred as follows:
the dynamic P-N junction capacitance is defined as: c=dq/dV, where C is the junction capacitance and dQ is the increment of the space charge per increase in the reverse bias voltage dV. Space charge q=q 0 N eff AW, wherein A is the area of the photodetector, and can also be the same as the electrode area S as follows; differential dQ gives dq=q 0 N eff AdW, and therefore:
in the above formula, W is the depth or thickness of the depletion layer, N eff Is an effective doping concentration.
Depending on the semiconductor physics, and the continuity of the electric field and potential distribution, the depletion layer depth W versus bias voltage V can be expressed as:
wherein, the liquid crystal display device comprises a liquid crystal display device,
at a bias voltage V greater than or equal to the full depletion voltage V fd In the case of W (V) fd ) =d and:
d is the thickness of the active area of the detector, the following mathematical relationship can be obtained:
for large reverse bias voltages (V>>V bi ) The relationship between capacitance and voltage can be expressed as C.alpha.1/V 1/2 . Finally, when the voltage reaches the full depletion voltage V fd (w=d), the capacitance can be expressed as:
in the mathematical relationship, epsilon is silicon dielectric constant and epsilon 0 The dielectric constant of vacuum, A is the area of electrode, d is the thickness of the effective area of the detector, and under a certain condition, the depth or thickness of depletion layer, C GC Referred to as geometric capacitance.
It follows that the capacitance is related to the geometry of the detector.
The above relation is further modified and the study is continued:
wherein S is the collecting electrode area, D is the depletion layer thickness, ε is the product of the vacuum dielectric constant and the silicon dielectric constant, the depletion layer thickness D affects the junction capacitance, and the larger the depletion layer thickness is, the smaller the junction capacitance is. The smaller the electrode area S, the smaller the junction capacitance.
The relationship between bias voltage and depletion layer thickness is as follows:
where ε is the product of the vacuum permittivity and the silicon permittivity, ρ is the resistivity, and μ is the majority carrier mobility. The depletion layer thickness D of the Si-PIN detector can follow the bias voltage V bias Becomes thicker until the detector is fully depleted D no longer follows the bias voltage V bias But vary.
Bias voltage V at full detector depletion bias The increase does not increase the depletion layer thickness D any more, so the detector junction capacitance C after complete depletion d The size of (2) is related to the electrode area.
Detector junction capacitance C d Proportional to the electrode area;
effective parallel noise ENC par Can be expressed as:
wherein I is leak T is the leakage current of the detector peak The peak response time of the output signal is the peak response time of the output signal, and the effective parallel noise and the leakage current are in a direct proportion relation, so that the detector has better performance due to the small leakage current.
Effective series noise ENC series Can be expressed as:
wherein C is t T is the total input capacitance of the detector peak Is the peak response time of the output signal. The relation between the capacitance and the noise can be seen, and when the capacitance of the detector is small, the noise is smaller, and the sensitivity of the detector is higher.
Therefore, by reducing the electrode area S, the capacitance of the detector can be reduced.
As can be seen from fig. 2, 4, 5 and 6, the electrode area of the pixel unit in the designed detector is calculated and compared with the electrode area of the pixel unit in the background art.
As can be seen in FIG. 6, S 2 =L×W-(W-2j-k)×(L-2j-k)+(W-L+m-k)×(L-W+n-k);
As can be seen in FIG. 4, S 1 =L×W;
Therefore, compared with the rectangular collecting electrodes shown in fig. 2 and 4, the detector designed by the application can effectively reduce the electrode area, thereby reducing the capacitance of the detector and improving the sensitivity of the detector.
The pixel array detector with the gate structure electrode designed in the present application will be described in detail below, and the pixel array detector includes a pixel unit, as shown in fig. 5, 6, 7, 8, 9, 10, and 11, where the pixel unit 100 includes a substrate 200, and the substrate 200 has a certain thickness, and is preferably 100 μm to 900 μm in the present application. The pixel unit 100 formed by the substrate 200 may be a cylinder or a polygonal cylinder, wherein the polygonal cylinder is any one of a triangular prism, a square or a hexagonal prism, and the pixel unit forms an m×n detector array, and M, N is a positive integer. The present application preferably designs electrodes with low capacitance, low noise performance in a square body. Wherein the substrate 200 is made of a semiconductor material, which may be Si, ge, gaN, siC, hgI 2 、GaAs、TiBr、CdTe、CdZnTe、CdSe、GaP、HgS、PbI 2 Or one or two or more of AlSb, wherein when the semiconductor material is silicon, the semiconductor material can be any one of ultrapure high-resistance silicon, epitaxial silicon or SOI, and the ultrapure high-resistance silicon, epitaxial silicon or SOI is any type of material conventional in the art, and the surface of the semiconductor material is conveniently etched.
Referring to fig. 5 to 11, the pixel unit 100 is discussed in a 2×2 array, the substrate 200 of the pixel unit 100 has a reading surface 210 and a receiving surface 220, and the reading surface 210 and the receiving surface 220 are disposed at two ends of the substrate 200 in the thickness direction, as shown in fig. 5, and the coordinate axis z is the height or thickness direction of the pixel unit, and the reading surface 210 and the receiving surface 220 are disposed along the coordinate axis z. Wherein the read face 210 is for arranging an external electronic read-out circuit and the receiving face 220 is for receiving charged particles, such as X-rays or other charged particles.
At the end of the reading surface 210, a cathode electrode 300 is arranged, at the end of the receiving surface 220, an anode electrode 400 is arranged, and at least one of the anode electrode 400, the cathode electrode 300 comprises a center electrode 310 or 410, a ring electrode 320 or 420, and a connection electrode 330 or 430, and the ring electrode 320 or 420 is circumferentially arranged around the center electrode 310 or 410, the connection electrode 330 or 430 being used for connecting the center electrode 310 or 410 with the ring electrode 320 or 420.
The meaning of "at least one" herein includes that only the cathode electrode 300 includes the center electrode 310, the ring electrode 320, and the connection electrode 330;
also, only the anode electrode 400 includes a center electrode 410, a ring electrode 420, and a connection electrode 430;
alternatively, the cathode electrode 300 includes a center electrode 310, a ring electrode 320, and a connection electrode 330, and the anode electrode 400 includes a center electrode 410, a ring electrode 420, and a connection electrode 430. Wherein, the cathode electrode 300 and the anode electrode 400 are simultaneously processed to reduce the electrode area on the premise of the preparation process, which is relatively most effective for improving the sensitivity of the detection device.
Meanwhile, an insulating layer 230 is formed on the reading surface 210 and/or the receiving surface 220 in a region where no electrode is arranged, and the insulating layer 230 may be made of silicon dioxide, or any other insulating material conventional in the art.
Further, the center electrode 310 or 410 may be any one of a circular electrode, an elliptical electrode, and a polygonal electrode, and the ring electrode 320 or 420 may be any one of a circular ring electrode, an elliptical ring electrode, and a polygonal ring electrode; the number of sides of the polygon may be three or more, preferably four, six, etc., and further, the polygon may be a regular polygon, and the present application is preferably a regular triangle, a regular quadrangle, a regular hexagon, etc.
As can be seen from fig. 5, the center electrode 310 or 410 is square, the ring electrode 320 or 420 is square ring, the connection electrode 330 or 430 is disposed between the center electrode 310 or 410 and the ring electrode 320 or 420, and the number of the connection electrodes 330 or 430 is 4, which are disposed on two opposite sides.
As can be seen from fig. 8, the center electrode 310 or 410 is square, the ring electrode 320 or 420 is square ring, the connection electrode 330 or 430 is disposed between the center electrode 310 or 410 and the ring electrode 320 or 420, and the number of the connection electrodes 330 or 430 is 2, which are disposed on only opposite sides.
As can be seen from fig. 9, the center electrode 310 or 410 is circular, the ring electrode 320 or 420 is circular, the connection electrode 330 or 430 is disposed between the center electrode 310 or 410 and the ring electrode 320 or 420, and the number of the connection electrodes 330 or 430 is 2, which are disposed on only opposite sides.
As can be seen from fig. 10, the center electrode 310 or 410 is circular, the ring electrode 320 or 420 is circular, the connection electrode 330 or 430 is disposed between the center electrode 310 or 410 and the ring electrode 320 or 420, and the number of the connection electrodes 330 or 430 is 4, which are disposed on opposite sides.
The number of the connection electrodes 330 or 430 may be other plural, such as six, and the number of the connection electrodes is not limited in the present application, and any shape of the connection electrodes 330 or 430 is also within the scope of the present application.
The drawings only show the schematic structural diagram of a part of the detector, and the detector can also be electrodes with other shapes and structures or combinations, such as a circular ring electrode arranged outside a center electrode with a square structure or the like, and the specific arrangement mode needs to combine the preparation process and the final device performance.
The cathode electrode 300 is connected to the external electronic readout circuit and cooperates with the subsequent amplifying circuit, and the connection may be by bonding-bonding technology, or other technologies, and the anode electrode 400 is used as an incident surface of the charged particles for receiving the charged particles.
The pixel unit 100 is prepared by the following steps: firstly, providing a matrix, thinning and polishing the matrix; and then growing an insulating layer on the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, forming a cathode electrode and/or an anode electrode in the groove, wherein at least one of the anode electrode and the cathode electrode comprises the central electrode, the annular electrode and the connecting electrode with the structures or the arrangement modes.
The working principle of the pixel unit 100 includes: the charged particles are incident along the receiving surface 220, creating electron-hole pairs, and the carriers move within the depleted silicon body to form an electrical signal that is read out by the electrodes of the reading surface 210 and subsequent amplification circuitry.
The pixel array detector designed by the application can effectively reduce the electrode area, the design mode is favorable for reducing the capacitance of the detector array, the uniformity of electric field distribution is not influenced, and the sensitivity of the detector is finally improved. The pixel array detector has good application prospect in the field of X-ray image detectors.
In some embodiments, a gap is left between the annular electrode of the cathode electrode and/or the anode electrode and the wall of the groove, the arrangement mode is equivalent to further reduction of the area of the counter electrode, and the arrangement mode is effective for improving the capacitance of the array detector, and can be particularly shown in fig. 6 and 7, wherein the electrode shown in fig. 7 realizes further reduction of the area of the counter electrode by reducing the area of the annular electrode on the basis of the design of fig. 6 without changing the sizes of the central electrode and the connecting electrode.
In some embodiments, the center electrode and the ring electrode are equal in thickness, and reference may be made to fig. 12 and 13, which are based on a manufacturing process.
In some embodiments, the connection electrode is protruding from the surface of the center electrode or the ring electrode, which is also based on the manufacturing process.
In some embodiments, the body is an n-type body, the first doped region is a p-type doped region, and the second doped region is an n-type doped region; alternatively, the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region. And each doped region is a heavily doped region, and the doped element contains boron or phosphorus and the like.
In some embodiments, the substrate thickness is 100 μm to 900 μm. The substrate thickness may be any one of 100 μm, 200 μm, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm or any one of thicknesses satisfying the range.
In some embodiments, the first doped region has a thickness of 0.1 μm to 5.0 μm and a doping concentration of 1×10 18 /cm 2 ~1×10 20 /cm 2 . Wherein the first doped region thickness may be any one of 0.1 μm, 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm or any one of thicknesses satisfying the range of values. In addition, the doping concentration may be 1×10 18 /cm 2 、1×10 19 /cm 2 Or 1X 10 20 /cm 2 Any one of the above or any one of the concentrations satisfying the range of values.
In some embodiments, the second doped region has a thickness of 0.1 μm to 5.0 μm and a doping concentration of 1×10 18 /cm 2 ~1×10 20 /cm 2 . Wherein the second doped region thickness may be any one of 0.1 μm, 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm or any one thickness satisfying the range value. In addition, the doping concentration may be 1×10 18 /cm 2 、1×10 19 /cm 2 Or 1X 10 20 /cm 2 Any one of the above or any one of the concentrations satisfying the range of values.
In some embodiments, the first conductive metal layer or the second conductive metal layer is made of Al or Cu or Al-Cu alloy, and may be any other conductive material conventional in the art.
Exemplary embodiments of the present disclosure will be described in more detail below with further reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Example 1
As shown in fig. 12 and 13, an insulating layer 230 is first disposed at the reading surface 210 end and the receiving surface 220 end of the substrate 200, the insulating layer 230 has a certain thickness, the specific thickness of which needs to be combined with the size of the detection device, which is not described in detail in this embodiment, the insulating layer 230 completely covers the top surface of the substrate 200, the material of the insulating layer 230 may be silicon dioxide, wherein the silicon dioxide is convenient to be etched, a trench 240 is formed on the insulating layer 230, a cathode electrode 300 and an anode electrode 400 are disposed in the trench 240, the cathode electrode 300 includes a first doped region 340 and a first conductive metal layer 350, wherein the first doped region 340 is embedded in the reading surface 210, and the first conductive metal layer 350 is disposed on the surface of the first doped region 340.
The anode electrode 400 includes a second doped region 440 and a second conductive metal layer 450, wherein the second doped region 440 is embedded in the receiving surface 220, and the second conductive metal layer 450 is disposed on the surface of the second doped region 440; meanwhile, if described in terms of material, the center electrode 310 or 410, the ring electrode 320 or 420, and the connection electrode 330 or 430 are all conductive metal electrodes. The specific first conductive metal layer 350 includes a central electrode 310, a ring electrode 320, and four connection electrodes 330, where the central electrode 310 is a square electrode, the ring electrode 320 is a square ring electrode, and the four connection electrodes 330 are respectively located at two opposite sides of the central electrode 310 and are used for connecting the central electrode 310 and the ring electrode 320. The second conductive metal layer 450 includes a central electrode 410, a ring electrode 420 and four connection electrodes 430, wherein the central electrode 410 is a square electrode, the ring electrode 420 is a square ring electrode, and the four connection electrodes 430 are respectively located at two opposite sides of the central electrode 410 and are used for connecting the central electrode 410 and the ring electrode 420.
In this embodiment, the heights of the center electrode 310 or 410 and the ring electrode 320 or 420 are preferably equal, and the design method is based on the preparation method of the detector, and when a detector meeting the above structural and performance requirements is to be researched, the heights of the center electrode and the ring electrode are set to be consistent, so that the preparation method is relatively convenient.
The present embodiment may alternatively leave a gap between the annular electrode of the cathode electrode and/or anode electrode and the walls of the trench, although not actually shown in fig. 13, which is actually present.
The electrode area of the pixel cell of the design of fig. 12 is smaller than that of the pixel cell of fig. 2, in comparison, on the premise that other factors, conditions, etc. remain the same.
Therefore, the detector designed by the embodiment can realize the technical purpose of effectively reducing the electrode area.
Example 2
The preparation method of the pixel unit shown in the embodiment 1 is provided, and the specific preparation process may be the step shown in fig. 14 or other steps.
As can be seen from fig. 14, the process steps are as follows:
(a) Providing a silicon wafer, thinning and polishing the silicon wafer; wherein, the thinning and polishing treatment is any type of process conventional in the art, and the description is omitted herein. Obtaining a silicon wafer with the thickness of 500 mu m;
(b) Simultaneously growing a silicon dioxide film layer on the reading surface end and the receiving surface end of the silicon wafer, wherein the thickness of the silicon dioxide film layer is not particularly limited in the embodiment;
(c) Etching the silicon dioxide film layer to form a groove, and reserving a silicon dioxide film layer with the thickness of 20nm at the bottom of the groove;
(d) Ion implantation is carried out on the groove to embed and form a first doped region on the surface of the reading surface; concentration of dopingDegree of 1×10 19 /cm 2 The doping thickness is 1 μm; meanwhile, ion implantation is carried out on the groove to embed and form a second doped region on the surface of the receiving surface; the doping concentration is 1 multiplied by 10 19 /cm 2 The doping thickness is 1 μm;
(e) Etching a silicon dioxide film layer with the thickness of 20nm reserved at the bottom of the groove;
(f) Growing a new silicon dioxide film layer in the groove, wherein the thickness of the new silicon dioxide film layer is 1 mu m;
(g) Photoetching, developing and further etching the new silicon dioxide film layer to form a through hole penetrating the new silicon dioxide film layer, wherein photoetching, developing and further etching can be continued on the periphery of the central through hole to form an annular hole, and a new insulating layer is arranged between the central through hole and the annular hole;
(h) Growing conductive metal on the surfaces of the through holes, the central through holes and the rest part of the new insulating layer to form a first conductive metal layer and a second conductive metal layer;
wherein, the first conductive metal layer cooperates with the first doped region to form a cathode electrode;
and the second conductive metal layer and the second doped region cooperate to form an anode electrode.
The above examples disclose only one preparation method, and other preparation methods are also within the scope of the present application.
The preparation method disclosed in the application can further comprise annealing treatment after doping.
In addition, the etching, photolithography, developing, ion implantation, growth and other processes are all conventional processes in the art, and the present application is not limited in particular.
Example 3
A pixel cell is provided that differs from the pixel cell of embodiment 1 in that the anode electrode is a second doped region and a second conductive metal layer that completely covers the receiving face end.
The picture of the detector formed by arranging the pixel units in the array prepared in this embodiment is shown in fig. 15, and it can be seen from fig. 15 that the anode electrode is composed of a central electrode, a ring electrode and a connection electrode.
The application also explores the capacitive performance of a detector comprising the pixel cell of example 3 and compares it with a rectangular structure pixel cell of the prior art:
in connection with the structure shown in fig. 6, the size of the pixel cell satisfies: l=60 μm, w=60 μm, n=30 μm, m=30 μm, j=5 μm, k=5 μm;
in connection with the structure shown in fig. 4, the size of the pixel cell satisfies: l=60 μm, w=60 μm.
Under the premise of other sizes, the same MxN array is manufactured, and capacitance test is carried out under the same condition, and the test results are shown in fig. 16 and 17.
As can be seen from fig. 16 and 17, the capacitance of the detector protected by the present application decreases.
Therefore, the structural electrode designed by the embodiment can realize the technical purpose of effectively reducing the electrode area.
It is to be understood that the terminology used herein is for the purpose of describing particular example embodiments only, and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises," "comprising," "includes," "including," and "having" are inclusive and therefore specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order described or illustrated, unless an order of performance is explicitly stated. It should also be appreciated that additional or alternative steps may be used.
The foregoing is merely a preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A low capacitance, low noise pixel array detector, the pixel array detector comprising a pixel cell comprising:
the substrate is provided with a reading surface and a receiving surface, the reading surface and the receiving surface are arranged at two ends of the substrate in the thickness direction, the reading surface is provided with a cathode electrode, the receiving surface is provided with an anode electrode, at least one of the anode electrode and the cathode electrode comprises a center electrode, an annular electrode and a connecting electrode, the annular electrode is circumferentially arranged around the center electrode, and the connecting electrode is positioned between the center electrode and the annular electrode and is used for connecting the center electrode and the annular electrode;
an insulating layer is formed on the reading face and/or the receiving face in a region where the electrode is not arranged.
2. The array detector of claim 1, wherein the center electrode is any one of a circular electrode, an elliptical electrode, and a polygonal electrode;
the annular electrode is any one of a circular annular electrode, an elliptical annular electrode and a polygonal annular electrode;
preferably, the number of the sides of the polygon is more than three;
preferably, the polygon is a positive polygon.
3. The array detector according to any one of claims 1-2, wherein the cathode electrode comprises a first doped region embedded in the read-out face and a first conductive metal layer provided on a surface of the first doped region;
the anode electrode comprises a second doped region and a second conductive metal layer, the second doped region is embedded into the receiving surface, and the second conductive metal layer is arranged on the surface of the second doped region.
4. The array detector of claim 3, wherein the substrate is an n-type substrate, the first doped region is a p-type doped region, and the second doped region is an n-type doped region;
or alternatively, the first and second heat exchangers may be,
the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region.
5. The array probe of claim 3, wherein the substrate has a thickness of 100 μm to 900 μm;
the thickness of the first doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ~1×10 20 /cm 2
The thickness of the second doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ~1×10 20 /cm 2
6. The array detector of claim 3, wherein the first conductive metal layer or the second conductive metal layer is made of Al or Cu or an Al-Cu alloy.
7. The array detector of claim 1 or 2 or 4 or 5 or 6, wherein the substrate is made of a semiconductor material, and the semiconductor material is Si, ge, gaN, siC, hgI 2 、GaAs、TiBr、CdTe、CdZnTe、CdSe、GaP、HgS、PbI 2 Or one or two or more of AlSb.
8. The array detector of claim 1 or 2 or 4 or 5 or 6, wherein the insulating layer is silicon dioxide.
9. The preparation method of the low-capacitance and low-noise pixel array detector is characterized by comprising the following steps of:
providing a substrate, thinning and polishing the substrate;
growing an insulating layer at the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, and forming a cathode electrode and/or an anode electrode in the groove, wherein at least one of the anode electrode and the cathode electrode comprises a central electrode, an annular electrode and a connecting electrode, the annular electrode is circumferentially arranged around the central electrode, and the connecting electrode is positioned between the central electrode and the annular electrode and is used for connecting the central electrode and the annular electrode.
10. The method according to claim 9, wherein the cathode electrode and/or the anode electrode is formed as follows:
etching the insulating layer to form a groove, and reserving the insulating layer with partial thickness at the bottom of the groove;
ion implantation is carried out on the groove to form a first doped region in an embedded mode on the end surface of the reading surface and/or a second doped region in an embedded mode on the end surface of the receiving surface;
etching the reserved insulating layer with partial thickness at the bottom of the groove, and growing a new insulating layer, wherein the thickness of the new insulating layer is larger than that of the reserved insulating layer with partial thickness;
photoetching the new insulating layer to form a central through hole penetrating through the insulating layer, forming an annular hole at the periphery of the central through hole, and forming a residual part of the new insulating layer between the central through hole and the annular hole;
growing conductive metal on the surfaces of the central through hole, the annular hole and the rest part of the new insulating layer to form a first conductive metal layer and/or a second conductive metal layer;
the first conductive metal layer is matched with the first doped region to form a cathode electrode;
the second conductive metal layer and the second doped region cooperate to form an anode electrode.
CN202310382287.8A 2023-04-11 2023-04-11 Low-capacitance and low-noise pixel array detector and preparation method thereof Pending CN116504853A (en)

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