CN116504850A - Pixel array detector with I-shaped structure electrode and preparation method thereof - Google Patents
Pixel array detector with I-shaped structure electrode and preparation method thereof Download PDFInfo
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Abstract
The application belongs to the technical field of radiation detection, and particularly relates to a pixel array detector with an electrode with an I-shaped structure and a preparation method thereof. The pixel array detector comprises a pixel unit, wherein the pixel unit comprises a substrate, the substrate is provided with a reading surface and a receiving surface, and the reading surface and the receiving surface are arranged at two ends of the substrate in the thickness direction; a groove is formed on at least one of the reading surface and the receiving surface, and a cathode electrode and/or an anode electrode are arranged in the groove, wherein the cathode electrode is positioned at the reading surface end, and the anode electrode is positioned at the receiving surface end; the cathode electrode and/or the anode electrode is an I-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part; an insulating layer is formed on the reading face and/or the receiving face in a region where the electrode is not arranged. Compared with the electrode with the rectangular or square structure in the prior art, the electrode with the I-shaped structure has the advantages that the electrode area is effectively reduced, the capacitance of the pixel array detector is reduced, and the sensitivity of the detector is improved.
Description
Technical Field
The application belongs to the technical field of radiation detection, and particularly relates to a pixel array detector with an electrode with an I-shaped structure and a preparation method thereof.
Background
Hybrid Pixel Array Detectors (HPAD) have a significant impact on scientific research conducted on X-ray synchrotron radiation light sources. In a broad sense, HPAD is typically of the photon counting or integrating type. They are called "hybrids" because their two components, the semiconductor detector and the Application Specific Integrated Circuit (ASIC) readout chip, are fabricated separately, and the detector pixels are electrically connected to the pixels of the readout ASIC by bump bonding. A schematic diagram of a Hybrid Photon Counting (HPC) pixel detector is shown in fig. 1, measuring X-ray intensity by individually counting photons of light in electromagnetic radiation. The top sensor element is typically made of doped silicon or cadmium telluride. It absorbs X-ray photons and converts them directly into electron-hole pairs. The bottom readout ASIC is segmented into pixels of the same size as the detector. Each pixel contains electronic circuitry for amplifying and counting the electrical signals induced by the X-ray photons in the sensor layer. Parameters such as capacitance of the detector pixels, electronic noise of the pre-amplifier, the shaper and the comparator, and leakage current of the detector affect the detection result. For conventional pixel detectors, the collection electrode is typically a complete rectangular or square structure, as shown in FIG. 2, which covers nearly the entire surface. The large electrode area results in high capacitance, which is a major factor affecting the noise of the detector, and larger noise signals can reduce the detection performance of the detector and the signal-to-noise ratio of the system.
Disclosure of Invention
The technical purpose of the application is to at least solve the technical problems that the existing collecting electrode has high capacitance due to large area, and then the detection performance of the detector and the signal to noise ratio of the system are reduced.
The aim is achieved by the following technical scheme:
in a first aspect, the present application provides a pixel array detector having an electrode with an i-shaped structure, the pixel array detector comprising a pixel cell comprising:
a base body having a reading surface and a receiving surface, the reading surface and the receiving surface being provided at both ends in a thickness direction of the base body; at least one of the reading surface and the receiving surface is provided with a groove, a cathode electrode and/or an anode electrode are arranged in the groove, the cathode electrode is positioned at the end of the reading surface, and the anode electrode is positioned at the end of the receiving surface;
the cathode electrode and/or the anode electrode is an I-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part;
and the insulating layer is positioned on the reading surface and/or the receiving surface in the area where the electrode is not arranged.
Compared with the existing rectangular or square structural electrode, the electrode area of the H-shaped structural electrode designed by the application is effectively reduced, and the capacitance of the detector array is reduced.
In some embodiments of the present application, the first wing and/or the second wing are/is protruding from the abdominal surface. The arrangement mode is that the electrode with a special structure is manufactured by adopting the following easy-to-operate process from the preparation process, and the electrode not only ensures uniform electric field distribution, but also is beneficial to realizing improvement of the capacitance of the detector array.
In some embodiments of the present application, a gap is left between the first wing portion and/or the second wing portion and a wall of the groove. This arrangement corresponds to a further reduction in the counter electrode area and is effective for improving the capacitance of the detector array.
In some embodiments of the present application, the substrate is an n-type substrate, the first doped region is a p-type doped region, and the second doped region is an n-type doped region;
or alternatively, the first and second heat exchangers may be,
the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region.
In some embodiments of the present application, the substrate has a thickness of 100 μm to 900 μm;
the thickness of the first doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ～1×10 20 /cm 2 ；
The thickness of the second doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ～1×10 20 /cm 2 。
In some embodiments of the present application, the first conductive metal layer or the second conductive metal layer is made of Al or Cu or an al—cu alloy.
In some embodiments of the present application, the substrate is made of any one of ultra-pure high-resistance silicon, epitaxial silicon or SOI.
In some embodiments of the present application, the insulating layer is made of silicon dioxide.
In some embodiments of the present application, the matrix is a cylinder or a polygonal cylinder, and the polygonal cylinder is any one of a triangular prism, a square or a hexagonal prism.
In some embodiments of the present application, the pixel elements make up an mxn detector array, and M, N are positive integers.
In a second aspect, the present application provides a method for preparing a detector array with an electrode having an i-shaped structure, the method comprising:
providing a substrate, thinning and polishing the substrate;
growing an insulating layer on the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, forming a cathode electrode and/or an anode electrode in the groove, wherein the cathode electrode is positioned on the reading surface end, and the anode electrode is positioned on the receiving surface end; the cathode electrode and/or the anode electrode is an I-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part.
In some embodiments of the present application, the cathode electrode or anode electrode is formed as follows:
etching the insulating layer to form a groove, and reserving the insulating layer with partial thickness at the bottom of the groove;
ion implantation is carried out on the groove to embed and form a doped region on the surface of the reading surface or the surface of the receiving surface;
etching the reserved insulating layer with partial thickness at the bottom of the groove, and growing a new insulating layer, wherein the thickness of the new insulating layer is larger than that of the reserved insulating layer with partial thickness;
photoetching the new insulating layer to form a through hole penetrating through the insulating layer, and leaving a part of the new insulating layer around the through hole;
growing conductive metal on the surfaces of the through holes and the rest part of the new insulating layer to form a conductive metal layer;
wherein, the doped region at the reading surface end is matched with the conductive metal layer to form a cathode electrode; the doped region at the receiving surface end is matched with the conductive metal layer to form an anode electrode.
In some embodiments of the present application, the method further comprises photolithography of the remaining portion of the newly insulating layer surface grown conductive metal layer for forming a gap between the first wing and/or the second wing and the wall of the trench.
The beneficial effects of the technical scheme disclosed by the application are mainly shown as follows:
compared with the electrode with the rectangular or square structure in the prior art, the electrode with the I-shaped structure has the advantages that the electrode area is effectively reduced, the capacitance of the pixel array detector is reduced on the premise that the electric field distribution uniformity is guaranteed, and the sensitivity of the detector is improved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 schematically illustrates a schematic diagram of the main components of a pixel array detector in the background art;
FIG. 2 schematically illustrates a schematic structure of a pixel array detector in the background art;
FIG. 3 schematically illustrates a simplified schematic of a sensor element with a charge-sensitive amplifier;
FIG. 4 schematically illustrates a top view of the pixel array detector of FIG. 2;
fig. 5 schematically shows a schematic structural diagram of a pixel array detector according to an embodiment of the present application;
FIG. 6 schematically illustrates a top view of the pixel array detector of FIG. 5;
fig. 7 schematically illustrates a schematic structure of the pixel unit of fig. 5;
fig. 8 schematically shows a cross-sectional view of the pixel cell of fig. 7 along the thickness direction of the substrate;
fig. 9 schematically shows a cross-sectional view of the pixel cell of fig. 7 along the thickness direction of the substrate;
fig. 10 schematically shows a cross-sectional view of the pixel cell of fig. 7 along the thickness direction of the substrate;
FIG. 11 schematically illustrates a process flow diagram of the pixel cell of FIG. 7;
FIG. 12 schematically illustrates a physical photograph of a pixel array detector according to an embodiment of the present application;
FIG. 13 schematically illustrates a C-V test curve for a pixel array detector according to an embodiment of the present application;
FIG. 14 schematically illustrates a C-V test curve for a pixel array detector according to the background of the present application;
the reference numerals in the drawings are as follows:
100. a pixel unit;
200. a base; 210. a reading surface; 220. a receiving surface; 230. an insulating layer; 240. a groove;
300. a cathode electrode; 310. a first doped region; 320. a first conductive metal layer; 321. a first wing; 322. a second wing; 323. an abdomen; 324. a gap;
400. an anode electrode; 410. a second doped region; 420. a second conductive metal layer;
coordinate axis x direction: the width or length direction of the pixel unit;
coordinate axis y direction: the length or width direction of the pixel unit;
coordinate axis z direction: the height or thickness direction of the pixel unit.
Detailed Description
The pixel detector in the prior art is formed by an ordered array of pixel units, and the basic principle is a PN junction or a PIN junction as in many other types of detector. Each pixel detector unit is composed of a sensitive area with a sensing function and an outer end electron reading part, when charged particles enter the sensitive area, electron-hole pairs are generated, drift motion is carried out to positive and negative poles under the action of an external electric field, and after the drift motion is collected by the positive and negative poles, information about energy, position, motion track and the like of the incident particles can be obtained after feedback current signals are processed through an outer end integrated circuit.
In the conventional pixel detector, the collecting electrode is usually in a complete rectangular or square structure, and the rectangular or square structure electrode covers almost the whole surface as shown in fig. 2. The large electrode area results in high capacitance, which is a major factor affecting the noise of the detector, and larger noise signals can reduce the detection performance of the detector and the signal-to-noise ratio of the system.
To further illustrate the need to reduce capacitance, the present application is described in connection with a sensor element with a charge-sensitive amplifier as shown in fig. 3. The analog part of the pixel unit consists of a charge sensitive amplifier and a comparator, and as can be seen in conjunction with fig. 3, each photon generates a small amount of charge Qs. The amplifier has a voltage gain A= -Vout/Vin, the output is Vout, and the input voltage is Vin. For a much greater than 1, vf=vin-vout≡a·vin, the charge stored on the feedback capacitor Cf is thus equal to qf=cf·vf≡cf·a·vin. Since no current flows into the amplifier we have qf=qin and get the effective input capacitance cin=qin/vin≡cf·a, the charge Qs being split between the detector and the amplifier. Effective input capacitance cin=qin/Vin, if Cdet is smaller than input capacitance Cin, charge is mostly collected in the amplifier, i.e., qin≡qs. Vout= -a·qs/cin=qs/Cf is obtained. If transient behavior of the amplifier is considered, the charge pulse Qs at the input of the amplifier is integrated and a step function of the voltage step Qs/Cf is generated at the output, where Cdet can be expressed as junction capacitance. Therefore, reducing the capacitance of the detector is particularly necessary to reduce noise charge and to increase sensitivity. Further, the capacitance of the dynamic P-N junction detector is inferred as follows:
the dynamic P-N junction capacitance is defined as: c=dq/dV, where C is the junction capacitance and dQ is the increment of the space charge per increase in the reverse bias voltage dV. Space charge q=q 0 N eff AW, wherein A is the area of the photodetector, and can also be the same as the electrode area S as follows; differential dQ gives dq=q 0 N eff AdW, and therefore:
in the above formula, W is the depth or thickness of the depletion layer, N eff Is an effective doping concentration.
Depending on the semiconductor physics, and the continuity of the electric field and potential distribution, the depletion layer depth W versus bias voltage V can be expressed as:
wherein, the liquid crystal display device comprises a liquid crystal display device,
at a bias voltage V greater than or equal to the full depletion voltage V fd In the case of W (V) fd ) =d and:
d is the thickness of the active area of the detector, the following mathematical relationship can be obtained:
for large reverse bias voltages (V>>V bi ) The relationship between capacitance and voltage can be expressed as C.alpha.1/V 1/2 . Finally, when the voltage reaches the full consumptionFull voltage V fd (w=d), the capacitance can be expressed as:
in the mathematical relationship, epsilon is silicon dielectric constant and epsilon 0 The dielectric constant of vacuum, A is the area of electrode, d is the thickness of the effective area of the detector, and under a certain condition, the depth or thickness of depletion layer, C GC Referred to as geometric capacitance.
It follows that the capacitance is related to the geometry of the detector.
The above relation is further modified and the study is continued:
wherein S is the collecting electrode area, D is the depletion layer thickness, ε is the product of the vacuum dielectric constant and the silicon dielectric constant, the depletion layer thickness D affects the junction capacitance, and the larger the depletion layer thickness is, the smaller the junction capacitance is. The smaller the electrode area S, the smaller the junction capacitance.
The relationship between bias voltage and depletion layer thickness is as follows:
where ε is the product of the vacuum permittivity and the silicon permittivity, ρ is the resistivity, and μ is the majority carrier mobility. The depletion layer thickness D of the Si-PIN detector can follow the bias voltage V bias Becomes thicker until the detector is fully depleted D no longer follows the bias voltage V bias But vary.
Bias voltage V at full detector depletion bias The increase does not increase the depletion layer thickness D any more, so the detector junction capacitance C after complete depletion d The size of (2) is related to the electrode area.
Detector junction capacitance C d Proportional to the electrode area;
effective parallel noise ENC par Can be expressed as:
wherein I is leak T is the leakage current of the detector peak The peak response time of the output signal is the peak response time of the output signal, and the effective parallel noise and the leakage current are in a direct proportion relation, so that the detector has better performance due to the small leakage current.
Effective series noise ENC series Can be expressed as:
wherein C is t T is the total input capacitance of the detector peak Is the peak response time of the output signal. The relation between the capacitance and the noise can be seen, and when the capacitance of the detector is small, the noise is smaller, and the sensitivity of the detector is higher.
Therefore, by reducing the electrode area S, the capacitance of the detector can be reduced.
As can be seen from fig. 2, 4, 5 and 6, the electrode area of the pixel unit in the designed detector is calculated and compared with the electrode area of the pixel unit in the background art.
As can be seen in FIG. 6, S 2 ＝L×W-2m×n；
As can be seen in FIG. 4, S 1 ＝L×W；
Further calculation is carried out according to the calculated values, and the following mathematical relation is obtained:
therefore, compared with the rectangular collecting electrode shown in fig. 2, the electrode with the I-shaped structure designed by the application can effectively reduce the electrode area so as to reduce the capacitance of the detector and improve the sensitivity of the detector.
The pixel array detector with the electrode having the i-shaped structure according to the present application is described in detail below, and includes a pixel unit, as shown in fig. 7, the pixel unit 100 includes a substrate 200, and the substrate 200 has a certain thickness, which is preferably 100 μm to 900 μm in the present application. The pixel unit 100 formed by the substrate 200 may be a cylinder or a polygonal cylinder, wherein the polygonal cylinder is any one of a triangular prism, a square or a hexagonal prism, and the pixel unit forms an m×n detector array, and M, N is a positive integer. The present application preferably designs the electrode having an i-shaped structure in a square body. The substrate 200 is made of any one of ultrapure high-resistance silicon, epitaxial silicon or SOI, and the ultrapure high-resistance silicon, epitaxial silicon or SOI is made of any type of material conventional in the art, and the surface of the substrate is conveniently etched.
As can be seen from fig. 5 and 6, the pixel units are discussed in the 2×2 array, the substrate 200 of the pixel unit has a reading surface 210 and a receiving surface 220, and the reading surface 210 and the receiving surface 220 are disposed at two ends of the substrate 200 in the thickness direction, and as shown in fig. 7, the coordinate axis z direction is the height or thickness direction of the pixel unit, and the reading surface 210 and the receiving surface 220 are disposed along the coordinate axis z direction. Wherein the read face 210 is for arranging an external electronic read-out circuit and the receiving face 220 is for receiving charged particles, such as X-rays or other charged particles.
As can be seen from fig. 7, the grooves 240 are formed in the reading surface 210 and/or the receiving surface 220, and the grooves 240 may be circular grooves or polygonal grooves, and preferably square grooves are disposed in the pixel units 100 of the regular quadrilateral columns, and the dimensions of the square grooves, such as depth, width, and width, are combined with the dimensions of the detection device, which are not described herein.
A cathode electrode 300 and/or an anode electrode 400 are arranged in the groove 240, wherein the cathode electrode 300 is an I-shaped structure formed by a first wing 321, a second wing 322 and an abdomen 323 positioned between the first wing 321 and the second wing 322; the anode electrode is also an I-shaped structure formed by the first wing part, the second wing part and the abdomen part between the first wing part and the second wing part, and the part numbers of the anode electrode are not directly shown in the drawing, but the anode electrode is actually present, and the sizes of the structures are consistent or inconsistent compared with those of the anode electrode, and the anode electrode is in the protection scope of the application. An insulating layer 230 is formed on the read face 210 in a region where the cathode electrode 300 is not arranged; an insulating layer is also formed on the receiving surface 220 in a region where the anode electrode 400 is not disposed.
Specifically, the cathode electrode 300 includes a first doped region 310 and a first conductive metal layer 320, the first doped region 310 is embedded in the reading surface 210, and the first conductive metal layer 320 is disposed on the surface of the first doped region 310; the first conductive metal layer 320 cooperates with the first doped region 310 to form a cathode electrode 300 with an i-shaped structure, where the cathode electrode 300 with an i-shaped structure is connected to an external electronic readout circuit and cooperates with a subsequent amplifying circuit, and the connection manner may be bonding-bonding technology or other technologies. Meanwhile, the pixel unit 100 further includes an anode electrode 400 located at the receiving surface 220 of the substrate 200, where the anode electrode 400 includes a second doped region 410 and a second conductive metal layer 420, and the second doped region 410 is embedded in the receiving surface 220 and covers the entire receiving surface 220, and the second conductive metal layer 420 and the second doped region 410 are in contact with each other to form the anode electrode 400, which is beneficial to further ensuring uniformity of electric field distribution if the anode electrode 400 is also made into an i-shaped structure.
The pixel unit 100 is prepared by the following steps: firstly, providing a matrix, thinning and polishing the matrix; secondly, growing an insulating layer on the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, forming a cathode electrode and/or an anode electrode in the groove, wherein the cathode electrode is positioned on the reading surface end, and the anode electrode is positioned on the receiving surface end; it is satisfied that the cathode electrode and/or the anode electrode is an i-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part.
The working principle of the pixel unit 100 includes: the charged particles are incident along the receiving surface 220, creating electron-hole pairs, and the carriers move within the depleted silicon body to form an electrical signal that is read out by the electrodes of the reading surface and subsequent amplification circuitry.
The pixel array detector with the I-shaped structure electrode can effectively reduce the electrode area, and the design mode is favorable for reducing the capacitance of the detector array and improving the sensitivity of the detector on the premise of not affecting the uniform distribution of an electric field. The pixel array detector has good application prospect in the field of X-ray image detectors.
In some embodiments, a gap is left between the first wing and/or the second wing and the walls of the trench in a manner that corresponds to a further reduction in counter electrode area, which is effective to improve the capacitance of the detector array.
In some embodiments, the first wing portion and/or the second wing portion are/is protruding on the surface of the abdomen, and the arrangement mode is that from the preparation process, an electrode with a special structure is manufactured by adopting the following easy-to-operate process, the cathode electrode is beneficial to realizing the improvement of the capacitance of the detector array, and the uniformity of electric field distribution can be ensured by adopting the electrode with the special structure.
In some embodiments, the body is an n-type body, the first doped region is a p-type doped region, and the second doped region is an n-type doped region; alternatively, the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region. And each doped region is a heavily doped region, and the doped element contains boron or phosphorus and the like.
In some embodiments, the substrate thickness is 100 μm to 900 μm. The substrate thickness may be any one of 100 μm, 200 μm, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm or any one of thicknesses satisfying the range.
In some embodiments, the first doped region has a thickness of 0.1 μm to 5.0 μm and a doping concentration of 1×10 18 /cm 2 ～1×10 20 /cm 2 . Wherein the first doped region thickness may be any one of 0.1 μm, 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm or any one of thicknesses satisfying the range of values. In addition, the doping concentration may be 1×10 18 /cm 2 、1×10 19 /cm 2 Or 1X 10 20 /cm 2 Any one of the above or any one of the concentrations satisfying the range of values.
In some embodiments, the second doped region has a thickness of 0.1 μm to 5.0 μm and a doping concentration of 1×10 18 /cm 2 ～1×10 20 /cm 2 . Wherein the second doped region thickness may be any one of 0.1 μm, 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm or any one thickness satisfying the range value. In addition, the doping concentration may be 1×10 18 /cm 2 、1×10 19 /cm 2 Or 1X 10 20 /cm 2 Any one of the above or any one of the concentrations satisfying the range of values.
In some embodiments, the first conductive metal layer or the second conductive metal layer is made of Al or Cu or an al—cu alloy.
In some embodiments, the insulating layer is made of silicon dioxide.
As shown in fig. 8, the present application provides an anode electrode having an i-shaped structure only at the end of the reading surface 210 of the substrate 200, as shown in fig. 9, in which a gap 324 is left between the first wing 321 and/or the second wing 322 and the wall of the trench 240 on the basis of the structure shown in fig. 8, and in which an i-shaped electrode having the same structure as the anode electrode is also designed at the end of the receiving surface 220 of the substrate 200 on the basis of the structure shown in fig. 9, as shown in fig. 10.
Exemplary embodiments of the present disclosure will be described in more detail below with further reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Example 1
As shown in fig. 9, an insulating layer 230 is first disposed on the reading surface 210 of the substrate 200, the insulating layer 230 has a certain thickness, the specific thickness of which needs to be combined with the size of the detection device, which is not described in detail in the present application, and the insulating layer 230 completely covers the top surface of the substrate 200, and the material of the insulating layer 230 may be silicon dioxide, wherein the silicon dioxide is convenient to etch, a trench 240 is formed on the insulating layer 230, a cathode electrode 300 is disposed in the trench 240, the cathode electrode 300 includes a first doped region 310 and a first conductive metal layer 320,
the first doped region 310 is embedded in the reading surface 210, and the first conductive metal layer 320 is an i-shaped structure formed by a first wing 321, a second wing 322, and an abdomen 323 between the first wing 321 and the second wing 322. As can be seen from fig. 9, the bottom surface of the abdomen 323 is attached to the top surface of the first doped region 310, the abdomen 323 and the first wing 321 and/or the second wing 322 form a height difference, specifically, the top surface of the abdomen 323 is connected to the bottom surface of the first wing 321 and/or the second wing 322, the heights of the first wing 321 and the second wing 322 are preferably equal, the bottom surface of the first wing 321 or the second wing 322 is in the same plane with the top surface of the abdomen 323, and the first wing 321 or the second wing 322 is higher than the abdomen 323 by a numerical value, which is not particularly limited in the present application. Therefore, in the electrode with an i-shaped structure designed in the present application, the electrode area is reduced compared with the rectangular collecting electrode shown in fig. 5, and in order to further reduce the electrode area, a gap 324 is preferably left between the first wing 321 and/or the second wing 322 and the walls of the grooves 240, and the specific size of the gap 324 is not limited in the present application.
The second doped region 410 and the second conductive metal layer 420 are formed to entirely cover the surface of the receiving surface 220 of the substrate 200.
The first doped region 310 cooperates with the first conductive metal layer 320 to form a cathode electrode, and the second doped region 410 cooperates with the second conductive metal layer 420 to form an anode electrode.
As shown in fig. 12, the picture of the detector formed by arranging the pixel units in the array of the present embodiment is shown, and it can be seen from fig. 12 that the anode electrode has a typical i-shaped structure.
Example 2
The preparation method of the pixel unit shown in the embodiment 1 is provided, and the specific preparation process may be the step shown in fig. 11 or other steps.
As can be seen from fig. 11, the process steps are as follows:
(a) Providing a silicon wafer, thinning and polishing the silicon wafer; wherein, the thinning and polishing treatment is any type of process conventional in the art, and the description is omitted herein. Obtaining a silicon wafer with the thickness of 500 mu m;
(b) Growing a silicon dioxide film layer on the reading surface end of the silicon wafer, wherein the thickness of the silicon dioxide film layer is not particularly limited in the embodiment;
(c) Etching the silicon dioxide film layer to form a groove, and reserving a silicon dioxide film layer with the thickness of 20nm at the bottom of the groove;
(d) Ion implantation is carried out on the groove to embed and form a first doped region on the surface of the reading surface; the doping concentration is 1 multiplied by 10 19 /cm 3 The doping thickness is 1 μm;
(e) Etching a silicon dioxide film layer with the thickness of 20nm reserved at the bottom of the groove;
(f) Growing a new silicon dioxide film layer in the groove, wherein the thickness of the new silicon dioxide film layer is 1 mu m;
(g) Photoetching the new silicon dioxide film layer to form a through hole penetrating through the new silicon dioxide film layer, wherein the rest part of the new silicon dioxide film layer around the through hole;
(h) Growing conductive metal in the through hole and on the surface of the rest new insulating layer to form a first conductive metal layer
(i) Photoetching a first conductive metal layer grown on the surface of the rest part of the new insulating layer to form a gap between the cathode electrode and the wall of the groove; wherein, the first conductive metal layer after photoetching is matched with the first doping area to form a cathode electrode;
(j) Ion implantation is carried out on the receiving surface end of the silicon wafer to form a second doped region;
(k) Growing conductive metal on the surface of the second doped region to form a second conductive metal layer, wherein the second conductive metal layer and the second doped region cooperate to form an anode electrode with a doping concentration of 1×10 19 /cm 3 The doping thickness was 1 μm.
The above examples disclose only one preparation method, and steps (j) and (k) may also be adjusted to be the same after step (d), otherwise.
The preparation method disclosed in the application can further comprise annealing treatment after doping.
The preparation method disclosed by the application can further comprise the step (b) of growing a silicon dioxide film layer on the reading surface end and the receiving surface end of the silicon wafer, and then etching the silicon dioxide film layer on the receiving surface end to form the anode electrode with the I-shaped structure.
In addition, the etching, photolithography, ion implantation, growth and other processes are all any type of processes conventional in the art, and the present application is not particularly limited.
The application also explores the capacitive performance of a detector comprising the pixel cell of example 1 and compares it with a rectangular structure pixel cell of the prior art:
in connection with the structure shown in fig. 6, the size of the pixel cell satisfies: l=60 μm, w=30 μm, n=10 μm, m=40 μm;
in connection with the structure shown in fig. 4, the size of the pixel cell satisfies: l=60 μm, w=30 μm.
Under the premise of other sizes, the same MxN array is manufactured, and capacitance test is carried out under the same condition, and the test results are shown in fig. 13 and 14.
As can be seen from fig. 13 and 14, the capacitance of the detector protected by the present application decreases.
Therefore, the electrode with the I-shaped structure designed by the embodiment can realize the technical purpose of effectively reducing the electrode area.
It is to be understood that the terminology used herein is for the purpose of describing particular example embodiments only, and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises," "comprising," "includes," "including," and "having" are inclusive and therefore specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order described or illustrated, unless an order of performance is explicitly stated. It should also be appreciated that additional or alternative steps may be used.
The foregoing is merely a preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A pixel array detector having an electrode of an i-shaped structure, the pixel array detector comprising a pixel cell comprising:
a base body having a reading surface and a receiving surface, the reading surface and the receiving surface being provided at both ends in a thickness direction of the base body; at least one of the reading surface and the receiving surface is provided with a groove, a cathode electrode and/or an anode electrode are arranged in the groove, the cathode electrode is positioned at the end of the reading surface, and the anode electrode is positioned at the end of the receiving surface;
the cathode electrode and/or the anode electrode is an I-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part;
and the insulating layer is positioned on the reading surface and/or the receiving surface in the area where the electrode is not arranged.
2. The array probe of claim 1, wherein the first wing and/or the second wing are/is raised from the belly surface;
preferably, a gap is left between the first wing part and/or the second wing part and the wall of the groove.
3. The array detector of claim 1 or 2, wherein the cathode electrode comprises a first doped region embedded in the readout surface and a first conductive metal layer disposed on a surface of the first doped region;
the anode electrode comprises a second doped region and a second conductive metal layer, the second doped region is embedded into the receiving surface, and the second conductive metal layer is arranged on the surface of the second doped region.
4. The array detector of claim 3, wherein the substrate is an n-type substrate, the first doped region is a p-type doped region, and the second doped region is an n-type doped region;
or alternatively, the first and second heat exchangers may be,
the substrate is a p-type substrate, the first doped region is an n-type doped region, and the second doped region is a p-type doped region.
5. The array probe of claim 3, wherein the substrate has a thickness of 100 μm to 900 μm;
the thickness of the first doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ～1×10 20 /cm 2 ；
The thickness of the second doped region is 0.1-5.0 μm, and the doping concentration is 1×10 18 /cm 2 ～1×10 20 /cm 2 。
6. The array detector of claim 3, wherein the first conductive metal layer or the second conductive metal layer is made of Al or Cu or an Al-Cu alloy.
7. The array detector of claim 1 or 2 or 4 or 5 or 6, wherein the substrate is any one of ultrapure high-resistance silicon, epitaxial silicon or SOI;
the insulating layer is made of silicon dioxide.
8. The preparation method of the pixel array detector with the I-shaped structure electrode is characterized by comprising the following steps of:
providing a substrate, thinning and polishing the substrate;
growing an insulating layer on the reading surface end and/or the receiving surface end of the substrate, etching the insulating layer to form a groove, forming a cathode electrode and/or an anode electrode in the groove, wherein the cathode electrode is positioned on the reading surface end, and the anode electrode is positioned on the receiving surface end; the cathode electrode and/or the anode electrode is an I-shaped structure formed by a first wing part, a second wing part and an abdomen part positioned between the first wing part and the second wing part.
9. The method of claim 8, wherein the cathode electrode or anode electrode is formed by:
etching the insulating layer to form a groove, and reserving the insulating layer with partial thickness at the bottom of the groove;
ion implantation is carried out on the groove to embed and form a doped region on the surface of the reading surface or the surface of the receiving surface;
etching the reserved insulating layer with partial thickness at the bottom of the groove, and growing a new insulating layer, wherein the thickness of the new insulating layer is larger than that of the reserved insulating layer with partial thickness;
photoetching the new insulating layer to form a through hole penetrating through the insulating layer, and leaving a part of the new insulating layer around the through hole;
growing conductive metal on the surfaces of the through holes and the rest part of the new insulating layer to form a conductive metal layer;
wherein, the doped region at the reading surface end is matched with the conductive metal layer to form a cathode electrode; the doped region at the receiving surface end is matched with the conductive metal layer to form an anode electrode.
10. The method of manufacturing according to claim 9, further comprising photolithography of the remaining part of the newly grown conductive metal layer surface for forming a gap between the first and/or second wing and the wall of the trench.
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| CN202310378096.4A CN116504850A (en) | 2023-04-11 | 2023-04-11 | Pixel array detector with I-shaped structure electrode and preparation method thereof |
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| CN202310378096.4A CN116504850A (en) | 2023-04-11 | 2023-04-11 | Pixel array detector with I-shaped structure electrode and preparation method thereof |
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