CN116436283A - Active common mode electromagnetic interference filter - Google Patents

Active common mode electromagnetic interference filter Download PDF

Info

Publication number
CN116436283A
CN116436283A CN202310108498.2A CN202310108498A CN116436283A CN 116436283 A CN116436283 A CN 116436283A CN 202310108498 A CN202310108498 A CN 202310108498A CN 116436283 A CN116436283 A CN 116436283A
Authority
CN
China
Prior art keywords
circuit
phase angle
end button
common mode
signal sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310108498.2A
Other languages
Chinese (zh)
Inventor
张栋
张少昆
范涛
温旭辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Electrical Engineering of CAS
Original Assignee
Institute of Electrical Engineering of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Electrical Engineering of CAS filed Critical Institute of Electrical Engineering of CAS
Priority to CN202310108498.2A priority Critical patent/CN116436283A/en
Publication of CN116436283A publication Critical patent/CN116436283A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Networks Using Active Elements (AREA)

Abstract

The invention discloses an active common mode electromagnetic interference filter, comprising: the device comprises a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit. The invention combines the advantages of high feedforward control stability and low dependence of feedback control on circuit parameters, overcomes the contradiction among the insertion loss, stability and bandwidth of the active common mode electromagnetic interference filter independently controlled by feedforward or feedback, and can realize the high insertion loss and high bandwidth of the active common mode electromagnetic interference filter at the same time.

Description

Active common mode electromagnetic interference filter
Technical Field
The invention relates to the technical field of electromagnetic interference suppression, in particular to an active common mode electromagnetic interference filter.
Background
In the power electronic inverter or rectifier circuit, electromagnetic interference is generated due to the high-frequency switching operation of the power semiconductor device. Electromagnetic interference can be classified into differential mode interference and common mode interference according to the difference in electromagnetic interference current flow paths. Differential mode interference current flows between wires and cables transmitting signals or power; common mode disturbance current flows between the wire (or cable) and ground, changing the potential difference between the circuit and ground. In order to analyze common mode interference in the inverter circuit or the rectifier circuit, generation and transmission of the common mode interference may be equivalent to a common mode interference equivalent circuit.
Common mode electromagnetic interference filters are typically used to suppress the external common mode interference emissions of the inverter or rectifier. The interference suppression effect of the common mode electromagnetic interference filter can be described by insertion loss, the insertion loss reflects the difference of the external interference level of the filtered equipment when the filter exists or not, and the larger the insertion loss is, the better the interference suppression effect of the common mode electromagnetic interference filter is.
The most common mode electromagnetic interference filter is a passive common mode electromagnetic interference filter, and the electromagnetic interference filter is composed of passive elements such as an inductor, a capacitor, a resistor, and the like, and does not include active elements such as a semiconductor device. The disadvantage of passive common mode electromagnetic interference filters is their relatively large size and limited application in high power density applications. Another type of common mode electromagnetic interference filter is called an active common mode electromagnetic interference filter, the electromagnetic interference filter adopts a structure of 'current or voltage detection circuit-control circuit-power amplification circuit-voltage or current coupling circuit', the control circuit and the power amplification circuit comprise active elements such as semiconductor devices, and the existing active common mode electromagnetic interference filter is difficult to have high insertion loss and high stability by adopting a feedforward or feedback control mode alone.
Disclosure of Invention
In view of the above, the embodiments of the present invention provide an active common mode electromagnetic interference filter to solve the technical problem that the active common mode electromagnetic interference filter in the prior art is difficult to have both high insertion loss and high stability.
The technical scheme provided by the invention is as follows:
in a first aspect, an embodiment of the present invention provides an active common mode electromagnetic interference filter, including: the device comprises a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit; the direct current port electrical midpoint generating circuit is used for acquiring a first voltage value of a filtered circuit, wherein the first voltage value is an average voltage value of a positive bus voltage and a negative bus voltage of the direct current port of the filtered circuit; the feedforward signal sampling and processing circuit is used for collecting the internal common-mode interference voltage source voltage of the filtered circuit, carrying out signal conditioning on the internal common-mode interference voltage source voltage to obtain a second voltage value, and inputting the second voltage value into the weighted summation circuit; the feedback signal sampling and processing circuit is used for collecting external output common-mode interference voltage or common-mode interference current of the filtered circuit, carrying out signal conditioning on the external output common-mode interference voltage or the common-mode interference current to obtain a third voltage value, and inputting the third voltage value into the weighted summation circuit; the weighted summation circuit is used for calculating a fourth voltage value according to the second voltage value and the third voltage value and inputting the fourth voltage value into the power amplification circuit; the power amplification circuit is used for performing power amplification processing on the fourth voltage value to obtain a fifth voltage value, and feeding back and inputting the fifth voltage value to the output circuit; the output circuit is used for coupling the fifth voltage value to the first voltage value and completing suppression of common-mode interference voltage emitted by the filtered circuit.
With reference to the first aspect, in a possible implementation manner of the first aspect, the dc port electrical midpoint generating circuit includes: a first capacitor and a second capacitor connected in series; the first end button of the first capacitor is connected with the direct current port positive bus of the filtered circuit, the second end button of the first capacitor is connected with the first end button of the second capacitor, and the second end button of the second capacitor is connected with the direct current port negative bus of the filtered circuit.
With reference to the first aspect, in another possible implementation manner of the first aspect, the feedforward signal sampling and processing circuit includes: the circuit comprises a first sampling link and at least one first operational amplifier circuit, wherein the first sampling link comprises a first resistor-capacitor network.
With reference to the first aspect, in a further possible implementation manner of the first aspect, the feedback signal sampling and processing circuit includes: the second sampling link comprises a second resistance capacitance network or a resistance current transformer network; when the second sampling link comprises the second resistor-capacitor network and the reference potential of the active common mode electromagnetic interference filter is the first voltage value, a first input end button of the feedback signal sampling and processing circuit is connected with the protection ground of the filtered circuit; when the second sampling link includes the second resistor-capacitor network and the reference potential of the active common mode electromagnetic interference filter is the protection ground of the filtered circuit, the first input end button of the feedback signal sampling and processing circuit is connected with the output end button of the direct current port electrical midpoint generating circuit, and the output end button of the direct current port electrical midpoint generating circuit is the second end button of the first capacitor.
With reference to the first aspect, in a further possible implementation manner of the first aspect, the resistive current transformer network includes a primary resistive current transformer network and a secondary resistive current transformer network; when the second sampling link comprises the resistance current transformer network, the secondary resistance current transformer network is used for outputting a voltage signal proportional to a current signal of the filtered circuit, wherein the current signal is the current sum of a positive bus current and a negative bus current of a direct-current port of the filtered circuit; the positive bus current sampling branch of the primary resistance current transformer network is connected with the direct current port positive bus of the filtered circuit in series through the second input end button and the third input end button of the feedback signal sampling and processing circuit; and a negative bus current sampling branch of the primary resistance current transformer network is connected with a direct current port negative bus of the filtered circuit in series through a fourth input end button and a fifth input end button of the feedback signal sampling and processing circuit.
With reference to the first aspect, in a further possible implementation manner of the first aspect, the weighted sum circuit includes at least one third operational amplifier circuit, and the third operational amplifier circuit is one of an in-phase sum circuit, an anti-phase sum circuit, and an add-subtract circuit.
With reference to the first aspect, in a further possible implementation manner of the first aspect, when a first weighted phase angle corresponding to a first weighted coefficient of the weighted sum circuit meets a preset first phase angle range and a second weighted phase angle corresponding to a second weighted coefficient of the weighted sum circuit meets the preset first phase angle range, the third operational amplifier circuit is the in-phase sum circuit; when the first weighted phase angle meets a preset second phase angle range and the second weighted phase angle meets the preset second phase angle range, the third operational amplifier circuit is the inverting summing circuit; the third operational amplifier circuit is the add-subtract operation circuit when the first weighted phase angle satisfies the preset first phase angle range and the second weighted phase angle satisfies the preset second phase angle range, or when the first weighted phase angle satisfies the preset second phase angle range and the second weighted phase angle satisfies the preset first phase angle range.
With reference to the first aspect, in a further possible implementation manner of the first aspect, when the first weighted phase angle meets the preset first phase angle range and the second weighted phase angle meets the preset second phase angle range, a non-inverting input branch of the operational amplifier in the add-subtract circuit is connected with an output terminal of the feedforward signal sampling and processing circuit, and an inverting input branch of the operational amplifier is connected with an output terminal of the feedback signal sampling and processing circuit; when the first weighted phase angle meets the preset second phase angle range and the second weighted phase angle meets the preset first phase angle range, the in-phase input end branch of the operational amplifier is connected with the output end button of the feedback signal sampling and processing circuit, and the inverting input end branch of the operational amplifier is connected with the output end button of the feedforward signal sampling and processing circuit.
With reference to the first aspect, in a further possible implementation manner of the first aspect, a first input terminal of the weighted sum circuit is connected with an output terminal of the feedforward signal sampling and processing circuit; the second input end button of the weighted summation circuit is connected with the output end button of the feedback signal sampling and processing circuit; and a third input end button of the weighted summation circuit is connected with an output end button of the power amplification circuit.
With reference to the first aspect, in a further possible implementation manner of the first aspect, the output circuit includes at least one third capacitor, and the third capacitor is used for blocking a direct current voltage between the power amplifying circuit and a protected ground of the filtered circuit; when the reference potential of the active common mode electromagnetic interference filter is the first voltage value, an output end button of the output circuit is connected with the protection ground of the filtered circuit; when the reference potential of the active common mode electromagnetic interference filter is the protection ground of the filtered circuit, the output end button of the output circuit is connected with the output end button of the direct current port electrical midpoint generating circuit.
The technical scheme provided by the invention has the following effects:
The active common mode electromagnetic interference filter provided by the embodiment of the invention integrates the advantages of high feedforward control stability and low dependence of feedback control on circuit parameters, overcomes the contradiction among the insertion loss, stability and bandwidth of the active common mode electromagnetic interference filter independently controlled by feedforward or feedback, and can realize high insertion loss and high bandwidth of the active common mode electromagnetic interference filter at the same time.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will briefly explain the drawings needed in the embodiments or the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a block diagram of an active common mode electromagnetic interference filter according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a connection relationship between circuits of an active common mode electromagnetic interference filter according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a first implementation of an active common mode electromagnetic interference filter provided in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of a feedback signal sampling and processing circuit in the form of a high pass filter circuit provided in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram of a second implementation of an active common mode electromagnetic interference filter provided in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram of a feed forward signal sampling network provided in accordance with an embodiment of the present invention;
FIG. 7 is a schematic diagram of a third embodiment of a weighted sum circuit of an active common mode electromagnetic interference filter according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another form of a weighted sum circuit in a fourth implementation of an active common mode electromagnetic interference filter according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of primary and secondary buttons of a current transformer according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of one form of feedback signal sampling and processing circuitry for collecting the common mode current of the DC port of a filtered inverter or rectifier circuit according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of another form of feedback signal sampling and processing circuit for collecting the common mode current of the DC port of a filtered inverter or rectifier circuit according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of a third form of feedback signal sampling and processing circuit for collecting the common mode current of the DC port of a filtered inverter or rectifier circuit according to an embodiment of the present invention;
FIG. 13 is a schematic diagram of a fourth form of feedback signal sampling and processing circuit for collecting the common mode current of the DC port of a filtered inverter or rectifier circuit according to an embodiment of the present invention;
fig. 14 is a schematic diagram of a dc port electrical midpoint generation circuit provided according to an embodiment of the present invention;
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The existing active common mode electromagnetic interference filter adopts a feedforward or feedback control mode alone, so that the high insertion loss and the high stability are difficult to combine.
Accordingly, an embodiment of the present invention provides an active common mode electromagnetic interference filter, as shown in fig. 1, the active common mode electromagnetic interference filter 1 includes: a dc port electrical midpoint generating circuit 11, a feedforward signal sampling and processing circuit 12, a feedback signal sampling and processing circuit 13, a weighted summing circuit 14, a power amplifying circuit 15, and an output circuit 16.
In one example, the connection relationship between the above circuits is shown in fig. 2.
Further, the functions of the respective circuits described above will be described.
First, the dc port electrical midpoint generating circuit 11 is used to acquire a first voltage value of the filtered circuit 2.
The filtered circuit can be a filtered inversion or rectification circuit, and the phase number of the filtered inversion or rectification circuit can be single-phase, three-phase or any number of more than three phases; the first voltage value is the average voltage value V of the positive bus voltage and the negative bus voltage of the direct current port of the filtered circuit DCav 。
The feedforward signal sampling and processing circuit 12 is configured to collect the common-mode interference voltage source voltage inside the filtered inversion or rectification circuit, and further perform signal conditioning on the collected common-mode interference voltage source voltage, for example, the common-mode interference voltage source voltage, to obtain a second voltage value V ffout And the second voltage value V ffout Is input to the weighted sum circuit 14.
Wherein the second voltage value V ffout Equal to the command voltage (typically 0) and the voltage difference between the feedforward signal sampling and processing circuit 12 output is amplified by a times, a being a complex number that varies with frequency in the frequency domain from a numerical point of view.
Specifically, the second voltage value V ffout Satisfies the following relational expression (1) or (2):
Figure BDA0004075933350000081
Figure BDA0004075933350000082
in the above relation: z is Z s Representing the internal impedance of the source of interference of the filtered inverter or rectifier circuit; z is Z out Representing the impedance of the output link of the active common mode electromagnetic interference filter; v (V) s Representing the equivalent common mode disturbance voltage source voltage.
The feedback signal sampling and processing circuit 13 is used for collecting the output of the filtered inversion or rectification circuitThe obtained common-mode interference voltage is subjected to signal conditioning to the acquired external output common-mode interference voltage to obtain a third voltage value V fbout And inputs the third voltage value to the weighted sum circuit 14. The signal conditioning method is the same as the method for conditioning the collected common-mode interference voltage source voltage.
Wherein the third voltage value V fbout Equal to the command voltage (typically 0) and the voltage difference between the feedback signal sampling and processing circuit 13 output is amplified by a times, a being a complex number varying with frequency in the frequency domain from a numerical point of view.
Further, the feedback signal sampling and processing circuit 13 may also collect the common mode interference current outputted from the filtered inversion or rectification circuit. The specific acquisition signal is determined by the structure of the feedback signal sampling and processing circuit 13.
The weighted sum circuit 14 is used for summing the second voltage value V ffout And a third voltage value V fbout Weighted summation is carried out to obtain a fourth voltage value V sumout Further, the fourth voltage value V sumout As an input voltage to the power amplifying circuit 15.
The power amplifying circuit 15 takes the form of a complementary output circuit, and is formed by at least one pair of complementary NPN bipolar transistors and PNP bipolar transistors, or at least one pair of complementary N-channel field effect transistors and P-channel field effect transistors in series. Wherein the logarithm of the complementary transistors is determined by the output power of the power amplifier.
The input terminal of the power amplifying circuit 15 is connected with the output terminal of the weighted summation circuit 14, and the output terminal of the power amplifying circuit 15 is a terminal of each pair of complementary transistors connected in series.
Further, the function of the power amplification circuit 15 will be described.
Specifically, the power amplification circuit 15 is configured to amplify the output voltage V of the weighted summation circuit 14 sumout Power amplifying, e.g. amplifying current or voltage or amplifying current and voltage simultaneously, and outputting voltage (fifth voltage value) V ampout And fed back to the weighted sum circuit 14.
Wherein the fifth electricityPressure value V ampout Satisfies the following relation (3):
V ampout ＝k 1 V ffout +k 2 V fbout (3)
wherein: k (k) 1 And k 2 The weighting coefficients are determined by the element parameters of the weighting summing circuit 14 and the power amplifying circuit 15.
Further, the power amplifying circuit 15 also outputs the fifth voltage value V ampout To the output circuit 16.
The output circuit 16 receives the fifth voltage value V ampout By then applying the fifth voltage value V ampout An output voltage (first voltage value) V coupled to a protection ground of the filtered inverting or rectifying circuit, or to the dc port electrical midpoint generating circuit 11 DCav Common mode interference of the filtered inversion or rectification circuit to external emission is restrained.
The active common mode electromagnetic interference filter provided by the embodiment of the invention integrates the advantages of high feedforward control stability and low dependence of feedback control on circuit parameters, overcomes the contradiction among the insertion loss, stability and bandwidth of the active common mode electromagnetic interference filter independently controlled by feedforward or feedback, and can realize high insertion loss and high bandwidth of the active common mode electromagnetic interference filter at the same time.
As an alternative implementation manner of the embodiment of the present invention, the dc port electrical midpoint generating circuit 11 includes: a first capacitor 111 and a second capacitor 112.
The first capacitor 111 and the second capacitor 112 are capacitors of the same specification connected in series.
Further, in the dc port electrical midpoint generating circuit 11, a first terminal of the first capacitor 111 is connected to a dc port positive bus of the filtered inverter or rectifier circuit, a second terminal of the first capacitor 111 is connected to a first terminal of the second capacitor 112, and a second terminal of the second capacitor 112 is connected to a dc port negative bus of the filtered inverter or rectifier circuit. The second terminal of the first capacitor 111 is an output terminal of the dc port electrical midpoint generating circuit.
That is, in the dc port electrical midpoint generating circuit 11, the electrical midpoint voltage V of the dc port of the inverter or rectifier circuit that is filtered DCav The second terminal voltage of the first capacitor 111, i.e. the first terminal voltage of the second capacitor.
Further, the filtered DC port of the inverter or rectifier circuit has an electrical midpoint voltage V DCav The reference potential GND of the active common mode electromagnetic interference filter can be used, and the output terminal of the output circuit can also be connected.
As an alternative implementation of the embodiment of the present invention, the feedforward signal sampling and processing circuit 12 includes: a first sampling element 121 and a first operational amplifier circuit 122.
It should be noted that the number of the first operational amplifier circuits 122 may be one or more, which is not limited in this embodiment.
Wherein the first sampling element 121 may comprise a first resistor-capacitor network 1211.
Further, when the ac ports of the filtered inverter or rectifier circuit share N phases, the feedforward signal sampling and processing circuit 12 includes at least n+1 terminals in addition to the terminals connected to the reference potential GND.
Wherein N of the N+1 buttons are respectively connected with N phases of the AC port, and the other 1 buttons are used as output buttons of the feedforward signal sampling and processing circuit 12 for outputting a second voltage value V ffout 。
As an alternative implementation of the embodiment of the present invention, the feedback signal sampling and processing circuit 13 includes: a second sampling element 131 and a second operational amplifier circuit 132.
It should be noted that the number of the second operational amplifier circuits 132 may be one or more, which is not limited in this embodiment.
The second sampling element 131 may include a second resistor-capacitor network 1311 or a resistor-current transformer network 1312. Further, the resistive current transformer network 1312 may be in the form of a current transformer, rogowski coil, sampling resistor and isolation amplifying circuit, etc., and in an embodiment of the present invention, may include a primary resistive current transformer network 13121 and a secondary resistive current transformer network 13122, as shown in fig. 1.
When the second sampling link 131 is formed by the second resistor-capacitor network 1311, collecting the common-mode interference voltage externally output by the filtered inversion or rectification circuit; when the second sampling segment 131 is formed by the resistive current transformer network 1312, the common mode interference circuit output from the filtered inversion or rectification circuit to the outside is collected.
Further, when the second sampling segment 131 is formed by the second rc network 1311, the feedback signal sampling and processing circuit 13 includes at least 2 terminals except for the terminal connected to the reference potential GND. Wherein 1 end button is an input end button, and 1 is an output end button.
Specifically, when the reference potential GND is the first voltage value V of the DC port electrical midpoint generating circuit 11 DCav When the input terminal button of the feedback signal sampling and processing circuit 13 is connected to the protection ground of the filtered inversion or rectification circuit; when the reference potential GND is the protection ground of the filtered inverting or rectifying circuit, the input terminal of the feedback signal sampling and processing circuit 13 is connected to the first voltage value V of the DC port electrical midpoint generating circuit 11 DCav 。
Further, when the second sampling segment 131 is formed by the resistive current transformer network 1312, the primary resistive current transformer network 13121 inputs the positive and negative bus currents flowing through the filtered dc port of the inverter or rectifier circuit, and the secondary resistive current transformer network 13122 outputs a current signal or voltage signal proportional to the sum of the positive and negative bus currents of the filtered dc port of the inverter or rectifier circuit.
Further, the connection relationship between the feedback signal sampling and processing circuit 13 and the positive and negative buses of the dc port of the inverter or rectifier circuit to be filtered will be described.
Specifically, the feedback signal sampling and processing circuit 13 includes at least 5 terminals in addition to the terminals connected to the reference potential GND. Wherein, 4 are input end buttons and 1 is output end button.
2 of the 4 input buttons connect the positive bus current sampling branch of the primary resistive current transformer 13121 in series with the positive bus of the filtered inverting or rectifying circuit dc port, and the other 2 input buttons connect the negative bus current sampling branch of the primary resistive current transformer 13121 in series with the negative bus of the filtered inverting or rectifying circuit dc port.
As an alternative implementation of the embodiment of the present invention, the weighted sum circuit 14 includes a third operational amplifier circuit 141. The third operational amplifier circuit is one of an in-phase summing circuit, an anti-phase summing circuit and an addition and subtraction operation circuit.
It should be noted that the number of the third operational amplifier circuits 141 may be one or more, which is not limited in this embodiment.
Specifically, when the weighting coefficient k is calculated by combining the above-mentioned relation (3) 1 And k 2 When the phase angles of the two operational amplifiers are between-90 degrees and +90 degrees, an in-phase summing circuit is adopted as a third operational amplifier circuit;
when the weighting coefficient k 1 And k 2 When the phase angles of the two operational amplifiers are between-270 degrees and-90 degrees, an inverting summing circuit is adopted as a third operational amplifier circuit;
when the weighting coefficient k 1 The phase angle of (2) is between-90 DEG and +90 DEG, the weighting coefficient k 2 When the phase angle of (a) is between-270 DEG and-90 DEG, or when the weighting coefficient k 1 The phase angle of (a) is between-270 DEG and-90 DEG, the weighting coefficient k 2 When the phase angle of the circuit is between minus 90 degrees and plus 90 degrees, an add-subtract circuit is adopted as a third operational amplifying circuit.
Further, when the weighting coefficient k 1 The phase angle of (2) is between-90 DEG and +90 DEG, the weighting coefficient k 2 When the phase angle of the phase angle is between-270 DEG and-90 DEG, the in-phase input end branch of the operational amplifier in the add-subtract circuit is connected with the output end button of the feedforward signal sampling and processing circuit 12, and the reverse phase input end branch of the operational amplifier in the add-subtract circuit is connected with the output end button of the feedback signal sampling and processing circuit 13;
when the weighting coefficient k 1 The phase angle of (a) is between-270 DEG and-90 DEG, the weighting coefficient k 2 When the phase angle of the operational amplifier is between-90 DEG and +90 DEG, the non-inverting input end of the operational amplifier in the addition and subtraction circuit The branch is connected with the output end button of the feedback signal sampling and processing circuit 13, and the inverting input end of the operational amplifier in the add-subtract circuit is connected with the output end button of the processing circuit 12.
Further, the connection relation of the feedforward signal sampling and processing circuit 12, the feedback signal sampling and processing circuit 13, the weighted sum circuit 14, and the power amplification circuit 15 is further described.
The weighted sum circuit 14 includes at least 4 terminals, except for the terminal connected to the reference potential GND, wherein 3 terminals are input terminals and 1 terminal is output terminal.
Specifically, the 3 input buttons of the weighted summation circuit 14 are respectively connected with the output button of the feedforward signal sampling and processing circuit 13 and the output button V of the feedback signal sampling and processing circuit 13 fbout An output terminal button of the power amplification circuit; 1 output terminal button for outputting fourth voltage value V sumout 。
As an alternative implementation of the embodiment of the invention, the output circuit 16 comprises a third capacitor 161.
Wherein the third capacitor 161 is used to block the dc voltage between the power amplifying circuit 15 and the protection ground of the filtered inverting or rectifying circuit.
Further, the output circuit 16 includes at least 2 buttons, wherein 1 button is an input button and the other 1 button is an output button.
Specifically, an input terminal of the output circuit 16 is connected to an output terminal of the power amplifying circuit 15.
When the reference potential is the reference potential GND, the first voltage value V of the DC port electrical midpoint generating circuit 11 DCav The output terminal of the output circuit 16 is connected to the protection ground of the filtered inverter or rectifier circuit; when the reference potential GND is the protection ground of the filtered inverting or rectifying circuit, the output terminal of the output circuit 16 is connected to the output terminal of the dc port electrical midpoint generating circuit 11.
In an embodiment, taking a three-phase inverter or rectifier circuit as an example to describe the active common mode electromagnetic interference filter provided in the embodiment of the present invention, different implementations are provided respectively:
1. first embodiment
The active common mode electromagnetic interference filter is composed of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplification circuit and an output circuit, and is shown in figure 3.
Wherein, C in the DC port electrical midpoint generating circuit dc1 And C dc2 For two capacitors with the same specification, the positive and negative bus voltages of the direct current ports of the filtered inversion or rectification circuit are averaged to obtain a voltage signal V DCav And serves as a reference potential GND for the active common mode electromagnetic interference filter;
the feedback signal sampling and processing circuit samples the common mode interference voltage of the DC port of the filtered inversion or rectification circuit. The feedback signal sampling and processing circuit is a band-pass filter circuit and comprises a passive network and an operational amplifier circuit input by a non-inverting terminal. C (C) fb1 One end of the feedback signal sampling and processing circuit is connected to the filtered inversion or rectification circuit protection ground to collect common-mode interference voltage;
the feedback signal sampling and processing circuit may be a high-pass filter circuit in addition to a band-pass filter circuit, and one possible implementation is shown in fig. 4 when the feedback signal sampling and processing circuit is a high-pass filter circuit.
The feedforward signal sampling and processing circuit samples and filters the common mode voltage of the filtered inverting or rectifying circuit ac port. The feedforward signal sampling and processing circuit comprises a passive network and an operational amplifier circuit input by a non-inverting terminal. Further, the feedforward signal samples the output voltage V of the processing circuit ffout Satisfying the above relation (1).
The weighted summation circuit is an inverting summation circuit, and the input signals are the output voltage V of the feedback signal sampling and processing circuit respectively fbout And the output voltage V of the feedforward signal sampling and processing circuit ffout In the weighted summation, the feedback signal samples and processes the output voltage V of the circuit fbout Is weighted by R sum1 、C sum1 Parallel branch impedance and R sum4 The ratio of the resistance values of the feedforward signal sampling and processing circuit is determined ffout Is weighted by R sum1 、C sum1 Parallel branch impedance and R sum3 The ratio of the resistance values of (2) is determined. Output voltage V of weighted summation circuit sumout Connected to the power amplifying circuit;
the power amplifying circuit is composed of a pair of complementary NPN and PNP transistors, and the input is the output voltage V of the weighted summation circuit sumout The output is the power amplified voltage V ampout . Output voltage V ampout Operational amplifier A fed back into the weighted summation circuit sum To realize the above relation (3);
the output circuit is composed of a capacitor C out And R is out Series connection is formed, and the input is output voltage V of power amplifying circuit ampout The output is connected to the protection ground of the filtered inverter or rectifier circuit.
Each operational amplifier and each power amplifying circuit are powered by the same dual power supply, wherein the positive power supply in the dual power supply is V p The negative power supply is V n 。V p And V n The average value of (2) may be zero or may be other than zero according to the circuit requirements.
2. Second embodiment
The active common mode electromagnetic interference filter is composed of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplification circuit and an output circuit, and is shown in fig. 5.
Wherein the feedback signal sampling and processing circuit samples and filters the common mode interference voltage of the DC port of the filtered inversion or rectification circuit to output voltage V fbout . The feedback signal sampling and processing circuit is a band-pass filter circuit and comprises a passive network and an operational amplifier circuit input by an inverting terminal. C (C) fb1 One end of the feedback signal sampling and processing circuit is connected to the filtered inversion or rectification circuit protection ground to collect common mode interference voltage。
The feedforward signal sampling and processing circuit samples and filters the common mode voltage of the filtered inverting or rectifying circuit ac port. The feedforward signal sampling and processing circuit comprises a passive network and two operational amplifier circuits, wherein the first operational amplifier circuit adopts a form of input at a non-inverting terminal, and the second operational amplifier circuit adopts a form of input at an inverting terminal. The feedforward signal sampling and processing circuit outputs a voltage V ffout Satisfying the above relation (2).
The feed forward signal sampling and processing circuit includes three passive networks, as shown in fig. 6. The first passive network is connected with alternating current phases of the filtered inversion or rectification circuit and the first operational amplifier to reduce the common mode interference voltage source voltage of the filtered inversion or rectification circuit to c 1 The scaling down is determined by the network parameters. The first end button of the second passive network is connected with the first operational amplifier, the second end button is connected with the second operational amplifier, and the impedance Z between the two end buttons ff2 The following relation (4) is satisfied:
Z ff2 ＝c 2 Z s (4)
wherein: c 2 Representing the coefficients.
Further, a third passive network is connected across the input and output buttons of the second operational amplifier, the impedance Z of the third passive network ff3 The following relation (5) is satisfied:
Figure BDA0004075933350000161
wherein, in the frequency domain, c 1 ，c 2 May be set to a constant value or may be set to a value that varies with frequency.
The weighted summation circuit is an in-phase summation circuit, and the input signals are the output voltage V of the feedback signal sampling and processing circuit fbout And the output voltage V of the feedforward signal sampling and processing circuit ffout . In the weighted summation, the feedback signal samples and processes the output voltage V of the circuit fbout And the output voltage V of the feedforward signal sampling and processing circuit ffout Is weighted by R sum1 、C sum1 Parallel branch impedance and R sum4 Ratio of resistance values of R sum2 And R is sum3 In the complex frequency domain, the output voltage V of the feed-forward signal sampling and processing circuit fbout Weight k of (2) 1 Can be expressed as the following relation (6):
Figure BDA0004075933350000162
output voltage V of feedback signal sampling and processing circuit fbout Weight k of (2) 2 Can be expressed as the following relation (7):
Figure BDA0004075933350000163
Further, the output voltage V of the weighted sum circuit sumout Is connected to the power amplifying circuit.
In the second embodiment, the dc port electrical midpoint generating circuit, the power amplifying circuit and the output circuit are the same as those in the first embodiment, and will not be described here again.
3. Third embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
In this embodiment, the feedforward signal sampling and processing circuit is the same as that in the first embodiment, and the feedback signal sampling and processing circuit is the same as that in the second embodiment, and thus, the description thereof will not be repeated. The weighted sum circuit employs an add-subtract circuit, as shown in fig. 7.
Alternatively, in the present embodiment, the feedforward signal sampling and processing circuit is the same as that in the second embodiment, and the feedback signal sampling and processing circuit is the same as that in the first embodiment, and the details thereof will not be repeated here. The weighted sum circuit employs an add-subtract circuit as shown in fig. 8.
Further, the dc port electrical midpoint generating circuit, the power amplifying circuit and the output circuit are the same as those in the first and second embodiments, and will not be described here again.
4. Fourth embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
The dc port electrical midpoint generating circuit, the feedforward signal sampling and processing circuit, the weighted summation circuit, the power amplifying circuit, and the output circuit are identical to those in the second embodiment, and are not described herein.
Further, the feedback signal sampling and processing circuit collects the common mode current of the direct current port of the filtered inversion or rectification circuit, and the common mode current is coupled to the active common mode electromagnetic interference filter from the filtered inversion or rectification circuit through a current transformer network (such as a current transformer or other type of current sensor). For convenience of description, the primary and secondary buttons of the current transformer network are numbered, as shown in fig. 9 (a current transformer is taken as an example). The four terminal buttons of the primary are respectively P near the terminal buttons of the filtered inversion or rectification circuit 1 And N 1 The other two end buttons are respectively P 2 And N 2 ，P 1 And N 1 Is the same name end, P 2 And N 2 Is the same name end; secondary two terminal buttons, and P 1 And N 1 Is named S at the same name 1 And P 2 And N 2 Is named S at the same name 2 。
When S is 2 When the terminal button is connected to the GND of the active common mode electromagnetic interference filter, the processing of the secondary signal of the current transformer network is achieved through the operational amplifier circuit input by the passive network and the inverting terminal, as shown in fig. 10, where the passive network compensates the phase of the current transformer network.
When S is 1 When the terminal button is connected to GND of the active common mode electromagnetic interference filter, the input operation is carried out through the passive network and the in-phase terminalAnd the amplifying circuit is used for processing secondary signals of the current transformer network, as shown in fig. 11, wherein the passive network compensates the phase of the current transformer or other types of current sensors.
5. Fifth embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
The dc port electrical midpoint generating circuit, the feedforward signal sampling and processing circuit, the weighted summation circuit, the power amplifying circuit, and the output circuit are identical to those in the first embodiment, and are not described herein.
The feedback signal sampling and processing circuit collects common mode current of the direct current port of the filtered inversion or rectification circuit, and the common mode current is coupled to the active common mode electromagnetic interference filter from the filtered inversion or rectification circuit through a current transformer network (such as a current transformer or other type of current sensor). For convenience of description, the primary and secondary buttons of the current transformer network are numbered in the same manner as in the fourth embodiment, and no further description is given here.
When S is 2 When the terminal button is connected to GND of the active common mode electromagnetic interference filter, the processing of the secondary signal of the current transformer network is realized through the operational amplifier circuit input by the passive network and the in-phase terminal, as shown in fig. 12 (taking a current transformer as an example). Wherein the passive network compensates for the phase of the current transformer or other type of current sensor.
When S is 1 When the terminal button is connected to GND of the active common mode electromagnetic interference filter, the processing of the secondary signal of the current transformer is achieved through the operational amplifier circuit input by the passive network and the inverting terminal, as shown in fig. 13, where the passive network compensates the phase of the current transformer or other types of current sensors.
6. Sixth embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
Wherein the feed forward signal sampling and processing circuit is the same as in the first embodiment; the feedback signal sampling and processing circuit is the same as in the fourth embodiment; the weighted sum circuit is the same as in the third embodiment; the dc port electrical midpoint generating circuit, the power amplifying circuit, and the output circuit are the same as those in the first to fifth embodiments.
7. Seventh embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
Wherein the feedforward signal sampling and processing circuit is the same as in the second embodiment; the feedback signal sampling and processing circuit is the same as in the fifth embodiment; the weighted sum circuit is the same as in the third embodiment; the dc port electrical midpoint generating circuit, the power amplifying circuit, and the output circuit are the same as those in the first to sixth embodiments.
8. Eighth embodiment
The active common mode electromagnetic interference filter consists of a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit.
Wherein the feedforward signal sampling and processing circuit, the feedback signal sampling and processing circuit, and the weighted summation circuit can be combined with reference to the first to seventh embodiments; the power amplifying circuit and the output circuit are the same as those in the first to seventh embodiments, and will not be described here again.
Further, GND of the active common mode electromagnetic interference filter is a protection ground of the filtered inversion or rectification circuit, and the output circuit couples the output of the active common mode electromagnetic interference filter to an output terminal button of the direct current port electrical midpoint generating circuit in a resistance-capacitance coupling mode.
Wherein, C in the DC port electrical midpoint generating circuit dc1 And C dc2 For two capacitors with the same specification, the positive and negative bus voltages of the direct current ports of the filtered inversion or rectification circuit are averaged to obtain a voltage signal V DCav As shown in fig. 14.
Although embodiments of the present invention have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope of the invention as defined by the appended claims.

Claims (10)

1. An active common mode electromagnetic interference filter, the active common mode electromagnetic interference filter comprising: the device comprises a direct current port electrical midpoint generating circuit, a feedforward signal sampling and processing circuit, a feedback signal sampling and processing circuit, a weighted summation circuit, a power amplifying circuit and an output circuit;
the direct current port electrical midpoint generating circuit is used for acquiring a first voltage value of a filtered circuit, wherein the first voltage value is an average voltage value of a positive bus voltage and a negative bus voltage of the direct current port of the filtered circuit;
the feedforward signal sampling and processing circuit is used for collecting the internal common-mode interference voltage source voltage of the filtered circuit, carrying out signal conditioning on the internal common-mode interference voltage source voltage to obtain a second voltage value, and inputting the second voltage value into the weighted summation circuit;
the feedback signal sampling and processing circuit is used for collecting external output common-mode interference voltage or common-mode interference current of the filtered circuit, carrying out signal conditioning on the external output common-mode interference voltage or the common-mode interference current to obtain a third voltage value, and inputting the third voltage value into the weighted summation circuit;
The weighted summation circuit is used for calculating a fourth voltage value according to the second voltage value and the third voltage value and inputting the fourth voltage value into the power amplification circuit;
the power amplification circuit is used for performing power amplification processing on the fourth voltage value to obtain a fifth voltage value, and feeding back and inputting the fifth voltage value to the output circuit;
the output circuit is used for coupling the fifth voltage value to the first voltage value and completing suppression of common-mode interference voltage emitted by the filtered circuit.
2. The active common mode electromagnetic interference filter of claim 1 wherein the dc port electrical midpoint generating circuit comprises: a first capacitor and a second capacitor connected in series;
the first end button of the first capacitor is connected with the direct current port positive bus of the filtered circuit, the second end button of the first capacitor is connected with the first end button of the second capacitor, and the second end button of the second capacitor is connected with the direct current port negative bus of the filtered circuit.
3. The active common mode electromagnetic interference filter of claim 1 wherein the feed forward signal sampling and processing circuit comprises: the circuit comprises a first sampling link and at least one first operational amplifier circuit, wherein the first sampling link comprises a first resistor-capacitor network.
4. The active common mode electromagnetic interference filter of claim 2 wherein the feedback signal sampling and processing circuit comprises: the second sampling link comprises a second resistance capacitance network or a resistance current transformer network;
when the second sampling link comprises the second resistor-capacitor network and the reference potential of the active common mode electromagnetic interference filter is the first voltage value, a first input end button of the feedback signal sampling and processing circuit is connected with the protection ground of the filtered circuit;
when the second sampling link includes the second resistor-capacitor network and the reference potential of the active common mode electromagnetic interference filter is the protection ground of the filtered circuit, the first input end button of the feedback signal sampling and processing circuit is connected with the output end button of the direct current port electrical midpoint generating circuit, and the output end button of the direct current port electrical midpoint generating circuit is the second end button of the first capacitor.
5. The active common mode electromagnetic interference filter of claim 4 wherein the resistive current transformer network comprises a primary resistive current transformer network and a secondary resistive current transformer network;
When the second sampling link comprises the resistance current transformer network, the secondary resistance current transformer network is used for outputting a voltage signal proportional to a current signal of the filtered circuit, wherein the current signal is the current sum of a positive bus current and a negative bus current of a direct-current port of the filtered circuit;
the positive bus current sampling branch of the primary resistance current transformer network is connected with the direct current port positive bus of the filtered circuit in series through the second input end button and the third input end button of the feedback signal sampling and processing circuit;
and a negative bus current sampling branch of the primary resistance current transformer network is connected with a direct current port negative bus of the filtered circuit in series through a fourth input end button and a fifth input end button of the feedback signal sampling and processing circuit.
6. The active common mode electromagnetic interference filter of claim 1 wherein the weighted sum circuit comprises at least one third operational amplifier circuit, the third operational amplifier circuit being one of an in-phase sum circuit, an anti-phase sum circuit, and an add-subtract circuit.
7. The active common mode electromagnetic interference filter of claim 6, wherein,
When a first weighted phase angle corresponding to a first weighted coefficient of the weighted summation circuit meets a preset first phase angle range and a second weighted phase angle corresponding to a second weighted coefficient of the weighted summation circuit meets the preset first phase angle range, the third operational amplification circuit is the in-phase summation circuit;
when the first weighted phase angle meets a preset second phase angle range and the second weighted phase angle meets the preset second phase angle range, the third operational amplifier circuit is the inverting summing circuit;
the third operational amplifier circuit is the add-subtract operation circuit when the first weighted phase angle satisfies the preset first phase angle range and the second weighted phase angle satisfies the preset second phase angle range, or when the first weighted phase angle satisfies the preset second phase angle range and the second weighted phase angle satisfies the preset first phase angle range.
8. The active common mode electromagnetic interference filter of claim 7, wherein,
when the first weighted phase angle meets the preset first phase angle range and the second weighted phase angle meets the preset second phase angle range, a non-inverting input end branch of an operational amplifier in the addition and subtraction operation circuit is connected with an output end button of the feedforward signal sampling and processing circuit, and an inverting input end branch of the operational amplifier is connected with an output end button of the feedback signal sampling and processing circuit;
When the first weighted phase angle meets the preset second phase angle range and the second weighted phase angle meets the preset first phase angle range, the in-phase input end branch of the operational amplifier is connected with the output end button of the feedback signal sampling and processing circuit, and the inverting input end branch of the operational amplifier is connected with the output end button of the feedforward signal sampling and processing circuit.
9. The active common mode electromagnetic interference filter of claim 1, wherein,
the first input end button of the weighted summation circuit is connected with the output end button of the feedforward signal sampling and processing circuit;
the second input end button of the weighted summation circuit is connected with the output end button of the feedback signal sampling and processing circuit;
and a third input end button of the weighted summation circuit is connected with an output end button of the power amplification circuit.
10. The active common mode electromagnetic interference filter of claim 4 wherein the output circuit comprises at least one third capacitor for blocking a dc voltage between the power amplifying circuit and a protected ground of the filtered circuit;
when the reference potential of the active common mode electromagnetic interference filter is the first voltage value, an output end button of the output circuit is connected with the protection ground of the filtered circuit;
When the reference potential of the active common mode electromagnetic interference filter is the protection ground of the filtered circuit, the output end button of the output circuit is connected with the output end button of the direct current port electrical midpoint generating circuit.
CN202310108498.2A 2023-02-01 2023-02-01 Active common mode electromagnetic interference filter Pending CN116436283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310108498.2A CN116436283A (en) 2023-02-01 2023-02-01 Active common mode electromagnetic interference filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310108498.2A CN116436283A (en) 2023-02-01 2023-02-01 Active common mode electromagnetic interference filter

Publications (1)

Publication Number Publication Date
CN116436283A true CN116436283A (en) 2023-07-14

Family

ID=87080373

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310108498.2A Pending CN116436283A (en) 2023-02-01 2023-02-01 Active common mode electromagnetic interference filter

Country Status (1)

Country Link
CN (1) CN116436283A (en)

Similar Documents

Publication Publication Date Title
CN107209211B (en) electronic integrator for rogowski coil sensors
CN106464125B (en) Active filter device and circuit arrangement including active filter device
EP2724168B1 (en) A noise sensor
TWI597913B (en) Power conversion system and voltage sampling device thereof
EP3502719A1 (en) Household appliance, and arc fault detection device and method therefor
TW200404419A (en) Common-mode signal suppressing circuit and normal-mode signal suppressing circuit
Jiang et al. 11.3 A hybrid multipath CMOS magnetic sensor with 210µTrms resolution and 3MHz bandwidth for contactless current sensing
Casas et al. Basics of analog differential filters
JP2006324651A (en) Shielding method, shielding apparatus, electrical-electronic apparatus
Hsu et al. Design of low-frequency low-pass filters for biomedical applications
Kostov et al. The input impedance of common-mode and differential-mode noise separators
Yuce Voltage-mode multifunction filters employing a single DVCC and grounded capacitors
CN104807537A (en) Noise sensor
US9531341B2 (en) Method and apparatus for converting single-ended signals into differential signals
CN116436283A (en) Active common mode electromagnetic interference filter
KR100465945B1 (en) Protective relay device
CN103247489A (en) Circuit breaker electronic release free of grounding current sampling special instrument transformer
CA2055633C (en) Electrical measuring device having two connection configurations
WO2014096922A1 (en) Zero crossing detector using current mode approach
CN207968438U (en) A kind of filter circuit in micro-current detection
US20070258172A1 (en) Analog ground-interference canceling device
CN114944830B (en) Filter circuit
CN112054773A (en) Amplifying circuit, power analyzer and measuring device
JP7361648B2 (en) magnetic sensor device
WO2024008311A1 (en) Bidirectional active filter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination