CN116404891A - Output voltage-stabilizing and current-limiting loop control circuit of linear direct-current stabilized power supply - Google Patents
Output voltage-stabilizing and current-limiting loop control circuit of linear direct-current stabilized power supply Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0045—Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
A linear direct current stabilized power supply output voltage-stabilizing and current-limiting loop control circuit relates to the electronic circuit field, comprising: the rectifying circuit, the MOS tube Q1, the output energy storage filter circuit, the MOS tube Q2 and the output filter and load circuit are connected in sequence; the feedback control PWM pulse width regulating circuit is connected with the MOS tube Q1 and the MOS tube Q2; an adjustable output voltage stabilizing control loop circuit: the operational amplifier dynamically outputs a fixed driving voltage signal to drive and control the MOS tube Q2, and dynamically maintains the Vds voltage of the MOS tube Q2 to ensure that the output voltage is equal to the output voltage required to be set; output current limit control loop circuit: the operational amplifier outputs high-low level signals to control the MOS transistor Q2 to be turned on and turned off; the invention can solve the defects of large temperature drift, poor precision, high product failure rate and the like of the traditional linear direct current voltage stabilizing output voltage, improves the conversion efficiency of the product and reduces the heat dissipation size of the power device.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a linear direct-current stabilized power supply output voltage-stabilizing and current-limiting loop control circuit.
Background
In the prior art, a loop control circuit for outputting and stabilizing voltage of a linear direct-current stabilized voltage supply is characterized in that an adjustable resistor is adopted for voltage division, the voltage level after the voltage division is compared with the reference voltage of an operational amplifier, and the differential amplified voltage output after the comparison is supplied to the base electrode of a power transistor to control the conduction degree of the transistor, so that the stable output voltage is regulated;
the loop control circuit of the output current limit of the linear direct current stabilized power supply adopts an adjustable resistor to divide the voltage, the divided level is compared with the output current detection voltage input to the operational amplifier, and the high level or the low level output after the comparison controls the turn-off of the power transistor so as to trigger the current limit protection.
The adjustable resistor has the main functions and principles of a current-limiting and voltage-stabilizing loop, but from the aspect of the device performance of the adjustable resistor, the following problems still exist to influence the overall performance of the product.
The method specifically comprises the following steps: 1. the temperature drift characteristics of the adjustable resistor can cause temperature drift of an output voltage value and an output current limiting value, so that the precision is not high; 2. the mechanical characteristics of the adjustable resistor are easy to cause resistance value change, poor contact and service life reduction of the resistor, and the direct-current stabilized power supply is directly influenced by larger output voltage deviation, so that the phenomena of unstable output voltage, no output voltage and the like occur.
In the prior art, a power transistor is mainly adopted in the design of an output voltage stabilizing loop of a linear direct current voltage stabilizing power supply to regulate the output stable voltage. The principle is as follows: the voltage difference between the emitter and the collector of the power transistor is controlled by the base electrode current of the power transistor, so that the aim of regulating and stabilizing the output voltage is fulfilled. The problems are: when the output voltage is low, the heating power consumption of the power transistor working in the linear region is large, so that the power conversion efficiency is reduced, and the product reliability is reduced.
In summary, the design scheme of the output voltage stabilizing and current limiting loop of the linear direct current stabilized power supply in the prior art generally faces the middle-low end market and is applied to the low-power occasions with low power supply quality and low output current. In the application scenario of high power, high quality and high precision power supply requirements, the design scheme of the output voltage stabilizing and current limiting loop and the control mode thereof still need to be reconsidered.
Disclosure of Invention
The invention provides a loop control circuit for output voltage stabilization and current limiting of a linear direct-current stabilized voltage power supply, aiming at solving the problem that the key devices of the loop adopted in the background art have negative influence on the overall performance and the power supply quality of the loop and products and cannot be applied to high-quality power supply application scenes under high power due to the characteristics of the devices of the key devices.
The invention adopts the following technical scheme:
a linear direct current stabilized power supply output voltage stabilizing and current limiting loop control circuit comprises: the feedback control PWM pulse width regulating circuit, the adjustable output voltage stabilizing control loop circuit and the output current limiting control loop circuit;
the rectifying circuit, the MOS tube Q1, the output energy storage filter circuit, the MOS tube Q2 and the output filter and load circuit are connected in sequence;
the rectification circuit is used for coupling rectification of alternating current mains supply and outputting the alternating current mains supply into positive half-wave voltage;
the feedback control PWM pulse width regulating circuit is connected with the MOS tube Q1 and the MOS tube Q2;
an adjustable output voltage stabilizing control loop circuit: the SCM sets a voltage value CV_REF and compares with an output voltage detection value, and the level signal output after comparison is compared with a reference voltage signal, and a fixed driving voltage signal is dynamically output to drive and control the MOS tube Q2 on the serial loop, and the Vds voltage of the MOS tube Q2 is dynamically maintained, so that the output voltage is equal to the output voltage required to be set;
output current limit control loop circuit: the singlechip sets an output current limiting value CC_REF and an output current detection value, compares the level signal output after comparison with a reference voltage signal, and outputs the level signal to control the MOS tube Q2 on the serial circuit to be turned on and off. If the comparison output is high level, the MOS transistor Q2 on the serial circuit is kept on; if the comparison output is low level, the MOS transistor Q2 on the control series circuit is turned off, so that the purpose of limiting the output current is achieved.
Preferably, the rectifying circuit includes a primary winding and a secondary winding of the T1 linear transformer, and a rectifying bridge connected to the secondary winding.
Preferably, the output energy storage filter circuit is a polar capacitor CE1.
Preferably, the output filtering and load circuit includes a polar capacitor CE2, a resistor RS1 and a resistor RS2 connected in parallel, one end of the polar capacitor CE2 is connected to one ends of the resistors RS1 and RS2 connected in parallel, and the other ends of the resistor RS1 and the resistor RS2 connected in parallel and the other end of the polar capacitor CE2 are connected to the load RLOAD1.
Preferably, the specific way of controlling the on and off of the MOS transistor Q2 on the series loop by the output current limiting control loop circuit is that if the output is high level, the MOS transistor Q2 on the series loop is kept on; if the output is low level, the MOS transistor Q2 on the serial circuit is controlled to be turned off, so that the aim of limiting the output current is fulfilled.
Preferably, the feedback control PWM pulse width adjusting circuit includes a PWM controller U1, an operational amplifier U2, and a resistor R3, where an inverting input end of the operational amplifier U2 is connected to a parallel capacitor C2 and a resistor R2 and then connected to a source of the MOS transistor Q2, an non-inverting input end of the operational amplifier U2 is connected to a parallel capacitor C3 and a resistor R4 and then connected to a drain of the MOS transistor Q2, an inverting input end of the operational amplifier U2 is further connected to a parallel capacitor C1 and a resistor R1, an output end of the operational amplifier U2 is connected to the parallel capacitor C1 and the other end of the resistor R1 and then connected to the PWM controller U1, and a DR end of the PWM controller U1 is connected to a gate of the MOS transistor Q1 through the resistor R3.
Preferably, the adjustable output voltage stabilizing control loop circuit comprises an operational amplifier U3, an operational amplifier U4, a singlechip and a resistor R8;
the singlechip is connected with the non-inverting input end of the operational amplifier U3 through a resistor R8, the inverting input end of the operational amplifier U3 is connected with a resistor R6, the other end of the resistor R6 is grounded, the non-inverting input end and the output end of the operational amplifier U3 are connected with a capacitor C5, the output end of the operational amplifier U3 is also connected with a diode D5 and a resistor R7, and the diode D5 and the resistor R7 are connected with a MOS tube Q2 through the resistor R5;
a capacitor C4 and a resistor R9 which are connected in parallel are connected between the inverting input end and the output end of the operational amplifier U4, and the output end of the operational amplifier U4 is connected with the non-inverting input end of the operational amplifier U3 through a resistor R11; the non-inverting input end of the operational amplifier U4 is connected with the resistor R12 and the capacitor C7 which are connected in parallel, the connecting resistor R13 is grounded, and the inverting input end of the operational amplifier U4 is connected with the resistor R10 and the capacitor C6 which are connected in parallel.
Preferably, the output current limiting control loop circuit comprises an operational amplifier U5, an operational amplifier U6 and a singlechip, wherein the singlechip is connected with the non-inverting input end of the operational amplifier U5 through a resistor R18, a resistor R17 and a resistor R16 which are connected in series, a capacitor C8 and a resistor R14 which are connected in series are connected between the inverting input end and the output end of the operational amplifier U5, the inverting input end of the operational amplifier U5 is grounded through a resistor R15, and the output end is connected with a MOS tube Q2 through a diode D6 and a resistor R5;
the inverting input end of the operational amplifier U6 is connected with a capacitor C10 and a resistor R20 which are connected in series, the inverting input end of the operational amplifier U6 is grounded through a resistor R19, the output end of the operational amplifier U6 is connected between a resistor R16 and a resistor R17 through a resistor R21, and the non-inverting input end of the operational amplifier U6 is connected with a resistor R22.
The beneficial effects of the invention are that
1. The invention can effectively solve the defects of large temperature drift, poor precision, high product failure rate and the like of the traditional linear direct current voltage stabilizing output voltage, and can be designed and manufactured into occasions with high precision, stable and reliable output voltage, long service life and higher application requirements;
2. the invention can effectively improve the conversion efficiency of the product, reduce the heat dissipation size of the power device and reduce the size of the product;
3. the invention adopts the output setting mode of the I/O port of the singlechip and does not adopt an adjustable resistor, thus having the advantages of small output voltage temperature drift, high precision, stable output voltage, long service life of products and the like.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the structure of the present invention;
FIG. 2 is a schematic diagram of a rectifying circuit, a MOS transistor Q1, an output energy storage filter circuit, a MOS transistor Q2, an output filter and load circuit, and a feedback control PWM pulse width modulation circuit according to the present invention;
FIG. 3 is a schematic diagram of a circuit configuration of an adjustable output voltage regulation control loop according to the present invention;
FIG. 4 is a schematic diagram of an output current limiting control loop circuit according to the present invention;
the figure shows:
1-a rectifying circuit; 2-MOS transistor Q1; 3-an output tank filter circuit; 4-MOS tube Q2; 5-an output filter and load circuit; 6-feedback control of the PWM pulse width modulation circuit;
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
As shown in figures 1 to 4 of the drawings,
a linear direct current stabilized power supply output voltage stabilizing and current limiting loop control circuit comprises: the feedback control PWM pulse width regulating circuit, the adjustable output voltage stabilizing control loop circuit and the output current limiting control loop circuit;
the rectifying circuit, the MOS tube Q1, the output energy storage filter circuit, the MOS tube Q2 and the output filter and load circuit are connected in sequence;
the rectification circuit comprises a primary winding NP and a secondary winding NS of the T1 linear transformer, and a diode rectification bridge connected with the secondary winding NS;
the alternating current mains supply is input through a primary secondary winding NP, and the secondary winding NS is coupled and rectified through a linear transformer to output positive half-wave voltage.
The feedback control PWM pulse width regulating circuit comprises a PWM controller U1, an operational amplifier U2 and a resistor R3, wherein the inverting input end of the operational amplifier U2 is connected with a capacitor C2 and a resistor R2 which are connected in parallel and then is connected with the source electrode of the MOS tube Q2, the non-inverting input end of the operational amplifier U2 is connected with the capacitor C3 and the resistor R4 which are connected in parallel and then is connected with the drain electrode of the MOS tube Q2, the inverting input end of the operational amplifier U2 is also connected with the capacitor C1 and the resistor R1 which are connected in parallel, the output end of the operational amplifier U2 is connected with the other end of the capacitor C1 and the resistor R1 which are connected in parallel and then is connected with the PWM controller U1, and the DR end of the PWM controller U1 is connected with the grid electrode of the MOS tube Q1 through the resistor R3.
The output energy storage filter circuit is a polar capacitor CE1, one end of the polar capacitor CE1 is connected between the source electrode of the MOS tube Q1 and the drain electrode of the MOS tube Q2, and the other end of the polar capacitor CE1 is connected with the diode rectifier bridge and the load RLOAD1.
The output filtering and load circuit comprises a polar capacitor CE2, a resistor RS1 and a resistor RS2 which are connected in parallel, one end of the polar capacitor CE2 is connected with one ends of the resistors RS1 and RS2 which are connected in parallel, and the other ends of the resistors RS1 and RS2 which are connected in parallel are connected with a load RLOAD1.
The adjustable output voltage stabilizing control loop circuit comprises an operational amplifier U3, an operational amplifier U4, a singlechip and a resistor R8;
the singlechip is connected with the non-inverting input end of the operational amplifier through a resistor R8, the inverting input end of the operational amplifier U3 is connected with a resistor R6, the other end of the resistor R6 is grounded, the non-inverting input end and the output end of the operational amplifier U3 are connected with a capacitor C5, the output end of the operational amplifier U3 is also connected with the cathode of a diode D5, the anode of the diode D5 is connected with a resistor R7, and the anode of the diode D5 is simultaneously connected with the source electrode of a MOS tube Q2 and the anode of the diode D6;
a capacitor C4 and a resistor R9 which are connected in parallel are connected between the inverting input end and the output end of the operational amplifier U4, and the output end of the operational amplifier U4 is connected with the non-inverting input end of the operational amplifier U3 through a resistor R11; the non-inverting input end of the operational amplifier U4 is connected with the resistor R12 and the capacitor C7 which are connected in parallel, the connecting resistor R13 is grounded, and the inverting input end of the operational amplifier U4 is connected with the resistor R10 and the capacitor C6 which are connected in parallel.
Comparing the set voltage value CV_REF (shown as a point A in fig. 3) with the output voltage detection value (shown as a point C in fig. 3), comparing the level signal (shown as a point B in fig. 3) output after comparison with the reference voltage signal (shown as a point D in fig. 3), dynamically outputting a fixed driving voltage signal (shown as a point E in fig. 3) to drive and control the MOS tube Q2 on the serial circuit, and dynamically maintaining the Vds voltage of the MOS tube Q2 to ensure that the output voltage is equal to the output voltage required to be set;
the working principle of the adjustable output voltage stabilizing control loop circuit is as follows:
the alternating current mains supply is input through a primary winding NP of a T1 linear transformer, a secondary winding NS is coupled and rectified through a linear transformer to output positive half-wave voltage, after the singlechip is electrified, an I/O port of the singlechip outputs a voltage setting value CV_REF, the setting value CV_REF is positive, the voltage is divided by a resistor R8 and a resistor R11 and then is input to a non-inverting input end of an operational amplifier U3, meanwhile, the voltage vo+ of the positive end (serving as a logic ground PGD) is input to an inverting input end of the operational amplifier U4 through a resistor R10 and a capacitor C6, the negative voltage Vo-of the output voltage is divided by a resistor R12, a capacitor C7 and a resistor R13 and then is input to the non-inverting input end of the operational amplifier U4, since the input voltage at the inverting input terminal of the operational amplifier U4 is the positive terminal voltage vo+ (as the logic ground PGD), the input voltage at the non-inverting input terminal of the operational amplifier U4 is the divided voltage between the positive terminal voltage vo+ and the negative terminal voltage Vo-, and the divided voltage is always lower than the positive terminal voltage vo+, so that the output voltage at the output terminal of the operational amplifier U4 is a differentially amplified value, which is a negative voltage, which is inputted to the non-inverting input terminal of the operational amplifier U3 after being divided by the cv_ref positive voltage applied to the resistor R8 through the resistor R11, the non-inverting input terminal of the operational amplifier U3 inputs the logic ground voltage, and the non-inverting input terminal of the operational amplifier U3 are compared:
1) When the voltage of the non-inverting input end of the operational amplifier U3 is equal to the logic ground voltage of the inverting input end, the output voltage of the power supply is equal to the set voltage, the output end of the operational amplifier U3 outputs a stable output voltage of about 2.3V, the voltage is connected with the cathode of the diode D5, the voltage of the anode of the diode D5 is kept at the stable voltage of about 3V, the stable voltage drives the MOS tube Q2 on the serial power circuit, because the MOS tube Q2 works in a linear region, when the Vgs of the MOS tube Q2 is fixed, the voltage of DeltaV=Vds is also kept constant, and the output voltage is kept stable;
2) When the voltage of the non-inverting input end of the operational amplifier U3 is lower than the logic ground voltage of the inverting input end, the output voltage of the power supply is higher than the set voltage, the output end of the operational amplifier U3 outputs a low level, the low level is connected with the cathode of the diode D5, the anode of the diode D5 is embedded at the low level, the MOS tube Q2 on the serial power circuit is turned off by the low level, the output voltage is reduced, and the output voltage is kept stable;
3) When the voltage of the non-inverting input end of the operational amplifier U3 is higher than the logic ground voltage of the inverting input end, the output voltage of the power supply is lower than the set voltage, the output end of the operational amplifier U3 outputs a high level, the high level is connected with the cathode of the diode D5, the anode of the diode D5 is not embedded, the working voltage of the positive power VCC end of the operational amplifier U3 drives and starts the MOS tube Q2 on the serial power loop through the resistor R7 and the resistor R5, so that the output voltage is increased, and the output voltage is kept stable;
the input end of the MOS tube Q1 on the series power circuit is rectified steamed bread wave voltage, energy is not stored through a filter capacitor, PWM (pulse width modulation) working at power frequency of 100HZ is turned on and off, PWM pulse width is dynamically adjusted, when direct current output voltage needs to be reduced, the Vds voltage of the MOS tube Q2 on the series power circuit is kept stable, at the moment, the on pulse width of the MOS tube Q1 on the series power circuit is narrowed, and the direct current output voltage reaches the set voltage; and vice versa.
The output current limiting control loop circuit comprises an operational amplifier U5, an operational amplifier U6 and a singlechip, wherein the singlechip is connected with the non-inverting input end of the operational amplifier U5 through a resistor R18, a resistor R17 and a resistor R16 which are connected in series, a capacitor C8 and a resistor R14 which are connected in series are connected between the inverting input end and the output end of the operational amplifier U5, the inverting input end of the operational amplifier U5 is grounded through a resistor R15, and the output end is connected with a MOS tube Q2 through a diode D6;
the inverting input end of the operational amplifier U6 is connected with a capacitor C10 and a resistor R20 which are connected in series, the inverting input end of the operational amplifier U6 is grounded through a resistor R19, the output end of the operational amplifier U6 is connected between a resistor R16 and a resistor R17 through a resistor R21, and the non-inverting input end of the operational amplifier U6 is connected with a resistor R22.
The singlechip sets an output current limiting value CC_REF (shown as a point A ' in fig. 4) and an output current detection value (shown as a point C ' in fig. 4), and the level signal (shown as a point B ' in fig. 4) and the reference voltage signal (shown as a point D ' in fig. 4) which are output after comparison are compared and output, and the output high-low level signal (shown as a point E ' in the fig. 4) controls the on and off of the MOS tube Q2 on the serial circuit. If the comparison output is high level, the MOS transistor Q2 on the serial circuit is kept on; if the comparison output is low level, the MOS transistor Q2 on the control series circuit is turned off, so that the purpose of limiting the output current is achieved.
The working principle of the output current limiting control loop circuit is as follows:
the alternating current mains supply is input through a primary winding NP of a T1 linear transformer, a secondary winding NS is coupled and rectified through a linear transformer to output positive half-wave voltage, the output voltage of the linear direct current stabilized power supply is normally output according to the set output voltage and is supplied to a load RLOAD1 for use, at the moment, current flowing through the load RLOAD1 also flows through a current detection resistor RS1 and a resistor RS2 at the same time, voltages are generated at two ends of the resistor RS1 and the resistor RS2, the generated current detection positive voltage (logic ground level) is supplied to an inverting input end of an operational amplifier U6, the generated current detection negative voltage vo+ is supplied to a non-inverting input end of the operational amplifier U6, the voltage of the non-inverting input end is lower than the voltage of the inverting input end and is output through an output end of the operational amplifier U6, a current limiting point positive voltage CC_REF is set to be divided by a resistor R18, a resistor R17 and a resistor R21 and the output negative voltage of the output end of the operational amplifier U6, and the divided signal is logically compared with the inverting input end of the operational amplifier U5 through a resistor R16 and the logic ground level:
1) When the voltage of the non-inverting input end of the operational amplifier U5 is higher than the voltage of the inverting input end of the operational amplifier U5, the output end of the operational amplifier U5 outputs a high level, the output end of the operational amplifier U5 is connected with the diode cathode D6, the anode of the diode D6 is not embedded to a low level, the MOS tube Q2 on the serial power circuit is normally opened to work, the working current of the load RLOAD1 does not trigger a current limiting protection value, and the power supply normally works;
2) When the voltage of the non-inverting input end of the operational amplifier U5 is lower than the voltage of the inverting input end of the operational amplifier U5, the output end of the operational amplifier U5 outputs a low level, the output end of the operational amplifier U5 is connected with the cathode of the diode D6, the anode of the diode D6 is embedded to a low level, the MOS tube Q2 on the series power circuit is turned off, the working current of the load RLOAD1 triggers a current limiting protection value, and the power supply is turned off;
the present invention is not limited to the above-mentioned embodiments, but is intended to be limited to the following embodiments, and any modifications, equivalents and modifications can be made to the above-mentioned embodiments without departing from the scope of the invention.
Claims (8)
1. The utility model provides a linear direct current regulated power supply output steady voltage, current limiting loop control circuit which characterized in that includes: the feedback control PWM pulse width regulating circuit, the adjustable output voltage stabilizing control loop circuit and the output current limiting control loop circuit;
the rectifying circuit, the MOS tube Q1, the output energy storage filter circuit, the MOS tube Q2 and the output filter and load circuit are connected in sequence;
the rectification circuit is used for coupling rectification of alternating current mains supply and outputting the alternating current mains supply into positive half-wave voltage;
the feedback control PWM pulse width regulating circuit is connected with the MOS tube Q1 and the MOS tube Q2;
an adjustable output voltage stabilizing control loop circuit: the operational amplifier dynamically outputs a fixed driving voltage signal to drive the MOS tube Q2 on the control series circuit, and dynamically maintains the Vds voltage of the MOS tube Q2 to ensure that the output voltage is equal to the output voltage required to be set;
output current limit control loop circuit: the operational amplifier outputs high and low level signals to control the MOS transistor Q2 on the serial circuit to be turned on and off.
2. The circuit of claim 1, wherein the rectifier circuit comprises a primary winding and a secondary winding of a T1 linear transformer, and a rectifier bridge connected to the secondary winding.
3. The circuit of claim 1, wherein the output energy storage filter circuit is a polar capacitor CE1.
4. The circuit of claim 1, wherein the output filter and load circuit comprises a polar capacitor CE2, a resistor RS1 and a resistor RS2 connected in parallel, one end of the polar capacitor CE2 is connected to one end of the parallel resistors RS1 and RS2, the other ends of the parallel resistors RS1 and RS2 and the other end of the polar capacitor CE2 are connected to the load RLOAD1.
5. The circuit according to claim 1, wherein the output current limiting control loop circuit controls the on and off of the MOS transistor Q2 in the series loop in such a way that if the output current limiting control loop circuit outputs a high level, the MOS transistor Q2 in the series loop is maintained on; and if the output current limiting control loop circuit outputs low level, controlling the MOS tube Q2 on the series loop to be turned off.
6. The circuit for controlling the output voltage stabilizing and current limiting loop of the linear direct current stabilized power supply according to claim 1, wherein the feedback control PWM pulse width regulating circuit comprises a PWM controller U1, an operational amplifier U2 and a resistor R3, wherein an inverting input end of the operational amplifier U2 is connected with a capacitor C2 and a resistor R2 which are connected in parallel and then is connected with a source electrode of a MOS tube Q2, a non-inverting input end of the operational amplifier U2 is connected with a capacitor C3 and a resistor R4 which are connected in parallel and then is connected with a drain electrode of the MOS tube Q2, an inverting input end of the operational amplifier U2 is also connected with a capacitor C1 and a resistor R1 which are connected in parallel, an output end of the operational amplifier U2 is connected with the other end of the capacitor C1 and the resistor R1 which are connected in parallel and then is connected with the PWM controller U1, and a DR end of the PWM controller U1 is connected with a grid electrode of the MOS tube Q1 through the resistor R3.
7. The circuit for controlling the output voltage stabilizing and current limiting loop of the linear direct current stabilized power supply according to claim 1, wherein the circuit for controlling the output voltage stabilizing and current limiting loop comprises an operational amplifier U3, an operational amplifier U4, a singlechip and a resistor R8;
the singlechip is connected with the non-inverting input end of the operational amplifier U3 through a resistor R8, the inverting input end of the operational amplifier U3 is connected with a resistor R6, the other end of the resistor R6 is grounded, the non-inverting input end and the output end of the operational amplifier U3 are connected with a capacitor C5, the output end of the operational amplifier U3 is also connected with a diode D5 and a resistor R7, and the diode D5 and the resistor R7 are connected with a MOS tube Q2 through the resistor R5;
a capacitor C4 and a resistor R9 which are connected in parallel are connected between the inverting input end and the output end of the operational amplifier U4, and the output end of the operational amplifier U4 is connected with the non-inverting input end of the operational amplifier U3 through a resistor R11; the non-inverting input end of the operational amplifier U4 is connected with the resistor R12 and the capacitor C7 which are connected in parallel, the connecting resistor R13 is grounded, and the inverting input end of the operational amplifier U4 is connected with the resistor R10 and the capacitor C6 which are connected in parallel.
8. The linear direct current stabilized power supply output voltage stabilizing and current limiting loop control circuit according to claim 1, wherein the output current limiting control loop circuit comprises an operational amplifier U5, an operational amplifier U6 and a singlechip, wherein the singlechip is connected with a non-inverting input end of the operational amplifier U5 through a resistor R18, a resistor R17 and a resistor R16 which are connected in series, a capacitor C8 and a resistor R14 which are connected in series are connected between an inverting input end and an output end of the operational amplifier U5, the inverting input end of the operational amplifier U5 is grounded through a resistor R15, and the output end is connected with a MOS tube Q2 through a diode D6 and a resistor R5;
the inverting input end of the operational amplifier U6 is connected with a capacitor C10 and a resistor R20 which are connected in series, the inverting input end of the operational amplifier U6 is grounded through a resistor R19, the output end of the operational amplifier U6 is connected between a resistor R16 and a resistor R17 through a resistor R21, and the non-inverting input end of the operational amplifier U6 is connected with a resistor R22.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310446741.1A CN116404891A (en) | 2023-04-24 | 2023-04-24 | Output voltage-stabilizing and current-limiting loop control circuit of linear direct-current stabilized power supply |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310446741.1A CN116404891A (en) | 2023-04-24 | 2023-04-24 | Output voltage-stabilizing and current-limiting loop control circuit of linear direct-current stabilized power supply |
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| CN116404891A true CN116404891A (en) | 2023-07-07 |
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| CN202310446741.1A Pending CN116404891A (en) | 2023-04-24 | 2023-04-24 | Output voltage-stabilizing and current-limiting loop control circuit of linear direct-current stabilized power supply |
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| EP1318443A1 (en) * | 2001-12-10 | 2003-06-11 | Finmek Magneti Marelli Sistemi Elettronici S.p.A. | A voltage follower circuit and voltage regulator including said circuit |
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| CN106712516A (en) * | 2017-02-17 | 2017-05-24 | 西安科技大学 | Two-stage voltage stabilization regulating circuit and voltage stabilization method and design method thereof |
| CN218771776U (en) * | 2022-09-29 | 2023-03-28 | 广东沐光智能照明有限公司 | Linear voltage reduction circuit and electronic equipment |
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| EP1318443A1 (en) * | 2001-12-10 | 2003-06-11 | Finmek Magneti Marelli Sistemi Elettronici S.p.A. | A voltage follower circuit and voltage regulator including said circuit |
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| CN106712516A (en) * | 2017-02-17 | 2017-05-24 | 西安科技大学 | Two-stage voltage stabilization regulating circuit and voltage stabilization method and design method thereof |
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