CN116387196A - Wafer processing method and device, electronic equipment and storage medium - Google Patents
Wafer processing method and device, electronic equipment and storage medium Download PDFInfo
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
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Abstract
The application provides a processing method and device of a wafer, electronic equipment and a storage medium, wherein the processing method of the wafer comprises the following steps: acquiring wafer to-be-processed items of each batch corresponding to a target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set; for any target processing machine in the processing machine set, determining at least one candidate wafer to-be-processed item corresponding to the target processing machine from wafer processing flows of all batches in a target area, and determining candidate wafers of batches corresponding to the candidate wafer to-be-processed item from a preset wafer batch assembly box; and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule. According to the wafer processing method and device, the processing accuracy of the wafer is improved, and meanwhile, efficient processing production can be carried out on wafer chips in different batches according to the requirements of actual production operation.
Description
Technical Field
The present disclosure relates to the field of wafer production technologies, and in particular, to a wafer processing method, a device, an electronic apparatus, and a storage medium.
Background
It is found that, in the chip manufacturing process, the wafer-to-chip corresponding process flow of each lot is not completely the same, and therefore, a lot of wafers need to be processed according to the corresponding process flow, however, the conventional wafer processing method that a lot of wafers are manually carried one lot at a time to process the wafer by machine is low in efficiency, so that a wafer lot assembly box containing a plurality of lots of wafers is used in the market to manufacture and process the wafer, however, in the conventional wafer-to-chip manufacturing process, when the wafers of a plurality of lots need to be processed in the same machine, the wafer lot assembly box is manually sent to the processing port of the machine by an operator, so that although the wafers of a plurality of lots can be processed uniformly, the wafer lot assembly box does not need to be processed in the current process, the processing accuracy of the wafers of the machine cannot be ensured, and the processing efficiency of the wafer chips of different lots is low.
And the traditional processing method for manually carrying the wafers cannot remove chips which do not need to be processed on the current machine in the preset wafer batch assembly box.
Disclosure of Invention
In view of the foregoing, an object of the present application is to provide a wafer processing method, apparatus, electronic device, and storage medium, which can improve the accuracy of wafer processing and can efficiently process and produce wafer chips of different batches according to the requirements of actual production operations.
The embodiment of the application provides a processing method of a wafer, which comprises the following steps:
acquiring wafer to-be-processed items of each batch corresponding to a target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set;
for any target processing machine in the processing machine set, determining at least one candidate wafer to-be-processed item corresponding to the target processing machine from the wafer processing flow of each batch in the target area, and determining a candidate wafer of a batch corresponding to the candidate wafer to-be-processed item from a preset wafer batch assembly box;
and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish the processing of the candidate wafers of each batch by the target processing machine in the target area.
Further, the determining, from a preset wafer lot assembly box, the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item includes:
determining preset wafer to-be-processed items corresponding to wafers in each batch in a preset wafer batch assembly box;
judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items or not;
and if the candidate wafers exist, determining the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item.
Further, the preset priority control rule includes a preset project time control rule and a preset order importance rule, and the determining, based on the preset priority control rule, a target processing sequence of the target processing machine on each candidate wafer to-be-processed project includes:
determining a first processing sequence of the target processing machine for each candidate wafer to-be-processed item according to a preset item time clamping rule;
determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance rule;
and according to a preset weight proportion, performing weight calculation on the first processing sequence and the second processing sequence, and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item.
Further, the preset order importance rule includes a preset order delivery period, a preset order quality inspection requirement and a preset order processing cost, and the determining, according to the preset order importance rule, the second processing order of the target processing machine to each candidate wafer to be processed includes:
and sequencing all the candidate wafer to-be-processed items in sequence according to the preset order processing cost, the preset order delivery cycle and the preset order quality inspection requirement, and determining a second processing sequence of the target processing machine for all the candidate wafer to-be-processed items.
Further, the processing flows of the to-be-processed items of the wafers are different, and any two processing flows correspond to different processing machine sets.
The embodiment of the application also provides a processing device of wafer, the processing device of wafer includes:
the acquisition module is used for acquiring wafer to-be-processed items of each batch corresponding to the target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set;
a first determining module, configured to determine, for any target processing machine in the processing machine set, at least one candidate wafer to be processed item corresponding to the target processing machine from the wafer processing flows of each lot in the target area, and determine a candidate wafer of a lot corresponding to the candidate wafer to be processed item from a preset wafer lot assembly box;
and the second determining module is used for determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish the processing of the candidate wafers of each batch by the target processing machine in the target area.
Further, the first determining module is specifically configured to:
determining preset wafer to-be-processed items corresponding to wafers in each batch in a preset wafer batch assembly box;
judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items or not;
and if the candidate wafers exist, determining the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item.
Further, the preset priority card control rule includes a preset project time card control rule and a preset order importance rule, and the second determining module is specifically configured to:
determining a first processing sequence of the target processing machine for each candidate wafer to-be-processed item according to a preset item time clamping rule;
determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance rule;
and according to a preset weight proportion, performing weight calculation on the first processing sequence and the second processing sequence, and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item.
The embodiment of the application also provides electronic equipment, which comprises: the processing device comprises a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, when the electronic device is running, the processor and the memory are communicated through the bus, and the machine-readable instructions are executed by the processor to execute the steps of the processing method of the wafer.
Embodiments of the present application also provide a computer-readable storage medium having a computer program stored thereon, which when executed by a processor performs the steps of a wafer processing method as described above.
Compared with the wafer processing method in the prior art, the wafer processing method, the device, the electronic equipment and the storage medium provided by the embodiment of the invention have the advantages that the wafer processing items of each batch corresponding to the target area are obtained, each batch of wafer processing items comprises a wafer processing flow and a wafer processing machine set, at least one candidate wafer processing item corresponding to the target processing machine is determined from the wafer processing flow of each batch in the target area aiming at any target processing machine, the candidate wafers of the batch corresponding to the candidate wafer processing item is determined from the preset wafer batch assembly box, the target processing sequence of each candidate wafer processing item by the target processing machine is determined based on the preset priority clamping rule, and the wafer processing accuracy is improved, and meanwhile, the wafer chips of different batches can be processed and produced efficiently according to the requirement of actual production operation.
In order to make the above objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows one of flowcharts of a wafer processing method according to an embodiment of the present application;
FIG. 2 is a flow chart showing a second method for processing a wafer according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a processing apparatus for wafers according to an embodiment of the present disclosure;
fig. 4 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
In the figure:
300-a processing device of a wafer; 310-an acquisition module; 320-a first determination module; 330-a second determination module; 400-an electronic device; 410-a processor; 420-memory; 430-bus.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. Based on the embodiments of the present application, every other embodiment that a person skilled in the art would obtain without making any inventive effort is within the scope of protection of the present application.
First, application scenarios applicable to the present application will be described. The method and the device can be applied to the technical field of wafer production.
It is found that, in the chip manufacturing process, the wafer-to-chip corresponding process flow of each lot is not completely the same, and therefore, a lot of wafers need to be processed according to the corresponding process flow, however, the conventional wafer processing method that a lot of wafers are manually carried one lot at a time to process the wafer by machine is low in efficiency, so that a wafer lot assembly box containing a plurality of lots of wafers is used in the market to manufacture and process the wafer, however, in the conventional wafer-to-chip manufacturing process, when the wafers of a plurality of lots need to be processed in the same machine, the wafer lot assembly box is manually sent to the processing port of the machine by an operator, so that although the wafers of a plurality of lots can be processed uniformly, the wafer lot assembly box does not need to be processed in the current process, the processing accuracy of the wafers of the machine cannot be ensured, and the processing efficiency of the wafer chips of different lots is low.
And the traditional processing method for manually carrying the wafers cannot remove chips which do not need to be processed on the current machine in the preset wafer batch assembly box.
Based on this, the embodiment of the application provides a processing method, a device, an electronic device and a storage medium for a wafer, which can improve the processing accuracy of the wafer and can perform efficient processing production on wafer chips in different batches according to the requirements of actual production operation.
Referring to fig. 1, fig. 1 is a flowchart of a processing method of a wafer according to an embodiment of the present application. As shown in fig. 1, the processing method of a wafer provided in the embodiment of the present application includes the following steps:
s101, obtaining wafer to-be-processed items of each batch corresponding to a target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set.
In this step, during the process of processing the wafers of each batch, a working scenario of working by a plurality of working machines is involved, and there are a plurality of areas to be processed for the wafers of each batch in the working scenario.
After the target area is determined, the wafer to-be-processed items of the corresponding batches in the target area are obtained, and the wafer processing flow and the wafer processing machine set in the wafer to-be-processed items of each batch are determined.
The target area comprises a plurality of batches of wafer to-be-processed items, and each batch of wafer to-be-processed items is processed by at least one wafer processing machine.
Thus, the processing machine provided by the application can be specifically machine equipment corresponding to the processing links involved in the traditional wafer processing flow.
Optionally, the processing flows of the items to be processed of the wafers are different, and any two processing flows correspond to different processing machine sets.
In this step, because the wafer lots corresponding to each wafer to-be-processed project are different, manufacturers, quality inspection requirements and production funds corresponding to each wafer to-be-processed project are different, so that the number of corresponding processing flows and processing machine sets of the wafer to-be-processed projects in different lots are different.
S102, determining at least one candidate wafer to-be-processed item corresponding to any target processing machine in the processing machine set from the wafer processing flow of each batch in the target area, and determining a candidate wafer of a batch corresponding to the candidate wafer to-be-processed item from a preset wafer batch assembly box.
In the step, after specific processing information of wafer to-be-processed items of each batch is acquired, at least one candidate wafer to-be-processed item matched with the target processing machine is found out from the wafer processing flow of each batch (i.e. the target processing machine can be used for processing the wafer to-be-processed item of each batch), and after at least one candidate wafer to-be-processed item matched with the target processing machine is determined, candidate wafers of the batch corresponding to the candidate wafer to-be-processed item are determined from a preset wafer batch assembly box.
The preset wafer lot assembly boxes are assembled with at least one lot of wafer to-be-processed items, the number of the preset wafer lot assembly boxes in the embodiment provided by the application is at least one, and the specification and the capacity of the preset wafer lot assembly boxes can be configured in a self-defined mode according to different application scenes.
Optionally, the step S102 includes the following substeps:
substep 1021, determining preset wafer to-be-processed items corresponding to wafers of each lot in the preset wafer lot assembly box.
And 1022, judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items.
Substep 1023, if yes, determining a lot of candidate wafers corresponding to the candidate wafer to be processed item.
In the step, if the wafer is not present, a new preset wafer batch assembly box is replaced again for judgment, or a new target processing machine in a new processing machine set is switched for judgment.
S103, determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish the processing of the candidate wafers of each batch by the target processing machine in the target area.
In this step, the processing method for the wafer in the embodiment provided by the application is realized based on a fully automatic workbench, no manual handling and processing of operators or staff are needed, and the preset priority clamping control rule in the embodiment provided by the application is related to the clamping control time between any two processing steps corresponding to the processing flows of the wafer to be processed projects of different batches.
In this way, based on the preset priority clamping rules determined by the clamping time between any two processing steps corresponding to the processing flows of the wafer to-be-processed items of different batches, the real-time dispatching system (Real Time Dispatch System, RTD) determines the target processing sequence of each candidate wafer to-be-processed item, and after determining the target processing sequence of each candidate wafer to-be-processed item, the corresponding target processing machine is used for processing the candidate wafers of each batch according to the target processing sequence, and for other candidate wafer to-be-processed items and other candidate wafers which are in the same preset wafer batch assembly box and are irrelevant to the target processing machine, the target processing machine can not perform corresponding processing treatment, and can be directly removed, so that the accuracy and the high efficiency of wafer processing are ensured.
Compared with the wafer processing method in the prior art, the wafer processing method provided by the embodiment of the invention has the advantages that the wafer processing items of each batch corresponding to the target area are obtained, each batch of wafer processing items comprises a wafer processing flow and a wafer processing machine set, at least one candidate wafer processing item corresponding to the target processing machine is determined from the wafer processing flow of each batch in the target area aiming at any target processing machine, the candidate wafers of the batch corresponding to the candidate wafer processing item are determined from the preset wafer batch assembly box, and the target processing sequence of each candidate wafer processing item by the target processing machine is determined based on the preset priority clamping control rule.
Referring to fig. 2, fig. 2 is a second flowchart of a wafer processing method according to the present application. As shown in fig. 2, the processing method of the wafer provided in the embodiment of the application includes the following steps:
s201, obtaining wafer to-be-processed items of each batch corresponding to a target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set.
S202, determining at least one candidate wafer to-be-processed item corresponding to a target processing machine from the wafer processing flow of each batch in the target area aiming at any target processing machine in the processing machine set, and determining a candidate wafer of a batch corresponding to the candidate wafer to-be-processed item from a preset wafer batch assembly box.
S203, determining a target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish processing of the candidate wafers of each batch by the target processing machine in the target area.
S204, determining a first processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset item time clamping rule.
In the step, the priority of the candidate wafer to-be-processed item is determined according to a preset item time clamping rule in a preset priority clamping rule, wherein the shorter the preset item time clamping rule, the higher the priority of the candidate wafer to-be-processed item is, then the priority of each candidate wafer to-be-processed item is arranged according to the sequence from high to low, and the arranged priority sequence is determined as the first processing sequence of the target processing machine for each candidate wafer to-be-processed item.
Here, the method for determining the priority of the candidate wafer to-be-processed item in the embodiment provided in the application is not unique.
S205, determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance degree rule.
In the step, the priority of the candidate wafer to-be-processed items is determined according to a preset order importance rule in a preset priority control rule, wherein the higher the importance of the preset item is, the higher the priority of the candidate wafer to-be-processed items is, then the priority of each candidate wafer to-be-processed item is arranged according to the order from small to large, and the arranged priority order is determined as a second processing order of the target processing machine for each candidate wafer to-be-processed item.
Wherein the preset order importance rule includes a preset order delivery period, a preset order quality inspection requirement and a preset order processing cost, and the step S205 includes the following sub-steps:
and step 2051, sequencing the candidate wafer to-be-processed items according to the preset order processing cost, the preset order delivery period and the preset order quality inspection requirement in sequence, and determining a second processing sequence of the target processing machine for the candidate wafer to-be-processed items.
In this step, the embodiment provided in the present application firstly ranks several factors of the preset order importance rule, where a specific ranking rule may specifically, but not limited to, that the priority of the preset order processing cost is greater than the priority of the preset order lead time and greater than the priority of the preset order quality inspection requirement, and then performs weighted average on the three factors, so as to determine the second processing sequence of the target processing machine on the candidate wafer to be processed.
And S206, calculating weights of the first processing sequence and the second processing sequence according to a preset weight proportion, and determining target processing sequences of the target processing machine on the candidate wafer to-be-processed items.
In this step, after the first processing sequence and the second processing sequence are determined, each candidate wafer to-be-processed item has two processing sequences, so that weight calculation needs to be performed on the first processing sequence and the second processing sequence, thereby determining the target processing sequence of each candidate wafer to-be-processed item by the target processing machine.
Here, the weight calculation in the embodiment provided in the present application may be specifically but not limited to the weight coefficient for the first processing order and the weight coefficient for the second processing order being 0.5.
When the embodiment provided by the application is used for converting the processing of the wafer from semi-automatic production to full-automatic production, as the conversion and adjustment are required to be carried out on all the wafer processing machines involved in the wafer production line one by one, the adjustment and conversion process may last for 1-2 years, but in the process, the processing of the wafer by the production line is stopped differently, so that a part of the wafer processing machines are fully-automatically processed according to the preset priority clamping rule in the production line, and a part of the wafer processing machines are still manually operated by operators, the problem that the wafer processing machines operated by the operators and the full-automatic processing machines mutually affect and mutually occupy each other occurs, and at this time, the switch setting is required to be carried out on the involved target processing machines for switching the semi-automatic and full-automatic target processing machines.
Thus, the switch in the embodiments provided herein may be specifically configured to: select_foup_all_lot_yn), and the semi-automatic target process tool may be specifically: a target processing tool with select_foup_all_lot_yn N; the full-automatic target processing machine station may specifically be: select_foup_all_lot_yn is a target process tool for Y.
The descriptions of S201 to S203 may refer to the descriptions of S101 to S103, and the same technical effects can be achieved, which will not be described in detail.
Compared with the wafer processing method in the prior art, the wafer processing method provided by the embodiment of the invention has the advantages that the wafer processing items of each batch corresponding to the target area are obtained, each batch of wafer processing items comprises a wafer processing flow and a wafer processing machine set, at least one candidate wafer processing item corresponding to the target processing machine is determined from the wafer processing flow of each batch in the target area aiming at any target processing machine, the candidate wafers of the batch corresponding to the candidate wafer processing item are determined from the preset wafer batch assembly box, and the target processing sequence of each candidate wafer processing item by the target processing machine is determined based on the preset priority clamping control rule.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a processing apparatus for wafers according to an embodiment of the present disclosure. As shown in fig. 3, the wafer processing apparatus 300 includes:
the obtaining module 310 is configured to obtain wafer to-be-processed items of each lot corresponding to the target area, where the wafer to-be-processed items of each lot include a wafer processing flow and a wafer processing machine set.
The first determining module 320 is configured to determine, for any target processing tool in the set of processing tools, at least one candidate wafer to be processed item corresponding to the target processing tool from the wafer processing flows of each lot in the target area, and determine a candidate wafer of a lot corresponding to the candidate wafer to be processed item from a preset wafer lot assembly box.
Optionally, the first determining module 320 is specifically configured to:
and determining preset wafer to-be-processed items corresponding to the wafers in each batch in the preset wafer batch assembly box.
And judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items.
And if the candidate wafers exist, determining the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item.
And a second determining module 330, configured to determine, based on a preset priority control rule, a target processing order of the target processing machine on each candidate wafer to be processed item, so as to complete processing of the candidate wafers of each lot by the target processing machine in the target area.
The preset priority card control rule includes a preset project time card control rule and a preset order importance rule, and the second determining module 330 is specifically configured to:
optionally, determining a first processing sequence of the target processing machine on each candidate wafer to be processed item according to a preset item time clamping rule.
And determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance degree rule.
And according to a preset weight proportion, performing weight calculation on the first processing sequence and the second processing sequence, and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item.
Optionally, the preset order importance rule includes a preset order delivery period, a preset order quality inspection requirement and a preset order processing cost, and the determining, according to the preset order importance rule, the second processing order of the target processing machine to each candidate wafer to be processed includes:
and sequencing all the candidate wafer to-be-processed items in sequence according to the preset order processing cost, the preset order delivery cycle and the preset order quality inspection requirement, and determining a second processing sequence of the target processing machine for all the candidate wafer to-be-processed items.
Optionally, the processing flows of the items to be processed of the wafers are different, and any two processing flows correspond to different processing machine sets.
Compared with the wafer processing method in the prior art, the wafer processing device 300 provided in the embodiment of the present application, by acquiring the wafer processing items of each batch corresponding to the target area, the wafer processing items of each batch include a wafer processing flow and a wafer processing machine set, and for any target processing machine, at least one candidate wafer processing item corresponding to the target processing machine is determined from the wafer processing flow of each batch in the target area, and the candidate wafers of the batch corresponding to the candidate wafer processing item are determined from the preset wafer batch assembly box, and the target processing sequence of each candidate wafer processing item by the target processing machine is determined based on the preset priority clamping rule.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 4, the electronic device 400 includes a processor 410, a memory 420, and a bus 430.
The memory 420 stores machine-readable instructions executable by the processor 410, when the electronic device 400 is running, the processor 410 communicates with the memory 420 through the bus 430, and when the machine-readable instructions are executed by the processor 410, the steps of the wafer processing method in the method embodiments shown in fig. 1 and fig. 2 can be executed, and detailed implementation manners can refer to the method embodiments and are not repeated herein.
The embodiment of the present application further provides a computer readable storage medium, where a computer program is stored on the computer readable storage medium, and the computer program may execute the steps of the wafer processing method in the method embodiment shown in the foregoing fig. 1 and fig. 2 when the computer program is executed by a processor, and a specific implementation manner may refer to the method embodiment and will not be described herein.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a non-volatile computer readable storage medium executable by a processor. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Finally, it should be noted that: the foregoing examples are merely specific embodiments of the present application, and are not intended to limit the scope of the present application, but the present application is not limited thereto, and those skilled in the art will appreciate that while the foregoing examples are described in detail, the present application is not limited thereto. Any person skilled in the art may modify or easily conceive of the technical solution described in the foregoing embodiments, or make equivalent substitutions for some of the technical features within the technical scope of the disclosure of the present application; such modifications, changes or substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. The processing method of the wafer is characterized by comprising the following steps of:
acquiring wafer to-be-processed items of each batch corresponding to a target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set;
for any target processing machine in the processing machine set, determining at least one candidate wafer to-be-processed item corresponding to the target processing machine from the wafer processing flow of each batch in the target area, and determining a candidate wafer of a batch corresponding to the candidate wafer to-be-processed item from a preset wafer batch assembly box;
and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish the processing of the candidate wafers of each batch by the target processing machine in the target area.
2. The method for processing a wafer according to claim 1, wherein determining a lot of candidate wafers corresponding to the candidate wafer to be processed item from a preset wafer lot assembly box comprises:
determining preset wafer to-be-processed items corresponding to wafers in each batch in a preset wafer batch assembly box;
judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items or not;
and if the candidate wafers exist, determining the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item.
3. The method according to claim 1, wherein the preset priority clamping rules include a preset project time clamping rule and a preset order importance rule, and the determining, based on the preset priority clamping rule, a target processing order of the target processing machine for each candidate wafer to be processed includes:
determining a first processing sequence of the target processing machine for each candidate wafer to-be-processed item according to a preset item time clamping rule;
determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance rule;
and according to a preset weight proportion, performing weight calculation on the first processing sequence and the second processing sequence, and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item.
4. The method of claim 3, wherein the predetermined order importance rule includes a predetermined order lead time, a predetermined order quality inspection requirement, and a predetermined order processing cost, wherein determining the second processing order of each candidate wafer to be processed by the target processing machine according to the predetermined order importance rule comprises:
and sequencing all the candidate wafer to-be-processed items in sequence according to the preset order processing cost, the preset order delivery cycle and the preset order quality inspection requirement, and determining a second processing sequence of the target processing machine for all the candidate wafer to-be-processed items.
5. The method according to claim 1, wherein the processing flows of the items to be processed of the respective wafers are different, and any two of the processing flows correspond to different sets of processing tools.
6. The processing device of the wafer is characterized in that the processing device of the wafer comprises:
the acquisition module is used for acquiring wafer to-be-processed items of each batch corresponding to the target area, wherein the wafer to-be-processed items of each batch comprise a wafer processing flow and a wafer processing machine set;
a first determining module, configured to determine, for any target processing machine in the processing machine set, at least one candidate wafer to be processed item corresponding to the target processing machine from the wafer processing flows of each lot in the target area, and determine a candidate wafer of a lot corresponding to the candidate wafer to be processed item from a preset wafer lot assembly box;
and the second determining module is used for determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item based on a preset priority clamping rule so as to finish the processing of the candidate wafers of each batch by the target processing machine in the target area.
7. The apparatus according to claim 6, wherein the first determining module is specifically configured to:
determining preset wafer to-be-processed items corresponding to wafers in each batch in a preset wafer batch assembly box;
judging whether a candidate wafer to-be-processed item exists in the preset wafer to-be-processed items or not;
and if the candidate wafers exist, determining the candidate wafers of the lot corresponding to the candidate wafer to-be-processed item.
8. The apparatus according to claim 6, wherein the preset priority clamping rules include a preset project time clamping rule and a preset order importance rule, and the second determining module is specifically configured to:
determining a first processing sequence of the target processing machine for each candidate wafer to-be-processed item according to a preset item time clamping rule;
determining a second processing sequence of the target processing machine for each candidate wafer to be processed item according to a preset order importance rule;
and according to a preset weight proportion, performing weight calculation on the first processing sequence and the second processing sequence, and determining the target processing sequence of the target processing machine on each candidate wafer to-be-processed item.
9. An electronic device, comprising: a processor, a memory and a bus, the memory storing machine readable instructions executable by the processor, the processor and the memory in communication over the bus when the electronic device is running, the machine readable instructions when executed by the processor performing the steps of the method of processing a wafer as claimed in any one of claims 1 to 5.
10. A computer-readable storage medium, characterized in that it has stored thereon a computer program which, when executed by a processor, performs the steps of the wafer processing method according to any of the preceding claims 1 to 5.
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