CN116364754A - Epitaxial structure and preparation method thereof - Google Patents

Epitaxial structure and preparation method thereof Download PDF

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CN116364754A
CN116364754A CN202310162054.7A CN202310162054A CN116364754A CN 116364754 A CN116364754 A CN 116364754A CN 202310162054 A CN202310162054 A CN 202310162054A CN 116364754 A CN116364754 A CN 116364754A
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layer
sub
substrate
epitaxial
silicon atom
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洪威威
陆香花
梅劲
肖云飞
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract

The present disclosure provides an epitaxial structure and a method for preparing the same, which belongs to the technical field of photoelectron manufacturing. The epitaxial structure comprises a substrate, a silicon atom blocking layer and an epitaxial layer, wherein the silicon atom blocking layer and the epitaxial layer are sequentially laminated on the substrate, and the silicon atom blocking layer is used for blocking silicon atoms in the substrate from diffusing to the epitaxial layer. The embodiment of the disclosure can improve the problem that silicon atoms are easy to diffuse from the substrate to the epitaxial layer, and improve the crystal quality of the epitaxial layer.

Description

Epitaxial structure and preparation method thereof
Technical Field
The present disclosure relates to the field of optoelectronic fabrication, and in particular, to an epitaxial structure and a method for fabricating the same.
Background
The high electron mobility transistor (High Electron Mobility Transistor, HEMT for short) is a heterojunction field effect transistor, also called modulation doped field effect transistor, two-dimensional electron gas field effect transistor, selective doped heterojunction transistor, etc. The core structure of the HEMT device is an epitaxial structure, and the manufacture of the epitaxial structure has a great influence on the crystal quality of the HEMT device.
The epitaxial structure typically includes a substrate and an epitaxial layer stacked in sequence. Because of the low cost of the Si substrate, the large-size preparation is easy, and the thermal conductivity is good, the Si substrate is generally used as a base plate in the related art.
However, si atoms of the Si substrate may diffuse into a subsequent epitaxial layer in a high-temperature environment, resulting in adverse effects on the crystal quality of the epitaxial layer, and reducing the reliability of the HEMT device.
Disclosure of Invention
The embodiment of the disclosure provides an epitaxial structure and a preparation method thereof, which can improve the problem that silicon atoms are easy to diffuse from a substrate to an epitaxial layer and improve the crystal quality of the epitaxial layer. The technical scheme is as follows:
in one aspect, an embodiment of the present disclosure provides an epitaxial structure, where the epitaxial structure includes a substrate, a silicon atom blocking layer and an epitaxial layer, where the silicon atom blocking layer and the epitaxial layer are sequentially stacked on the substrate, and the silicon atom blocking layer is configured to block diffusion of silicon atoms in the substrate to the epitaxial layer.
Optionally, the silicon atom blocking layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are sequentially stacked; the first sub-layer comprises an AlN layer, the second sub-layer comprises an Mg-doped AlN layer, and the third sub-layer comprises an Mg-doped Al layer x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
Optionally, the thickness of the first sub-layer is 5nm to 50nm, the thickness of the second sub-layer is 10nm to 100nm, and the thickness of the third sub-layer is 100nm to 200nm.
Optionally, the second sub-layer has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The third sub-layer has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 19 cm -3 。
Optionally, the epitaxial layer includes an AlGaN buffer layer laminated on the silicon atom blocking layer, and the mass percentage of Al in the AlGaN buffer layer is 10% to 70%.
Optionally, the AlGaN buffer layer has a thickness of 100nm to 1500nm.
Optionally, the epitaxial layer includes an AlGaN high resistance layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer sequentially stacked on the silicon atom blocking layer.
On the other hand, the embodiment of the disclosure also provides a preparation method of the epitaxial structure, which comprises the following steps: providing a substrate; forming a silicon atom barrier layer on the substrate; and forming an epitaxial layer on the silicon atom blocking layer, wherein the silicon atom blocking layer is used for blocking the diffusion of silicon atoms in the substrate to the epitaxial layer.
Optionally, the forming a silicon atom blocking layer on the substrate includes: sequentially forming a first sub-layer, a second sub-layer and a third sub-layer on the substrate, wherein the first sub-layer comprises an AlN layer, the second sub-layer comprises an AlN layer doped with Mg, and the third sub-layer comprises an Al layer doped with Mg x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
Optionally, when the first sub-layer is grown, the growth temperature is 800 ℃ to 900 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere; when the second sub-layer is grown, the growth temperature is 850 ℃ to 1000 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is pure nitrogen atmosphere; and when the third sub-layer is grown, the growth temperature is 950 ℃ to 1050 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere.
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that at least:
according to the epitaxial structure provided by the embodiment of the disclosure, the silicon atom blocking layer is arranged between the substrate and the epitaxial layer, and silicon atoms in the substrate are blocked from diffusing to the epitaxial layer by the silicon atom blocking layer, so that the problem that the silicon atoms are easy to diffuse from the substrate to the epitaxial layer can be solved, and the crystal quality of the epitaxial layer and the reliability of the HEMT device can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of an epitaxial structure of a high electron mobility transistor according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for preparing an epitaxial structure of a high electron mobility transistor according to an embodiment of the present disclosure.
The various labels in the figures are described below:
10. a substrate;
20. a silicon atom barrier layer;
21. a first sub-layer; 22. a second sub-layer; 23. a third sub-layer;
30. an epitaxial layer;
31. an AlGaN buffer layer; 32. an AlGaN high-resistance layer; 33. a GaN channel layer; 34. an AlGaN barrier layer; 35. and a GaN cap layer.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," "third," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, is intended to mean that elements or items that are present in front of "comprising" or "comprising" are included in the word "comprising" or "comprising", and equivalents thereof, without excluding other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom" and the like are used only to indicate relative positional relationships, which may be changed accordingly when the absolute position of the object to be described is changed.
In the related art, the main material of the epitaxial layer in the epitaxial structure of the high electron mobility transistor is gallium nitride, and therefore, the core for improving the quality of the high electron mobility transistor is to produce a high quality gallium nitride material layer. Because of the nature of the lattice of gallium nitride materials, there is a lack of substrate materials that can be similar to gallium nitride lattice matching and are relatively inexpensive to manufacture. Currently, commonly used substrates are silicon carbide, sapphire and silicon substrates.
The quality of the gallium nitride film which is epitaxial on the silicon carbide substrate is best because the lattice mismatch of the silicon carbide and the gallium nitride is minimum, but the cost of using the silicon carbide substrate as the substrate is far higher than that of a sapphire substrate. The silicon substrate has low cost, easy large-size preparation and good heat conductivity, and can be compatible with the traditional silicon process, so that the silicon substrate becomes the first-choice substrate for HEMT epitaxial growth.
However, silicon atoms of the silicon substrate can diffuse into a subsequent epitaxial layer in a high-temperature environment, so that the crystal quality of the epitaxial layer is adversely affected, and the reliability of the HEMT device is reduced.
In addition, 16.9% lattice mismatch and 56% thermal mismatch exist between silicon and gallium nitride, and huge lattice mismatch and thermal mismatch between GaN and a silicon substrate can cause the problems of high dislocation density, large warpage and easiness in cracking of a GaN film, so that the GaN electronic device is difficult to prepare, and the wide application of the GaN-based HEMT device is limited.
Fig. 1 is a schematic structural diagram of an epitaxial structure of a high electron mobility transistor according to an embodiment of the present disclosure. As shown in fig. 1, the epitaxial structure includes a substrate 10, a silicon atom blocking layer 20 and an epitaxial layer 30, the silicon atom blocking layer 20 and the epitaxial layer 30 being sequentially stacked on the substrate 10, the silicon atom blocking layer 20 serving to block diffusion of silicon atoms in the substrate 10 to the epitaxial layer 30.
According to the epitaxial structure provided by the embodiment of the disclosure, the silicon atom blocking layer 20 is arranged between the substrate 10 and the epitaxial layer 30, and silicon atoms in the substrate 10 are blocked from diffusing to the epitaxial layer 30 by the silicon atom blocking layer 20, so that the problem that silicon atoms are easy to diffuse from the substrate 10 to the epitaxial layer 30 can be solved, and the crystal quality of the epitaxial layer 30 and the reliability of HEMT devices can be improved.
Illustratively, the substrate 10 comprises a silicon substrate. The substrate 10 may be a flat substrate or a patterned substrate.
As an example, in the presently disclosed embodiment, substrate 10 is a flat piece of silicon substrate. The silicon substrate has low cost, good heat conductivity and easy preparation process of the large-size silicon substrate.
Alternatively, as shown in fig. 1, the silicon atom blocking layer 20 includes a first sub-layer 21, a second sub-layer 22, and a third sub-layer 23, which are sequentially stacked.
Wherein the first sub-layer 21 comprises an AlN layer, the second sub-layer 22 comprises an Mg-doped AlN layer, and the third sub-layer 23 comprises an Mg-doped Al layer x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
In the above implementation, the first sublayer 21 may provide AlN crystal nuclei; the second sub-layer 22 is an AlN layer doped with Mg, and may form a dense thin film layer to block Si atoms; the third sub-layer 23 is Mg-doped Al x In y Ga (1-x-y) The N layer, which can generate activated holes consuming Si electrons, reduces the probability of Si atoms diffusing into the subsequent epitaxial layer 30.
At the same time, mg-doped Al x In y Ga (1-x-y) In atoms In the N layer can be trapped and segregated by stress field around dislocation or defect center to manufacture mask for dislocation or defect, and can prevent Ga atoms from migratingThe material moves to a single layer to form a smooth surface, the three-dimensional growth is enhanced, the dislocation or defect density is reduced, and the problems of large warpage, easiness in cracking and the like are solved.
Alternatively, the thickness of the first sub-layer 21 is 5nm to 50nm. The thickness of the first sub-layer 21 is illustratively 20nm.
By setting the thickness of the first sub-layer 21 within the above range, it is possible to avoid that the first sub-layer 21 is set too thin to serve the purpose of providing AlN crystal nuclei; it is also possible to avoid the first sub-layer 21 being set too thick, thereby increasing the manufacturing cost.
Optionally, the thickness of the second sub-layer 22 is 10nm to 100nm. Illustratively, the second sub-layer 22 has a thickness of 50mn.
By limiting the thickness of the second sub-layer 22 to the above range, a dense thin film layer of sufficient thickness can be formed, thereby ensuring the barrier effect of the second sub-layer 22 against Si atoms.
Exemplary, the second sub-layer 22 has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 . For example, the second sub-layer 22 has a Mg doping concentration of 2×10 17 cm -3 。
By controlling the Mg doping concentration of the AlN layer within the above range, the situation that the Mg doping concentration of the AlN layer is too low to play a role in blocking Si atoms can be avoided; and the excessive setting of the Mg doping concentration of the AlN layer can be avoided, so that the manufacturing cost is increased.
Alternatively, the thickness of the third sub-layer 23 is 100nm to 200nm. The thickness of the third sub-layer 23 is, for example, 150nm.
By limiting the thickness of the third sub-layer 23 to the above range, mg-doped Al of a sufficient thickness can be formed x In y Ga (1-x-y) N layer fully exerts Mg-doped Al x In y Ga (1-x-y) The N layer can create the effect of activated holes consuming Si electrons to reduce the probability of Si atoms diffusing into the subsequent epitaxial layer 30.
Illustratively, the third sub-layer 23 has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 19 cm -3 . For example, the third sub-layer 23 has a Mg doping concentration of 3×10 17 cm -3 。
By controlling Al x In y Ga (1-x-y) The Mg doping concentration of the N layer is within the above range, al can be avoided x In y Ga (1-x-y) The Mg doping concentration of the N layer is set too low to function to generate activated holes consuming Si electrons; al can also be avoided x In y Ga (1-x-y) The Mg doping concentration of the N layer is set too large to increase the manufacturing cost.
Alternatively, as shown in fig. 1, the epitaxial layer 30 includes an AlGaN buffer layer 31 laminated on the silicon atom blocking layer 20, and the mass percentage of Al in the AlGaN buffer layer 31 is 10% to 70%.
Wherein, the mass percentage of Al in the AlGaN buffer layer 31 may be 30%.
In the above implementation manner, the AlGaN buffer layer 31 can be grown in three dimensions and gradually changed to two-dimensional growth, so that the dislocation density is reduced, and the crystal quality is improved.
Alternatively, the thickness of the AlGaN buffer layer 31 is 100nm to 1500nm. Illustratively, the thickness of the AlGaN buffer layer 31 may be 1000nm.
By setting the thickness of the AlGaN buffer layer 31 within the above range, it is possible to avoid excessively thin thickness of the AlGaN buffer layer 31 and reduce the crystal quality of the epitaxial layer 30 grown on the thinner AlGaN buffer layer 31.
Alternatively, as shown in fig. 1, the epitaxial layer 30 includes an AlGaN high resistance layer 32, a GaN channel layer 33, an AlGaN barrier layer 34, and a GaN cap layer 35 sequentially stacked on the silicon atom blocking layer 20.
Illustratively, the thickness of the AlGaN high-resistance layer 32 is 100nm to 1500nm. For example, the thickness of the AlGaN high resistance layer 32 may be 800nm.
The GaN channel layer 33 has a thickness of 50nm to 500nm, for example. For example, the thickness of the GaN channel layer 33 may be 200nm.
Illustratively, the AlGaN barrier layer 34 has a thickness of 10nm to 100nm. For example, the thickness of the AlGaN barrier layer 34 may be 80nm.
The GaN cap layer 35 has a thickness of 10nm to 1000nm, for example. For example, the thickness of the GaN cap layer 35 may be 500nm.
Fig. 2 is a flowchart of a method for preparing an epitaxial structure of a high electron mobility transistor according to an embodiment of the present disclosure. The method is used to prepare the epitaxial structure shown in fig. 1. As shown in fig. 2, the preparation method comprises:
s11: a substrate 10 is provided.
S12: a silicon atom barrier layer 20 is formed on the substrate 10.
S13: an epitaxial layer 30 is formed on the silicon atom barrier layer 20.
Wherein the silicon atom barrier layer 20 serves to block diffusion of silicon atoms in the substrate 10 toward the epitaxial layer 30.
According to the epitaxial structure prepared by the preparation method, the silicon atom blocking layer 20 is arranged between the substrate 10 and the epitaxial layer 30, and silicon atoms in the substrate 10 are blocked from diffusing to the epitaxial layer 30 by the silicon atom blocking layer 20, so that the problem that the silicon atoms are easy to diffuse from the substrate 10 to the epitaxial layer 30 can be solved, and the crystal quality of the epitaxial layer 30 and the reliability of HEMT devices can be improved.
In step S11, the substrate 10 may be a sapphire substrate or a silicon substrate. The substrate 10 may be a flat substrate or a patterned substrate.
As an example, in the presently disclosed embodiment, the substrate 10 is a silicon substrate. The silicon substrate has low cost, good heat conductivity and easy preparation process of the large-size silicon substrate.
Step S11 may further include performing a high temperature annealing process on the substrate 10.
The annealing treatment mode can comprise the following steps: introducing hydrogen into a reaction chamber of MOCVD (Metal-organic Chemical Vapor Deposition, metal organic chemical vapor deposition) equipment, and treating the substrate at high temperature for 1min to 10min under the hydrogen atmosphere.
Wherein the temperature of the reaction chamber is 1000 ℃ to 1100 ℃, and the pressure of the reaction chamber is controlled to be 100torr to 500torr.
Forming the silicon atom blocking layer 20 in step S12 may include: a first sub-layer 21, a second sub-layer 22 and a third sub-layer 23 are sequentially formed on the substrate 10.
Wherein the first sub-layer 21 comprises an AlN layer, the second sub-layer 22 comprises an Mg-doped AlN layer, and the third sub-layer 23 comprises an Mg-doped Al layer x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
In the above implementation, the first sublayer 21 may provide AlN crystal nuclei; the second sub-layer 22 is an AlN layer doped with Mg, and may form a dense thin film layer to block Si atoms; the third sub-layer 23 is Mg-doped Al x In y Ga (1-x-y) The N layer, which can generate activated holes consuming Si electrons, reduces the probability of Si atoms diffusing into the subsequent epitaxial layer 30.
At the same time, mg-doped Al x In y Ga (1-x-y) In atoms In the N layer can be trapped and segregated In stress fields around dislocation or defect centers to manufacture a mask for dislocation or defect, so that Ga atoms can be prevented from migrating to a single layer to form a smooth surface, three-dimensional growth is enhanced, dislocation or defect density is reduced, and the problems of large warpage, easiness In cracking and the like are solved.
In growing the first sublayer 21, the growth temperature is 800 ℃ to 900 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere.
The thickness of the first sub-layer 21 may be, for example, 5nm to 50nm.
By setting the thickness of the first sub-layer 21 within the above range, it is possible to avoid that the first sub-layer 21 is set too thin to serve the purpose of providing AlN crystal nuclei; it is also possible to avoid the first sub-layer 21 being set too thick, thereby increasing the manufacturing cost.
In growing the second sub-layer 22, the growth temperature is 850 ℃ to 1000 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere.
The thickness of the second sub-layer 22 may be, for example, 10nm to 100nm.
By limiting the thickness of the second sub-layer 22 to the above range, a dense thin film layer of sufficient thickness can be formed, thereby ensuring the barrier effect of the second sub-layer 22 against Si atoms.
Exemplary, the second sub-layer 22 has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 . For example, the second sub-layer 22 has a Mg doping concentration of 2×10 17 cm -3 。
By controlling the Mg doping concentration of the AlN layer within the above range, the situation that the Mg doping concentration of the AlN layer is too low to play a role in blocking Si atoms can be avoided; and the excessive setting of the Mg doping concentration of the AlN layer can be avoided, so that the manufacturing cost is increased.
In the growth of the third sub-layer 23, the growth temperature is 950 ℃ to 1050 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere.
The thickness of the third sub-layer 23 may be, for example, 100nm to 200nm.
By limiting the thickness of the third sub-layer 23 to the above range, mg-doped Al of a sufficient thickness can be formed x In y Ga (1-x-y) N layer fully exerts Mg-doped Al x In y Ga (1-x-y) The N layer can create the effect of activated holes consuming Si electrons to reduce the probability of Si atoms diffusing into the subsequent epitaxial layer 30.
Illustratively, the third sub-layer 23 has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 19 cm -3 . For example, the third sub-layer 23 has a Mg doping concentration of 3×10 17 cm -3 。
By controlling Al x In y Ga (1-x-y) The Mg doping concentration of the N layer is within the above range, al can be avoided x In y Ga (1-x-y) The Mg doping concentration of the N layer is set too low to function to generate activated holes consuming Si electrons; al can also be avoided x In y Ga (1-x-y) The Mg doping concentration of the N layer is set too large to increase the manufacturing cost.
In the embodiment of the present disclosure, the epitaxial layer 30 may include an AlGaN buffer layer 31, an AlGaN high resistance layer 32, a GaN channel layer 33, an AlGaN barrier layer 34, and a GaN cap layer 35 sequentially stacked on the silicon atom blocking layer 20.
The preparation method of the epitaxial layer 30 may include the following steps:
in the first step, an AlGaN buffer layer 31 is formed.
The specific preparation process can comprise the following steps: in pure nitrogen atmosphere, the pressure of the reaction chamber is controlled between 50torr and 200torr, the low temperature value range of the growth temperature is 900 ℃ to 1000 ℃, and the high temperature value range of the growth temperature is 1000 ℃ to 1150 ℃.
Wherein the mass percentage of Al in the AlGaN buffer layer 31 is 10% to 70%.
The AlGaN buffer layer 31 can be grown in three dimensions and gradually changed to two-dimensional growth, so that dislocation density is reduced, and crystal quality is improved.
Illustratively, the thickness of the AlGaN buffer layer 31 is 100nm to 1500nm. Illustratively, the thickness of the AlGaN buffer layer 31 may be 1000nm.
By setting the thickness of the AlGaN buffer layer 31 within the above range, it is possible to avoid excessively thin thickness of the AlGaN buffer layer 31 and reduce the crystal quality of the epitaxial layer 30 grown on the thinner AlGaN buffer layer 31.
In the second step, an AlGaN high resistance layer 32 is formed.
The specific preparation process can comprise the following steps: in the pure nitrogen atmosphere, the pressure of the reaction chamber is controlled between 50torr and 100torr, the growth thickness is between 100nm and 1500nm, the value range of the growth temperature is between 950 ℃ and 1100 ℃,
wherein, the mass percentage of Al in the AlGaN high-resistance layer 32 is 30% to 70%.
Illustratively, the thickness of the AlGaN high-resistance layer 32 is 100nm to 1500nm. For example, the thickness of the AlGaN high resistance layer 32 may be 800nm.
Third, a GaN channel layer 33 is formed.
The specific preparation process can comprise the following steps: the pressure of the reaction chamber is controlled between 100torr and 500torr under the mixed atmosphere of nitrogen and hydrogen, the growth thickness is between 50nm and 500nm, and the value range of the growth temperature is between 1000 ℃ and 1200 ℃.
Illustratively, the thickness of the AlGaN high-resistance layer 32 is 50nm to 500nm. For example, the thickness of the GaN channel layer 33 may be 200nm.
Fourth, an AlGaN barrier layer 34 is formed.
The specific preparation process can comprise the following steps: the pressure of the reaction chamber is controlled between 50torr and 100torr under the pure nitrogen atmosphere, the growth thickness is between 10nm and 100nm, and the growth temperature is in the range of 950 ℃ to 1000 ℃.
Wherein the mass percentage of Al in the AlGaN barrier layer 34 is 10% to 70%.
Illustratively, the AlGaN barrier layer 34 has a thickness of 10nm to 100nm. For example, the thickness of the AlGaN barrier layer 34 may be 80nm.
Fifth, a GaN cap layer 35 is formed.
The specific preparation process can comprise the following steps: the pressure of the reaction chamber is controlled between 100torr and 500torr under the mixed atmosphere of nitrogen and hydrogen, the growth thickness is between 10nm and 1000nm, and the value range of the growth temperature is between 1000 ℃ and 1200 ℃.
The GaN cap layer 35 has a thickness of 10nm to 1000nm, for example. For example, the thickness of the GaN cap layer 35 may be 500nm.
After step S13, the preparation method may further include: the epitaxial structure is annealed.
After the epitaxial growth is finished, the temperature of the reaction chamber is reduced to 550 ℃ to 750 ℃ and then the reaction chamber is heated to N 2 Annealing treatment is carried out for 5min to 15min in atmosphere, then the temperature is gradually reduced to room temperature, and then the chip is manufactured through subsequent processing technologies of cleaning, deposition, photoetching and etching.
In particular implementations, embodiments of the present disclosure may employ high purity H 2 Or/and N 2 As a carrier gas, TEGa or TMGa as Ga source, TMIn as In source, siH 4 TMAL as an aluminum source, ammonia as an N source, cp as an N-type dopant 2 Mg acts as a p-type dopant.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.

Claims (10)

1. An epitaxial structure is characterized by comprising a substrate (10), a silicon atom blocking layer (20) and an epitaxial layer (30), wherein the silicon atom blocking layer (20) and the epitaxial layer (30) are sequentially laminated on the substrate (10), and the silicon atom blocking layer (20) is used for blocking silicon atoms in the substrate (10) from diffusing to the epitaxial layer (30).
2. Epitaxial structure according to claim 1, characterized in that the silicon atom barrier layer (20) comprises a first sub-layer (21), a second sub-layer (22) and a third sub-layer (23) stacked in sequence;
the first sub-layer (21) comprises an AlN layer, the second sub-layer (22) comprises an Mg-doped AlN layer, and the third sub-layer (23) comprises an Mg-doped Al layer x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
3. Epitaxial structure according to claim 2, characterized in that the first sublayer (21) has a thickness of 5nm to 50nm, the second sublayer (22) has a thickness of 10nm to 100nm and the third sublayer (23) has a thickness of 100nm to 200nm.
4. Epitaxial structure according to claim 2, characterized in that the Mg doping concentration of the second sub-layer (22) is 1 x 10 17 cm -3 Up to 1X 10 18 cm -3 ；
The third sub-layer (23) has a Mg doping concentration of 1×10 17 cm -3 Up to 1X 10 19 cm -3 。
5. The epitaxial structure according to any one of claims 1 to 4, characterized in that the epitaxial layer (30) comprises an AlGaN buffer layer (31) laminated on the silicon atom barrier layer (20), the mass percentage of Al in the AlGaN buffer layer (31) being 10% to 70%.
6. Epitaxial structure according to claim 5, characterized in that the AlGaN buffer layer (31) has a thickness of 100nm to 1500nm.
7. The epitaxial structure according to any one of claims 1 to 4, characterized in that the epitaxial layer (30) comprises an AlGaN high resistance layer (32), a GaN channel layer (33), an AlGaN barrier layer (34) and a GaN cap layer (35) laminated in this order on the silicon atom barrier layer (20).
8. A method of fabricating an epitaxial structure, the method comprising:
providing a substrate;
forming a silicon atom barrier layer on the substrate;
and forming an epitaxial layer on the silicon atom blocking layer, wherein the silicon atom blocking layer is used for blocking the diffusion of silicon atoms in the substrate to the epitaxial layer.
9. The method of preparing as claimed in claim 8, wherein forming a silicon atom barrier layer on the substrate comprises:
sequentially forming a first sub-layer, a second sub-layer and a third sub-layer on the substrate, wherein the first sub-layer comprises an AlN layer, the second sub-layer comprises an AlN layer doped with Mg, and the third sub-layer comprises an Al layer doped with Mg x In y Ga (1-x-y) And an N layer, wherein x is more than 0.1 and less than 0.5, and y is more than 0 and less than 0.2.
10. The method according to claim 9, wherein the first sub-layer is grown at a temperature of 800 ℃ to 900 ℃ under a pressure of 25Torr to 100Torr in a pure nitrogen atmosphere;
when the second sub-layer is grown, the growth temperature is 850 ℃ to 1000 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is pure nitrogen atmosphere;
and when the third sub-layer is grown, the growth temperature is 950 ℃ to 1050 ℃, the growth pressure is 25Torr to 100Torr, and the growth atmosphere is a pure nitrogen atmosphere.
CN202310162054.7A 2023-02-21 2023-02-21 Epitaxial structure and preparation method thereof Pending CN116364754A (en)

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