CN116338535A - Superconducting quantum interferometer readout circuit and system adopting self-feedback differential amplifier - Google Patents
Superconducting quantum interferometer readout circuit and system adopting self-feedback differential amplifier Download PDFInfo
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- CN116338535A CN116338535A CN202310278648.4A CN202310278648A CN116338535A CN 116338535 A CN116338535 A CN 116338535A CN 202310278648 A CN202310278648 A CN 202310278648A CN 116338535 A CN116338535 A CN 116338535A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45376—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using junction FET transistors as the active amplifying circuit
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- G01R33/035—Measuring direction or magnitude of magnetic fields or magnetic flux using superconductive devices
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Abstract
The invention discloses a superconducting quantum interferometer reading circuit and a superconducting quantum interferometer reading system adopting a self-feedback differential amplifier. The readout circuit includes: the bias point adjusting circuit is connected with the input end of the self-feedback differential amplifier in parallel, the self-feedback differential amplifier is connected with the working mode selecting circuit in series, the bias voltage adjusting circuit is electrically connected with the working mode selecting circuit, and the bias magnetic flux adjusting circuit is electrically connected with the working mode selecting circuit. According to the invention, the self-feedback differential amplifier is adopted to construct the superconducting quantum interferometer readout circuit, so that the noise source of the input end resistor in the traditional readout circuit is removed on the premise of possessing stable amplification performance, and the influence of feedback current in operation is reduced; meanwhile, the debugging and locking functions are integrated, so that the application performance of the SQUID in different fields can be fully exerted.
Description
Technical Field
The invention belongs to the field of metering test instruments, and particularly relates to a superconducting quantum interferometer reading circuit and system adopting a self-feedback differential amplifier.
Background
The superconducting quantum interferometer (Superconducting quantum interference device, SQUID) is a macroscopic quantized high-sensitivity magnetic detector based on the josephson tunnel effect and the magnetic flux quantization effect, and the resolution is close to the quantum limit, so that the superconducting quantum interferometer is the most sensitive magnetic detector in the current world. To date, SQUIDs have been successfully applied in the fields of metrology, bio-magnetic detection, geomagnetic field measurement, nondestructive detection, low-field magnetic resonance, and the like, and have exhibited increasingly important roles; SQUID also shows diversified development due to progress of technology and concept in category, and can be classified into low-temperature SQUID working at liquid helium (4.2K) temperature and high-temperature SQUID working at liquid nitrogen (77K) temperature according to working temperature; depending on the design configuration, SQUIDs can be divided into DC SQUIDs that place two josephson junctions in the loop and RF SQUIDs that place a single josephson junction in the loop, and multiple types of SQUID devices also make them more suitable for use in current diverse applications.
However, due to the characteristic of strong nonlinear magnetic flux voltage conversion and ultra-high sensitivity of the SQUID, a unique debugging and reading circuit needs to be designed in the application field to normally complete the work, so that the reading circuit of the SQUID needs to consider multiple factors such as functions, performance, volume and the like; in order to further reduce the noise of a readout circuit and fully exert the application performance of the SQUID in different fields, the invention adopts the SQUID readout circuit of the self-feedback differential amplifier, so that the noise source of the input end resistance in the traditional readout circuit is removed under the condition of high stable amplification performance, the influence of feedback current in operation is reduced, and meanwhile, the debugging and locking functions are integrated.
The information disclosed in the background section of the invention is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a superconducting quantum interferometer readout circuit and a superconducting quantum interferometer readout system adopting a self-feedback differential amplifier, which are used for integrating the debugging and readout functions of a SQUID into the same circuit, reducing noise sources by removing input end resistors compared with a traditional SQUID readout circuit, effectively reducing the influence of feedback current on the SQUID during operation, and meanwhile, compared with the traditional differential circuit, the self-feedback structure has more stable amplification performance and can be more suitable for the extremely sensitive detector of the SQUID.
In order to achieve the above purpose, the invention provides a superconducting quantum interferometer reading circuit and a superconducting quantum interferometer reading system adopting a self-feedback differential amplifier.
According to a first aspect of the present invention, there is provided a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier, comprising:
the bias point adjusting circuit is used for setting working bias current of the superconducting quantum interferometer;
the self-feedback differential amplifier is used for amplifying the port voltage of the superconducting quantum interferometer;
a bias voltage adjusting circuit for adjusting a bias voltage of a magnetic flux-voltage curve of the superconducting quantum interferometer;
an operation mode selection circuit for selecting an operation mode of the readout circuit;
a bias magnetic flux adjusting circuit for adjusting a bias magnetic flux of a magnetic flux-voltage curve of the superconducting quantum interferometer;
the bias point adjusting circuit is connected with the input end of the self-feedback differential amplifier in parallel, the self-feedback differential amplifier is connected with the working mode selecting circuit in series, the bias voltage adjusting circuit is electrically connected with the working mode selecting circuit, and the bias magnetic flux adjusting circuit is electrically connected with the working mode selecting circuit.
Optionally, the self-feedback differential amplifier includes:
A first transistor, a second transistor, a third transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first amplifier, a second amplifier, and a capacitor;
a first electrode of the first transistor is connected with a positive input end of the self-feedback differential amplifier, a third electrode of the first transistor is connected with a positive output end of the self-feedback differential amplifier through the seventh resistor, and a second electrode of the first transistor is respectively connected with an inverting input end of the first amplifier and a positive input end of the second amplifier;
the first electrode of the second transistor is connected with the inverting input end of the self-feedback differential amplifier, the third electrode of the second transistor is connected with the inverting output end of the self-feedback differential amplifier through the eighth resistor, and the second electrode of the second transistor is respectively connected with the non-inverting input end of the first amplifier and the inverting input end of the second amplifier;
the output end of the first amplifier is connected with the positive phase output end of the self-feedback differential amplifier, and the output end of the second amplifier is connected with the negative phase output end of the self-feedback differential amplifier;
one end of the third resistor is electrically connected with one end of the capacitor, the other end of the third resistor is electrically connected with the second electrode of the first transistor, the other end of the capacitor is electrically connected with the second electrode of the second transistor, one end of the first resistor is electrically connected with the second electrode of the first transistor, the other end of the first resistor is electrically connected with a positive power supply, one end of the second resistor is electrically connected with the second electrode of the second transistor, and the other end of the second resistor is electrically connected with the positive power supply;
One end of the fifth resistor is electrically connected with the third electrode of the first transistor, and the other end of the fifth resistor is electrically connected with the second electrode of the third transistor;
one end of the sixth resistor is electrically connected with the third electrode of the second transistor, and the other end of the sixth resistor is electrically connected with the second electrode of the third transistor;
one end of the fourth resistor is electrically connected with the third electrode of the third transistor, the other end of the fourth resistor is connected with a negative power supply, and the first electrode of the third transistor is grounded;
the fifth resistor has the same resistance as the sixth resistor, and the seventh resistor has the same resistance as the eighth resistor.
Optionally, the types of the first transistor and the second transistor include:
an NPN bipolar transistor and an N channel junction field effect transistor;
the third transistor is of an NPN bipolar transistor type, a first electrode of the third transistor is a base electrode, a second electrode of the third transistor is a collector electrode, and a third electrode of the third transistor is an emitter electrode;
when the first transistor and the second transistor are both the NPN bipolar transistors, the first electrodes of the first transistor and the second transistor are base electrodes, the second electrodes of the first transistor and the second transistor are collector electrodes, and the third electrodes of the first transistor and the second transistor are emitter electrodes;
When the first transistor and the second transistor are both of the type of the N-channel junction field effect transistor, the first electrodes of the first transistor and the second transistor are gates, the second electrodes of the first transistor and the second transistor are drains, and the third electrodes of the first transistor and the second transistor are sources.
Optionally, the operation mode selection circuit includes:
the second-stage amplifier, the first analog switch, the second analog switch, the integrator, the pull-down resistor and the feedback resistor;
the positive input end of the secondary amplifier is electrically connected with the positive output end of the self-feedback differential amplifier, the negative input end of the secondary amplifier is electrically connected with the negative output end of the self-feedback differential amplifier, and the output end of the secondary amplifier is electrically connected with the input end of the first analog switch;
the second output end of the first analog switch is electrically connected with the input end of the integrator, and the first output end of the first analog switch is electrically connected with the input end of the second analog switch and is electrically connected with the output end of the integrator;
the first output end of the second analog switch is electrically connected with the pull-down resistor, and the second output end of the second analog switch is electrically connected with the feedback resistor.
Optionally, the operation modes include a lock read mode and an amplification debug mode;
the amplifying and debugging mode is used for testing the device performance of the superconducting quantum interferometer and setting a locking working point;
the lockout read-out mode is used to measure the measured magnetic field.
Optionally, the bias voltage adjusting circuit is electrically connected with the secondary amplifier, and further electrically connected with the working mode selecting circuit.
Optionally, the method further comprises:
a reset circuit for resetting the readout circuit to an initial state;
the heating circuit is used for heating the superconducting quantum interferometer;
the reset circuit is electrically connected with the integrator.
Optionally, the bias magnetic flux adjusting circuit is electrically connected with the second output end of the second analog switch.
Optionally, the first analog switch is directly associated with the second analog switch, so that the first analog switch and the output end of the second analog switch are synchronized;
when the first analog switch is switched to the first output end, the second analog switch is also switched to the first output end, and the readout circuit is in the amplifying and debugging mode;
when the first analog switch is switched to the second output, the second analog switch is also switched to the second output, when the readout circuit is in the locked readout mode.
According to a second aspect of the present invention, there is provided a readout system of a superconducting quantum interferometer, comprising:
a readout module comprising a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as described in any of the first aspects;
the heating module comprises a heating resistor, and the reading circuit heats the superconducting quantum interferometer through the heating module;
the feedback module comprises a feedback inductor, and feedback current generated by the reading circuit generates a magnetic field with the same size and opposite direction to the detected magnetic field in the superconducting quantum interferometer through mutual inductance between the feedback module and the superconducting quantum interferometer, so that the reading system is stably locked at a working point;
a power module for providing power to the superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as described in any of the first aspects.
The invention has the beneficial effects that: compared with the traditional differential circuit, the self-feedback structure of the readout circuit adopting the self-feedback differential amplifier has more stable amplification performance, simultaneously removes the noise source of the input end resistor in the traditional readout circuit, reduces the influence of feedback current in operation, integrates the debugging and locking functions, and can fully exert the application performance of the SQUID in different fields.
The system of the present invention has other features and advantages which will be apparent from or are set forth in detail in the accompanying drawings and the following detailed description, which are incorporated herein, and which together serve to explain certain principles of the invention.
Drawings
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular descriptions of exemplary embodiments of the invention as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts throughout the exemplary embodiments of the invention.
Fig. 1 shows a schematic diagram of a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to the present invention.
Fig. 2 shows a schematic circuit configuration of a self-feedback differential amplifier using N-channel junction field effect transistors according to a superconducting quantum interferometer readout circuit using a self-feedback differential amplifier according to the present invention.
Fig. 3 shows a schematic circuit diagram illustrating an operation mode selection circuit of a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to the present invention.
Fig. 4 shows a schematic circuit configuration of a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to embodiment 1 of the present invention.
Fig. 5 is a schematic diagram showing a circuit configuration of a self-feedback differential amplifier using NPN bipolar transistors of a superconducting quantum interferometer readout circuit using a self-feedback differential amplifier according to embodiment 1 of the present invention
Fig. 6 shows a zero-flux zero-voltage schematic of a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to embodiment 1 of the present invention.
Fig. 7 shows a schematic diagram of a superconducting quantum interferometer readout system employing a self-feedback differential amplifier according to embodiment 2 of the present invention.
Reference numerals illustrate:
1. the first transistor, 2, the second transistor, 3, the third transistor, 4, the first resistor, 5, the second resistor, 6, the third resistor, 7, the fourth resistor, 8, the fifth resistor, 9, the sixth resistor, 10, the seventh resistor, 11, the eighth resistor, 12, the first amplifier, 13, the second amplifier, 14, the capacitor, 15, the second amplifier, 16, the first analog switch, 17, the second analog switch, 18, the integrator, 19, the pull-down resistor, 20, the feedback resistor, 21, the bias point adjusting circuit, 22, the self-feedback differential amplifier, 23, the bias voltage adjusting circuit, 24, the operation mode selecting circuit, 25, the bias magnetic flux adjusting circuit, 26, the feedback inductor, 27, the reset circuit, 28, the heating circuit, 29, the heating resistor, k1, the first output end of the first analog switch, k2, the second output end of the first analog switch, k3, the first output end of the second analog switch, k4, the second output end of the second analog switch.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. While the preferred embodiments of the present invention are illustrated in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
As shown in fig. 1, a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to the present invention includes:
the bias point adjusting circuit is used for setting working bias current of the superconducting quantum interferometer;
the self-feedback differential amplifier is used for amplifying the output voltage of the superconducting quantum interferometer;
the bias voltage adjusting circuit is used for adjusting bias voltage of a magnetic flux-voltage curve of the superconducting quantum interferometer;
an operation mode selection circuit for selecting an operation mode of the readout circuit;
the bias magnetic flux adjusting circuit is used for adjusting bias magnetic flux of the magnetic flux-voltage curve of the superconducting quantum interferometer;
the bias point adjusting circuit is connected with the input end of the self-feedback differential amplifier in parallel, the self-feedback differential amplifier is connected with the working mode selecting circuit in series, the bias voltage adjusting circuit is electrically connected with the working mode selecting circuit, and the bias magnetic flux adjusting circuit is electrically connected with the working mode selecting circuit.
Specifically, the readout circuit of the superconducting quantum interferometer of the present invention includes: the bias point adjusting circuit is connected with the input end of the self-feedback differential amplifier in parallel, the self-feedback differential amplifier is connected with the working mode selecting circuit in series, the bias voltage adjusting circuit is electrically connected with the working mode selecting circuit, and the bias magnetic flux adjusting circuit is electrically connected with the working mode selecting circuit; firstly, setting working bias current of a superconducting quantum interferometer through a bias point adjusting circuit, setting a locking working point for the superconducting quantum interferometer, working a reading circuit in an amplifying and debugging mode through a working mode selecting circuit, and adjusting a bias voltage adjusting circuit and a bias magnetic flux adjusting circuit to set the superconducting quantum interferometer in a zero magnetic flux zero voltage state; and then the reading circuit is operated in a locking operation mode through the operation mode selection circuit to finish magnetic field measurement.
For example, a low-temperature DC SQUID is adopted and operates at the ambient temperature of 4.2K of liquid helium, firstly, the working bias current of the low-temperature DC SQUID is set through a bias point adjusting circuit, a locking working point is set for the low-temperature DC SQUID, then a reading circuit is operated in an amplifying and debugging mode through a working mode selecting circuit, and the bias voltage adjusting circuit and the bias magnetic flux adjusting circuit are adjusted to set the low-temperature DC SQUID in a zero magnetic flux zero voltage state; and then the reading circuit is operated in a locking operation mode through the operation mode selection circuit to finish magnetic field measurement.
In one example, in the present invention, a self-feedback differential amplifier includes:
a first transistor, a second transistor, a third transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first amplifier, a second amplifier, and a capacitor;
the first electrode of the first transistor is connected with the positive input end of the feedback differential amplifier, the third electrode of the first transistor is connected with the positive output end of the feedback differential amplifier through a seventh resistor, and the second electrode of the first transistor is respectively connected with the negative input end of the first amplifier and the positive input end of the second amplifier;
the first electrode of the second transistor is connected with the inverting input end of the self-feedback differential amplifier, the third electrode is connected with the inverting output end of the self-feedback differential amplifier through an eighth resistor, and the second electrode is respectively connected with the non-inverting input end of the first amplifier and the inverting input end of the second amplifier;
the output end of the first amplifier is connected with the positive phase output end of the self-feedback differential amplifier, and the output end of the second amplifier is connected with the negative phase output end of the self-feedback differential amplifier;
one end of the third resistor is electrically connected with one end of the capacitor, the other end of the third resistor is electrically connected with the second electrode of the first transistor, the other end of the capacitor is electrically connected with the second electrode of the second transistor, one end of the first resistor is electrically connected with the second electrode of the first transistor, the other end of the first resistor is electrically connected with the positive power supply, one end of the second resistor is electrically connected with the second electrode of the second transistor, and the other end of the second resistor is electrically connected with the positive power supply;
One end of the fifth resistor is electrically connected with the third electrode of the first transistor, and the other end of the fifth resistor is electrically connected with the second electrode of the third transistor;
one end of the sixth resistor is electrically connected with the third electrode of the second transistor, and the other end of the sixth resistor is electrically connected with the second electrode of the third transistor;
one end of the fourth resistor is electrically connected with the third electrode of the third transistor, the other end of the fourth resistor is connected with a negative power supply, and the first electrode of the third transistor is grounded;
the fifth resistor has the same resistance as the sixth resistor, and the seventh resistor has the same resistance as the eighth resistor.
Specifically, the self-feedback differential amplifier is composed of two transistors with matched parameters, four resistors and a constant current source built by one transistor and one resistor, and the classical differential amplifier is composed of a first transistor, a second transistor, a first resistor, a second resistor, a fifth resistor and a sixth resistor, and the constant current source built by a third transistor and the first resistor; the third transistor is an NPN bipolar transistor, and the first transistor and the second transistor can be selected as the NPN bipolar transistor or an N channel junction field effect transistor according to application requirements;
Then adopting a first amplifier and a second amplifier to amplify the output signals of the differential amplifier, wherein the first amplifier is in positive amplification, and the second amplifier is in negative amplification; the signal amplified by the first amplifier is fed back to a fifth resistor at the tail end of the differential amplifier through a seventh resistor, the signal amplified by the second amplifier is fed back to a sixth resistor at the tail end of the differential amplifier through an eighth resistor, and the differential amplification factor is controlled in a current feedback mode; the third resistor and the capacitor provide low-pass filtering for the self-feedback differential amplifier, so that noise is reduced; the fifth resistance is equal to the sixth resistance, the seventh resistance is equal to the eighth resistance, and the final amplification factor of the self-feedback differential amplifier is as follows:
wherein, the liquid crystal display device comprises a liquid crystal display device,
+V is the amplification factor of the self-feedback differential amplifier OUT Is the positive phase output of the self-feedback differential amplifier, -V OUT +V is the inverted output of the self-feedback differential amplifier IN Is a positive input of a self-feedback differential amplifier, -V IN R7 is a seventh resistor and R5 is a fifth resistor, which are inverting inputs of the self-feedback differential amplifier.
In one example, in the present invention, the types of the first transistor and the second transistor include:
An NPN bipolar transistor and an N channel junction field effect transistor;
the type of the third transistor is an NPN bipolar transistor, the first electrode of the third transistor is a base electrode, the second electrode of the third transistor is a collector electrode, and the third electrode of the third transistor is an emitter electrode;
when the first transistor and the second transistor are NPN bipolar transistors, the first electrodes of the first transistor and the second transistor are base electrodes, the second electrodes of the first transistor and the second transistor are collector electrodes, and the third electrodes of the first transistor and the second transistor are emitter electrodes;
when the first transistor and the second transistor are both of the type of N-channel junction field effect transistor, the first electrodes of the first transistor and the second transistor are gates, the second electrodes of the first transistor and the second transistor are drains, and the third electrodes of the first transistor and the second transistor are sources.
Specifically, the types of the first transistor and the second transistor can be selected to be NPN bipolar transistors or N channel junction field effect transistors according to application requirements; when the first transistor and the second transistor are of NPN bipolar transistor type, the first electrode of the two transistors is a base electrode, the second electrode is a collector electrode, and the third electrode is an emitter electrode; when the first transistor and the second transistor are of the type N-channel junction field effect transistor, the first electrode of the two transistors is a gate, the second electrode is a drain, and the third electrode is a source.
For example, as shown in fig. 2, when the first transistor and the second transistor are both N-channel junction field effect transistors, the circuit structure of the self-feedback differential amplifier is:
the grid electrode of the first transistor 1 is connected with the positive input end +V of the self-feedback differential amplifier in The source electrode is connected with the positive phase output end +V of the self-feedback differential amplifier through a seventh resistor 10 out The drains are connected to the inverting input of the first amplifier 12 and the non-inverting input +;
the grid electrode of the second transistor 2 is connected with the inverting input end-V of the self-feedback differential amplifier in The source electrode is connected with the inverting output end-V of the self-feedback differential amplifier through an eighth resistor 11 out The drains are connected to the non-inverting input terminal + of the first amplifier 12 and the inverting input terminal-of the second amplifier 13, respectively;
the output end of the first amplifier 12 is connected with the positive phase output end +V of the self-feedback differential amplifier out The output end of the second amplifier 13 is connected with the inverting output end-V of the self-feedback differential amplifier out ；
One end of the third resistor 6 is electrically connected with one end of the capacitor 14, the other end of the third resistor 6 is electrically connected with the drain electrode of the first transistor 1, the other end of the capacitor 14 is electrically connected with the drain electrode of the second transistor 2, one end of the first resistor 4 is electrically connected with the drain electrode of the first transistor 1, the other end of the first resistor 4 is electrically connected with the positive power supply VDD, one end of the second resistor 5 is electrically connected with the drain electrode of the second transistor 2, and the other end of the second resistor 5 is electrically connected with the positive power supply VDD;
One end of the fifth resistor 8 is electrically connected with the source electrode of the first transistor 1, and the other end of the fifth resistor 8 is electrically connected with the collector electrode of the third transistor 3;
one end of the sixth resistor 9 is electrically connected with the source electrode of the second transistor 2, and the other end of the sixth resistor 9 is electrically connected with the collector electrode of the third transistor 3;
one end of the fourth resistor 7 is electrically connected with the emitter of the third transistor 3, the other end of the fourth resistor 7 is connected with the negative power supply VEE, and the base of the third transistor 3 is grounded;
the fifth resistor 8 and the sixth resistor 9 have the same resistance, and the seventh resistor 10 and the eighth resistor 11 have the same resistance.
As shown in fig. 3, in one example, in the present invention, the operation mode selection circuit includes:
a second-stage amplifier 15, a first analog switch 16, a second analog switch 17, an integrator 18, a pull-down resistor 19, and a feedback resistor 20;
the non-inverting input end of the second-stage amplifier 15 is electrically connected with the non-inverting output end of the self-feedback differential amplifier, the inverting input end of the second-stage amplifier 15 is electrically connected with the inverting output end of the self-feedback differential amplifier, and the output end of the second-stage amplifier 15 is electrically connected with the input end of the first analog switch 16;
the second output terminal k2 of the first analog switch 16 is electrically connected to the integrator 18, and the first output terminal k1 of the first analog switch 16 is electrically connected to the input terminal of the second analog switch 17 and to the output terminal of the integrator 18;
The first output k3 of the second analog switch 17 is electrically connected to the pull-down resistor 19, and the second output k4 of the second analog switch is electrically connected to the feedback resistor 20.
In one example, in the present invention, the operation modes include a lock-out read mode and an amplification debug mode;
the amplifying and debugging mode is used for testing the device performance of the superconducting quantum interferometer and setting a locking working point;
the lockout read-out mode is used to measure the measured magnetic field.
In one example, in the present invention, the bias voltage adjusting circuit is electrically connected to the operation mode selecting circuit by being electrically connected to the secondary amplifier.
Specifically, the bias voltage adjusting circuit adjusts the bias voltage of the SQUID flux-voltage curve in the amplifying debug mode by being electrically connected to the secondary amplifier.
In one example, in the present invention, further comprising:
a reset circuit for resetting the readout circuit to an initial state;
the heating circuit is used for heating the superconducting quantum interferometer;
the reset circuit is electrically connected with the integrator.
Specifically, the reset circuit is electrically connected with the integrator, and can reset the read circuit to an initial state when the read circuit falls into the phenomena of locking point jump, losing lock, full offset and the like in a locking read mode; the heating circuit is electrically connected with a heating resistor in the superconducting quantum interferometer, when the SQUID device is in frozen magnetic flux due to the problems of abrupt change of bias current or misoperation, the device can be quenched by heating through the heating circuit, and then the heating is stopped to enter a superconducting state again so as to avoid the phenomenon of frozen magnetic flux; the function can effectively increase the fault tolerance rate of SQUID device test and operation.
In one example, in the present invention, the bias magnetic flux adjusting circuit is electrically connected to the second output terminal of the second analog switch.
Specifically, the bias magnetic flux adjusting circuit is electrically connected to the second output terminal of the second analog switch, and adjusts the bias magnetic flux of the SQUID magnetic flux voltage curve in the amplifying and debugging mode.
As shown in fig. 3, in one example, in the present invention, the first analog switch 16 is directly associated with the second analog switch 17, so that the first analog switch 16 is synchronized with the output terminal of the second analog switch 17;
when the first analog switch 16 is switched to the first output terminal k1, the second analog switch 17 is also switched to the first output terminal k3, and the readout circuit is in the amplifying and debugging mode;
when the first analog switch 16 switches to the second output terminal k2, the second analog switch 17 also switches to the second output terminal k4, at which time the readout circuit is in the lock-out readout mode.
Specifically, when the first analog switch 16 is switched to the first output terminal k1, the second analog switch 17 is also switched to the first output terminal k3, and the readout circuit is in the amplifying and debugging mode, and the electric signal amplified by the self-feedback differential amplifier is input to the first analog switch 16 through the second amplifier 15 (for example, an instrumentation amplifier), is directly input to the second analog switch 17 through the first output terminal k1, and is input to the pull-down resistor 19 through the first output terminal k 3;
The first analog switch 16 is switched to the second output end k2, the second analog switch 17 is also switched to the second output end k4, the readout circuit is in the locked readout mode, the electric signal amplified by the self-feedback differential amplifier is input to the first analog switch 16 through the second amplifier 15, is input to the integrator 18 through the second output end k2, and is integrated by the integrator 18 to output an electric signal V proportional to the magnetic field to be measured out The electric signal is input into a feedback resistor 20 (for example, a low-temperature drift precision resistor, the precision is better than 0.1%) through a second output end k4 of the second analog switch 17, feedback current is generated through the feedback resistor 20, a magnetic field with the opposite direction and the same size as the detected magnetic field is generated in the SQUID through mutual inductance between the feedback inductor and the SQUID device by the feedback current, and the reading system is stably locked at the working point.
The invention is further described below with reference to the drawings and specific examples, which are not intended to be limiting. It should be noted that, without conflict, the embodiments of the present invention and features of the embodiments may be combined with each other.
Example 1
As shown in fig. 4, the present embodiment provides a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier, including:
A bias point adjusting circuit 21 for setting an operating bias current of the superconducting quantum interferometer;
a self-feedback differential amplifier 22 for amplifying the port voltage of the superconducting quantum interferometer;
a bias voltage adjusting circuit 23 for adjusting a bias voltage of a magnetic flux-voltage curve of the superconducting quantum interferometer;
an operation mode selection circuit 24 for selecting an operation mode of the readout circuit;
a bias magnetic flux adjusting circuit 25 for adjusting a bias magnetic flux of a magnetic flux-voltage curve of the superconducting quantum interferometer;
the bias point adjusting circuit 21 is connected in parallel with the input end of the self-feedback differential amplifier 22, the self-feedback differential amplifier 22 is connected in series with the operation mode selecting circuit 23, the bias voltage adjusting circuit 24 is electrically connected with the operation mode selecting circuit 23, and the bias magnetic flux adjusting circuit 25 is electrically connected with the operation mode selecting circuit 23.
The self-feedback differential amplifier 22 is directly connected to the SQUID as a pre-stage amplifier, amplifies an electric signal of the SQUID device to transmit to a post-stage for processing, and the self-feedback differential amplifier 22 has a structure as shown in fig. 5, and the self-feedback differential amplifier 22 includes: a first transistor 1, a second transistor 2, a third transistor 3, a first resistor 4, a second resistor 5, a third resistor 6, a fourth resistor 7, a fifth resistor 8, a sixth resistor 9, a seventh resistor 10, an eighth resistor 11, a first amplifier 12, a second amplifier 13, and a capacitor 14; the first transistor 1, the second transistor 2 and the third transistor 3 are NPN bipolar transistors;
The base of the first transistor 1 is connected with the positive input end +V of the self-feedback differential amplifier in The emitter is connected with the positive output end +V of the self-feedback differential amplifier through a seventh resistor 10 out The collectors are connected to the inverting input of the first amplifier 12 and the non-inverting input +; the base of the second transistor 2 is connected to the inverting input-V of the self-feedback differential amplifier in The emitter is connected with the inverting output end-V of the self-feedback differential amplifier through an eighth resistor 11 out The collector is connected to the non-inverting input + of the first amplifier 12 and the inverting input-of the second amplifier 13, respectively; the output end of the first amplifier 12 is connected with the positive phase output end +V of the self-feedback differential amplifier out The output end of the second amplifier 13 is connected with the inverting output end-V of the self-feedback differential amplifier out The method comprises the steps of carrying out a first treatment on the surface of the One end of the third resistor 6 is electrically connected with one end of the capacitor 14, and the other end of the third resistor 6 is electrically connected with the current collector of the first transistor 1The other end of the capacitor 14 is electrically connected with the collector of the second transistor 2, one end of the first resistor 4 is electrically connected with the collector of the first transistor 1, the other end of the first resistor 4 is electrically connected with the positive power supply VDD, one end of the second resistor 5 is electrically connected with the collector of the second transistor 2, and the other end of the second resistor 5 is electrically connected with the positive power supply VDD; one end of the fifth resistor 8 is electrically connected to the emitter of the first transistor 1, and the other end of the fifth resistor 8 is electrically connected to the collector of the third transistor 3; one end of the sixth resistor 9 is electrically connected with the emitter of the second transistor 2, and the other end of the sixth resistor 9 is electrically connected with the collector of the third transistor 3; one end of the fourth resistor 7 is electrically connected with the emitter of the third transistor 3, the other end of the fourth resistor 7 is connected with the negative power supply VEE, and the base of the third transistor 3 is grounded; the resistance value of the fifth resistor 8 is the same as that of the sixth resistor 9, and the resistance value of the seventh resistor 10 is the same as that of the eighth resistor 11;
The electric signal amplified by the self-feedback differential amplifier 22 is input to the operation mode selection circuit 24 for selecting the operation mode of the readout circuit, the circuit configuration of the operation mode selection circuit 24 is as shown in fig. 3, and the operation mode selection circuit 24 includes: a second-stage amplifier 15, a first analog switch 16, a second analog switch 17, an integrator 18, a pull-down resistor 19, and a feedback resistor 20; the non-inverting input end of the second-stage amplifier 15 is electrically connected with the non-inverting output end of the self-feedback differential amplifier, the inverting input end of the second-stage amplifier 15 is electrically connected with the inverting output end of the self-feedback differential amplifier, and the output end of the second-stage amplifier 15 is electrically connected with the input end of the first analog switch 16; the second output terminal k2 of the first analog switch 16 is electrically connected to the integrator 18, and the first output terminal k1 of the first analog switch 16 is electrically connected to the input terminal of the second analog switch 17 and to the output terminal of the integrator 18; the first output end k3 of the second analog switch 17 is electrically connected with the pull-down resistor 19, and the second output end k4 of the second analog switch is electrically connected with the feedback resistor 20; the first analog switch 16 is directly associated with the second analog switch 17, so that the output ends of the first analog switch 16 and the second analog switch 17 are synchronized;
The working modes comprise a locking read-out mode and an amplifying debugging mode; when the first analog switch 16 is switched to the first output end k1, the second analog switch 17 is synchronously switched to the first output end k3, and the readout circuit is in an amplifying and debugging mode; the electric signal amplified by the self-feedback differential amplifier 22 is input to the first analog switch 16 through the second-stage amplifier 15, is directly input to the second analog switch 17 through the first output terminal k1, and is input to the pull-down resistor 19 through the first output terminal k 3; at this time, a locking operating point is set for the SQUID by adjusting the bias point adjusting circuit 21, the SQUID is adjusted to a zero magnetic flux zero voltage state by the bias voltage adjusting circuit 23 and the bias magnetic flux adjusting circuit 25, and the zero magnetic flux zero voltage state is shown in fig. 6;
then when the first analog switch 16 is switched to the second output end k2, the second analog switch 17 is synchronously switched to the second output end k4, and the readout circuit is in a locking readout mode; the electric signal amplified by the self-feedback differential amplifier 22 is input to the first analog switch 16 through the second amplifier 15, is input to the integrator 18 through the second output end k2, and is integrated by the integrator 18 to output an electric signal V proportional to the magnetic field to be measured out The electric signal is input into the feedback resistor 20 through the second output end k4 of the second analog switch 17, a feedback current is generated through the feedback resistor 20, and the feedback current passes through the mutual inductance M between the feedback inductor 26 and the SQUID inside the superconducting quantum interferometer f Generating a magnetic field with the same size and opposite direction to the detected magnetic field in the SQUID, and stably locking the reading system at a working point to finish magnetic field measurement;
in this embodiment, the readout circuit of the superconducting quantum interferometer further includes a reset circuit 27 and a heating circuit 28;
the reset circuit 27 is electrically connected to the integrator 18, and resets the readout circuit to an initial state when the readout circuit falls into a lock point jump, a lock loss, a full offset, or the like in the lock readout mode;
the heating circuit 28 is electrically connected with a heating resistor 29 in the superconducting quantum interferometer, when the SQUID device is in frozen magnetic flux due to the problems of abrupt change of bias current or misoperation, the device can be quenched by heating through the heating circuit, and then the heating is stopped to enter a superconducting state again so as to avoid the phenomenon of frozen magnetic flux. The function can effectively increase the fault tolerance rate of SQUID device test and operation.
Example 2
As shown in fig. 7, the present embodiment provides a superconducting quantum interferometer readout system employing a self-feedback differential amplifier, comprising:
a readout module comprising a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as described in any of embodiment 1;
the heating module comprises a heating resistor, and the reading circuit heats the superconducting quantum interferometer through the heating module;
the feedback module comprises a feedback inductor, and feedback current generated by the reading circuit generates a magnetic field with the same size and opposite direction to the detected magnetic field in the superconducting quantum interferometer through mutual inductance between the feedback module and the superconducting quantum interferometer device, so that the reading system is stably locked at a working point;
a power module for providing power to the superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as described in any of embodiment 1;
in the embodiment, two groups of 18V batteries are connected in series, and the connection point of the two groups of batteries is taken as the reference ground, so that a power supply with the voltage of plus or minus 18V is obtained, and then the power supply is reduced to the voltage of plus or minus 15V through a linear voltage stabilizer.
The foregoing description of embodiments of the invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described.
Claims (10)
1. A superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier, comprising:
the bias point adjusting circuit is used for setting working bias current of the superconducting quantum interferometer;
the self-feedback differential amplifier is used for amplifying the port voltage of the superconducting quantum interferometer;
a bias voltage adjusting circuit for adjusting a bias voltage of the superconducting quantum interferometer magnetic flux-voltage curve;
an operation mode selection circuit for selecting an operation mode of the readout circuit;
a bias magnetic flux adjusting circuit for adjusting a bias magnetic flux of the superconducting quantum interferometer magnetic flux-voltage curve;
the bias point adjusting circuit is connected with the input end of the self-feedback differential amplifier in parallel, the self-feedback differential amplifier is connected with the working mode selecting circuit in series, the bias voltage adjusting circuit is electrically connected with the working mode selecting circuit, and the bias magnetic flux adjusting circuit is electrically connected with the working mode selecting circuit.
2. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to claim 1, wherein the self-feedback differential amplifier comprises:
a first transistor, a second transistor, a third transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first amplifier, a second amplifier, and a capacitor;
A first electrode of the first transistor is connected with a positive input end of the self-feedback differential amplifier, a third electrode of the first transistor is connected with a positive output end of the self-feedback differential amplifier through the seventh resistor, and a second electrode of the first transistor is respectively connected with an inverting input end of the first amplifier and a positive input end of the second amplifier;
the first electrode of the second transistor is connected with the inverting input end of the self-feedback differential amplifier, the third electrode of the second transistor is connected with the inverting output end of the self-feedback differential amplifier through the eighth resistor, and the second electrode of the second transistor is respectively connected with the non-inverting input end of the first amplifier and the inverting input end of the second amplifier;
the output end of the first amplifier is connected with the positive phase output end of the self-feedback differential amplifier, and the output end of the second amplifier is connected with the negative phase output end of the self-feedback differential amplifier;
one end of the third resistor is electrically connected with one end of the capacitor, the other end of the third resistor is electrically connected with the second electrode of the first transistor, the other end of the capacitor is electrically connected with the second electrode of the second transistor, one end of the first resistor is electrically connected with the second electrode of the first transistor, the other end of the first resistor is electrically connected with a positive power supply, one end of the second resistor is electrically connected with the second electrode of the second transistor, and the other end of the second resistor is electrically connected with the positive power supply;
One end of the fifth resistor is electrically connected with the third electrode of the first transistor, and the other end of the fifth resistor is electrically connected with the second electrode of the third transistor;
one end of the sixth resistor is electrically connected with the third electrode of the second transistor, and the other end of the sixth resistor is electrically connected with the second electrode of the third transistor;
one end of the fourth resistor is electrically connected with the third electrode of the third transistor, the other end of the fourth resistor is connected with a negative power supply, and the first electrode of the third transistor is grounded;
the fifth resistor has the same resistance as the sixth resistor, and the seventh resistor has the same resistance as the eighth resistor.
3. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier of claim 2, wherein the types of the first transistor and the second transistor comprise:
an NPN bipolar transistor and an N channel junction field effect transistor;
the third transistor is of an NPN bipolar transistor type, a first electrode of the third transistor is a base electrode, a second electrode of the third transistor is a collector electrode, and a third electrode of the third transistor is an emitter electrode;
When the first transistor and the second transistor are both the NPN bipolar transistors, the first electrodes of the first transistor and the second transistor are base electrodes, the second electrodes of the first transistor and the second transistor are collector electrodes, and the third electrodes of the first transistor and the second transistor are emitter electrodes;
when the first transistor and the second transistor are both of the type of the N-channel junction field effect transistor, the first electrodes of the first transistor and the second transistor are gates, the second electrodes of the first transistor and the second transistor are drains, and the third electrodes of the first transistor and the second transistor are sources.
4. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to claim 1, wherein the operating mode selection circuit comprises:
the second-stage amplifier, the first analog switch, the second analog switch, the integrator, the pull-down resistor and the feedback resistor;
the positive input end of the secondary amplifier is electrically connected with the positive output end of the self-feedback differential amplifier, the negative input end of the secondary amplifier is electrically connected with the negative output end of the self-feedback differential amplifier, and the output end of the secondary amplifier is electrically connected with the input end of the first analog switch;
The second output end of the first analog switch is electrically connected with the input end of the integrator, and the first output end of the first analog switch is electrically connected with the input end of the second analog switch and is electrically connected with the output end of the integrator;
the first output end of the second analog switch is electrically connected with the pull-down resistor, and the second output end of the second analog switch is electrically connected with the feedback resistor.
5. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to claim 1, wherein the operating modes comprise a lock-out readout mode and an amplification debug mode;
the amplifying and debugging mode is used for testing the device performance of the superconducting quantum interferometer and setting a locking working point;
the lockout read-out mode is used to measure the measured magnetic field.
6. The readout circuit of superconducting quantum interferometer using self-feedback differential amplifier according to claim 4, wherein the bias voltage adjusting circuit is electrically connected to the operation mode selecting circuit by being electrically connected to the secondary amplifier.
7. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier of claim 4, further comprising:
A reset circuit for resetting the readout circuit to an initial state;
the heating circuit is used for heating the superconducting quantum interferometer;
the reset circuit is electrically connected with the integrator.
8. The superconducting quantum interferometer readout circuit of claim 4 employing a self-feedback differential amplifier, wherein the bias flux adjusting circuit is electrically connected to the second output of the second analog switch.
9. The superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier according to claim 4 or 5, wherein the first analog switch is directly associated with the second analog switch, synchronizing the first analog switch with the output of the second analog switch;
when the first analog switch is switched to the first output end, the second analog switch is also switched to the first output end, and the readout circuit is in the amplifying and debugging mode;
when the first analog switch is switched to the second output, the second analog switch is also switched to the second output, when the readout circuit is in the locked readout mode.
10. A superconducting quantum interferometer readout system employing a self-feedback differential amplifier, comprising:
A readout module comprising a superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as claimed in any of claims 1-9;
the heating module comprises a heating resistor, and the reading circuit heats the superconducting quantum interferometer through the heating module;
the feedback module comprises a feedback inductor, and feedback current generated by the reading circuit generates a magnetic field with the same size and opposite direction to the detected magnetic field in the superconducting quantum interferometer through mutual inductance between the feedback module and the superconducting quantum interferometer, so that the reading system is stably locked at a working point; a power module for providing power to the superconducting quantum interferometer readout circuit employing a self-feedback differential amplifier as claimed in any of claims 1 to 9.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11118894A (en) * | 1997-10-17 | 1999-04-30 | Daikin Ind Ltd | Squid fluxmeter |
| RU2246119C2 (en) * | 2003-01-27 | 2005-02-10 | Научно-исследовательское учреждение Институт физики им. Л.В. Киренского Сибирского отделения РАН | Magnetometer with superconductive quantum interferometer transducer |
| CN202083973U (en) * | 2011-05-20 | 2011-12-21 | 北京航空航天大学 | Current biasing circuit used for magnetic sensor |
| CN108680877A (en) * | 2018-04-28 | 2018-10-19 | 中国科学院上海微系统与信息技术研究所 | Balance wiring multichannel superconductive quantum interference Magnetic Sensor |
| US20230012505A1 (en) * | 2021-07-19 | 2023-01-19 | The University Court Of The University Of Glasgow | Sensor readout circuit for a biomagnetism measurement system |
-
2023
- 2023-03-21 CN CN202310278648.4A patent/CN116338535B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11118894A (en) * | 1997-10-17 | 1999-04-30 | Daikin Ind Ltd | Squid fluxmeter |
| RU2246119C2 (en) * | 2003-01-27 | 2005-02-10 | Научно-исследовательское учреждение Институт физики им. Л.В. Киренского Сибирского отделения РАН | Magnetometer with superconductive quantum interferometer transducer |
| CN202083973U (en) * | 2011-05-20 | 2011-12-21 | 北京航空航天大学 | Current biasing circuit used for magnetic sensor |
| CN108680877A (en) * | 2018-04-28 | 2018-10-19 | 中国科学院上海微系统与信息技术研究所 | Balance wiring multichannel superconductive quantum interference Magnetic Sensor |
| US20230012505A1 (en) * | 2021-07-19 | 2023-01-19 | The University Court Of The University Of Glasgow | Sensor readout circuit for a biomagnetism measurement system |
Non-Patent Citations (1)
| Title |
|---|
| 张鹏: "基于 SQUID 的直流电阻电桥指零仪设计", 计量学报, vol. 42, no. 10, pages 1349 - 1352 * |
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