CN116298766B - Test method of insulated gate field effect transistor - Google Patents

Test method of insulated gate field effect transistor Download PDF

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Publication number
CN116298766B
CN116298766B CN202310544773.5A CN202310544773A CN116298766B CN 116298766 B CN116298766 B CN 116298766B CN 202310544773 A CN202310544773 A CN 202310544773A CN 116298766 B CN116298766 B CN 116298766B
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field effect
electrode
test
effect tube
effect transistor
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CN116298766A (en
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李亚飞
唐川
张鸿
晋兆郁
冉闯闯
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Chengdu Cisco Microelectronics Co ltd
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Chengdu Cisco Microelectronics Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor

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Abstract

The invention discloses a test method of an insulated gate field effect transistor, wherein the used test equipment comprises a test base, an electric parameter test device, an adjustable resistor, a potential regulator and a temperature-controllable heater; the testing method is characterized by comprising the following steps of: step S1: and inserting G, D, S electrodes of the field effect transistor to be tested into the corresponding test holes of the test base respectively. The invention can test the working state, the working performance and the types of channels of the field effect transistors well by the test equipment comprising the test base, the electric parameter test device, the adjustable resistor, the potential regulator and the controllable temperature heater and the test method by utilizing the test equipment, and can test a plurality of field effect transistors effectively at one time, thereby greatly improving the test efficiency.

Description

Test method of insulated gate field effect transistor
Technical Field
The invention relates to the technical field of field effect transistor testing, in particular to a testing method of an insulated gate field effect transistor.
Background
The field effect transistor (Field Effect Transistor abbreviation (FET)) is abbreviated as field effect transistor. The field effect transistor is also a voltage control device, and is commonly used for controlling voltage, circuit on-off, generating charge, storing charge and the like, and can be also regarded as voltage amplification, and the effect is similar to the current amplification effect of the triode.
In order to make the field effect tube product in actual use effect, each manufacturer in the industry can test the working state and performance of the field effect tube. At present, an energizing test is usually adopted for a field effect tube in the industry, specifically, the field effect tube is installed in a specific circuit, and a universal meter is used for testing the resistance value and the voltage change under the working state of the field effect tube so as to judge whether the field effect tube is qualified.
Therefore, it is an urgent need to develop a field effect transistor testing method that can solve the above-mentioned problems of the conventional circuit testing method.
Disclosure of Invention
The invention solves the technical problems of the prior circuit testing method and provides a testing method of an insulated gate field effect transistor.
In order to achieve the above purpose, the present invention provides the following technical solutions: the test method of insulated gate field effect transistor, the test equipment used includes test base, electric parameter test device, adjustable resistor, potential regulator, and temperature-controllable heater; the test base is provided with a plurality of groups of penetrating electrode jacks corresponding to the pins of the field effect tube, the groups of penetrating electrode jacks are divided into two rows and are symmetrically arranged on the test base, each group of penetrating electrode jacks consists of a G electrode, a D electrode and an S electrode, and the G electrodes and the S electrodes of the groups of penetrating electrode jacks are respectively connected through conducting strips; each group of G electrode, D electrode and S electrode of the penetrating electrode jack are respectively provided with a test connector; the electric parameter testing device is connected with the testing connector in a plug-in mode, the adjustable resistor is connected with the potential regulator, the potential regulator is respectively connected with the G electrode and the S electrode of the through electrode jack, and the temperature-controllable heater is arranged at the bottom of the testing base; the testing method is characterized by comprising the following steps of:
step S1: and inserting G, D, S electrodes of the field effect transistor to be tested into the corresponding test holes of the test base respectively.
Step S2: the channel property of the field effect transistor is tested to distinguish the channel property of the field effect transistor as an N channel or a P channel.
Step S3: after finishing channel attribute test of the field effect tube, testing the starting voltage of the field effect tube to be tested according to the bisection logic to test whether DS conduction of the field effect tube is normal or not, and entering step S4; and if not, ending the test and judging that the test field effect transistor is damaged.
Step S4: testing the turn-off voltage of the field effect transistor to be tested according to the bisection logic to test whether the DS of the field effect transistor is normally turned off or not, and if so, entering step S5; and if not, ending the test and judging that the test field effect transistor is damaged.
Step S5: after the turn-off voltage test of the field effect transistor is completed, judging whether a bidirectional protection diode is arranged between a D electrode and an S electrode of the field effect transistor to be tested according to the model of the field effect transistor to be tested, and if so, entering a step S6; and if not, shorting G, D, S electrodes of the field effect transistor, releasing voltage UGS established by temporarily storing charges in the previous test by the equivalent junction capacitance between the D electrode and the S electrode of the field effect transistor, and entering step S6 after confirming that the voltage UGS between the D electrode and the S electrode is 0V.
Step S6: adjusting the resistance test gear of the electric parameter testing device to R multiplied by 10k omega, communicating the negative electrode test needle of the electric parameter testing device with the D electrode of the field effect tube, communicating the positive electrode test needle of the electric parameter testing device with the S electrode of the field effect tube, checking whether the pointer of the electric parameter testing device is deviated, if yes, judging that the field effect tube is damaged, and ending the test; if not, the operation state of the field effect tube is judged to be normal, and the step S7 is carried out.
Step S7: testing the performance of the field effect transistor, and ending the test after the performance test result of the field effect transistor is obtained; the performance test steps are as follows:
s7.1: and maintaining the connection state of the negative electrode test needle of the electric parameter test device and the D electrode of the field effect tube, and adjusting the resistance test gear of the electric parameter test device to R multiplied by 1k omega.
S7.2: and starting a temperature-controllable heater to heat the field effect transistor to 90 ℃.
S7.3: after the field effect tube is heated to 90 ℃, respectively touching a G electrode and a D electrode of the field effect tube by using a test conductor, checking whether a pointer of an electric parameter test device is deviated when the test conductor is separated from the G electrode and the D electrode of the field effect tube, if so, the performance of the field effect tube is stable, and entering step S7.4; and if not, the performance of the field effect transistor does not reach the standard, and the test is ended.
S7.4: and (3) regulating the temperature-controllable heater to enable the field effect tube to slowly drop to the indoor temperature during testing from 90 ℃, recording the resistance parameters of the G electrode and the D electrode of the field effect tube at different temperatures, and obtaining the conduction performance parameters of the field effect tube at different temperatures.
S7.5: after the field effect tube is cooled to room temperature, the test conductor is used for simultaneously contacting with the G electrode and the S electrode of the field effect tube, so that a discharge channel is formed between the G electrode and the S electrode, at the moment, whether a pointer of the electric parameter test device can slowly turn to a position of 0 omega is checked, if so, the performance of the field effect tube reaches the standard, and the test is ended.
In a preferred embodiment of the present invention, when the test conductor is used in the steps S7.3 and S7.5, the human body should be prevented from contacting the test electrode of the field effect transistor, so as to prevent the human body induced charges from directly loading the G electrode of the field effect transistor, and causing the breakdown of the G electrode.
As a preferable scheme of the invention, the electric parameter testing device is a mechanical multimeter; in the step S2, the testing procedure for the channel attribute of the field effect transistor is as follows:
s2.1: and adjusting the resistance gear of the electric parameter testing device to R multiplied by 1K.
S2.2: the method comprises the steps of contacting a negative electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a positive electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; less than 5tΩ, and proceeds to step S2.3.
S2.3: the method comprises the steps of contacting a positive electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a negative electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; and the channel property of the field effect transistor is P channel less than 5TΩ, and the test of the channel property is finished.
In a preferred embodiment of the present invention, in the step S3, the testing of the starting voltage of the fet includes the following steps:
s3.1: and 5-12V direct current voltage is input to the adjustable resistor, and after the direct current voltage is adjusted by the adjustable resistor, a 5V direct current working voltage is obtained on the field effect transistor.
S3.2: the voltage of the G electrode and the S electrode of the field effect tube is tested through the electric parameter testing device, and whether the difference DeltaV of the voltage between the G electrode and the S electrode is: 2V < [ delta ] V < 4.5V, namely, the DS of the field effect transistor starts to be in a conducting state, and the step S3.3 is entered; if not, the DS of the field effect tube is not started to be conducted, the field effect tube is damaged, and the test is finished.
S3.3: checking whether the difference value of the voltages between the G electrode and the S electrode is larger than 4.5V, if so, completely conducting DS of the field effect tube, and normally conducting DS of the field effect tube; if not, DS of the field effect tube is abnormal in conduction, the field effect tube is damaged, and the test is finished.
As a preferred solution of the present invention, in the step S4, the step of testing the turn-off voltage of the field effect transistor to be tested includes the following steps:
s4.1: the resistance of the adjustable resistor is adjusted to gradually increase the resistance of the adjustable resistor, namely the level of the G electrode of the field effect transistor is gradually reduced until the level of the G electrode of the field effect transistor is 0V.
S4.2: and after the level of the G electrode of the field effect tube to be tested is 0V, shorting the G, D, S electrode of the field effect tube to enable the field effect tube to discharge rapidly.
S4.3: testing the voltage of an S electrode of the field effect tube by an electric parameter testing device, checking whether the voltage of the S electrode is 0V, if so, turning off DS of the field effect tube normally, and entering step S5; and if not, the field effect transistor is damaged, and the test is finished.
S4.4: checking whether the voltage between the G electrode and the S electrode is equal to 0V, if so, completely closing DS of the field effect tube, and normally closing DS of the field effect tube; if not, the DS of the field effect tube cannot be completely closed, the field effect tube is damaged, and the test is finished.
As a preferable mode of the present invention, after the test is completed in steps S3, S4, S6 and S7, the G electrode and the S electrode of the field effect transistor need to be short-circuited by the test conductor, and the junction capacitance between the G electrode and the S electrode of the field effect transistor is discharged, so that the voltages on the G electrode, the S electrode and the D electrode of the field effect transistor are all 0V.
Compared with the prior art, the invention has the beneficial effects that:
(1) The invention can test the working state, the working performance and the types of channels of the field effect transistors well by the test equipment comprising the test base, the electric parameter test device, the adjustable resistor, the potential regulator and the controllable temperature heater and the test method by utilizing the test equipment, and can test a plurality of field effect transistors effectively at one time, thereby greatly improving the test efficiency.
(2) The testing method of the invention utilizes the temperature-controllable heater to realize the resistance parameters of the G electrode and the D electrode of the field effect tube at different temperatures, and can well obtain the on-conduction resistance values of the field effect tube at different environmental temperatures, thereby being convenient for controlling the environmental temperature according to the use requirement in the actual use of the field effect tube and ensuring the use effect of the field effect tube.
Drawings
FIG. 1 is a block diagram of a test apparatus according to the present invention.
FIG. 2 is a schematic structural view of a test base according to the present invention.
Fig. 3 is a schematic structural view of the temperature controllable heater according to the present invention.
Fig. 4 is a flow chart of the test of the present invention.
Description of the embodiments
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Examples
As shown in FIGS. 1-4, the test method of the insulated gate field effect transistor of the invention uses test equipment comprising a test base, an electrical parameter test device, an adjustable resistor, a potential regulator and a temperature controllable heater. Specifically, the structure of the test base in this embodiment is shown in fig. 2, and in practical production and use, the test base is made of an insulating material, such as rubber, wood, ceramic, and the like. The test base is provided with a plurality of groups of penetrating electrode jacks corresponding to the pins of the field effect tube, the groups of penetrating electrode jacks are divided into two rows and are symmetrically arranged on the test base, and each group of penetrating electrode jacks consists of a G electrode, a D electrode and an S electrode. Wherein, G electrode and S electrode of a plurality of groups of run-through electrode jacks are connected through the conducting strip respectively. The conductive sheet is preferably implemented by a copper sheet in this embodiment. For the convenience of testing, as shown in fig. 2, a test connector is respectively disposed on each group of G electrode, D electrode and S electrode of the through electrode jack.
The electrical parameter testing device is connected with the testing connector in a plugging manner, and the electrical parameter testing device in the embodiment is preferably realized by a conventional mechanical multimeter in the prior art, so that the structure of the electrical parameter testing device is not repeated in the specification. The adjustable resistor is connected with the potential regulator, and the adjustable resistor and the potential regulator in the embodiment are all realized by adopting a conventional adjustable resistor and a conventional potential regulator in the prior art, for example: the RX 20-ohm lacquered wire wound resistor is used as an adjustable resistor, the WTH148 single-connection potentiometer is used as a potential regulator, and the adjustable resistor and the potential regulator can be selected according to the needs in actual use. The potential regulator is respectively connected with the G electrode and the S electrode of the through electrode jack, namely the positive electrode output end of the potential regulator is connected with the G electrode of the through electrode jack, and the negative electrode output end of the potential regulator is connected with the S electrode of the through electrode jack and grounded. In operation, the adjustable resistor is connected to an external 12V dc power supply. The temperature controllable heater is installed at the bottom of the test base, and is preferably implemented by a conventional rack-type temperature controllable heater in the prior art as shown in fig. 3 in this embodiment, for example: the JRQ-III-V temperature control heater, therefore, the structure of the temperature control heater is not repeated in the specification. When the temperature-controllable electrode plug is in use, the voltage input end of the temperature-controllable heater is connected with an external power supply, heat is generated after the temperature-controllable heater is started, the heat is heated by the field effect tube which is tested through the through electrode plug jack, and the field effect tube can be tested in different temperature environments through the adjustment of the temperature-controllable heater.
As shown in fig. 4, the test method includes the steps of:
step S1: and inserting G, D, S electrodes of the field effect transistor to be tested into the corresponding test holes of the test base respectively.
Step S2: the channel property of the field effect transistor is tested to distinguish the channel property of the field effect transistor as an N channel or a P channel. The specific electrical parameter testing device is a mechanical multimeter; in the step S2, the testing procedure for the channel attribute of the field effect transistor is as follows:
s2.1: and adjusting the resistance gear of the electric parameter testing device to R multiplied by 1K.
S2.2: the method comprises the steps of contacting a negative electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a positive electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; less than 5tΩ, and proceeds to step S2.3.
S2.3: the method comprises the steps of contacting a positive electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a negative electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; and the channel property of the field effect transistor is P channel less than 5TΩ, and the test of the channel property is finished.
Step S3: after finishing channel attribute test of the field effect tube, testing the starting voltage of the field effect tube to be tested according to the bisection logic to test whether DS conduction of the field effect tube is normal or not, and entering step S4; and if not, ending the test and judging that the test field effect transistor is damaged. Specifically, the method for testing the starting voltage of the field effect transistor comprises the following steps:
s3.1: and 5-12V direct current voltage is input to the adjustable resistor, and after the direct current voltage is adjusted by the adjustable resistor, a 5V direct current working voltage is obtained on the field effect transistor. In this embodiment, a 12V dc voltage is preferably input to the adjustable resistor, and the 12V dc voltage is adjusted by the adjustable resistor to provide an accurate 5V dc operating voltage for the fet. Under the general condition, 5V direct current voltage is not directly input, because most connecting conductors can cause voltage drop, the field effect tube cannot obtain an accurate 5V direct current working voltage, and thus the test is inaccurate, so that the adjustable resistor is provided with a direct current voltage larger than 5V in the test, and the adjustable resistor can be provided with a direct current voltage of 5V only when the used conductors cannot generate voltage drop.
S3.2: the voltage of the G electrode and the S electrode of the field effect tube is tested through the electric parameter testing device, and whether the difference DeltaV of the voltage between the G electrode and the S electrode is: 2V < [ delta ] V < 4.5V, namely, the DS of the field effect transistor starts to be in a conducting state, and the step S3.3 is entered; if not, the DS of the field effect tube is not started to be conducted, the field effect tube is damaged, and the test is finished.
S3.3: checking whether the difference value of the voltages between the G electrode and the S electrode is larger than 4.5V, if so, completely conducting DS of the field effect tube, and normally conducting DS of the field effect tube; if not, DS of the field effect tube is abnormal in conduction, the field effect tube is damaged, and the test is finished.
Step S4: testing the turn-off voltage of the field effect transistor to be tested according to the bisection logic to test whether the DS of the field effect transistor is normally turned off or not, and if so, entering step S5; and if not, ending the test and judging that the test field effect transistor is damaged. Specifically, the method for testing the turn-off voltage of the field effect transistor to be tested comprises the following steps:
s4.1: the resistance of the adjustable resistor is adjusted to gradually increase the resistance of the adjustable resistor, namely the level of the G electrode of the field effect transistor is gradually reduced until the level of the G electrode of the field effect transistor is 0V.
S4.2: and after the level of the G electrode of the field effect tube to be tested is 0V, shorting the G, D, S electrode of the field effect tube to enable the field effect tube to discharge rapidly.
S4.3: testing the voltage of an S electrode of the field effect tube by an electric parameter testing device, checking whether the voltage of the S electrode is 0V, if so, turning off DS of the field effect tube normally, and entering step S5; and if not, the field effect transistor is damaged, and the test is finished.
S4.4: checking whether the voltage between the G electrode and the S electrode is equal to 0V, if so, completely closing DS of the field effect tube, and normally closing DS of the field effect tube; if not, the DS of the field effect tube cannot be completely closed, the field effect tube is damaged, and the test is finished.
Step S5: after the turn-off voltage test of the field effect transistor is completed, judging whether a bidirectional protection diode is arranged between a D electrode and an S electrode of the field effect transistor to be tested according to the model of the field effect transistor to be tested, and if so, entering a step S6; and if not, shorting G, D, S electrodes of the field effect transistor, releasing voltage UGS established by temporarily storing charges in the previous test by the equivalent junction capacitance between the D electrode and the S electrode of the field effect transistor, and entering step S6 after confirming that the voltage UGS between the D electrode and the S electrode is 0V.
Step S6: adjusting the resistance test gear of the electric parameter testing device to R multiplied by 10k omega, communicating the negative electrode test needle of the electric parameter testing device with the D electrode of the field effect tube, communicating the positive electrode test needle of the electric parameter testing device with the S electrode of the field effect tube, checking whether the pointer of the electric parameter testing device is deviated, if yes, judging that the field effect tube is damaged, and ending the test; if not, the operation state of the field effect tube is judged to be normal, and the step S7 is carried out.
Step S7: testing the performance of the field effect transistor, and ending the test after the performance test result of the field effect transistor is obtained; the performance test steps are as follows:
s7.1: and maintaining the connection state of the negative electrode test needle of the electric parameter test device and the D electrode of the field effect tube, and adjusting the resistance test gear of the electric parameter test device to R multiplied by 1k omega.
S7.2: and starting a temperature-controllable heater to heat the field effect transistor to 90 ℃.
S7.3: after the field effect tube is heated to 90 ℃, respectively touching a G electrode and a D electrode of the field effect tube by using a test conductor, checking whether a pointer of an electric parameter test device is deviated when the test conductor is separated from the G electrode and the D electrode of the field effect tube, if so, the performance of the field effect tube is stable, and entering step S7.4; and if not, the performance of the field effect transistor does not reach the standard, and the test is ended.
S7.4: and (3) regulating the temperature-controllable heater to enable the field effect tube to slowly drop to the indoor temperature during testing from 90 ℃, recording the resistance parameters of the G electrode and the D electrode of the field effect tube at different temperatures, and obtaining the conduction performance parameters of the field effect tube at different temperatures.
S7.5: after the field effect tube is cooled to room temperature, the test conductor is used for simultaneously contacting with the G electrode and the S electrode of the field effect tube, so that a discharge channel is formed between the G electrode and the S electrode, at the moment, whether a pointer of the electric parameter test device can slowly turn to a position of 0 omega is checked, if so, the performance of the field effect tube reaches the standard, and the test is ended.
When the test conductor is used in step S7.3 and step S7.5, the human body should be prevented from contacting with the test electrode of the field effect transistor, so as to prevent the human body induced charges from directly loading the G electrode of the field effect transistor, and causing the G electrode to break down.
In a specific implementation, after the test is completed in steps S3, S4, S6 and S7, the G electrode and the S electrode of the field effect transistor need to be short-circuited by the test conductor, and the junction capacitance between the G electrode and the S electrode of the field effect transistor is discharged, so that the voltages on the G electrode, the S electrode and the D electrode of the field effect transistor are all 0V.
The invention can test the working state, the working performance and the types of channels of the field effect transistors well by the test equipment comprising the test base, the electric parameter test device, the adjustable resistor, the potential regulator and the controllable temperature heater and the test method by utilizing the test equipment, and can test a plurality of field effect transistors effectively at one time, thereby greatly improving the test efficiency. In addition, the testing method utilizes the temperature-controllable heater to realize the resistance parameters of the G electrode and the D electrode of the field effect tube at different temperatures, and can well obtain the on-conduction resistance values of the field effect tube at different environmental temperatures, so that the field effect tube can control the environmental temperature according to the use requirement in actual use, and the use effect of the field effect tube is ensured.
As described above, the present invention can be well implemented.

Claims (5)

1. The test method of insulated gate field effect transistor, the test equipment used includes test base, electric parameter test device, adjustable resistor, potential regulator, and temperature-controllable heater; the test base is provided with a plurality of groups of penetrating electrode jacks corresponding to the pins of the field effect tube, the groups of penetrating electrode jacks are divided into two rows and are symmetrically arranged on the test base, each group of penetrating electrode jacks consists of a G electrode, a D electrode and an S electrode, and the G electrodes and the S electrodes of the groups of penetrating electrode jacks are respectively connected through conducting strips; each group of G electrode, D electrode and S electrode of the penetrating electrode jack are respectively provided with a test connector; the electric parameter testing device is connected with the testing connector in a plug-in mode, the adjustable resistor is connected with the potential regulator, the potential regulator is respectively connected with the G electrode and the S electrode of the through electrode jack, and the temperature-controllable heater is arranged at the bottom of the testing base; the testing method is characterized by comprising the following steps of:
step S1: respectively inserting G, D, S electrodes of the field effect transistor to be tested into corresponding test holes of the test base;
step S2: testing the channel attribute of the field effect transistor to distinguish the channel attribute of the field effect transistor as an N channel or a P channel;
step S3: after finishing channel attribute test of the field effect tube, testing the starting voltage of the field effect tube to be tested according to the bisection logic to test whether DS conduction of the field effect tube is normal or not, and entering step S4; if not, ending the test and judging that the test field effect transistor is damaged;
step S4: testing the turn-off voltage of the field effect transistor to be tested according to the bisection logic to test whether the DS of the field effect transistor is normally turned off or not, and if so, entering step S5; if not, ending the test and judging that the test field effect transistor is damaged;
step S5: after the turn-off voltage test of the field effect transistor is completed, judging whether a bidirectional protection diode is arranged between a D electrode and an S electrode of the field effect transistor to be tested according to the model of the field effect transistor to be tested, and if so, entering a step S6; if not, shorting G, D, S electrode of the field effect transistor, releasing voltage UGS established by temporarily storing charges in the previous test by equivalent junction capacitance between D electrode and S electrode of the field effect transistor, and entering step S6 after confirming that the voltage UGS between the D electrode and the S electrode is 0V;
step S6: adjusting the resistance test gear of the electric parameter testing device to R multiplied by 10k omega, communicating the negative electrode test needle of the electric parameter testing device with the D electrode of the field effect tube, communicating the positive electrode test needle of the electric parameter testing device with the S electrode of the field effect tube, checking whether the pointer of the electric parameter testing device is deviated, if yes, judging that the field effect tube is damaged, and ending the test; if not, judging that the working state of the field effect tube is normal, and entering step S7;
step S7: testing the performance of the field effect transistor, and ending the test after the performance test result of the field effect transistor is obtained; the performance test steps are as follows:
s7.1: maintaining the connection state of the negative electrode test needle of the electric parameter test device and the D electrode of the field effect tube, and adjusting the resistance test gear of the electric parameter test device to R multiplied by 1kΩ;
s7.2: starting a temperature-controllable heater, and heating the field effect transistor to 90 ℃;
s7.3: after the field effect tube is heated to 90 ℃, respectively touching a G electrode and a D electrode of the field effect tube by using a test conductor, checking whether a pointer of an electric parameter test device is deviated when the test conductor is separated from the G electrode and the D electrode of the field effect tube, if so, the performance of the field effect tube is stable, and entering step S7.4; if not, the performance of the field effect transistor does not reach the standard, and the test is ended;
s7.4: the temperature-controllable heater is regulated, so that the temperature of the field effect tube is slowly reduced from 90 ℃ to the indoor temperature in the test, and the resistance parameters of the G electrode and the D electrode of the field effect tube at different temperatures are recorded, so that the conduction performance parameters of the field effect tube at different temperatures are obtained;
s7.5: after the field effect tube is cooled to room temperature, the G electrode and the S electrode of the field effect tube are contacted with each other by using a test conductor, so that a discharge channel is formed between the G electrode and the S electrode, at the moment, whether a pointer of an electric parameter test device can slowly turn to a position of 0 omega is checked, if so, the performance of the field effect tube reaches the standard, and the test is finished;
in the step S3, the testing of the starting voltage of the fet includes the following steps:
s3.1: inputting 5-12V direct current voltage to the adjustable resistor, and adjusting the adjustable resistor to obtain 5V direct current working voltage on the field effect transistor;
s3.2: the voltage of the G electrode and the S electrode of the field effect tube is tested through the electric parameter testing device, and whether the difference Deltav of the voltage between the G electrode and the S electrode is: 2V < [ delta ] V < 4.5V, namely, the DS of the field effect transistor starts to be in a conducting state, and the step S3.3 is entered; if not, the DS of the field effect tube is not started to be conducted, the field effect tube is damaged, and the test is finished;
s3.3: checking whether the difference value of the voltages between the G electrode and the S electrode is larger than 4.5V, if so, completely conducting DS of the field effect tube, and normally conducting DS of the field effect tube; if not, DS of the field effect tube is abnormal in conduction, the field effect tube is damaged, and the test is finished.
2. The method for testing an insulated gate field effect transistor according to claim 1, wherein: when the test conductor is used in the step S7.3 and the step S7.5, the contact between the human body and the test electrode of the field effect transistor should be avoided, so as to prevent the human body induced charges from directly loading the G electrode of the field effect transistor, and cause the breakdown of the G electrode.
3. The method for testing an insulated gate field effect transistor according to claim 2, wherein: the electrical parameter testing device is a mechanical multimeter; in the step S2, the testing procedure for the channel attribute of the field effect transistor is as follows:
s2.1: adjusting the resistance gear of the electric parameter testing device to R multiplied by 1K gear;
s2.2: the method comprises the steps of contacting a negative electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a positive electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; less than 5TΩ, enter step S2.3;
s2.3: the method comprises the steps of contacting a positive electrode test needle of an electric parameter testing device with a G electrode of a field effect tube, respectively contacting a negative electrode test needle of the electric parameter testing device with a D electrode and a S electrode of the field effect tube, checking whether resistance readings of the electric parameter testing device are larger than or smaller than 5TΩ and larger than 5TΩ when the electric parameter testing device is contacted twice, wherein the channel attribute of the field effect tube is an N channel, and the test of the channel attribute is finished; and the channel property of the field effect transistor is P channel less than 5TΩ, and the test of the channel property is finished.
4. The method for testing an insulated gate field effect transistor according to claim 3, wherein: in the step S4, the step of testing the turn-off voltage of the field effect transistor to be tested includes the following steps:
s4.1: the resistance of the adjustable resistor is regulated to gradually increase, namely the level of the G electrode of the field effect transistor is gradually reduced until the level of the G electrode of the field effect transistor is 0V;
s4.2: after the level of the G electrode of the field effect tube to be tested is 0V, shorting the G, D, S electrode of the field effect tube to enable the field effect tube to discharge rapidly;
s4.3: testing the voltage of an S electrode of the field effect tube by an electric parameter testing device, checking whether the voltage of the S electrode is 0V, if so, turning off DS of the field effect tube normally, and entering step S5; if not, the field effect transistor is damaged, and the test is finished;
s4.4: checking whether the voltage between the G electrode and the S electrode is equal to 0V, if so, completely closing DS of the field effect tube, and normally closing DS of the field effect tube; if not, the DS of the field effect tube cannot be completely closed, the field effect tube is damaged, and the test is finished.
5. The method for testing an insulated gate field effect transistor according to claim 4, wherein: after the testing is completed in the steps S3, S4, S6 and S7, the G electrode and the S electrode of the field effect transistor need to be short-circuited by the testing conductor, and the junction capacitance between the G electrode and the S electrode of the field effect transistor is discharged, so that the voltages on the G electrode, the S electrode and the D electrode of the field effect transistor are all 0V.
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