CN116266568A - Packaging structure - Google Patents

Packaging structure Download PDF

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Publication number
CN116266568A
CN116266568A CN202111550508.5A CN202111550508A CN116266568A CN 116266568 A CN116266568 A CN 116266568A CN 202111550508 A CN202111550508 A CN 202111550508A CN 116266568 A CN116266568 A CN 116266568A
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China
Prior art keywords
dimension
lead
chip
section
package structure
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Pending
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CN202111550508.5A
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Chinese (zh)
Inventor
邢大为
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Advanced Semiconductor Materials Shenzhen Co ltd
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Advanced Semiconductor Materials Shenzhen Co ltd
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Priority to CN202111550508.5A priority Critical patent/CN116266568A/en
Priority to TW111147059A priority patent/TW202412234A/en
Publication of CN116266568A publication Critical patent/CN116266568A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

A package structure, comprising: a leadframe structure comprising opposing first and second faces, the leadframe structure comprising: a plurality of chip loading areas; a lead region around each chip loading region, wherein a plurality of protruding lead parts are arranged in the lead region, grooves extending from the first surface to the second surface are arranged between adjacent lead parts and between the lead parts and the chip loading region, the grooves are provided with narrowest parts and widest parts which are distributed along the direction vertical to the surface of the substrate, and the distance between the narrowest parts and the surface of the first surface of the substrate is smaller than the distance between the widest parts and the surface of the first surface of the substrate; a chip fixed on the surface of the first surface of the chip loading area; leads electrically connecting the chip and the lead portions; and the plastic sealing layer is positioned on the lead frame, the chip and the lead, and is used for coating the chip, the lead part and the lead, and is also positioned in the groove. The reliability of the packaging structure is improved.

Description

Packaging structure
Technical Field
The present disclosure relates to semiconductor packaging, and particularly to a packaging structure.
Background
In recent years, as the size and volume of semiconductor devices continue to be miniaturized, packaging requirements in the later stages of semiconductor fabrication are becoming more and more demanding. In order to meet such a demand, various Quad Flat No-leads Package (QFN) type semiconductor devices have been proposed, which are configured by sealing a semiconductor element mounted on a mounting surface thereof with a sealing resin using a lead frame and exposing a part of a lead to the back surface.
The existing packaging processes also need to be improved continuously to meet the higher requirements.
Disclosure of Invention
The invention solves the technical problem of providing a packaging structure so as to meet the packaging technology with higher requirements.
In order to solve the above technical problems, the present invention provides a packaging structure, including: a leadframe structure comprising opposing first and second faces, the leadframe structure comprising: a plurality of chip loading areas; a lead region around each chip loading region, wherein a plurality of protruding lead parts are arranged in the lead region, grooves extending from the first surface to the second surface are arranged between adjacent lead parts and between the lead parts and the chip loading region, the grooves are provided with narrowest parts and widest parts which are distributed along the direction vertical to the surface of the substrate, and the distance between the narrowest parts and the surface of the first surface of the substrate is smaller than the distance between the widest parts and the surface of the first surface of the substrate; a chip fixed on the surface of the first surface of the chip loading area; leads electrically connecting the chip and the lead portions; and the plastic sealing layer is positioned on the lead frame, the chip and the lead, and is used for coating the chip, the lead part and the lead, and is also positioned in the groove.
Optionally, the groove comprises a first subsection and a second subsection positioned at the bottom of the first subsection, the top of the second subsection is communicated with the bottom of the first subsection, and the side wall surface of the second subsection is a concave surface.
Optionally, the narrowest portion is a bottom of the first portion and a top of the second portion, the top of the first portion in a first direction and a second direction parallel to the leadframe surface has a first dimension, the narrowest portion in the first direction and the second direction has a second dimension, a maximum dimension of the widest portion in the first direction and the second direction is a third dimension, the first direction and the second direction are perpendicular, the first dimension is greater than the second dimension, and the second dimension is less than the third dimension.
Optionally, the bottom surface of the second subsection is a concave surface, or the bottom surface of the second subsection is a plane.
Optionally, the cross section of the groove in a direction perpendicular to the surface of the lead frame is an axisymmetric pattern, and the third dimension is greater than the second dimension on one side by more than 10 micrometers.
Optionally, the groove further includes: and the side wall of the third part is recessed into the lead frame.
Optionally, the bottom of the second subsection in the first direction and the second direction and the top of the third subsection in the first direction and the second direction have a fourth dimension, the largest dimension of the third subsection in the first direction being the third dimension of the widest part, the fourth dimension being smaller than the third dimension, the fourth dimension being larger than the second dimension.
Optionally, the cross section of the groove in a direction perpendicular to the surface of the lead frame is an axisymmetric pattern, and the range of the third dimension single side larger than the fourth dimension is larger than 10 micrometers.
Optionally, the bottom surface of the third subsection is a concave surface, or the bottom surface of the third subsection is a plane.
Optionally, the material of the plastic sealing layer comprises epoxy resin.
Optionally, the projected pattern of the chip loading area on the surface of the substrate is rectangular.
Optionally, the lead area includes a plurality of circles of sub-areas, the plurality of circles of sub-areas are concentrically distributed around the chip loading area, and a plurality of mutually separated lead parts are arranged in any circle of sub-areas.
Optionally, the central axes of the two adjacent circles of lead parts are not coincident.
Optionally, the leadframe structure further includes a through hole extending from the leadframe first face to the second face, the through hole being located between a portion of the lead areas, or the through hole being located between a portion of the chip loading area and the lead areas; the plastic layer is also positioned in the through hole.
Optionally, the leadframe structure further includes: a plurality of openings extending from the second face toward the first face and communicating with the recess; the plastic layer is also located within the opening.
Optionally, the material of the leadframe structure includes a metal including copper, a copper alloy, or an iron-nickel alloy having a nickel content of 42%.
Optionally, the dimension of the center point of the adjacent lead portion between the first direction or the second direction is 0.4 mm or more.
Optionally, the size range of the narrowest part of the groove is more than or equal to 0.1 millimeter; the depth of the groove is 50% -70% of the thickness of the substrate.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
according to the technical scheme, grooves extending from the first surface and the second surface are formed between adjacent lead parts of the lead frame structure and between the lead parts and the chip loading area, the grooves are provided with narrowest parts and widest parts which are distributed along the direction perpendicular to the surface of the substrate, and the distance between the narrowest parts and the surface of the first surface of the substrate is smaller than the distance between the widest parts and the surface of the first surface of the substrate. Therefore, the size of the groove along the direction perpendicular to the surface of the lead frame is irregularly changed, so that the plastic sealing layer filled in the groove and the groove can realize a physical clamping structure during plastic sealing, the binding force between the plastic sealing layer and the side wall of the groove is improved, and the reliability of a device after plastic sealing can be improved.
Further, the groove includes a first portion having a first dimension at a top in a first direction parallel to the leadframe surface and a second portion at a bottom of the first portion having a second dimension at a bottom of the first portion and a top of the second portion in the first direction, the largest dimension of the second portion in the first direction being a third dimension, the first dimension being greater than the second dimension, the second dimension being less than the third dimension. The second size is smaller than the third size, so that the plastic sealing layer filled in the groove and the groove can realize a physical clamping structure, the binding force between the plastic sealing layer and the side wall of the groove is improved, and the reliability of the packaged device is improved.
Drawings
FIGS. 1 and 2 are schematic cross-sectional views illustrating a package structure forming process according to an embodiment;
FIGS. 3-6 are schematic diagrams illustrating a package structure according to an embodiment of the invention;
FIGS. 7 and 8 are schematic diagrams of a package structure according to another embodiment of the present invention;
FIGS. 9 and 10 are schematic diagrams of a package structure according to another embodiment of the present invention;
fig. 11 and 12 are schematic views of a package structure according to another embodiment of the present invention.
Detailed Description
As mentioned in the background, the existing packaging process needs to be improved continuously to meet the higher requirements. The analysis will now be described with reference to specific examples.
Fig. 1 and 2 are schematic cross-sectional views illustrating a package structure forming process in an embodiment.
Referring to fig. 1, a lead frame 100 is provided, the lead frame 100 includes a pad region (not labeled), a lead portion (not labeled), and a groove 101 between the pad region and the lead portion; providing a chip 102, and fixing the chip 102 on a bonding pad area; leads 103 are provided which electrically connect the chip 102 and the lead portions.
Referring to fig. 2, a molding layer 104 is formed on the leadframe 100, the chip 102 and the leads 103 are located in the molding layer 104, and the molding layer 104 is also located in the groove 101.
The package structure, the plastic sealing layer 104 is located in the groove 101, so that the contact area between the plastic sealing layer 104 and the surface of the lead frame 100 is increased, and the bonding force between the plastic sealing layer 104 and the lead frame 100 is increased, which is beneficial to improving the reliability of the package structure.
However, since the recess 101 is a bowl-shaped structure with a wide top and a narrow bottom, the plastic layer 104 and the lead frame 100 are bonded together by a surface bonding force, and when a temperature change or an external force is encountered, delamination of the plastic layer 104 and the lead frame 100 easily occurs, so that the chip fails.
In order to solve the above-mentioned problems, the present invention provides a package structure, in which grooves extending from a first surface and a second surface are provided between adjacent lead portions of a lead frame structure and between the lead portions and a chip loading area, the grooves having narrowest portions and widest portions distributed in a direction perpendicular to a surface of a substrate, and a space between the narrowest portions and the surface of the first surface of the substrate is smaller than a space between the widest portions and the surface of the first surface of the substrate. Therefore, the size of the groove along the direction perpendicular to the surface of the lead frame is irregularly changed, so that the plastic sealing layer filled in the groove and the groove can realize a physical clamping structure during plastic sealing, the binding force between the plastic sealing layer and the side wall of the groove is improved, and the reliability of a device after plastic sealing can be improved.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 3 to 6 are schematic views of a package structure according to an embodiment of the invention.
Referring to fig. 3 to 6, the package structure includes:
referring to fig. 3 to 5, fig. 3 is a top view of fig. 4 and 5, fig. 4 is a schematic structural view of fig. 3 along a section line AA1, fig. 5 is a schematic structural view of fig. 3 along a section line BB1, the lead frame structure includes a first face 201 and a second face 202 opposite to each other, and the lead frame structure includes: a plurality of chip loading areas I; a lead section around each chip loading section I, the lead section including a plurality of raised lead sections 204, grooves 205 extending from the first face 201 to the second face 202 between adjacent lead sections 204, and between the lead sections 204 and the chip loading section I, the grooves 205 having narrowest and widest sections distributed in a direction perpendicular to the surface of the substrate 200, a spacing between the narrowest section and the surface of the first face 201 of the substrate 200 being smaller than a spacing between the widest section II and the surface of the first face 201 of the substrate 200;
a chip 232 fixed to the first surface of the chip loading area I;
leads 231 electrically connecting the chip 232 and the lead portions 204;
a molding layer 230 on the leadframe, on the chip 232 and on the leads 231, the molding layer 230 encapsulating the chip 232, the lead portions 204 and the leads 231, the molding layer 230 also being located within the recess 205.
The lead frame structure has grooves 205 extending from the first surface 201 to the second surface 202 between adjacent lead portions 204 and between the lead portions 204 and the chip loading area I, the grooves 205 have narrowest portions and widest portions distributed in a direction perpendicular to the surface of the substrate 200, and the spacing between the narrowest portions and the surface of the first surface 201 of the substrate 200 is smaller than the spacing between the widest portions and the surface of the first surface 201 of the substrate 200. Therefore, the dimensions of the groove 205 along the direction perpendicular to the surface of the lead frame are irregularly changed, so that the plastic layer 230 filled in the groove 205 and the groove 205 can realize a physical clamping structure during plastic packaging, the bonding force between the plastic layer 230 and the side wall of the groove 205 is improved, and the reliability of the device after plastic packaging can be improved.
In this embodiment, the leadframe structure includes a metal including copper, a copper alloy, or an iron-nickel alloy (42 alloy) having a nickel content of 42%.
The material of the plastic layer 230 includes epoxy.
In the present embodiment, the dimension range of the center point of the adjacent lead portion 204 between the first direction or the second direction is 0.4 mm or more.
In other embodiments, the leadframe structure further includes a through-hole extending from the leadframe first face to the second face, the through-hole being located between a portion of the lead areas or the through-hole being located between a portion of the chip loading area and the lead areas; the plastic layer is also positioned in the through hole.
With continued reference to fig. 3 to 5, in the present embodiment, the projected pattern of the chip loading area I on the surface of the substrate 200 is rectangular.
In this embodiment, the lead area includes a plurality of circles of sub-areas II, the circles of sub-areas II are concentrically distributed around the chip loading area I, and any circle of sub-areas I has a plurality of mutually separated lead portions 204 therein.
In this embodiment, the central axes of the lead portions 204 in the adjacent two circles of sub-regions II do not coincide. So that a multi-layered wire is subsequently implemented between the wire portion 204 and the chip loading area I.
With continued reference to fig. 3 to 5, in this embodiment, the groove 205 includes a first portion 206 and a second portion 207 located at the bottom of the first portion 206, where the top of the second portion 207 is in communication with the bottom of the first portion 206, and the sidewall surface of the second portion 207 is a concave surface.
The narrowest part is the bottom of the first subsection 206 and the top of the second subsection 207, the first subsection 206 has a first dimension d1 on the top in a first direction X and a second direction Y parallel to the surface of the lead frame, the narrowest part has a second dimension d2 in the first direction X and the second direction Y, the maximum dimension of the widest part in the first direction X and the second direction Y is a third dimension d3, the first dimension d1 is larger than the second dimension d2, the second dimension d2 is smaller than the third dimension d3, and the first direction X and the second direction Y are perpendicular to each other.
Such that the dimension of the groove 205 in the direction perpendicular to the leadframe surface is irregularly varied, the first dimension d1 being larger than the second dimension d2, the second dimension d2 being smaller than the third dimension d3. The narrowest part of the plastic sealing layer 230 filled in the groove 205 and the groove 205 can realize a physical clamping structure during plastic sealing, so that the bonding force between the plastic sealing layer 230 and the side wall of the groove 205 is improved, and the reliability of the device after plastic sealing can be improved.
In this embodiment, the bottom surface of the second section 207 is a concave surface.
In other embodiments, the bottom surface of the second subsection is planar.
In this embodiment, the cross section of the groove 205 in the direction perpendicular to the surface of the lead frame is an axisymmetric pattern, and the third dimension d3 is greater than the second dimension d2 on one side and is greater than 10 micrometers. To ensure that the plastic package material filled in the groove 205 later, the plastic package material in the second part 207 and the narrowest part of the groove 205 can realize a physical clamping structure, thereby improving the bonding force between the plastic package material and the side wall of the groove 205.
In this embodiment, the narrowest portion of the groove 205 has a size range of 0.1 mm or more; the depth of the groove 205 is 50% -70% of the thickness of the substrate.
Fig. 7 and 8 are schematic diagrams of a package structure according to another embodiment of the invention.
Referring to fig. 7, fig. 7 is a schematic structural diagram of a lead frame, and fig. 7 is consistent with the view angle of fig. 5, in this embodiment, the recess 205 includes a first portion 406 and a second portion 407 located at the bottom of the first portion 406, the top of the second portion 407 is communicated with the bottom of the first portion 406, and the sidewall surface of the second portion 407 is a concave surface; the recess 205 further comprises: a third section 408 located at the bottom of the second section 407, wherein the top of the third section 408 is in communication with the bottom of the second section 407, and the side wall surface of the third section 408 is a concave surface.
Referring to fig. 8, fig. 8 is a schematic view of a package structure, where the package structure includes: a leadframe structure as described in fig. 7; a chip 432 fixed to the first surface of the chip loading area I; a lead 431 electrically connecting the chip 432 and the lead portion 204; a molding layer 430 on the leadframe, on the chip 432, and on the leads 431, the molding layer 430 encapsulating the chip 432, the lead portions 204, and the leads 431, the molding layer 430 also being located within the recess 205.
The narrowest part is the bottom of the first subsection 406 and the top of the second subsection 407, the first subsection 406 has a first dimension d1 at the top in a first direction X and a second direction Y parallel to the surface of the lead frame, the narrowest part has a second dimension d2 in the first direction X and the second direction Y, the maximum dimension of the widest part in the first direction X and the second direction Y is a third dimension d3, the first dimension d1 is larger than the second dimension d2, and the second dimension d2 is smaller than the third dimension d3.
The bottom of the second subsection 407 in the first direction X and the second direction Y and the top of the third subsection 408 in the first direction X and the second direction Y have a fourth dimension d4, the largest dimension of the third subsection 408 in the first direction being the widest part of the third dimension d3, the fourth dimension d4 being smaller than the third dimension d3, the fourth dimension d4 being larger than the second dimension d2.
The dimensions of the groove 205 in the direction perpendicular to the surface of the lead frame are irregularly varied, the first dimension d1 is larger than the second dimension d2, the second dimension d2 is smaller than the third dimension d3, the fourth dimension d4 is smaller than the third dimension d3, and the fourth dimension d4 is larger than the second dimension d2. The plastic layer 430 filled in the groove 205 and the narrowest part of the groove 205 can realize a physical clamping structure during plastic packaging, so that the bonding force between the plastic packaging material and the side wall of the groove 205 is improved, and the reliability of the device after plastic packaging can be improved.
In this embodiment, the cross section of the groove 205 in the direction perpendicular to the surface of the lead frame is an axisymmetric pattern, and the third dimension d3 is greater than the fourth dimension d4 on one side and is greater than 10 micrometers.
In this embodiment, the bottom surface of the third section 408 of the groove 205 is a concave surface.
In other embodiments, the bottom surface of the third subsection is planar.
Fig. 9 and 10 are schematic views of a package structure according to another embodiment of the invention.
Referring to fig. 9, fig. 9 is a schematic structural view of a lead frame, fig. 9 is a schematic structural view based on fig. 5, and the structure of fig. 9 is different from the structure of fig. 5 in that the lead frame structure further includes: a plurality of openings 620 extend from the second face 202 toward the first face 201 and are in communication with the recess 205.
Referring to fig. 10, fig. 10 is a schematic diagram of a package structure, which includes: a leadframe structure as described in fig. 9; a chip 632 fixed to the first surface of the chip loading area I; leads 631 electrically connecting the chip 632 and the lead portions 204; a plastic layer 630 on the leadframe, on the chip 632, and on the leads 631, the plastic layer 630 encapsulating the chip 632, the lead portions 204, and the leads 631, the plastic layer 630 also being located within the grooves 205; the molding layer 630 is also located within the opening 620.
Thus, the molding layer 630 may be further filled into the opening 620, and the molding layer 630 located in the opening 620 may perform a further isolation function when the multi-layer wire is subsequently implemented between the wire portion 204 and the chip loading area I, which is beneficial to implementing the multi-layer wire.
Fig. 11 and 12 are schematic views of a package structure according to another embodiment of the invention.
Referring to fig. 11, fig. 11 is a schematic structural view of a lead frame, fig. 11 is a schematic structural view based on fig. 7, and the structure of fig. 11 is different from the structure of fig. 7 in that the lead frame structure further includes: a plurality of openings 720 extending from the second face 202 toward the first face 201 and communicating with the recess 205.
Referring to fig. 12, fig. 12 is a schematic view of a package structure, which includes: a leadframe structure as described in fig. 11; a chip 732 fixed to the first surface of the chip loading region I; leads 731 electrically connecting the chip 732 and the lead portions 204; a molding layer 730 on the leadframe, on the chip 732 and on the leads 731, the molding layer 730 encapsulating the chip 732, the lead portions 204 and the leads 731, the molding layer 730 also being located within the recess 205; the plastic layer 730 is also positioned within the opening 720.
Therefore, the plastic layer 730 can be filled into the opening 720, and when the multi-layer lead is realized between the lead part 204 and the chip loading area I, the plastic layer 730 positioned in the opening 720 plays a further role in isolation, which is beneficial to realizing the multi-layer lead.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (18)

1. A package structure, comprising:
a leadframe structure comprising opposing first and second faces, the leadframe structure comprising: a plurality of chip loading areas; a lead region around each chip loading region, wherein a plurality of protruding lead parts are arranged in the lead region, grooves extending from the first surface to the second surface are arranged between adjacent lead parts and between the lead parts and the chip loading region, the grooves are provided with narrowest parts and widest parts which are distributed along the direction vertical to the surface of the substrate, and the distance between the narrowest parts and the surface of the first surface of the substrate is smaller than the distance between the widest parts and the surface of the first surface of the substrate;
a chip fixed on the surface of the first surface of the chip loading area;
leads electrically connecting the chip and the lead portions;
and the plastic sealing layer is positioned on the lead frame, the chip and the lead, and is used for coating the chip, the lead part and the lead, and is also positioned in the groove.
2. The package structure of claim 1, wherein the recess comprises a first section and a second section at a bottom of the first section, a top of the second section being in communication with a bottom of the first section, a sidewall surface of the second section being a recessed surface.
3. The package structure of claim 2, wherein the narrowest portion is a bottom of a first section and a top of a second section, the first section having a first dimension in a first direction and a top of a second direction parallel to the leadframe surface, the narrowest portion having a second dimension in the first direction and the second direction, a largest dimension of the widest portion in the first direction and the second direction being a third dimension, the first direction and the second direction being perpendicular, the first dimension being greater than the second dimension, the second dimension being less than the third dimension.
4. The package structure of claim 2, wherein the bottom surface of the second section is a concave surface or the bottom surface of the second section is a planar surface.
5. The package of claim 3, wherein the grooves have an axisymmetric pattern in cross-section in a direction perpendicular to the leadframe surface, and wherein the third dimension is greater than the second dimension on one side by more than 10 microns.
6. The package structure of claim 3, wherein the recess further comprises: and the side wall of the third part is recessed into the lead frame.
7. The package structure of claim 6, wherein a bottom of the second portion in the first direction and the second direction and a top of the third portion in the first direction and the second direction have a fourth dimension, the largest dimension of the third portion in the first direction being a third dimension of the widest portion, the fourth dimension being smaller than the third dimension, the fourth dimension being greater than the second dimension.
8. The package of claim 7, wherein the grooves have an axisymmetric pattern in cross-section in a direction perpendicular to the leadframe surface, and wherein the third dimension is greater than the fourth dimension on one side by more than 10 microns.
9. The package structure of claim 6, wherein the bottom surface of the third section is a concave surface or the bottom surface of the third section is a planar surface.
10. The package structure of claim 1, wherein the material of the plastic layer comprises an epoxy.
11. The package structure of claim 1, wherein the projected pattern of the chip loading area on the surface of the substrate is rectangular.
12. The package structure of claim 11 wherein said lead area includes a plurality of circles of sub-areas, said plurality of circles of sub-areas being concentrically distributed around said chip loading area, any circle of sub-areas having a plurality of mutually discrete lead portions therein.
13. The package structure of claim 12, wherein the central axes of two adjacent turns of the lead portion do not coincide.
14. The package structure of claim 1, wherein the leadframe structure further comprises a through-hole extending from the leadframe first face to the second face, the through-hole being located between a portion of the lead areas or the through-hole being located between a portion of the chip-loading area and a lead area; the plastic layer is also positioned in the through hole.
15. The package structure of claim 1, wherein the leadframe structure further comprises: a plurality of openings extending from the second face toward the first face and communicating with the recess; the plastic layer is also located within the opening.
16. The package structure of claim 1, wherein the material of the leadframe structure comprises a metal comprising copper, a copper alloy, or an iron-nickel alloy having a nickel content of 42%.
17. The package structure of claim 1, wherein a dimension of a center point of adjacent lead portions between the first direction or the second direction is 0.4 mm or more.
18. The package structure of claim 3, wherein the narrowest portion of the recess has a size in the range of 0.1 mm or more; the depth of the groove is 50% -70% of the thickness of the substrate.
CN202111550508.5A 2021-12-17 2021-12-17 Packaging structure Pending CN116266568A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202111550508.5A CN116266568A (en) 2021-12-17 2021-12-17 Packaging structure
TW111147059A TW202412234A (en) 2021-12-17 2022-12-07 Package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111550508.5A CN116266568A (en) 2021-12-17 2021-12-17 Packaging structure

Publications (1)

Publication Number Publication Date
CN116266568A true CN116266568A (en) 2023-06-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111550508.5A Pending CN116266568A (en) 2021-12-17 2021-12-17 Packaging structure

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CN (1) CN116266568A (en)
TW (1) TW202412234A (en)

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TW202412234A (en) 2024-03-16

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