CN116185873A - Storage component testing method and system, storage medium and electronic equipment - Google Patents
Storage component testing method and system, storage medium and electronic equipment Download PDFInfo
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Abstract
The invention discloses a storage component testing method and system, a storage medium and electronic equipment. The method comprises the following steps: under the condition that a first instruction sent by a host is received, performing compatibility test of the master device and the slave device to be tested by using test parameters carried by the first instruction; wherein, the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory; determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of performing compatible testing corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters; and determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the value set and the value allowed range. The problem of in prior art whether to the test efficiency of whether storage module is compatible with other equipment lower is solved.
Description
Technical Field
The present invention relates to the field of testing, and in particular, to a method and system for testing a storage component, a storage medium, and an electronic device.
Background
At present, a TF Card (Trans-flash Card, generally referred to as a Micro SD Card) is widely applied to various occasions, and the compatibility of the TF Card is tested more and more seriously due to different types of mobile equipment and different application scenes.
The current common mode is to insert a card into a device to obtain the state information of a slave device to be tested, find a matched device, perform operation once to obtain the result of the state information, and then judge whether the result reaches the expectation. In this test mode, a single test cannot prove the compatibility of a large number of SD cards (Secure Digital Memory Card/SD card) and eMMC (Embedded Multi Media Card, embedded memory), a large number of repeated tests are required, and TF cards, SD cards and eMMC with optimal compatibility cannot be automatically evaluated, so that a large amount of manpower and time are required to be consumed, and the test efficiency is low.
Aiming at the problems of low testing efficiency and the like of whether a storage component is compatible with other equipment in the prior art, no effective solution is proposed at present.
Disclosure of Invention
The embodiment of the invention provides a storage component testing method and system, a storage medium and electronic equipment, which at least solve the problem of low testing efficiency of whether a storage component is compatible with other equipment in the prior art.
According to an aspect of an embodiment of the present invention, there is provided a storage component testing method, including: under the condition that a first instruction sent by a host is received, performing compatibility test of the master device and the slave device to be tested by using test parameters carried by the first instruction; the slave device to be tested at least comprises: the main equipment is a device adapting to the slave equipment; determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of performing compatible testing corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters; and determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the value set and the value allowed range.
According to another aspect of the embodiment of the present invention, there is also provided a storage component testing system, including: the host is used for sending a first instruction to the bridge chip; the bridge chip is used for carrying out compatible test on the master equipment and the slave equipment to be tested by using the test parameters carried by the first instruction, determining a numerical value set corresponding to a plurality of preset target parameters of the master equipment in the process of carrying out the compatible test corresponding to the slave equipment to be tested, and determining a numerical value allowed range supported by the slave equipment to be tested for each parameter in the plurality of preset target parameters; the protocol analyzer is used for carrying out normalization processing on a numerical value set corresponding to a plurality of preset target parameters in the master device, mapping normalization processing results to the numerical value allowable range, and determining whether the master device is compatible with a first storage component and/or a second storage component in the slave device to be tested according to the numerical value set and the numerical value allowable range; the slave device to be tested is used for installing a first storage component corresponding to the secure digital card to be subjected to compatibility test and a second storage component corresponding to the embedded memory; and the master device is used for adapting the slave device.
According to a further aspect of embodiments of the present invention, there is also provided a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the method of any of the method embodiments when run.
According to a further aspect of the embodiments of the present invention, there is also provided an electronic device comprising a memory in which a computer program is stored, and a processor arranged to perform the method of any of the method embodiments described above by means of the computer program.
In the embodiment of the invention, under the condition that a first instruction sent by a host is received, the compatibility test of the master device and the slave device to be tested is carried out by using the test parameters carried by the first instruction; wherein, the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory; determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of performing compatible testing corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters; and determining whether the main equipment is compatible with the first storage component and/or the second storage component in the slave equipment to be tested or not according to the numerical value set and the numerical value allowed range, namely, establishing a connection between the main equipment and the slave equipment to be tested, installing a secure digital card and an embedded memory in the slave equipment to be tested, and then carrying out compatibility test on the secure digital card and the embedded memory in the same equipment, thereby reducing repeated test times, greatly improving the test efficiency of the compatibility test, and further solving the problems of lower test efficiency and the like on whether the storage component is compatible with other equipment in the prior art.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a block diagram of a hardware architecture of a target terminal of a storage component testing method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for testing a storage component according to an embodiment of the invention;
fig. 3 is a schematic structural diagram corresponding to a testing method applicable to parallel signal SD card and eMMC compatibility screening according to an alternative embodiment of the present invention;
FIG. 4 is a flow chart of device under test compatibility range acquisition in accordance with an alternative embodiment of the present invention;
FIG. 5 is a flow chart of a protocol analyzer acquiring master device information according to an alternative embodiment of the present invention;
FIG. 6 is a schematic diagram of a storage component testing apparatus according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The method embodiments provided by the embodiments of the present application may be executed in a target terminal, a mobile terminal, or a similar computing device. Taking the operation on the target terminal as an example, fig. 1 is a hardware structure block diagram of the target terminal of a storage component testing method according to an embodiment of the present invention. As shown in fig. 1, the target terminal 10 may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU, a programmable logic device FPGA, or the like processing means) and a memory 104 for storing data, and optionally, a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the configuration shown in fig. 1 is merely illustrative, and is not intended to limit the configuration of the target terminal. For example, the target terminal 10 may also include more or fewer components than shown in fig. 1, or have a different configuration than the equivalent functions shown in fig. 1 or more than the functions shown in fig. 1.
The memory 104 may be used to store computer programs, such as software programs of application software and modules, such as computer programs corresponding to the method for testing a storage element in the embodiment of the present invention, and the processor 102 executes the computer programs stored in the memory 104 to perform various functional applications and data processing, that is, to implement the method described above. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the target terminal 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used to receive or transmit data via a network. The specific example of the network described above may include a wireless network provided by a communication provider of the target terminal 10. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.
Optionally, as an optional embodiment, as shown in fig. 2, the storage component testing method includes:
step S202, under the condition that a first instruction sent by a host is received, performing compatibility test of a master device and a slave device to be tested by using test parameters carried by the first instruction; the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory; the master device is a device for adapting to the slave device;
step S204, determining a value set corresponding to a plurality of preset target parameters of the master device in the process of performing the compatibility test corresponding to the master device and the slave device to be tested, and determining a value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters;
step S206, determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the value set and the value allowed range.
Through the steps, under the condition that a first instruction sent by a host is received, the compatibility test of the master device and the slave device to be tested is carried out by using the test parameters carried by the first instruction; wherein, the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory; determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of performing compatible testing corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters; and determining whether the main equipment is compatible with the first storage component and/or the second storage component in the slave equipment to be tested or not according to the numerical value set and the numerical value allowed range, namely, establishing a connection between the main equipment and the slave equipment to be tested, installing a secure digital card and an embedded memory in the slave equipment to be tested, and then carrying out compatibility test on the secure digital card and the embedded memory in the same equipment, thereby reducing repeated test times, greatly improving the test efficiency of the compatibility test, and further solving the problems of lower test efficiency and the like on whether the storage component is compatible with other equipment in the prior art.
It will be understood that in practical application, the host (which may be understood as a computer) and the master device are not the same device, and the slave device refers to the SD card to be tested and Emmc. The slave device is arranged on the bridge piece, after the bridge piece is connected with the host, the host can send a mode, voltage and frequency to be tested, the slave device is tested, so that sampling point frequency which can be supported by the slave device is obtained, then a reference is provided for the master device to adapt to the slave device, and the compatibility effectiveness is ensured.
In an exemplary embodiment, using the test parameters carried by the first instruction to perform a compatibility test of the master device and the slave device to be tested, including: establishing communication connection between the host and the slave to be tested through a bridge chip; the bridge chip is connected with the host through a first target interface, and the bridge chip is connected with the slave equipment to be tested through a second target interface; the first instruction is configured to carry test parameters, where the test parameters at least include: a transmission mode when the main equipment is in communication, a signal voltage when the main equipment is in communication, a signal frequency when the main equipment is in communication, and a sampling point when the main equipment is in communication; and under the condition that the bridge chip receives the first instruction sent by the host, performing compatibility test of the master device and the slave device to be tested by using the test parameters carried by the first instruction.
In practical application, the host is connected with the bridge chip through a usb interface, the mode, voltage and frequency to be tested are sent through a write buffer instruction, the bridge chip starts testing (testing comprises power-on, reading, writing and the like) according to the received data setting related states, and the sampling point supporting range of the slave device under the mode, the voltage and the frequency is judged through adjusting different sampling points. Meanwhile, the host end can continuously send a read buffer instruction, if the slave equipment completes the test, the information (including high points and low points) of the sampling points is uploaded, and then the host sends the next group of test sample through the write buffer instruction again, and the steps are repeated until the test is completed.
It can be understood that the read buffer instruction is mainly used for acquiring the sampling information and the test data information determined in the bridge chip in real time.
Optionally, determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the value set and the value allowed range includes the following steps:
step 302, uploading the value set and the value allowable range to a protocol analyzer;
step 304, determining a relative position relationship between a target mapping point corresponding to the value set fed back by the protocol analyzer and a target mapping range corresponding to the value allowable range;
Step 306, determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the relative position relation.
It should be noted that, in order to be more attached to practical application, after the protocol analyzer obtains the value set and the value allowed range, it is necessary to normalize the coordinates of the value allowed range corresponding to the slave device to be tested, calculate the coordinates (r, θ, phi) of each point in the three-dimensional spherical coordinate system, calculate the target coordinates of the value set corresponding to the master device in the figure according to the normalized parameters, select the points in the three-dimensional spherical coordinate system close to the angular coordinates of the target coordinates for comparison, and indicate compatibility if the radius corresponding to the target coordinates is far smaller than the radius of the selected point; the presence of very close points indicates compatibility doubts; and if the corresponding radius of the target coordinates is larger than the corresponding radius, indicating that the target coordinates are not compatible.
Through the steps, the compatibility can be evaluated by using a quantitative means, the compatibility of the newly introduced master device and the newly introduced slave device can be widely evaluated, the evaluation efficiency of the compatibility under the condition that a single storage device is provided with a large number of devices to be adapted is improved, and the recognition delay of the compatibility determination is reduced.
The above-mentioned step S206 is implemented in a plurality of ways to determine whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the relative positional relationship, and in an alternative embodiment, the method may be implemented by the following schemes: determining that the main device is compatible with a compatible result of a first storage component and/or a second storage component in the slave device to be tested under the condition that the relative position relationship indicates that the target mapping point is in a target area of the target mapping range, wherein the target area is a middle range area in the target mapping range; determining that a compatibility result between the master device and a first storage component and/or a second storage component in the slave device to be tested is suspected to be compatible under the condition that the relative position relationship indicates that the target mapping point is outside a target area of the target mapping range and is within the target mapping range; and if the relative position relationship indicates that the target mapping point is out of the target mapping range, determining that the compatibility result of the master device and the first storage component and/or the second storage component in the slave device to be tested is incompatible.
It should be noted that, in order to improve accuracy of data comparison, a protocol analyzer may be used to obtain voltage, frequency, sampling point and usage pattern of the master device during communication, and map this point to a slave device support range diagram, if it is obvious in the diagram, it indicates that the master device should be compatible; representing compatibility doubts if on or very near the edge; if it is clearly outside the figure, it indicates that it is not compatible.
As an optional implementation manner, determining a set of values corresponding to a plurality of preset target parameters of the master device in the process of performing the compatibility test corresponding to the master device and the slave device to be tested, includes: performing instruction analysis on a first instruction sent by the host to obtain test parameters corresponding to the compatible test; and determining the actual values corresponding to the test parameters in different test stages to obtain a value set corresponding to a plurality of preset target parameters of the main equipment.
Optionally, determining a numerical allowable range supported by the slave device to be tested for each parameter of the plurality of preset target parameters includes: determining data transmission parameters corresponding to the secure digital card and the embedded memory which are installed in the slave equipment to be tested; acquiring transmission information supported by the slave equipment to be tested at different sampling points; and determining a numerical value allowed range supported by the slave device to be tested for each parameter of the plurality of preset target parameters according to the data transmission parameters and the transmission information.
It can be understood that by obtaining a three-dimensional scatter diagram of the limit voltages, frequencies and sampling points supported by the slave device in a certain mode, a range surrounded by adjacent data connections in the scatter diagram can be considered as a supporting range of the voltages, frequencies and sampling points supported by the slave device in a corresponding mode, so that compatibility of different slave devices in the same mode can be evaluated.
The comparison between the master device and the slave device is performed by a protocol analyzer, which is a device for acquiring the voltage, frequency and sampling point range of the master device, wherein the master device is adapted to the slave device. The voltage, frequency and sampling point supporting range of the slave device and the master device are respectively obtained from the test flow. The voltage, frequency and sampling point of the master device are mapped into the supporting range of the slave device after being normalized by a calculation program, and if the voltage, frequency and sampling point fall in the supporting range diagram of the slave device, compatibility is judged.
In order to better understand the technical solutions of the embodiments and the alternative embodiments of the present invention, the flow of the storage component testing method described above is explained below with reference to examples, but the flow is not limited to the technical solutions of the embodiments of the present invention.
In the related art, after the relay is connected through the FPC, the list of the expansion card is obtained, and according to the connection between the intelligent equipment and the expansion card, the state information of the expansion card is obtained, the compatibility of the expansion card is judged, the testing process is simplified, and the efficiency is improved.
However, the following risks exist with the adoption of the above-mentioned patent technology: after the intelligent device acquires the state information of the memory card, a test report is generated based on comparison of a predicted result and a current test result, compatibility cannot be automatically evaluated, a new main control has to be tested again, an expansion card is tested on the corresponding intelligent device, but different SD cards and eMMC are required to be tested on different intelligent devices, a test scheme is required to be redesigned, and a large number of devices are required to provide a test environment.
Another related approach is to transmit test signals to the independent circuits through the test board, so that it can only test the integrity of the supporting protocol, and cannot evaluate the compatibility of the protocol.
Further, the compatibility of the SD card and eMMC may be affected by the signal voltage, sampling point, frequency and transmission mode supported by the master device, and although the protocol specifies the voltage, frequency and sampling point of the communication, due to the difference of the master devices, there may be a certain voltage offset and frequency variation of the master device, which sometimes may cause incompatibility of the master device and the slave device,
It should be noted that the variation of any one of the three may lead to a decrease in the latitude of the other two, and it is particularly obvious that as the frequency increases, the latitude of the device for the sampling point decreases significantly, i.e. there is a correlation between the three parameters, so that when no reference is made to the other parameters, no compatible conclusion can be drawn in the range by a single parameter. It is desirable to provide a new way of evaluation to make the determination.
As an alternative implementation manner, a testing method suitable for parallel signal SD card and eMMC compatibility screening is provided, which is used for quantitatively evaluating the compatibility of master equipment and slave equipment, after the host sends a testing instruction by acquiring the voltage, frequency and sampling point information of the master equipment, the bridge chip sets a corresponding state according to the received testing instruction to test, and after the testing is finished, the range of the voltage, frequency and sampling point supported by the equipment to be tested is acquired, so that the compatibility of the equipment to be tested is evaluated.
Optionally, fig. 3 is a schematic structural diagram corresponding to a testing method applicable to parallel signal SD card and eMMC compatibility screening according to an alternative embodiment of the present invention, including the following contents:
The host 32, the bridge chip 34, the slave device 36 to be tested, wherein the slave device 36 to be tested comprises: a switch chip 40, an SD card 42, an eMMC44;
it should be noted that, the eMMC is connected with the switch chip through the interface socket, and the SD card and eMMC on the switch chip can be flexibly replaced according to the actual test requirement, and the host may be a computer host or other devices with data storage requirements, which is not limited in this application too much.
As an alternative embodiment, the specific implementation manner of the method is as follows:
optionally, fig. 4 is a flowchart of obtaining a compatibility range of a device under test according to an alternative embodiment of the present invention; the method comprises the following steps:
step one, a host is connected with a bridge piece through a usb interface, and a mode, voltage and frequency to be tested are sent through a write buffer instruction;
step two, the bridge chip (namely the bridge chip) starts testing (testing comprises power-on, reading, writing and the like) according to the received data setting related states;
and thirdly, judging the supporting range of the sampling point of the slave device under the mode, the voltage and the frequency by adjusting different sampling points.
And step four, if the slave device completes the test, uploading information (including high points and low points) of the sampling points, and then sending a next group of test sample by the host computer through a write buffer instruction again, and repeating the steps until the test is completed.
It should be noted that, in the testing process, the host end may continuously send the read buffer instruction, and by completing the above test, the three-dimensional scatter diagram of the limit voltage, frequency and sampling point supported by the slave device in this mode may be obtained, and the range surrounded by the adjacent data connection in the scatter diagram may be considered as the supporting range of the voltage, frequency and sampling point supported by the slave device in the corresponding mode, so that the compatibility of different slave devices in the same mode may be evaluated.
Optionally, fig. 5 is a flowchart of a protocol analyzer acquiring master device information according to an alternative embodiment of the present invention; the method comprises the following steps:
the protocol analyzer or oscilloscope obtains the information of the main equipment from the bridge chip through the data interface, then determines the voltage, frequency, sampling point and using mode when the main equipment is communicated, determines the coordinate point of the information corresponding to the data coordinate system, maps the point to the supporting range diagram of the auxiliary equipment, and if the point is obviously in the diagram, the point is indicated to be compatible; representing compatibility doubts if on or very near the edge; if it is clearly outside the figure, it means that it is not compatible,
alternatively, the specific comparison method is as follows: carrying out coordinate normalization on a support range corresponding to the slave equipment, calculating coordinates (r, theta, phi) of each point in a three-dimensional spherical coordinate system, calculating the coordinates of the master equipment in the three-dimensional spherical coordinate according to normalization parameters, selecting points with similar angular coordinates for comparison, and indicating compatibility if the radiuses are far smaller than the radiuses of the selected points; the presence of very close points indicates compatibility doubts; if both are greater than, it indicates that the compatibility is not acceptable.
Optionally, the specific method for coordinate normalization is as follows: respectively normalizing the dimension values of the coordinate points of the slave equipment obtained by the test, and recording normalization parameters (|x|) max ，|y| max ，|z| max ). The normalization formula is as follows: x' =x/|x| max The method comprises the steps of carrying out a first treatment on the surface of the The normalized coordinate points are mapped to a three-dimensional spherical coordinate system. The formula is as follows:
calculating the coordinates of the main equipment in the three-dimensional spherical coordinates according to the normalization parameters, and selecting points with similar angular coordinates for comparison: comprising the following steps: and normalizing the coordinates of the main equipment by using the normalization parameters, and converting the coordinate system to obtain the coordinate system parameters of the main equipment in the graph. And selecting points with similar angular coordinates (setting a related threshold value) for comparison to obtain a conclusion.
In the above way, the voltage, frequency and sampling point range which can work by the slave device are obtained by using an exhaustion method, and whether the master device and the slave device are suitable or not is evaluated by referring to a normalized spherical coordinate system.
Through the above embodiment, a test method suitable for parallel signal SD card and eMMC compatibility screening is provided, by evaluating the running conditions of the slave device at different voltages, frequencies and sampling points, evaluating the allowable range of the voltages, frequencies and sampling points supported by the slave device, and then by measuring the voltages, frequencies and sampling points when the master device runs, judging whether the slave device is compatible with the master device. The compatibility is evaluated by using a quantized means, and the compatibility of the newly introduced master device and slave device can be widely evaluated. The above process may be automated. In addition, the compatibility evaluation can be provided for the condition that a single storage device is provided with a large number of devices to be adapted, and compared with the prior art, the accuracy and the utilization rate are higher, so that the application scene is wider.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present invention. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present invention.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present invention.
According to another aspect of the embodiment of the invention, a storage component testing system for implementing the storage component testing method is also provided. As shown in fig. 6, the system includes:
a host 62 for sending a first instruction to the bridge chip;
the bridge chip 64 is configured to perform a compatibility test of a master device and a slave device to be tested by using a test parameter carried by a first instruction, determine a set of values corresponding to a plurality of preset target parameters of the master device in a process of performing the compatibility test corresponding to the master device and the slave device to be tested, and determine a numerical value allowable range supported by the slave device to be tested for each parameter in the plurality of preset target parameters;
a protocol analyzer 66, configured to normalize a set of values corresponding to a plurality of preset target parameters existing in a master device, and map a normalization result to the numerical value allowable range, so as to determine whether the master device is compatible with a first storage component and/or a second storage component in the slave device to be tested according to the set of values and the numerical value allowable range;
the slave device to be tested 68 is configured to install a first storage component corresponding to the secure digital card to be tested for compatibility and a second storage component corresponding to the embedded memory;
A master device 70 for adapting the slave device.
Through the system, under the condition that a first instruction sent by the host is received, the compatibility test of the master device and the slave device to be tested is carried out by using the test parameters carried by the first instruction; wherein, the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory; determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of performing compatible testing corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters; and determining whether the main equipment is compatible with the first storage component and/or the second storage component in the slave equipment to be tested or not according to the numerical value set and the numerical value allowed range, namely, establishing a connection between the main equipment and the slave equipment to be tested, installing a secure digital card and an embedded memory in the slave equipment to be tested, and then carrying out compatibility test on the secure digital card and the embedded memory in the same equipment, thereby reducing repeated test times, greatly improving the test efficiency of the compatibility test, and further solving the problems of lower test efficiency and the like on whether the storage component is compatible with other equipment in the prior art.
In an exemplary embodiment, the bridge chip 64 is further configured to establish a communication connection between the host and the slave device to be tested; the bridge chip is connected with the host through a first target interface, and the bridge chip is connected with the slave equipment to be tested through a second target interface; the first instruction is configured to carry test parameters, where the test parameters at least include: a transmission mode when the main equipment is in communication, a signal voltage when the main equipment is in communication, a signal frequency when the main equipment is in communication, and a sampling point when the main equipment is in communication; and under the condition that the bridge chip receives the first instruction sent by the host, performing compatibility test of the master device and the slave device to be tested by using the test parameters carried by the first instruction.
Optionally, the protocol analyzer 66 is further configured to obtain a target data value set corresponding to the slave device, normalize the target data value set according to different data dimensions, record normalization parameters corresponding to the coordinate normalization, and map a plurality of first coordinate points corresponding to the coordinate normalization to a three-dimensional spherical coordinate system; and converting the data value set by using the normalization parameters, determining a second coordinate point corresponding to the data value set in the three-dimensional spherical coordinate system, acquiring a target first coordinate point which is in a preset threshold range with the second coordinate point, and generating a relative position relationship, so as to determine whether the master device is compatible with a first storage component and/or a second storage component in the slave device to be tested according to the relative position relationship.
For example, carrying out coordinate normalization on a support range corresponding to the slave equipment, calculating coordinates (r, theta, phi) of each point in a three-dimensional spherical coordinate system, calculating the coordinates of the master equipment in the three-dimensional spherical coordinate according to normalization parameters, selecting points with similar angular coordinates for comparison, and indicating compatibility if the radiuses are far smaller than the radiuses of the selected points; the presence of very close points indicates compatibility doubts; if both are greater than, it indicates that the compatibility is not acceptable. Optionally, the specific method for coordinate normalization is as follows: dividing each dimension value of the coordinate point of the slave equipment obtained by the testOtherwise normalized, and the normalized parameters (|x|are recorded) max ，|y| max ，|z| max ). The normalization formula is as follows: x' =x/|x| max The method comprises the steps of carrying out a first treatment on the surface of the The normalized coordinate points are mapped to a three-dimensional spherical coordinate system. The formula is as follows:
calculating the coordinates of the main equipment in the three-dimensional spherical coordinates according to the normalization parameters, selecting points with similar angular coordinates for comparison, and comprising the following steps: and normalizing the coordinates of the main equipment by using the normalization parameters, and converting the coordinate system to obtain the coordinate system parameters of the main equipment in the graph. And selecting points with similar angular coordinates (setting a related threshold value) for comparison to obtain a conclusion, namely the relative position relationship.
Optionally, the bridge chip 64 is further configured to upload the set of values and the allowed range of values to a protocol analyzer; determining a relative position relationship between a target mapping point corresponding to the numerical value set fed back by the protocol analyzer and a target mapping range corresponding to the numerical value allowable range; and determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the relative position relation.
In an optional embodiment, the bridge chip 64 is further configured to determine that the primary device is compatible with a compatible result of the first storage component and/or the second storage component in the slave device to be tested, where the target location relationship indicates that the target mapping point is in a target area of the target mapping range, and the target area is a middle range area in the target mapping range; determining that a compatibility result between the master device and a first storage component and/or a second storage component in the slave device to be tested is suspected to be compatible under the condition that the relative position relationship indicates that the target mapping point is outside a target area of the target mapping range and is within the target mapping range; and if the relative position relationship indicates that the target mapping point is out of the target mapping range, determining that the compatibility result of the master device and the first storage component and/or the second storage component in the slave device to be tested is incompatible.
As an optional implementation manner, the bridge chip 64 is further configured to perform instruction analysis on the first instruction sent by the host to obtain a test parameter corresponding to the compatibility test; and determining the actual values corresponding to the test parameters in different test stages to obtain a value set corresponding to a plurality of preset target parameters of the main equipment.
Optionally, the bridge chip 64 is further configured to determine data transmission parameters corresponding to the secure digital card and the embedded memory installed in the slave device to be tested; acquiring transmission information supported by the slave equipment to be tested at different sampling points; and determining a numerical value allowed range supported by the slave device to be tested for each parameter of the plurality of preset target parameters according to the data transmission parameters and the transmission information.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
An embodiment of the invention also provides a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
Alternatively, in the present embodiment, the above-described storage medium may be configured to store a computer program for performing the steps of:
s1, under the condition that a first instruction sent by a host is received, performing compatibility test of a master device and a slave device to be tested by using test parameters carried by the first instruction; the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory;
S2, determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of carrying out the compatibility test corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters;
s3, determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the numerical value set and the numerical value allowed range.
Alternatively, in the present embodiment, the storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
Alternatively, specific examples in this embodiment may refer to examples described in the foregoing embodiments and optional implementations, and this embodiment is not described herein.
An embodiment of the invention also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
Optionally, the electronic device may further include a transmission device and an input/output device, where the transmission device is connected to the processor, and the input/output device is connected to the processor.
Alternatively, in the present embodiment, the above-described processor may be configured to execute the following steps by a computer program:
s1, under the condition that a first instruction sent by a host is received, performing compatibility test of a master device and a slave device to be tested by using test parameters carried by the first instruction; the slave device to be tested at least comprises: the first storage component corresponds to the secure digital card and the second storage component corresponds to the embedded memory;
s2, determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of carrying out the compatibility test corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters;
s3, determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the numerical value set and the numerical value allowed range.
Alternatively, in this embodiment, it will be understood by those skilled in the art that all or part of the steps in the methods of the above embodiments may be performed by a program for instructing a terminal device to execute the steps, where the program may be stored in a computer readable storage medium, and the storage medium may include: flash disk, read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
The integrated units in the above embodiments may be stored in the above-described computer-readable storage medium if implemented in the form of software functional units and sold or used as separate products. Based on such understanding, the technical solution of the present invention may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions for causing one or more computer devices (which may be personal computers, servers or network devices, etc.) to perform all or part of the steps of the method described in the embodiments of the present invention.
In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.
In several embodiments provided in the present application, it should be understood that the disclosed client may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of the units, such as the division of the units, is merely a logical function division, and may be implemented in another manner, for example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (10)
1. A method for testing a memory component, comprising:
under the condition that a first instruction sent by a host is received, performing compatibility test of the master device and the slave device to be tested by using test parameters carried by the first instruction; the slave device to be tested at least comprises: the main equipment is a device adapting to the slave equipment;
determining a numerical value set corresponding to a plurality of preset target parameters of the master device in the process of carrying out the compatibility test corresponding to the master device and the slave device to be tested, and determining a numerical value allowed range supported by the slave device to be tested for each parameter in the plurality of preset target parameters;
And determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the numerical value set and the numerical value allowed range.
2. The method of claim 1, wherein performing compatibility testing of the master device with a slave device under test using test parameters carried by a first instruction comprises:
establishing communication connection between the host and the slave to be tested through a bridge chip; the bridge chip is connected with the host through a first target interface, and the bridge chip is connected with the slave equipment to be tested through a second target interface; the first instruction is configured to carry test parameters, where the test parameters at least include: a transmission mode when the main equipment is in communication, a signal voltage when the main equipment is in communication, a signal frequency when the main equipment is in communication, and a sampling point when the main equipment is in communication;
and under the condition that the bridge chip receives the first instruction sent by the host, performing compatibility test of the master device and the slave device to be tested by using the test parameters carried by the first instruction.
3. The method according to claim 1, wherein determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested based on the set of values and the allowed range of values comprises:
Uploading the value set and the value allowable range to a protocol analyzer;
determining a relative position relationship between a target mapping point corresponding to the numerical value set fed back by the protocol analyzer and a target mapping range corresponding to the numerical value allowable range;
and determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested according to the relative position relation.
4. A method according to claim 3, wherein determining whether the master device is compatible with the first storage component and/or the second storage component in the slave device to be tested based on the relative positional relationship comprises:
determining that the main device is compatible with a compatible result of a first storage component and/or a second storage component in the slave device to be tested under the condition that the relative position relationship indicates that the target mapping point is in a target area of the target mapping range, wherein the target area is a middle range area in the target mapping range;
determining that a compatibility result between the master device and a first storage component and/or a second storage component in the slave device to be tested is suspected to be compatible under the condition that the relative position relationship indicates that the target mapping point is outside a target area of the target mapping range and is within the target mapping range;
And if the relative position relationship indicates that the target mapping point is out of the target mapping range, determining that the compatibility result of the master device and the first storage component and/or the second storage component in the slave device to be tested is incompatible.
5. The method of claim 1, wherein determining a set of values corresponding to a plurality of preset target parameters of the master device during the compatibility test of the master device with the slave device to be tested, comprises:
performing instruction analysis on a first instruction sent by the host to obtain test parameters corresponding to the compatible test;
and determining the actual values corresponding to the test parameters in different test stages to obtain a value set corresponding to a plurality of preset target parameters of the main equipment.
6. The method of claim 1, wherein determining the allowed range of values supported by the slave device under test for each of the plurality of preset target parameters comprises:
determining data transmission parameters corresponding to the secure digital card and the embedded memory which are installed in the slave equipment to be tested;
acquiring transmission information supported by the slave equipment to be tested at different sampling points;
And determining a numerical value allowed range supported by the slave device to be tested for each parameter of the plurality of preset target parameters according to the data transmission parameters and the transmission information.
7. A storage component testing system, comprising:
the host is used for sending a first instruction to the bridge chip;
the bridge chip is used for carrying out compatible test on the master equipment and the slave equipment to be tested by using the test parameters carried by the first instruction, determining a numerical value set corresponding to a plurality of preset target parameters of the master equipment in the process of carrying out the compatible test corresponding to the slave equipment to be tested, and determining a numerical value allowed range supported by the slave equipment to be tested for each parameter in the plurality of preset target parameters;
the protocol analyzer is used for carrying out normalization processing on a numerical value set corresponding to a plurality of preset target parameters in the master device, mapping normalization processing results to the numerical value allowable range, and determining whether the master device is compatible with a first storage component and/or a second storage component in the slave device to be tested according to the numerical value set and the numerical value allowable range;
the slave device to be tested is used for installing a first storage component corresponding to the secure digital card to be subjected to compatibility test and a second storage component corresponding to the embedded memory;
And the master device is used for adapting the slave device.
8. The system of claim 7, wherein the protocol analyzer is further configured to obtain a target data value set corresponding to the slave device, normalize coordinates of the target data value set according to different data dimensions, record normalization parameters corresponding to the coordinate normalization, and map a plurality of first coordinate points corresponding to the coordinate normalization to a three-dimensional spherical coordinate system; and converting the data value set by using the normalization parameters, determining a second coordinate point corresponding to the data value set in the three-dimensional spherical coordinate system, acquiring a target first coordinate point which is in a preset threshold range with the second coordinate point, and generating a relative position relationship, so as to determine whether the master device is compatible with a first storage component and/or a second storage component in the slave device to be tested according to the relative position relationship.
9. A computer-readable storage medium, characterized in that the computer-readable storage medium comprises a stored program, wherein the program, when run, performs the method of any one of claims 1 to 6.
10. An electronic device comprising a memory and a processor, characterized in that the memory has stored therein a computer program, the processor being arranged to execute the method according to any of the claims 1 to 6 by means of the computer program.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116719724A (en) * | 2023-06-05 | 2023-09-08 | 珠海妙存科技有限公司 | eMMC multi-platform testing method and device and electronic equipment |
| CN117849595A (en) * | 2024-03-07 | 2024-04-09 | 山海芯半导体科技(上海)有限公司 | Chip compatibility verification method, device and system and electronic equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116719724A (en) * | 2023-06-05 | 2023-09-08 | 珠海妙存科技有限公司 | eMMC multi-platform testing method and device and electronic equipment |
| CN116719724B (en) * | 2023-06-05 | 2024-06-04 | 珠海妙存科技有限公司 | EMMC multi-platform testing method and device and electronic equipment |
| CN117849595A (en) * | 2024-03-07 | 2024-04-09 | 山海芯半导体科技(上海)有限公司 | Chip compatibility verification method, device and system and electronic equipment |
| CN117849595B (en) * | 2024-03-07 | 2024-05-07 | 山海芯半导体科技(上海)有限公司 | Chip compatibility verification method, device and system and electronic equipment |
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