CN115834432A

CN115834432A - Data link detection method, device, equipment and storage medium

Info

Publication number: CN115834432A
Application number: CN202211473913.6A
Authority: CN
Inventors: 赖圳雄
Original assignee: Xiamen Ziguang Zhanrui Technology Co ltd
Current assignee: Xiamen Ziguang Zhanrui Technology Co ltd
Priority date: 2022-11-22
Filing date: 2022-11-22
Publication date: 2023-03-21

Abstract

The embodiment of the application provides a method, a device, equipment and a storage medium for detecting a data link, which are applied to a first device, wherein the first device is connected with a second device through a target bus, the target bus comprises a control signal line and at least two data signal lines, and the method comprises the following steps: determining a sampling time of at least one sampling period, and sampling the test data block in the at least two data signal lines based on the sampling time of the at least one sampling period; acquiring test data according to the test data blocks sampled in the at least two data signal lines aiming at the sampling time of each sampling period, and detecting whether the test data is correct or not; when the test data is correct, determining the sampling time of the sampling period as a first effective sampling time; and determining the signal transmission quality of at least two data signal lines according to the determined first effective sampling time. So as to improve the quality of the finished product.

Description

Data link detection method, device, equipment and storage medium

Technical Field

The present application relates to the field of communications technologies, and in particular, to a method, an apparatus, a device, and a storage medium for detecting a data link.

Background

The SDIO bus is commonly used in the circuitry of mobile devices to connect the control terminal of the mobile device to an external communication module. The SDIO bus generally includes a control signal line and four data signal lines. In order to increase the data transmission speed during the data transmission on the data signal lines, the data is generally divided into a plurality of data blocks, and the data blocks are transmitted on different data signal lines. When a circuit is designed, the wiring length of each data line in the SDIO bus needs to be ensured to be equal, so that data blocks between the control end and the external communication module can be synchronized, namely, the control end or the external communication module can receive correct data blocks through four data signal lines simultaneously, so that high-speed signals are transmitted with better integrity, and the opposite end can acquire corresponding signals more easily and accurately.

However, in practical applications, due to various factors, such as different connection points, noise interference, unequal lengths of data lines, etc., transmission delays of data on different data signal lines are different, so that the time at which data can be synchronized between different data signal lines during data transmission within one clock cycle is reduced, and the time at which data can be correctly analyzed within one clock cycle between modules transmitting data through the data signal lines is reduced, that is, the signal transmission quality of the data signal lines is deteriorated. Therefore, in the production process of the mobile equipment, the signal transmission quality of the data signal line between different modules of the mobile equipment needs to be tested, and the mobile equipment with poor signal transmission quality in the data signal line is found out, so that the mobile equipment is prevented from flowing into the market, and the quality of finished products is reduced.

Disclosure of Invention

In view of this, the present application provides a method, an apparatus, a device and a storage medium for detecting a data link, so as to reduce the signal transmission quality of a data line, reduce the problem products from entering the market and improve the quality of finished products.

In a first aspect, an embodiment of the present application provides a method for detecting a data link, where the method is applied to a first device, and the first device is connected to a second device through a target bus, where the target bus includes a control signal line and at least two data signal lines, and the method includes:

determining a sampling time of at least one sampling period, and sampling a test data block in at least two data signal lines based on the sampling time of the at least one sampling period;

acquiring test data according to the test data blocks sampled in the at least two data signal lines aiming at the sampling time of each sampling period, and detecting whether the test data is correct or not; when the test data is correct, determining the sampling time of the sampling period as a first effective sampling time;

and determining the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time.

Preferably, before sampling the test data block in the at least two data signal lines based on the sampling time of the at least one sampling period, the method further includes:

sending a test instruction message to the second device through the control signal line;

and receiving a test response message sent by the second device through the control signal line.

determining a transmission mode of a target bus as a first mode;

sampling test data in a target data signal line based on a sampling time of the at least one sampling period; wherein the target signal line is any one of the at least two data signal lines;

detecting whether the test data sampled in the target data line is correct or not according to the sampling time of each sampling period, and determining the sampling time corresponding to the correct test data as second effective sampling time;

updating the transmission mode of the target bus to a second mode;

the sampling of the test data block in the at least two data signal lines based on the sampling time of the at least one sampling period includes:

sampling test data blocks in at least two data signal lines based on the sampling time of the at least one sampling period when the transmission mode of the target bus is a second mode;

the determining the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time comprises:

and determining the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time and the determined second effective sampling time.

Preferably, the method further comprises the following steps:

acquiring preset sampling times of test data;

acquiring the sampled times of test data, and detecting whether the sampled times of the test data reach the preset sampling times of the test data;

the determining a sampling time of at least one sampling period and sampling the test data block based on the sampling time of the at least one sampling period comprises:

when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period; sampling test data in the at least two data signal lines based on a sampling time of an ith sampling period in the ith sampling period; wherein the value of i is the sum of the sampled times and 1;

the sampling time of each sampling period is used for obtaining test data by using the test data blocks sampled in the at least two data signal lines, and detecting whether the test data is correct or not; determining the sampling time of the sampling period as a first valid sampling time when the test data is correct comprises:

acquiring test data according to the test data blocks sampled in the at least two data signal lines aiming at the sampling time of the ith sampling period, and detecting whether the test data is correct or not; when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time;

when the test data is correct, after determining the sampling time of the ith sampling period as a first effective sampling time, the method further includes:

updating the sampled times according to the value of the i, re-executing the step to obtain the sampled times of the test data, and detecting whether the sampled times of the test data reach the preset sampled times of the test data, and obtaining the test data according to the test data blocks sampled in the at least two data signal lines and detecting whether the test data are correct or not by aiming at the sampling time of the ith sampling period; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time until the sampled times of the test data reach the preset sampling times of the test data.

Preferably, when the number of sampled times of the test data does not reach the preset number of times of sampling of the test data, determining the sampling time of the ith sampling period includes:

determining a sampling reference value according to the preset sampling times of the test data, and acquiring a first preset interval time of sampling time;

and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the sampling reference value and the first preset interval time of the sampling time.

acquiring a second preset interval time of the sampling time;

and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the second preset interval time of the sampling time and the sampling time of the (i-1) th sampling period.

Preferably, the target bus comprises: and the secure digital input output interface SDIO bus.

In a second aspect, an embodiment of the present application provides a method for detecting a data link, which is applied to a second device, where the first device is connected to the second device through a target bus, where the target bus includes a control signal line and at least two data signal lines, and the method includes:

dividing the test data into at least two test data blocks according to the at least two data signal lines;

transmitting the at least two test data blocks to a first device through the at least two data signal lines, respectively; wherein different data signal lines transmit different test data blocks.

Preferably, before the dividing the test data into at least two test data blocks according to the at least two data signal lines, the method further includes:

receiving a test instruction message sent by the first device through the control signal line;

sending a test response message to the first device through the control signal line.

In a third aspect, an embodiment of the present application provides a device for detecting a data link, where the device is applied to a first device, and the first device is connected to a second device through a target bus, where the target bus includes a control signal line and at least two data signal lines, and the device includes:

a processing unit for determining a sampling time of at least one sampling period and sampling a test data block in at least two data signal lines based on the sampling time of the at least one sampling period;

the processing unit is further configured to, for each sampling time of the sampling period, obtain test data according to the test data block sampled in the at least two data signal lines, and detect whether the test data is correct; when the test data is correct, determining the sampling time of the sampling period as a first effective sampling time;

and the determining unit is used for determining the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time.

In a fourth aspect, an embodiment of the present application provides an apparatus for detecting a data link, where the apparatus is applied to a second device, and the first device is connected to the second device through a target bus, where the target bus includes a control signal line and at least two data signal lines, and the apparatus includes:

the processing unit is used for dividing the test data into at least two test data blocks according to the at least two data signal lines;

a sending unit, configured to send the at least two test data blocks to a first device through the at least two data signal lines, respectively; wherein different data signal lines transmit different test data blocks.

In a fifth aspect, an embodiment of the present application provides an electronic device, including a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the electronic device to perform the method of any one of the first aspect or the method of any one of the second aspect.

In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium includes a stored program, where the program, when executed, controls an apparatus in which the computer-readable storage medium is located to perform the method of any of the above first aspects or the method of any of the second aspects.

By adopting the scheme provided by the embodiment of the application, at least one sampling time can be determined firstly, the test data block is sampled in at least two data signal lines based on the at least one sampling time, for each sampling time, the test data is obtained according to the test data block sampled in each data signal line by the sampling time, whether the test data is correct or not is detected, and when the test data is correct, the sampling time corresponding to the correct test data is determined as the first effective sampling time. Because the number of first effective sampling time is more, it is more to explain that different data signal lines can transmit the moment of signal simultaneously, then the probability that can correctly obtain data is bigger, for signal transmission quality is better, based on this in this application embodiment, can be according to first effective sampling time, confirm the signal transmission quality of two piece at least data signal lines, the realization is to the detection of the transmission quality of two piece at least data signal lines, thereby can find out the relatively poor product of signal transmission quality in two piece at least data signal lines, and then can reduce the probability that the problem product flows into the market, improve finished product quality.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.

Fig. 1 is a schematic view of a scenario of a data link detection method according to an embodiment of the present application;

fig. 2 is a schematic flowchart of a method for detecting a data link according to an embodiment of the present application;

fig. 3a is a schematic view of a scene of another data link detection method according to an embodiment of the present application;

fig. 3b is a schematic view of a scenario of another data link detection method according to an embodiment of the present application;

fig. 4a is a schematic view of a scenario of another data link detection method according to an embodiment of the present application;

fig. 4b is a schematic view of a scenario of another data link detection method according to an embodiment of the present application;

fig. 5 is a schematic flowchart of another data link detection method according to an embodiment of the present application;

fig. 6 is a schematic flowchart of another data link detection method according to an embodiment of the present application;

fig. 7 is a schematic flowchart of another data link detection method according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of a data link detection apparatus according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of another data link detection apparatus according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of another data link detection apparatus according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of another data link detection apparatus according to an embodiment of the present application;

fig. 12 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

For better understanding of the technical solutions of the present application, the following detailed descriptions of the embodiments of the present application are provided with reference to the accompanying drawings.

It should be understood that the embodiments described are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of associative relationship that describes an associated object, meaning that three types of relationships may exist, e.g., A and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

Before specifically describing the embodiments of the present application, terms applied or likely to be applied to the embodiments of the present application will be explained first.

SDIO (Secure Digital Input and Output), an external interface.

CLK (Clock signal), clock signal.

CMD (Command line), control signal line.

DAT (Data line), data signal line.

However, in practical applications, due to various factors, such as different connection points, noise interference, unequal lengths of data lines, etc., transmission delays of data on different data signal lines are different, so that the time at which data can be synchronized between different data signal lines during data transmission within one clock cycle is reduced, and the time at which data can be correctly analyzed within one clock cycle between modules transmitting data through data signal lines is reduced, as shown in fig. 4b, that is, the signal transmission quality of the data signal lines is deteriorated. Therefore, in the production process of the mobile equipment, the signal transmission quality of the data signal line between different modules of the mobile equipment needs to be tested, and the mobile equipment with poor signal transmission quality in the data signal line is found out, so that the mobile equipment is prevented from flowing into the market, and the quality of finished products is reduced.

In view of the above problems, embodiments of the present application provide a method, an apparatus, a device, and a storage medium for detecting a data link, where at least one sampling time is determined first, a test data block is sampled in at least two data signal lines based on the at least one sampling time, for each sampling time, test data is obtained according to the test data block sampled in each data signal line, and whether the test data is correct is detected, and when the test data is correct, a sampling time corresponding to the correct test data is determined as a first effective sampling time. Because the number of first effective sampling time is more, it is more to explain that different data signal lines can transmit the moment of signal simultaneously, then the probability that can correctly obtain data is bigger, for signal transmission quality is better, based on this in this application embodiment, can be according to first effective sampling time, confirm the signal transmission quality of two piece at least data signal lines, the realization is to the detection of the transmission quality of two piece at least data signal lines, thereby can find out the relatively poor product of signal transmission quality in two piece at least data signal lines, and then can reduce the probability that the problem product flows into the market, improve finished product quality. The details will be described below.

Referring to fig. 1, a schematic structural diagram of an electronic device provided in an embodiment of the present application is shown. As shown in fig. 1, the electronic apparatus includes a first device 10 and a second device 11. The first device 10 and the second device 11 are connected by a target bus 12. For example, the target bus is an SDIO bus. The target bus includes a control signal line 121 and at least two data signal lines 122. When the target bus is an SDIO bus, the SDIO bus includes four data signal lines 122.

The first device 10 may be a processor, a control center of the storage device, various interfaces and lines for connecting various parts of the whole electronic device, and executing or executing software programs and/or modules stored in the memory and calling data stored in the memory to perform various functions of the electronic device and/or process data. The processor may be composed of Integrated Circuits (ICs), for example, a single packaged IC, or a plurality of packaged ICs connected to the same or different functions. For example, the first device 10 may include only a Central Processing Unit (CPU). In the embodiment of the present invention, the CPU may be a single operation core, or may include multiple operation cores.

The second device 11 may be another device communicating with the processor, for example, a wireless network communication device, or another device that needs to transmit data with the first device 10 through a data signal line.

In actual circuit design, at least two data signal lines between the first device 10 and the second device 11 are usually required to have equal length, and the distance between the first device 10 and the second device 11 cannot be too far away, otherwise, the signal transmission quality is poor. In order to ensure the communication quality between the first device 10 and the second device 11, the transmission quality of the data signal line between the first device 10 and the second device 11 may be detected. The quality of signal transmission between at least two data signals can be determined by detecting the time at which signals can be transmitted synchronously in at least two data signal lines between the first device 10 and the second device 11 within one sampling period.

Referring to fig. 2, a schematic flowchart of a method for detecting a data link according to an embodiment of the present application is provided. The detection method is applied to the first device 10 shown in fig. 1 described above. As shown in fig. 2, the method includes:

step S201, determining a sampling time of at least one sampling period, and sampling test data blocks in at least two data signal lines based on the sampling time of the at least one sampling period.

It should be understood that during transmission of the data signal line, data is transmitted in the form of an analog signal. Depending on the specific value of the data to be transmitted, the level signal of the analog signal is different, for example, a high level signal or a low level signal. During the transmission of a data block, there is a process of level signal switching, as shown in fig. 3 a. In data analysis, data is usually analyzed based on whether an analog signal is a high-level signal or a low-level signal. In the switching process of the level signal, since it cannot be analyzed whether the level signal is a high level signal or a low level signal, the part of data is invalid data. Therefore, during the data transmission process, the data block transmitted by the data signal line has a valid data portion that can be analyzed by the device and an invalid data portion that cannot be analyzed by the device, as shown in fig. 3 b. When the device collects data in the data signal line, if the data collected in the current collection time is an effective data part, the data transmitted by the opposite terminal can be correctly analyzed, and if the data collected in the current collection time is an ineffective data part, the data transmitted by the opposite terminal cannot be correctly analyzed. In one sampling period, the longer the time that the valid data part can be acquired is, the higher the probability that the valid data part is acquired is, and the better the signal quality transmitted by the data signal line can be considered. When data is divided into a plurality of data blocks and is transmitted simultaneously through different data signal lines, the longer the time during which effective data parts can be acquired simultaneously among different data signal lines in a sampling period is, the higher the probability of correctly acquiring data transmitted by an opposite terminal is, and the better the signal transmission quality among different data signal lines can be considered.

For example, assume that the first device and the second device are connected via an SDIO bus, and there are four data signal lines between the first device and the second device. In an ideal state, under the condition that the four data signal lines are equal in length, it can be considered that the acquisition time of the valid data corresponding to the four data signal lines is completely the same, as shown in fig. 4 a. However, in practical implementation, due to various factors, different delays exist when data is transmitted between different data signal lines, so that the acquisition times of valid data portions corresponding to different data signals are not completely the same, as shown in fig. 4 b. Because the transmitted data is divided into different data blocks and transmitted through different data signal lines, when the data is acquired by the four data signal lines, the data transmitted by the opposite terminal can be correctly analyzed only when the effective data part is acquired by the four data signal lines simultaneously. The longer the time that the effective data part is simultaneously acquired by the four data signal lines in one sampling period is, the higher the probability of correctly acquiring the data transmitted by the opposite terminal is, and the better the signal transmission quality among different data signal lines can be considered.

In this embodiment, in order to detect the signal transmission quality of the data signal line between the first device and the second device, the signal transmission quality of the data signal line between the first device and the second device may be determined by detecting the acquisition time of the effective data portions acquired simultaneously in different data signal lines within one sampling period. Since sampling can be performed only once in one sampling period, and when data is acquired at the same sampling time in different sampling periods, it is the same whether the valid portion or the invalid portion is acquired in different sampling periods. Therefore, in order to detect the time when the valid data portions are simultaneously acquired in different data signal lines in one sampling period, the time when the valid data portions are simultaneously acquired in different data signal lines can be determined by a plurality of sampling periods and the sampling time of each sampling period is different.

Based on this, the first device needs to determine the sampling time of each sampling period, and at this time, at least one sampling time may be determined according to the preset interval time of the sampling time, that is, the sampling time of at least one sampling period is determined according to the preset interval time of the sampling time. The test data block is sampled at the sampling time of each sampling period based on the sampling time of each sampling period. The preset interval time may be an interval time between sampling times of adjacent sampling periods, or may be a preset sampling reference time, and the preset interval time is an interval time between a sampling time and a sampling reference time. Of course, the sampling time of each sampling period may also be determined in other manners, which is not limited in this application.

Because the time for acquiring the effective data part in different data signal lines in one sampling period needs to be determined, the sampling period can be divided into m sampling times, the time interval of every two adjacent sampling times in the m sampling times is the same, wherein m is an integer greater than 0. Since each sampling period can only be used for sampling once, in order to verify which sampling times can collect valid data parts and which sampling times can collect invalid data parts at m sampling times, data blocks can be collected in different sampling times through m sampling periods. This allows the sample time for each of the m sample periods to be determined.

It should be understood that m is a sampling number preset according to actual needs. The larger m, the more accurate the month determined by the acquisition time. For example, m is 256,128,1024, etc.

As a possible implementation manner, when the first device determines the sampling time of at least one sampling period, the sampling time of the current sampling period may be determined according to the sampling time of the previous sampling period. At this time, the first device may acquire a second preset interval time of the sampling time. The second preset interval time is an interval time of a preset sampling time. At this time, the sampling time of the first sampling period needs to be set in advance. For example, the sampling time of the first sampling period may be preset to be T/256, and the second preset interval time may be preset to be T/256. Thus, when the sampling time of the first sampling period is determined to be T/256, according to the second preset interval time T/256, the sampling time of the second sampling period is determined to be 2T/256, the sampling time of the third sampling period is determined to be 3T/256, and the sampling time of the q-th sampling period is determined to be qT/256, where q is an integer greater than 0 and not greater than 256, and T represents a sampling period. By determining the sampling time of each sampling period separately, it is possible to perform acquisition of a data block in at least two data signal lines in each sampling period based on the sampling time of the sampling period.

As another possible implementation manner, when determining the sampling time of at least one sampling period, the first device may preset a reference time, which is a sampling reference value. The sampling time for each sampling period is determined relative to the sampling reference value. At this time, the first device may first determine a sampling reference value. And a first preset interval time of the sampling time is acquired. The first preset interval time is an interval time of the sampling time with respect to the sampling reference value. At this time, the first device may determine the sampling time of each sampling period according to the sampling reference value and the first preset interval time. For example, if the preset sampling reference value is T/128 and the first preset interval time is T/128, the sampling time of the ith sampling period is a + (i-1) × b, where a represents the sampling reference value and b represents the first preset interval time. That is, the sampling time of the ith sampling period is T/128+ (i-1) × T/128.

The first device samples the test data block in at least two data signals according to the corresponding sampling time in each sampling period based on the sampling time of at least one sampling period after determining the sampling time of at least one sampling period.

It should be noted that, when determining the sampling time of at least one sampling period, the first device may determine the sampling time of all sampling periods. Or determining only the sampling time of the current sampling period each time, and determining the sampling time of the next sampling period when entering the next sampling period after determining whether the sampling time of the current sampling period is the first effective sampling time. This is not limited by the present application.

Step S202, aiming at the sampling time of each sampling period, obtaining test data according to test data blocks sampled in at least two data signal lines, and detecting whether the test data is correct or not; when the test data is correct, determining the sampling time of the sampling period as a first effective sampling time.

In the embodiment of the application, when the quality detection of the data signal line between the first device and the second device is performed, the second device can transmit the test data block to the first device through at least two data signal lines between the second device and the first device. The second device may divide the test data into at least two test data blocks, and transmit the at least two test data blocks to the first device through the at least two data signal lines, respectively. When the first device collects data in the at least two data signal lines, because the test data blocks transmitted in the at least two data signal lines are respectively data of different parts in the test data, the first device needs to collect effective data parts in the at least two data signal lines to acquire the data of the different parts of the test data, and the test data is synthesized.

Based on this, the first device acquires the at least two acquired data blocks according to the acquired test data blocks in the at least two data signals for the sampling time of each sampling period, analyzes the acquired test data blocks, determines the position of each test data block in the test data, and synthesizes the test data by using each acquired test data block. In this embodiment, when the second device sends test data to the first device, the test data is data in a preset fixed format. I.e., data in a data format for testing. After the collected data blocks are synthesized into the test data by the first device, whether the test data is correct or not needs to be detected, at this time, whether the data format of the test data is the data with the preset fixed format or not can be detected by the first device, and if yes, the test data can be determined to be correct. If not, the test data is determined to be erroneous.

When the first device determines that the test data is correct, it indicates that the test data blocks collected by the first device in the at least two data signal lines are both valid data portions, and the sampling time of the sampling period can be determined as a first valid time.

Or, when the first device determines that the test data is wrong, it indicates that the test data block acquired by the first device in the at least two data signal lines has an invalid data portion, and may determine the sampling time of the sampling period as an invalid time.

As a possible implementation manner, in order to prevent the data block from being tampered during the transmission process, when the second device divides the test data into at least two test data blocks, the second device adds the verification information to each test data block. For example, a CRC check code is added to each test data block. At this time, after the first device collects the test data blocks on the at least two data signal lines based on the sampling time of the current sampling period, each test data block needs to be analyzed first, the test data blocks are verified according to the verification information carried in each test data block, if the verification information of at least one test data block is wrong, the currently collected test data block is incorrect, and at this time, the sampling time of the current sampling period can be directly determined as invalid time. Or, if the check information of each test data block is detected to be correct, the test data blocks can be synthesized into test data, and whether the test data is determined is further detected. For a specific detection process, reference may be made to the above description, which is not repeated herein.

Illustratively, the first device and the second device are connected through four data signal lines. The first device collects test data blocks, namely test data blocks a, b, c and d, in four data signal lines according to the sampling time of each sampling period. After the first device collects the test data blocks a, b, c, and d, the first device may analyze and analyze the test data blocks a, b, c, and d to obtain the check information in the test data blocks a, b, c, and d, and assume that the check information in the test data blocks a, b, c, and d is a CRC check code. The first device may detect whether the CRC check codes of the test data blocks a, b, c, d, respectively, are correct. If the CRC check codes of the test data blocks a, b, c, d are all correct, the first device may synthesize the test data according to the positions of the test data blocks in the test data. The first device may further detect whether the synthesized test data is in a preset fixed format, determine that the test data is correct if the synthesized test data is in the preset fixed format, and determine the sampling time of the sampling period as a first effective sampling time.

Based on the above process, the first device may determine whether the sampling time of each sampling period is the first valid sampling time.

And step S203, determining the signal transmission quality of at least two data signal lines according to the determined first effective sampling time.

In this embodiment of the application, after determining whether the sampling time of each sampling period is the first effective sampling time, the first device may acquire all the first effective sampling times. Since the first effective sampling time is a time when the at least two data signal lines simultaneously acquire the large effective data portion, the first device can determine the signal transmission quality of the at least two data signal lines according to all the determined first effective sampling times.

As a possible implementation, the first device may determine the signal transmission quality of the at least two data signal lines based on a ratio of a total time length of all the first valid sampling times to one sampling period time. For example, when the ratio of the total time length of all the first effective sampling times to the time of one sampling period is greater than a first preset threshold, it indicates that the ratio of the first effective sampling times in the sampling period is greater, and it can be determined that the signal transmission quality of at least two data signal lines is better. If the ratio of the total time of all the first effective sampling times to the time of one sampling period is not greater than the first preset threshold, it indicates that the ratio of the first effective sampling times in the sampling period is smaller, and it can be determined that the signal transmission quality of at least two data signal lines is poor.

As a possible implementation, the first device may also determine a second valid sampling time. That is, when the first device and the second device perform data transmission by using one data signal line, the first device determines that the corresponding acquisition time for acquiring the valid data part is the second valid sampling time when the data transmission is performed by using one data signal line. At this time, the first device may calculate a ratio between the total length of the first effective sampling time and the total length of the second effective sampling time, and determine the signal transmission quality of the at least two data signal lines based on the ratio. For example, if the ratio is greater than the second preset threshold, it indicates that the ratio of the first effective sampling time in the sampling period is greater, and it can be determined that the signal transmission quality of at least two data signal lines is better. If the ratio is not greater than the second preset threshold, it indicates that the ratio of the first effective sampling time in the sampling period is smaller, and it can be determined that the signal transmission quality of at least two data signal lines is poor.

In this way, at least one sampling time may be determined first, the test data block may be sampled in at least two data signal lines based on the at least one sampling time, for each sampling time, the test data may be obtained according to the test data block sampled in each data signal line, and whether the test data is correct or not may be detected, and when the test data is correct, the sampling time corresponding to the correct test data may be determined as the first valid sampling time. Because the number of first effective sampling time is more, it is more to explain that different data signal lines can transmit the moment of signal simultaneously, then the probability that can correctly obtain data is bigger, for signal transmission quality is better, based on this in this application embodiment, can be according to first effective sampling time, confirm the signal transmission quality of two piece at least data signal lines, the realization is to the detection of the transmission quality of two piece at least data signal lines, thereby can find out the relatively poor product of signal transmission quality in two piece at least data signal lines, and then can reduce the probability that the problem product flows into the market, improve finished product quality.

Referring to fig. 5, a method for detecting a data link according to an embodiment of the present application is provided. The method is applied to the second device shown in fig. 1. The first device is connected with the second device through a target bus, wherein the target bus comprises a control signal line and at least two data signal lines. As shown in fig. 5, the method includes:

step S501, dividing the test data into at least two test data blocks according to at least two data signal lines.

In the embodiment of the present application, the second device needs to send test data to the first device. In order to increase the data transmission speed, when the second device transmits data to the first device, the data is generally divided into different data blocks, and the different data blocks are transmitted through different data signal lines. Therefore, the second device may divide the test data of the predetermined fixed format into at least two test data blocks according to the number of the at least two data signal lines.

As a possible implementation, the number of test data blocks is the same as the number of at least two data signal lines.

For example, there are 4 data signal lines between the second device and the first device, and it is assumed that the test data with the predetermined fixed format is 8 bytes, at this time, the second device may divide the test data with 8 bytes into 4 test data blocks with 2 bytes.

As a possible implementation manner, in order to tamper the data block during the transmission of the data signal line, the second device may add check information, for example, add a CRC check code, to each test data block. At this time, each test data block carries a CRC check code.

Step S502, the at least two test data blocks are respectively sent to the first device through at least two data signal lines.

Wherein different data signal lines transmit different test data blocks.

In this embodiment, after dividing the test data into different test data blocks, the second device may send the test data blocks to the first device through different data signal lines, respectively. Wherein different test data blocks are transmitted via different data signal lines.

Fig. 6 is a schematic flowchart of a method for detecting a data link according to an embodiment of the present disclosure. As shown in fig. 6, the method includes:

step S601, the first device obtains a preset sampling number of times of the test data.

In the embodiment of the present application, the number of times of test data acquisition is the number of sampling times divided by one sampling period. The first device may obtain a preset number of samples of the test data. The first device may acquire the number of times of sampling in response to a setting operation by a user. The number of samples may be preset or default and stored in the memory device, and the first device may retrieve the preset number of samples from the memory device.

Step S602, the first device obtains the sampled times of the test data, and detects whether the sampled times of the test data reaches the preset sampled times of the test data.

In this embodiment of the application, after the first device obtains the preset sampling frequency of the test data, it needs to detect whether the current sampling frequency reaches the preset sampling frequency. At the moment, the first device obtains the sampled times of the test data, compares the sampled times of the test data with the preset sampled times, and detects whether the sampled times of the test data reach the preset sampled times of the test data.

It should be noted that, the following steps are executed by the first device according to different detection results, and when the number of times of sampling the test data reaches the preset number of times, step S610 is directly executed, and if the number of times of sampling the test data does not reach the preset number of times, the test data needs to be sampled, and at this time, the following step S603 is executed.

Step S603, the first device determines a sampling time of at least one sampling period.

In the embodiment of the application, when the sampled times of the test data do not reach the preset sampling times of the test data, the sampling time of the ith sampling period is determined.

Wherein the value of i is the sum of the sampled times and 1.

That is, when the first device determines that the sampled times of the test data do not reach the preset sampling times of the test data, it indicates that the test data need to be continuously collected. That is, when the sampling period is divided into m sampling times, the preset number of sampling times is m times. And when the sampling times of the test data output by the first device do not reach the preset sampling times of the test data, the sampling period of the test data sampled by the first device does not reach m sampling periods. At this point, the first device needs to be acquired. When the current sampling period is the ith sampling period, the first device needs to determine the sampling time of the ith sampling period.

As a possible implementation manner, when the sampled number of times of the test data does not reach the preset number of times of sampling of the test data, determining the sampling time of the ith sampling period includes: determining a sampling reference value according to the preset sampling times of the test data, and acquiring a first preset interval time of sampling time; and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the sampling reference value and the first preset interval time of the sampling time.

In the embodiment of the present application, the first preset interval time is a time interval between the sampling time and the sampling reference value. The sampling time for each sampling period is determined based on a sampling reference time. When the first device determines that the sampled times of the test data do not reach the preset sampling times of the test data, the sampling time of the ith sampling period needs to be determined first when the current sampling period is the ith sampling period. At this time, the first device may determine the sampling reference value according to the preset sampling number of times of the test data, that is, determine the sampling reference value as a time value with the same preset sampling number of times, for example, may determine the sampling reference value as T/preset sampling number of times. After determining the sampling reference value, the first device may determine the sampling time of each period according to a first preset interval time. For example, the first preset interval time includes: (p-1) x T/m, wherein p represents the p-th sampling period, and p is an integer greater than 0; t denotes a sampling period, and m denotes a preset number of sampling times of the test data. When the sampling time of the ith sampling period is determined, the first device can calculate the sampling time of the ith sampling period according to the sampling reference value and the first preset interval time. At this time, the first device determines that the sampling time of the ith sampling period is T/m + (p-1). Times.T/m. Specifically, the step S201 is not described herein again.

It should be understood that the first preset interval time is related to the sampling period and is gradually increased as the sampling period increases.

As another possible implementation manner, when the sampled number of times of the test data does not reach the preset number of times of sampling of the test data, determining the sampling time of the ith sampling period includes:

acquiring a second preset interval time of the sampling time; and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the second preset interval time of the sampling time and the sampling time of the (i-1) th sampling period.

That is, the second preset interval time is a time interval of sampling times in two adjacent sampling periods. At this time, the first device may determine the sampling time of the current sampling period according to the sampling time of the previous sampling period and the second preset interval time. That is, the first device only needs to acquire the sampling time of the (i-1) th sampling period and the second preset interval time to calculate the sampling time of the (i) th sampling period. The specific determination process may refer to step S201 and is not described herein again.

It should be understood that the second preset interval may be fixed, which is only the interval of the sampling time.

In the different manners, the first device can determine the sampling time of the ith sampling period.

Step S604, in the ith sampling period, the first device sends a test instruction message to the second device through the control signal line. The second device receives the test instruction message sent by the first device through the control signal line.

Wherein the test instruction message is used for instructing the second device to send the test data.

In this embodiment of the present application, in the ith sampling period, the first device needs to acquire test data, and the first device needs to send a test instruction message to the second device to notify the second device to send the test data to the first device. The second device receives the test instruction message through the control signal line.

For example, when entering a system download process, the first device needs to automatically detect the quality of data transmission with the second device. At this time, the first device needs to send a test instruction message to the second device in the ith sampling period in the test process so as to inform the second device of sending test data. The second device receives the test instruction message through the control signal line.

Step S605, the second device sends a test response message to the first device through the control signal line. The first device receives a test response message sent by the second device through the control signal line.

In the embodiment of the application, after receiving the test instruction message transmitted by the first device through the control signal line, the second device can learn that the second device needs to send test data to the first device through the test instruction message. The second device sends a test response message to the first device through the control signal line when test data can be sent to the first device. After the first device receives the test response message through the control signal line, the first device knows that the second device can send test data. At this time, the first device may sample the test data block when the sampling time of the sampling period arrives.

Step S606, the second device divides the test data into at least two test data blocks according to the at least two data signal lines.

Specifically, the step S501 is not described herein again.

Step S607, the second device sends at least two test data blocks to the first device through at least two data signal lines, respectively. The first device samples the test data block in at least two data signal lines based on a sampling time of an ith sampling period.

Wherein different data signal lines transmit different test data blocks.

Specifically, step S502 and step S201 are not described herein again.

Step S608, aiming at the sampling time of the ith sampling period, obtaining test data according to the test data blocks sampled in the at least two data signal lines, and detecting whether the test data is correct; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time.

Specifically, the step S202 is not described herein again.

Step S609, the first device updates the sampled times according to the value of i, re-executes the step to obtain the sampled times of the test data, and detects whether the sampled times of the test data reach the preset sampled times of the test data or not, and obtains the test data according to the test data blocks sampled in at least two data signal lines aiming at the sampling time of the ith sampling period in the step I, and detects whether the test data are correct or not; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time until the sampled times of the test data reach the preset sampling times of the test data.

In this embodiment of the present application, the first device finishes sampling the test data in the ith sampling period, and determines whether the sampling time of the ith sampling period is the first effective sampling time, and then the current ith sampling period may be ended, and a sampling period is entered. At this time, the first device updates the number of sampled times. The first device may automatically add 1 to the sampled number of times acquired in step S602, or may directly update the value i to the sampled data. After the updated number of sampled times is up, steps S602 to S608 may be executed again until the number of sampled times reaches the preset number of samples. The determination of which of the m sample times are the first valid sample time and which are the invalid times may be done at this time.

Step S610, the first device determines the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time.

Specifically, reference to step S203 is not repeated herein.

Referring to fig. 7, a schematic flow chart of a method for detecting a data link is provided in the embodiment of the present application. Compared with the method shown in fig. 6, the embodiment of the present application adds a correlation step of determining the effective sampling time corresponding to one data signal line. As shown in fig. 7, the method includes:

step S701, the first device determines that the transmission mode of the target bus is the first mode.

In the embodiment of the present application, the target bus has two transmission modes, which are a first mode and a second mode. When the transmission mode of the target bus is the first mode, data is transmitted between the first device and the second device through the target data signal line. The target data signal line may be any one of the at least two data signal lines. The data signal line may be a predetermined one of the at least two data signal lines. When the transmission mode of the target bus is a second mode, data is transmitted between the first device and the second device through at least two data signal lines.

In order to more accurately judge the signal transmission quality of at least two data signal lines between a first device and a second device. The second effective sampling time in a sampling period when a data signal line between the first device and the second device transmits data can be determined. And then when the situation that the at least two data signal lines between the first device and the second device transmit data simultaneously is determined, determining the signal transmission quality of the at least two data signal lines according to the first effective sampling time and the second effective sampling time within a sampling period at the first effective sampling time. Therefore, the second effective sampling time in one sampling period when one data signal line between the first device and the second device transmits data needs to be determined. At this time, the first device may set a transmission mode of the target bus to a first mode so that the test data is transmitted between the first device and the second device through the target data signal line.

Step S702, the first device obtains a preset sampling number of times of the test data.

Specifically, the step S601 is not described herein again.

Step S703, the first device obtains the sampled times of the test data, and detects whether the sampled times of the test data reaches the preset sampled times of the test data.

Specifically, the step S602 is not described herein again.

Step S704, the first device determines a sampling time of at least one sampling period.

Specifically, the step S603 is not described herein again.

Step S705, in the ith sampling period, the first device sends a test instruction message to the second device through the control signal line. The second device receives the test instruction message sent by the first device through the control signal line.

The test instruction message carries a transmission mode of the target bus, and the transmission mode of the target bus is a first mode.

In this embodiment, when the first device sends the test instruction message to the second device, the transmission mode of the target bus may be added to the message, so that the second device performs data transmission according to the specified transmission mode. At this time, the second device obtains the test instruction message, and analyzes the test instruction message to obtain the transmission mode of the target bus carried in the test instruction message. Specifically, the step S604 is not described herein again.

Step S706, the second device sends a test response message to the first device through the control signal line. The first device receives a test response message sent by the second device through the control signal line.

Specifically, the step S605 is not described herein again.

Step S707, the second device sends the test data to the first device through the target data signal line. The first device samples test data in the target data signal line based on a sampling time of an ith sampling period.

In this embodiment of the application, after receiving the test instruction message, the second device needs to send test data to the first device. At this time, since the transfer mode of the target bus is the first mode, the second device may transmit the test data to the first device through the target data signal line. The first device samples test data in the target data signal line at a sampling time of an ith sampling period.

Step S708, the first device detects whether the test data sampled in the target data line is correct for the sampling time of the ith sampling period, and determines the sampling time corresponding to the correct test data as a second valid sampling time.

In this embodiment of the application, after the first device acquires the test data, it is required to detect whether the test data is correct, and when it is detected that the test data is correct, the sampling time of the ith sampling period may be determined as the second effective sampling time. The step S608 is not repeated herein to determine whether the test data is correct.

Step S709, updating the sampled times according to the value of i, re-executing the step to obtain the sampled times of the test data, and detecting whether the sampled times of the test data reaches the preset sampled times of the test data, and obtaining the test data according to the test data blocks sampled in at least two data signal lines and detecting whether the test data is correct or not aiming at the sampling time of the ith sampling period; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time until the sampled times of the test data reach the preset sampling times of the test data.

Specifically, the step S609 is not described herein again.

Step S710, when the sampled times of the test data reach the preset sampled times of the test data, the first device updates the transmission mode of the target bus to the second mode.

In the embodiment of the present application, when the transmission mode of the target bus is the first mode, if the sampled times of the test data reach the preset sampling times of the test data, it is necessary to determine the effective sampling time in one sampling period when the transmission mode of the target bus is the second mode. At this time, the first device sets the transfer mode of the target bus to the second mode.

Step S711, the first device obtains a preset sampling frequency of the test data.

Specifically, the step S601 is not described herein again.

Step S712, the first device obtains the sampled times of the test data, and detects whether the sampled times of the test data reaches the preset sampled times of the test data.

Specifically, the step S602 is not described herein again.

Step S713, the first device determines a sampling time of at least one sampling period.

Specifically, the step S603 is not described herein again.

Step 714, in the ith sampling period, the first device sends a test instruction message to the second device through the control signal line. The second device receives the test instruction message sent by the first device through the control signal line.

Specifically, the step S604 is not described herein again.

Step S715, the second device sends a test response message to the first device through the control signal line. The first device receives a test response message sent by the second device through the control signal line.

Specifically, the step S605 is not described herein again.

Step S716, the second device divides the test data into at least two test data blocks according to the at least two data signal lines.

Specifically, the step S606 is not described herein again.

In step S717, the second device transmits at least two test data blocks to the first device through at least two data signal lines, respectively. The first device samples the test data block in at least two data signal lines based on a sampling time of an ith sampling period.

Wherein different data signal lines transmit different test data blocks.

Specifically, the step S607 is not described herein again.

Step S718, for the sampling time of the ith sampling period, obtaining test data according to the test data blocks sampled in the at least two data signal lines, and detecting whether the test data is correct; and when the test data is correct, determining the sampling time of the ith sampling period as the first effective sampling time.

Specifically, the step S608 is not described herein again.

Step S719, the first device updates the sampled times according to the value of i, re-executes the step to obtain the sampled times of the test data, and detects whether the sampled times of the test data reach the preset sampled times of the test data, and obtains the test data according to the test data blocks sampled in the at least two data signal lines and detects whether the test data are correct or not by aiming at the sampling time of the ith sampling period; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time until the sampled times of the test data reach the preset sampling times of the test data.

Specifically, the step S609 is not described herein again.

Step S720, the first device determines the signal transmission quality of the at least two data signal lines according to the determined first effective sampling time.

Specifically, reference to step S203 is not repeated herein.

Referring to fig. 8, a schematic structural diagram of a detection apparatus for a data link according to an embodiment of the present application is provided. The detection device is applied to a first device, the first device is connected with a second device through a target bus, and the target bus comprises a control signal line and at least two data signal lines. As shown in fig. 8, the detection apparatus includes:

the processing unit 801 is configured to determine a sampling time of at least one sampling period, and sample the test data block in the at least two data signal lines based on the sampling time of the at least one sampling period.

The processing unit 801 is further configured to, for the sampling time of each sampling period, obtain test data according to the test data block sampled in the at least two data signal lines, and detect whether the test data is correct; when the test data is correct, determining the sampling time of the sampling period as a first effective sampling time.

A determining unit 802, configured to determine signal transmission qualities of at least two data signal lines according to the determined first valid sampling time.

As a possible implementation manner, as shown in fig. 9, the detection apparatus further includes:

a sending unit 803, configured to send a test instruction message to the second device through the control signal line.

The receiving unit 804 is configured to receive a test response message sent by the second device through the control signal line.

As a possible implementation manner, the determining unit 802 is further configured to determine that the transmission mode of the target bus is the first mode.

A processing unit 801 for sampling test data in the target data signal line based on a sampling time of at least one sampling period; and detecting whether the test data sampled in the target data line is correct or not according to the sampling time of each sampling period, and determining the sampling time corresponding to the correct test data as second effective sampling time.

Wherein the target signal line is any one of the at least two data signal lines.

The processing unit 801 is further configured to update the transmission mode of the target bus to the second mode.

The processing unit 801 is specifically configured to sample the test data block in the at least two data signal lines based on a sampling time of at least one sampling period when the transmission mode of the target bus is the second mode.

The determining unit 802 is specifically configured to determine signal transmission qualities of at least two data signal lines according to the determined first effective sampling time and the determined second effective sampling time.

As a possible implementation manner, the processing unit 801 is further configured to obtain a preset sampling number of the test data; and acquiring the sampled times of the test data, and detecting whether the sampled times of the test data reach the preset sampling times of the test data.

The processing unit 801 is specifically configured to determine sampling time of an ith sampling period when the sampled times of the test data do not reach the preset sampling times of the test data; in an ith sampling period, test data is sampled in at least two data signal lines based on a sampling time of the ith sampling period. Wherein the value of i is the sum of the sampled times and 1.

Aiming at the sampling time of the ith sampling period, acquiring test data according to test data blocks sampled in at least two data signal lines, and detecting whether the test data is correct or not; and when the test data is correct, determining the sampling time of the ith sampling period as the first effective sampling time.

The processing unit 801 is further configured to update the sampled times according to the value of i, re-execute the step to obtain the sampled times of the test data, and detect whether the sampled times of the test data reaches the preset sampled times of the test data, until the sampling time of the ith sampling period in the step, obtain the test data according to the test data blocks sampled in the at least two data signal lines, and detect whether the test data is correct; and when the test data is correct, determining the sampling time of the ith sampling period as a first effective sampling time until the sampled times of the test data reach the preset sampling times of the test data.

As a possible implementation manner, the processing unit 801 is specifically configured to determine a sampling reference value according to a preset sampling frequency of the test data, and obtain a first preset interval time of the sampling time; and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the sampling reference value and the first preset interval time of the sampling time.

As a possible implementation manner, the processing unit 801 is specifically configured to obtain a second preset interval time of the sampling time; and when the sampled times of the test data do not reach the preset sampling times of the test data, determining the sampling time of the ith sampling period according to the second preset interval time of the sampling time and the sampling time of the (i-1) th sampling period.

As a possible implementation, the target bus comprises: and the secure digital input output interface SDIO bus.

Referring to fig. 10, a schematic structural diagram of a data link detection apparatus according to an embodiment of the present application is provided. The detection device is applied to a second device, the first device is connected with the second device through a target bus, and the target bus comprises a control signal line and at least two data signal lines. As shown in fig. 10, the detection apparatus includes:

the processing unit 1001 is configured to divide the test data into at least two test data blocks according to at least two data signal lines.

The sending unit 1002 is configured to send at least two test data blocks to the first device through at least two data signal lines, respectively. Wherein different data signal lines transmit different test data blocks.

As a possible implementation manner, as shown in fig. 11, the detection apparatus further includes:

the receiving unit 1003 is configured to receive a test instruction message sent by the first device through the control signal line.

The sending unit 1002 is further configured to send a test response message to the first device through the control signal line.

Corresponding to the embodiment, the application further provides the electronic equipment. Fig. 12 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, where the electronic device 1200 may include: a processor 1201, a memory 1202, and a communication unit 1203. The components communicate over one or more buses, and those skilled in the art will appreciate that the configuration of the servers shown in the figures are not meant to limit embodiments of the present invention, and may be in the form of buses, stars, more or fewer components than those shown, some components in combination, or a different arrangement of components.

The communication unit 1203 is configured to establish a communication channel, so that the storage device can communicate with other devices. Receiving the user data sent by other devices or sending the user data to other devices.

The processor 1201, which is a control center of the storage device, connects various parts of the entire electronic device using various interfaces and lines, and executes various functions of the electronic device and/or processes data by operating or executing software programs and/or modules stored in the memory 1202 and calling data stored in the memory. The processor may be composed of Integrated Circuits (ICs), for example, a single packaged IC, or a plurality of packaged ICs connected to the same or different functions. For example, the processor 1201 may include only a Central Processing Unit (CPU). In the embodiment of the present invention, the CPU may be a single operation core, or may include multiple operation cores.

The memory 1202 is used for storing instructions executed by the processor 1201, and the memory 1202 may be implemented by any type of volatile or non-volatile storage device or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

The execution instructions in the memory 1202, when executed by the processor 1201, enable the electronic device 1200 to perform some or all of the steps in the embodiment shown in fig. 7.

In specific implementation, the present invention further provides a computer storage medium, where the computer storage medium may store a program, and the program may include some or all of the steps in the embodiments of the data link detection method provided by the present invention when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like.

Those skilled in the art will readily appreciate that the techniques of the embodiments of the present invention may be implemented as software plus a required general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present invention may be essentially or partially implemented in the form of a software product, which may be stored in a storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments.

The same and similar parts in the various embodiments in this specification may be referred to each other. In particular, as for the apparatus embodiment and the terminal embodiment, since they are substantially similar to the method embodiment, the description is relatively simple, and reference may be made to the description in the method embodiment for relevant points.

Claims

1. A method for detecting a data link is applied to a first device, the first device is connected with a second device through a target bus, wherein the target bus comprises a control signal line and at least two data signal lines, and the method comprises the following steps:

2. The method of claim 1, further comprising, prior to sampling test data blocks in the at least two data signal lines based on the sampling time of the at least one sampling period:

3. The method of claim 1, further comprising, prior to sampling a test data block in at least two data signal lines based on the sampling time of the at least one sampling period:

determining a transmission mode of a target bus as a first mode;

updating the transmission mode of the target bus to a second mode;

4. The method of claim 1, further comprising:

acquiring preset sampling times of test data;

5. The method of claim 4, wherein determining the sampling time of the ith sampling period when the sampled number of times of the test data does not reach the preset number of times of sampling of the test data comprises:

6. The method of claim 4, wherein determining the sampling time of the ith sampling period when the sampled number of times of the test data does not reach the preset number of times of sampling of the test data comprises:

acquiring a second preset interval time of the sampling time;

7. The method of any of claims 1-6, wherein the target bus comprises: and the secure digital input output interface SDIO bus.

8. A method for detecting a data link is applied to a second device, the first device is connected with the second device through a target bus, wherein the target bus comprises a control signal line and at least two data signal lines, and the method comprises the following steps:

9. The method of claim 8, further comprising, prior to said dividing test data into at least two test data blocks based on said at least two data signal lines:

10. A detection device of a data link is characterized in that the detection device is applied to a first device, the first device is connected with a second device through a target bus, the target bus comprises a control signal line and at least two data signal lines, and the detection device comprises:

11. A detection device of a data link is applied to a second device, the first device is connected with the second device through a target bus, wherein the target bus comprises a control signal line and at least two data signal lines, and the device comprises:

12. An electronic device comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the electronic device to perform the method of any of claims 1-7 or the method of any of claims 8-9.

13. A computer-readable storage medium, comprising a stored program, wherein the program, when executed, controls an apparatus on which the computer-readable storage medium is located to perform the method of any of claims 1-7 or the method of any of claims 8-9.