CN115825797A - Power supply performance test method and related assembly - Google Patents

Abstract

The application relates to a power supply performance test method and a related component, wherein the method comprises the following steps: powering on the power supply performance test system according to the power-on logic sequence; the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion; respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards; and if so, generating a test report. The application can automatically test the frequency points of a plurality of channels simultaneously, can accurately and rapidly find the worst frequency point of the dynamic response of the power supply, saves the test and recording time, improves the test precision, and simultaneously, the acquired data can form a frequency, duty ratio and voltage three-dimensional voltage dynamic model to more completely and accurately represent the test result.

Description

A power supply performance testing method and related components

technical field

The present application relates to the technical field of server testing, in particular to a power supply performance testing method and related components.

Background technique

With the development of server technology, the requirements for server quality are getting higher and higher. In the M7 platform server, the PCH (Platform Controller Hub, platform management center) chip is responsible for connecting the PCIe (Peripheral Component Interface Extend, peripheral component interface extension) bus, IDE (Integrated Development Environment, integrated development environment) equipment, I/O equipment, etc., is The integrated south bridge of the entire server platform; the power supply performance of the PCH on the server motherboard directly affects the communication quality and service life of I/O devices such as hard drives. Key items that need to be considered; therefore, how to test the PCH power supply of the server to determine the power supply performance of the server PCH chip is an important technical issue.

The existing technology usually uses manual methods to calibrate the oscilloscope probe, manually power on the equipment in sequence, and scan the frequency manually, which cannot cover all frequency points, and cannot collect the worst dynamic data of voltage changes. It is difficult to fully and accurately reflect the test results, and the test accuracy is poor; at the same time, there are seven to eight channels to be tested, and parameters such as LPVRTT (wireless transmission technology) load current, duty cycle, and frequency need to be manually adjusted for each channel powered by the PCH , manually fill the data and waveforms into the test report module, analyze the data, and take a long time to test and record the data.

Contents of the invention

Based on this, it is necessary to provide a power supply performance testing method and related components for the above technical problems.

On the one hand, a power supply performance test method is provided, which is applied to a power supply performance test system, and the method includes:

Step A: Power on the power supply performance test system according to the power-on logic sequence;

Step B: Based on the power supply performance test system after power-on, a pre-sweep is performed at a fixed duty cycle to obtain the peak-to-peak voltages of all frequency points of each channel, and the frequency points corresponding to the peak-to-peak voltages are calculated according to a preset ratio. Divided into three sequence datasets;

Step C: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

Step D: If satisfied, generate a test report.

In one of the embodiments, it also includes: said powering on the power supply performance test system according to the power-on logic sequence includes: using the host computer to control the power distribution unit to sequentially power on the Intel pull fixture, oscilloscope, digital multimeter and data processing module At the same time, use the host computer to control the digital multimeter to measure the pins of the platform manager central board card to be tested, and judge whether there is a short circuit based on the measurement results; electricity.

In one of the embodiments, it also includes: before the pre-sweep, the method also includes: using the host computer to collect the voltage readings of the digital multimeter, the oscilloscope and the power supply performance testing system in the no-load state; based on the Voltage readings, calculating the maximum error, comparing the maximum error with a first preset value: if the maximum error is greater than the first preset value, using an oscilloscope to correct the collected voltage; if the maximum error is less than or is equal to the first preset value, enter the pre-scanning step.

In one of the embodiments, it also includes: performing pre-sweep under a fixed duty cycle, obtaining the peak-to-peak voltage of all frequency points of each channel, and dividing the peak-to-peak voltage into three according to a preset ratio The sequence data set includes: adjusting the load of the power supply performance test system, determining the duty cycle of the frequency sweep based on the adjusted load; performing pre-sweep on all channels based on the duty cycle, and recording the frequency of all frequency points of each channel The peak-to-peak voltages are arranged in ascending order; the frequency points corresponding to the peak-to-peak voltages after the arrangement are divided into three sequence data sets according to a preset ratio.

In one of the embodiments, it also includes: performing voltage dynamic tests on the three sequence data sets based on preset rules, and judging whether the test results meet the preset standards includes: sequentially testing the three sequence data sets with a fixed step size. The duty cycle corresponding to the frequency point in the sequence data set is scanned from the second preset value to the third preset value; when the scan result contains a target frequency point that does not meet the preset standard, reduce the fixed step size and restart Scanning; when the scanning results of the three sequence data sets do not contain the target frequency points, output the test results to form a test report.

In another aspect, a power supply performance testing system is provided, the system comprising:

A power distribution unit, the power distribution unit is connected to the data acquisition module and the data processing module through a power cord; an upper computer, the upper computer is connected to the power distribution unit based on an interconnection protocol between networks, and the power distribution unit is connected through a universal serial The bus cable is connected to the data processing module for powering on the data processing module according to the power-on logic sequence; the host computer is connected to the data acquisition module through a general interface bus cable for Control the data acquisition process of the data acquisition module, and power on the data acquisition module according to the power-on logic sequence; the data processing module and the data acquisition module are connected through a universal serial bus cable for Perform voltage dynamic test on the system under test.

In one of the embodiments, it also includes: the data acquisition module includes a platform manager central board card to be tested, an oscilloscope, a digital multimeter, and an Intel pull-load fixture; the platform manager central board card to be tested passes through a pin connector It is connected with the Intel loading fixture; the Intel loading fixture is connected with the oscilloscope through a differential probe; the Intel loading fixture is connected with the digital multimeter through a DuPont line.

On the other hand, a power supply performance testing device is also provided, the device comprising:

The power-on module is used to power on the power supply performance test system according to the power-on logic sequence;

The pre-sweep module is used to perform pre-sweep at a fixed duty cycle based on the power supply performance test system after power-on, obtain the peak-to-peak voltages of all frequency points of each channel, and convert the peak-to-peak voltages according to a preset ratio The corresponding frequency points are divided into three sequence data sets;

A judging module, configured to perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

The test report generation module is used to generate a test report when the test result meets the preset standard.

In another aspect, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and operable on the processor, and the processor implements the following steps when executing the computer program:

Step A: Power on the power supply performance testing system according to the power-on logic sequence;

Step B: Based on the power supply performance test system after power-on, a pre-sweep is performed at a fixed duty cycle to obtain the peak-to-peak voltages of all frequency points of each channel, and the frequency points corresponding to the peak-to-peak voltages are calculated according to a preset ratio. Divided into three sequence datasets;

Step C: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

Step D: If satisfied, generate a test report.

In yet another aspect, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

Step A: Power on the power supply performance testing system according to the power-on logic sequence;

Step B: Based on the power supply performance test system after power-on, a pre-sweep is performed at a fixed duty cycle to obtain the peak-to-peak voltages of all frequency points of each channel, and the frequency points corresponding to the peak-to-peak voltages are calculated according to a preset ratio. Divided into three sequence datasets;

Step C: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

Step D: If satisfied, generate a test report.

The above-mentioned power supply performance test method and related components, the method includes: power on the power supply performance test system according to the power-on logic sequence; based on the power supply performance test system after power-on, perform a pre-sweep under a fixed duty cycle to obtain The voltage peak-to-peak value of all frequency points of each channel, and the frequency points corresponding to the voltage peak-to-peak value are divided into three sequence data sets according to the preset ratio; the voltage dynamics of the three sequence data sets are respectively performed based on preset rules Test, to judge whether the test results meet the preset standards; if so, generate a test report. This application can be used for server PCH multi-channel automatic test, and can solve the problems of low test efficiency, poor test result accuracy, and long test time caused by mechanical repetition of traversal work in manual test. This application can simultaneously test multiple channels. Automated testing of frequency points can accurately and quickly find the worst frequency point of power dynamic response, saving test and recording time, and improving test accuracy. At the same time, the collected data can form a three-dimensional voltage of frequency, duty cycle, and voltage. Dynamic model, more complete and accurate representation of test results.

Description of drawings

Fig. 1 is an application environment diagram of a power supply performance test method in an embodiment;

Fig. 2 is a schematic flow chart of a method for testing power supply performance in an embodiment;

Fig. 3 is another schematic flow chart of the power supply performance testing method in an embodiment;

Fig. 4 is a schematic diagram of the PCH power supply dynamic model of the power supply performance test method in one embodiment;

Fig. 5 is a structural block diagram of a power supply performance testing system in an embodiment;

Fig. 6 is a structural block diagram of a power supply performance testing device in an embodiment;

Figure 7 is an internal block diagram of a computer device in one embodiment.

Detailed ways

In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

The power supply performance test method provided in this application can be applied to the application environment shown in FIG. 1 . Wherein, the terminal 102 communicates with the data processing platform provided on the server 104 through the network, wherein the terminal 102 can be but not limited to various personal computers, notebook computers, smart phones, tablet computers and portable wearable devices, and the server 104 can be It can be implemented with an independent server or a server cluster composed of multiple servers.

Example 1

In one embodiment, as shown in Figure 2-4, a power supply performance testing method is provided, and the method is applied to the terminal in Figure 1 as an example for illustration, including the following steps:

S1: Power on the power supply performance testing system according to the power-on logic sequence.

It should be noted that the power-on of the power supply performance test system according to the power-on logic sequence includes:

Open the PDX test software, and use the host computer to control the power distribution unit to power on the Intel load fixture, oscilloscope, digital multimeter and data processing module in turn;

At the same time, use the host computer to control the digital multimeter to measure the pins (Pin pins) of the platform manager central board card to be tested, and judge whether there is a short circuit based on the measurement results;

When the multimeter measures 0Ω, it is a short circuit, and the rest indicate no short circuit. If there is no short circuit, power on the platform manager central board to be tested.

Further, after the system is fully powered on, before the pre-sweep, the host computer collects the voltage readings of the digital multimeter, oscilloscope and PDX software in the no-load state, wherein the voltage in the PDX software is the whole power supply performance test. The voltage of the system; based on the voltage reading, calculate the maximum error, which refers to the difference between any two of the PDX software, digital multimeter and oscilloscope, and compare the maximum error with the first preset value: if The maximum error is greater than the first preset value, then use the oscilloscope to correct the collected voltage, after the correction is completed, start the initial test according to the command of the host computer; if the maximum error is less than or equal to the first preset value , enter the pre-sweep step. Exemplarily, the first preset value set in this embodiment is 2mv.

S2: Based on the power supply performance test system after power-on, the pre-sweep is performed under a fixed duty cycle to obtain the peak-to-peak voltage of all frequency points of each channel, and divide the peak-to-peak voltage into three sequences according to a preset ratio data set.

It should be noted that when the BUCK circuit is stable, the capacitor charge of the upper tube when the upper MOS is turned on is equal to the capacitor discharge when the lower tube is turned on. Generally, in the dynamic test, the minimum and maximum voltages are halfway around the effective value. Peak operation, namely:

Vout _max ≈Vout _mean +0.5*Vpk_pk _max

Vout _min ≈Vout _mean -0.5*Vpk_pk _max

Among them, Vout _max represents the maximum value of the output voltage, Vout _mean represents the effective value of the output voltage, Vpk_pk _max represents the maximum value of the peak-to-peak value of the output voltage, and Vout _min represents the minimum value of the output voltage;

In the PCH-related POL circuit, the effective value is determined by the reference voltage and the voltage dividing resistor, which is generally a certain value, so the peak-to-peak voltage can be used as an important indicator for dynamic testing. During the dynamic test, firstly, adjust the load of the power supply performance test system. When the heavy load and the light load each account for 50%, the capacitor charging and discharging time caused by the load change is the same, which can best reflect the dynamic characteristics of the power supply at this frequency , so this embodiment uses 50% as the duty ratio index of the first pre-sweep frequency.

Pre-sweep all channels based on 50% duty cycle, record the peak-to-peak voltage of all frequency points of each channel, and arrange them in order from small to large;

The arranged frequency points corresponding to the voltage peak-to-peak values are divided into three sequence data sets according to preset ratios, wherein the preset ratios set in this embodiment are 10%, 30% and 60%.

S3: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards.

It should be noted that this step is specifically:

Scanning the duty cycles corresponding to the frequency points in the three sequence data sets from the second preset value to the third preset value in sequence with a fixed step size, specifically:

The duty cycle corresponding to the frequency points in the first sequence data set starts scanning from 50% to 95% with a fixed step of 5%, wherein 50% and 95% correspond to the second preset value and the third preset value respectively. set value;

Record the maximum and minimum values obtained by frequency point scanning. When the maximum value and minimum value do not meet the preset standard (SPEC), that is, the dynamic test of the corresponding frequency point in the first sequence of data sets Fail, determine the worst frequency point, and the oscilloscope captures Take the worst waveform image, adjust and optimize the peripheral power supply, and change its duty cycle mode to load, control and reduce the duty cycle step size to obtain a more accurate frequency point range, test again to find the worst frequency point, the oscilloscope captures Take the worst waveform image and repeat the test until the first sequence of data set scan ends and no target frequency point is found. Among them, the recording frequency point is defined as the current target frequency point; if the first sequence of data sets is tested for PASS, that is, when the first sequence After the set scanning ends and no target frequency point is found, repeat the above steps for the second and third sequence data sets for testing.

When no target frequency point that does not meet SPEC is found after scanning the three sequence data sets, the test result is output.

S4: If satisfied, generate a test report.

Specifically, it is determined whether the voltage dynamic test satisfies the voltage SPEC, and if it is satisfied, that is, when the scanning results of the three sequence data sets do not contain the target frequency point, the PCH voltage, frequency, and duty cycle are output, and the three-dimensional simulation system Form the dynamic model of PCH power supply, generate the test report, and power off according to the power-off sequence. Among them, the test report is shown in Figure 4. For the dynamic model shown in Figure 4, the maximum and minimum values of voltage changes can be clearly displayed. The model It clearly shows the variation trend of voltage with loading frequency and duty cycle. The closer to SPEC, the redder the color is, and the larger the test margin is, the bluer the color is. At the same time, the model records the frequency and duty cycle when the margin is the smallest. Duty ratio, load current and other data.

This application proposes an efficient PCH test method for server motherboards. The test steps include: under a fixed duty cycle, automatically adjust the loading frequency of each channel to perform pre-sweep, obtain the voltage peak value Vpk-pk, according to Vpk-pk Sort the frequency points from large to small to obtain the first sequence, the second sequence and the third sequence; for the frequency points in the first sequence, load by changing the duty cycle method, and record the maximum and minimum voltage values , if the value does not conform to the frequency point of the SPEC standard, the scanning ends; if no frequency point not conforming to the SPEC standard is found, then the frequency scanning of the second and third sequences with different duty cycles is performed in sequence. This application adopts a suitable test strategy to automatically test the frequency points of multiple channels at the same time, which can accurately and quickly find the worst frequency point of the dynamic response of the power supply, saves test and recording time, and improves the test accuracy. At the same time, the acquisition The obtained data can form a three-dimensional voltage dynamic model of frequency, duty cycle and voltage, which can express the test results more clearly and concretely.

It should be understood that although the various steps in the flow charts in FIGS. 2-3 are displayed sequentially as indicated by the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in Figures 2-3 may include multiple sub-steps or multiple stages, these sub-steps or stages are not necessarily performed at the same time, but may be performed at different times, these sub-steps or stages The order of execution is not necessarily performed sequentially, but may be performed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.

Example 2

In one embodiment, as shown in Figure 5, a power supply performance testing system is provided, including: a power distribution unit, a data acquisition module, a data processing module and a host computer, wherein:

A power distribution unit, the power distribution unit is connected to the data acquisition module and the data processing module through a power cord;

The data acquisition module is connected to the data processing module through a universal serial bus cable;

A host computer, the host computer is connected to the data processing module through the universal serial bus cable, and is connected to the power distribution unit based on an interconnection protocol between networks.

In one embodiment, the data acquisition module includes a platform manager central board card to be tested, an oscilloscope, a digital multimeter and an Intel pull-load fixture;

The platform manager central board to be tested is connected to the Intel pull-load fixture through a pin connector;

The Intel loading fixture is connected to the oscilloscope through a differential probe;

The Intel loading fixture is connected with the digital multimeter through a DuPont line.

In one embodiment, the host computer is respectively connected to the digital multimeter and the oscilloscope through a universal interface bus cable to control the acquisition process of the data acquisition module.

Fig. 5 is a block diagram of the testing system of the present invention. The testing system is an automatic programmable system, which can perform automatic testing for the mainstream PCH chip power supply design on the market. Specifically, the PCH board to be tested (platform manager central board to be tested), oscilloscope, digital multimeter and LPVRTT (Intel pull load fixture) constitute a data acquisition area; the host computer passes through a USB cable (Universal Serial Bus, Universal Serial Bus cable) communicates with LPVRTT and the data processing module, and the upper computer is connected to a digital multimeter and an oscilloscope through a GPIB (General-Purpose Interface Bus, which is a bus connected to a device and a computer) cable. The board is connected to LPVRTT through pin to pin Head to Head (pin connector), LPVRTT is connected to the oscilloscope through a differential probe, and LPVRTT is connected to a digital multimeter through a Dupont line. The data acquisition area performs initial testing and debugging according to the control of the host computer. In-process retesting.

After setting up the test environment, the host computer controls the PDU (power distribution unit) to power on the LPVRTT according to the standard power-on sequence, opens the PDX test software, and powers on the oscilloscope, digital multimeter, and data processing module in sequence, and the host computer controls the digital multimeter to connect to the pins. After measuring and judging that there is no short circuit, power on the board to be tested; after all the systems are powered on, the host computer collects the voltage readings in the digital multimeter, oscilloscope and PDX software under no-load status to determine whether the maximum error exceeds the preset value. If it is greater than the preset value, perform oscilloscope correction, and if it is not greater than the preset value, enter the test; after the correction is completed, start the initial test according to the command of the host computer.

As a specific implementation of the above-mentioned embodiment, the specific steps of powering on the power supply performance testing system according to the power-on logic sequence are as follows:

Using the host computer to control the power distribution unit to sequentially power on the Intel load fixture, oscilloscope, digital multimeter and data processing module;

At the same time, use the host computer to control the digital multimeter to measure the pins of the board to be tested in the center of the platform manager, and judge whether there is a short circuit based on the measurement results;

If there is no short circuit, power on the platform manager central board to be tested.

As a specific implementation of the above embodiment, before testing, it also includes:

Use the host computer to collect the voltage readings of the digital multimeter, oscilloscope and power supply performance test system under no-load state;

Based on the voltage reading, a maximum error is calculated, and the maximum error is compared with a first preset value:

If the maximum error is greater than the first preset value, then using an oscilloscope to correct the collected voltage;

If the maximum error is less than or equal to the first preset value, enter into a frequency pre-scanning step.

As a specific implementation of the above embodiment, the specific steps of the test include:

Adjusting the load of the power supply performance testing system, and determining the duty cycle of the frequency sweep based on the adjusted load;

Pre-sweep all channels based on the duty cycle, record the peak-to-peak voltages of all frequency points of each channel, and arrange them in ascending order;

The arranged frequency points corresponding to the peak-to-peak voltages are divided into three sequence data sets according to a preset ratio.

As a specific implementation of the above-mentioned embodiment, the specific steps of the test further include: successively changing the duty cycle corresponding to the frequency point in the three sequence data sets from the second preset value to the third preset value with a fixed step size to scan;

When the scanning result contains target frequency points that do not meet the preset standard, reduce the fixed step size and re-scan;

When the scanning results of the three sequence data sets do not include the target frequency points, output the test results to form a test report.

For specific limitations on the power supply performance testing system, refer to the above-mentioned limitations on the power supply performance testing method, which will not be repeated here. Each module in the above-mentioned power supply performance testing system can be fully or partially realized by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, and can also be stored in the memory of the computer device in the form of software, so that the processor can invoke and execute the corresponding operations of the above-mentioned modules.

Example 3

In one embodiment, as shown in FIG. 6, a power supply performance testing device is provided, including: a power-on module, a pre-sweep module, a judgment module and a test report generation module, wherein:

The power-on module is used to power on the power supply performance test system according to the power-on logic sequence;

The pre-sweep module is used to perform pre-sweep at a fixed duty cycle based on the power supply performance test system after power-on, obtain the peak-to-peak voltages of all frequency points of each channel, and convert the peak-to-peak voltages according to a preset ratio The corresponding frequency points are divided into three sequence data sets;

A judging module, configured to perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

The test report generation module is used to generate a test report when the test result meets the preset standard.

As a preferred implementation manner, in the embodiment of the present invention, the power-on module is specifically used for:

Using the host computer to control the power distribution unit to sequentially power on the Intel load fixture, oscilloscope, digital multimeter and data processing module;

At the same time, use the host computer to control the digital multimeter to measure the pins of the board to be tested in the center of the platform manager, and judge whether there is a short circuit based on the measurement results;

If there is no short circuit, power on the platform manager central board to be tested.

In one embodiment, the device also includes a preprocessing module, and the preprocessing module is specifically used for:

Use the host computer to collect the voltage readings of the digital multimeter, oscilloscope and power supply performance test system under no-load state;

Based on the voltage reading, a maximum error is calculated, and the maximum error is compared with a first preset value:

If the maximum error is greater than the first preset value, then using an oscilloscope to correct the collected voltage;

If the maximum error is less than or equal to the first preset value, enter into a frequency pre-scanning step.

As a preferred implementation manner, in the embodiment of the present invention, the pre-scan module is specifically used for:

Adjusting the load of the power supply performance testing system, and determining the duty cycle of the frequency sweep based on the adjusted load;

Pre-sweep all channels based on the duty cycle, record the peak-to-peak voltages of all frequency points of each channel, and arrange them in ascending order;

The arranged frequency points corresponding to the peak-to-peak voltages are divided into three sequence data sets according to a preset ratio.

As a preferred implementation manner, in the embodiment of the present invention, the test report generation module is specifically used for:

Sequentially scan the duty ratios corresponding to the frequency points in the three sequence data sets from the second preset value to the third preset value with a fixed step size;

When the scanning result contains target frequency points that do not meet the preset standard, reduce the fixed step size and re-scan;

When the scanning results of the three sequence data sets do not include the target frequency points, output the test results to form a test report.

For the specific limitations on the power supply performance testing device, please refer to the above-mentioned limitations on the power supply performance testing method, which will not be repeated here. Each module in the above-mentioned power supply performance testing device can be fully or partially realized by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, and can also be stored in the memory of the computer device in the form of software, so that the processor can invoke and execute the corresponding operations of the above-mentioned modules.

Example 4

In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure may be as shown in FIG. 7 . The computer device includes a processor, a memory, a network interface, a display screen and an input system connected by a system bus. Wherein, the processor of the computer device is used to provide calculation and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a power supply performance test method is realized. The display screen of the computer device may be a liquid crystal display screen or an electronic ink display screen, and the input system of the computer device may be a touch layer covered on the display screen, or a button, a trackball or a touch pad provided on the casing of the computer device , and can also be an external keyboard, touchpad, or mouse.

Those skilled in the art can understand that the structure shown in Figure 7 is only a block diagram of a part of the structure related to the solution of this application, and does not constitute a limitation to the computer equipment on which the solution of this application is applied. The specific computer equipment can be More or fewer components than shown in the figures may be included, or some components may be combined, or have a different arrangement of components.

In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and operable on the processor. When the processor executes the computer program, the following steps are implemented:

S1: Power on the power supply performance testing system according to the power-on logic sequence;

S2: Based on the power supply performance test system after power-on, the pre-sweep frequency is performed under a fixed duty cycle to obtain the peak-to-peak voltage of all frequency points of each channel, and divide the frequency points corresponding to the peak-to-peak voltage according to the preset ratio. For three sequence data sets;

S3: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

S4: If satisfied, generate a test report.

In one embodiment, the following steps are also implemented when the processor executes the computer program:

Using the host computer to control the power distribution unit to sequentially power on the Intel load fixture, oscilloscope, digital multimeter and data processing module;

At the same time, use the host computer to control the digital multimeter to measure the pins of the board to be tested in the center of the platform manager, and judge whether there is a short circuit based on the measurement results;

If there is no short circuit, power on the platform manager central board to be tested.

In one embodiment, the following steps are also implemented when the processor executes the computer program:

Use the host computer to collect the voltage readings of the digital multimeter, oscilloscope and power supply performance test system under no-load state;

Based on the voltage reading, a maximum error is calculated, and the maximum error is compared with a first preset value:

If the maximum error is greater than the first preset value, then using an oscilloscope to correct the collected voltage;

If the maximum error is less than or equal to the first preset value, enter into a frequency pre-scanning step.

In one embodiment, the following steps are also implemented when the processor executes the computer program:

Adjusting the load of the power supply performance testing system, and determining the duty cycle of the frequency sweep based on the adjusted load;

Pre-sweep all channels based on the duty cycle, record the peak-to-peak voltages of all frequency points of each channel, and arrange them in ascending order;

The arranged frequency points corresponding to the peak-to-peak voltages are divided into three sequence data sets according to a preset ratio.

In one embodiment, the following steps are also implemented when the processor executes the computer program:

Sequentially scan the duty ratios corresponding to the frequency points in the three sequence data sets from the second preset value to the third preset value with a fixed step size;

When the scanning result contains target frequency points that do not meet the preset standard, reduce the fixed step size and re-scan;

When the scanning results of the three sequence data sets do not include the target frequency points, output the test results to form a test report.

Example 5

In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

S1: Power on the power supply performance testing system according to the power-on logic sequence;

S2: Based on the power supply performance test system after power-on, the pre-sweep frequency is performed under a fixed duty cycle to obtain the peak-to-peak voltage of all frequency points of each channel, and divide the frequency points corresponding to the peak-to-peak voltage according to the preset ratio. For three sequence data sets;

S3: Perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards;

S4: If satisfied, generate a test report.

In one embodiment, when the computer program is executed by the processor, the following steps are also implemented:

Using the host computer to control the power distribution unit to sequentially power on the Intel load fixture, oscilloscope, digital multimeter and data processing module;

At the same time, use the host computer to control the digital multimeter to measure the pins of the board to be tested in the center of the platform manager, and judge whether there is a short circuit based on the measurement results;

If there is no short circuit, power on the platform manager central board to be tested.

In one embodiment, when the computer program is executed by the processor, the following steps are also implemented:

Use the host computer to collect the voltage readings of the digital multimeter, oscilloscope and power supply performance test system under no-load state;

Based on the voltage reading, a maximum error is calculated, and the maximum error is compared with a first preset value:

If the maximum error is greater than the first preset value, then using an oscilloscope to correct the collected voltage;

If the maximum error is less than or equal to the first preset value, enter into a frequency pre-scanning step.

In one embodiment, when the computer program is executed by the processor, the following steps are also implemented:

Adjusting the load of the power supply performance testing system, and determining the duty cycle of the frequency sweep based on the adjusted load;

Pre-sweep all channels based on the duty cycle, record the peak-to-peak voltages of all frequency points of each channel, and arrange them in ascending order;

The arranged frequency points corresponding to the peak-to-peak voltages are divided into three sequence data sets according to a preset ratio.

In one embodiment, when the computer program is executed by the processor, the following steps are also implemented:

Sequentially scan the duty ratios corresponding to the frequency points in the three sequence data sets from the second preset value to the third preset value with a fixed step size;

When the scanning result contains target frequency points that do not meet the preset standard, reduce the fixed step size and re-scan;

When the scanning results of the three sequence data sets do not include the target frequency points, output the test results to form a test report.

Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented through computer programs to instruct related hardware, and the computer programs can be stored in a non-volatile computer-readable memory In the medium, when the computer program is executed, it may include the processes of the embodiments of the above-mentioned methods. Wherein, any references to memory, storage, database or other media used in the various embodiments provided in the present application may include non-volatile and/or volatile memory. Nonvolatile memory can include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Chain Synchlink DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

The technical features of the above embodiments can be combined arbitrarily. To make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be It is considered to be within the range described in this specification.

The above-mentioned embodiments only represent several implementation modes of the present application, and the description thereof is relatively specific and detailed, but it should not be construed as limiting the scope of the patent for the invention. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the scope of protection of the patent application should be based on the appended claims.

Claims (10)

1. A method for testing power supply performance, characterized in that it is applied to a power supply performance testing system, and the method comprises: Power on the power supply performance test system according to the power-on logic sequence; Based on the power supply performance test system after power-on, the pre-sweep is performed under a fixed duty cycle to obtain the peak-to-peak voltage of all frequency points of each channel, and divide the frequency points corresponding to the peak-to-peak voltage into three according to the preset ratio a sequence data set; Performing voltage dynamic tests on the three sequence data sets based on preset rules, and judging whether the test results meet the preset standards; If satisfied, a test report is generated. 2. The power supply performance test method according to claim 1, wherein the power-on of the power supply performance test system according to the power-on logic sequence comprises: Use the host computer to control the power distribution unit to power on the Intel loading fixture, oscilloscope, digital multimeter and data processing module in sequence; At the same time, use the host computer to control the digital multimeter to measure the pins of the board to be tested in the center of the platform manager, and judge whether there is a short circuit based on the measurement results; If there is no short circuit, power on the platform manager central board to be tested. 3. The power supply performance testing method according to claim 1, wherein, before performing the pre-sweep, the method further comprises: Use the host computer to collect the voltage readings of the digital multimeter, oscilloscope and power supply performance test system under no-load state; Based on the voltage reading, a maximum error is calculated, and the maximum error is compared with a first preset value: If the maximum error is greater than the first preset value, then using an oscilloscope to correct the collected voltage; If the maximum error is less than or equal to the first preset value, enter into a frequency pre-scanning step. 4. The power supply performance test method according to claim 1, wherein the pre-sweep is performed at a fixed duty cycle to obtain the peak-to-peak voltages of all frequency points of each channel, and the voltage peak-to-peak values of all frequency points of each channel are obtained, and the obtained voltages are calculated according to a preset ratio. The peak-to-peak voltages are divided into three sequence data sets including: Adjusting the load of the power supply performance testing system, and determining the duty cycle of the frequency sweep based on the adjusted load; Pre-sweep all channels based on the duty cycle, record the peak-to-peak voltages of all frequency points of each channel, and arrange them in ascending order; The arranged frequency points corresponding to the peak-to-peak voltages are divided into three sequence data sets according to a preset ratio. 5. The power supply performance test method according to claim 4, wherein the dynamic voltage test is performed on the three sequence data sets based on preset rules, and judging whether the test results meet the preset criteria includes: Sequentially scan the duty ratios corresponding to the frequency points in the three sequence data sets from the second preset value to the third preset value with a fixed step size; When the scanning result contains target frequency points that do not meet the preset standard, reduce the fixed step size and re-scan; When the scanning results of the three sequence data sets do not include the target frequency points, output the test results to form a test report. 6. A power supply performance testing system, characterized in that the system comprises: A power distribution unit, the power distribution unit is connected to the data acquisition module and the data processing module through a power cord; A host computer, the host computer is connected to the power distribution unit based on the interconnection protocol between networks, and is connected to the data processing module through a universal serial bus cable, and is used to process the data according to the power-on logic sequence The processing module is powered on; The host computer is connected to the data acquisition module through a general interface bus cable, and is used to control the data acquisition process of the data acquisition module, and to power on the data acquisition module according to the power-on logic sequence; The data processing module is connected with the data acquisition module through a universal serial bus cable, and is used for dynamic voltage testing of the system to be tested. 7. The power supply performance testing system according to claim 6, wherein the data acquisition module includes a platform manager central board to be tested, an oscilloscope, a digital multimeter and an Intel pull-load fixture; The platform manager central board to be tested is connected to the Intel pull-load fixture through a pin connector; The Intel loading fixture is connected to the oscilloscope through a differential probe; The Intel loading fixture is connected with the digital multimeter through a DuPont line. 8. A power supply performance testing device, characterized in that the device comprises: The power-on module is used to power on the power supply performance test system according to the power-on logic sequence; The pre-sweep module is used to perform pre-sweep at a fixed duty cycle based on the power supply performance test system after power-on, obtain the peak-to-peak voltages of all frequency points of each channel, and convert the peak-to-peak voltages according to a preset ratio The corresponding frequency points are divided into three sequence data sets; A judging module, configured to perform voltage dynamic tests on the three sequence data sets based on preset rules, and judge whether the test results meet the preset standards; The test report generation module is used to generate a test report when the test result meets the preset standard. 9. A computer device, comprising a memory, a processor, and a computer program stored on the memory and operable on the processor, characterized in that, when the processor executes the computer program, any one of claims 1 to 5 is realized. A step of said method. 10. A computer-readable storage medium, on which a computer program is stored, wherein when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are realized.

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