CN115825797A - Power supply performance test method and related assembly - Google Patents

Power supply performance test method and related assembly Download PDF

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Publication number
CN115825797A
CN115825797A CN202211449616.8A CN202211449616A CN115825797A CN 115825797 A CN115825797 A CN 115825797A CN 202211449616 A CN202211449616 A CN 202211449616A CN 115825797 A CN115825797 A CN 115825797A
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power supply
frequency
supply performance
voltage
test
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肖新港
施秋云
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application relates to a power supply performance test method and a related component, wherein the method comprises the following steps: powering on the power supply performance test system according to the power-on logic sequence; the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion; respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards; and if so, generating a test report. The application can automatically test the frequency points of a plurality of channels simultaneously, can accurately and rapidly find the worst frequency point of the dynamic response of the power supply, saves the test and recording time, improves the test precision, and simultaneously, the acquired data can form a frequency, duty ratio and voltage three-dimensional voltage dynamic model to more completely and accurately represent the test result.

Description

Power supply performance test method and related components
Technical Field
The present disclosure relates to the field of server testing technologies, and in particular, to a power supply performance testing method and related components.
Background
With the development of server technology, the requirements on the quality of the server are higher and higher. In the M7 Platform server, a PCH (Platform management Hub) chip is responsible for connecting a PCIe (Peripheral Component Interface extended) bus, an IDE (Integrated Development Environment) device, an I/O device, and the like, and is an Integrated south bridge of the entire server Platform; the power supply performance of the PCH on the server mainboard directly influences the communication quality and the service life of I/O equipment such as a hard disk and the like, and the efficiency, the dynamic response, the thermal compensation and the direct current regulation of the server are key items to be considered when a power supply is designed for the PCH; therefore, how to test the power supply of the PCH of the server so as to determine the power supply performance of the PCH chip of the server is an important technical problem.
In the prior art, an oscilloscope probe is usually corrected in a manual mode, equipment is sequentially electrified manually, frequency sweeping is carried out by a manual traversing method, all frequency points cannot be covered, worst voltage change dynamic data cannot be acquired, a test result is difficult to completely and accurately reflect, and the test precision is poor; meanwhile, seven to eight channels need to be tested, parameters such as LPVRTT (wireless transmission technology) load current, duty ratio, frequency and the like need to be manually adjusted for each channel powered by the PCH, data and waveforms are manually filled into a test report module, the data are analyzed, and the time for testing and recording the data is long.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a power supply performance testing method and related components.
In one aspect, a power supply performance testing method is provided, and is applied to a power supply performance testing system, and the method includes:
step A: powering on the power supply performance test system according to the power-on logic sequence;
and B, step B: the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
and C: respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
step D: and if so, generating a test report.
In one embodiment, the method further comprises the following steps: the step of powering on the power supply performance test system according to the power-on logic sequence comprises the following steps: controlling a power distribution unit to sequentially electrify the Intel pulling and loading jig, the oscilloscope, the digital multimeter and the data processing module by utilizing an upper computer; meanwhile, the upper computer is used for controlling the digital multimeter to measure the pins of the board card to be measured in the center of the platform manager, and whether a short circuit phenomenon occurs is judged based on the measurement result; and if the short circuit phenomenon does not occur, electrifying the board card to be tested in the center of the platform manager.
In one embodiment, the method further comprises the following steps: before the pre-sweeping, the method further comprises: collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer; based on the voltage reading, calculating a maximum error, comparing the maximum error to a first preset value: if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope; and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
In one embodiment, the method further comprises the following steps: the pre-sweep frequency is carried out under the fixed duty ratio, the voltage peak value of all frequency points of each channel is obtained, and the voltage peak value is divided into three sequence data sets according to the preset proportion, wherein the three sequence data sets comprise: adjusting the load of the power supply performance test system, and determining the duty ratio of frequency sweeping based on the adjusted load; pre-sweeping frequency of all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large; and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
In one embodiment, the method further comprises the following steps: the step of respectively performing dynamic voltage test on the three sequence data sets based on a preset rule, and judging whether a test result meets a preset standard comprises the following steps: scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length; when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and scanning again; and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result and forming a test report.
In another aspect, a power supply performance testing system is provided, the system comprising:
the power distribution unit is connected with the data acquisition module and the data processing module through power lines; the upper computer is connected with the power distribution unit based on an interconnection protocol between networks, is connected with the data processing module through a universal serial bus cable, and is used for electrifying the data processing module according to an electrifying logic sequence; the upper computer is connected with the data acquisition module through a universal interface bus cable and is used for controlling the data acquisition process of the data acquisition module and electrifying the data acquisition module according to an electrifying logic sequence; the data processing module is connected with the data acquisition module through a universal serial bus cable and is used for dynamically testing the voltage of the system to be tested.
In one embodiment, the method further comprises the following steps: the data acquisition module comprises a platform manager central board to be tested, an oscilloscope, a digital multimeter and an Intel pull-load jig; the platform manager center board to be tested is connected with the Intel pulling load jig through a pin joint; the intel loading jig is connected with the oscilloscope through a differential probe; the intel pulling and loading jig is connected with the digital multimeter through a DuPont wire.
In another aspect, a power supply performance testing apparatus is further provided, the apparatus includes:
the power-on module is used for powering on the power supply performance test system according to a power-on logic sequence;
the device comprises a pre-sweep frequency module, a frequency acquisition module and a frequency acquisition module, wherein the pre-sweep frequency module is used for pre-sweeping frequency under a fixed duty ratio based on a power supply performance test system after power-on, acquiring voltage peak values of all frequency points of each channel, and dividing the frequency points corresponding to the voltage peak values into three sequence data sets according to a preset proportion;
the judging module is used for respectively carrying out voltage dynamic testing on the three sequence data sets based on a preset rule and judging whether a testing result meets a preset standard or not;
and the test report generating module is used for generating a test report when the test result meets the preset standard.
In another aspect, a computer device is provided, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:
step A: powering on the power supply performance test system according to a power-on logic sequence;
and B: the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
and C: respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
step D: and if so, generating a test report.
In yet another aspect, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, performs the steps of:
step A: powering on the power supply performance test system according to a power-on logic sequence;
and B: the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
and C: respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
step D: and if so, generating a test report.
The power supply performance test method and the related components comprise the following steps: powering on the power supply performance test system according to a power-on logic sequence; the method comprises the steps that a power supply performance testing system after being electrified performs pre-frequency sweeping under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion; respectively carrying out voltage dynamic test on the three sequence data sets based on a preset rule, and judging whether a test result meets a preset standard; and if so, generating a test report. The method can be used for automatic test of the PCH multichannel of the server, and can solve the problems of low test efficiency, poor test result precision and overlong test time caused by mechanical repetition of traversal work in manual test.
Drawings
FIG. 1 is a diagram of an exemplary implementation of a method for testing power performance;
FIG. 2 is a schematic flow chart of a method for testing power supply performance according to an embodiment;
FIG. 3 is another schematic flow chart diagram of a method for testing power supply performance in one embodiment;
FIG. 4 is a diagram illustrating a dynamic model of a PCH power supply according to an embodiment of a method for testing power supply performance;
FIG. 5 is a block diagram of an embodiment of a power supply performance testing system;
FIG. 6 is a block diagram showing the structure of a power supply performance testing apparatus according to an embodiment;
FIG. 7 is a diagram illustrating an internal structure of a computer device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The power supply performance testing method provided by the application can be applied to the application environment shown in fig. 1. The terminal 102 communicates with a data processing platform disposed on the server 104 through a network, wherein the terminal 102 may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, and portable wearable devices, and the server 104 may be implemented by an independent server or a server cluster formed by a plurality of servers.
Example 1
In one embodiment, as shown in fig. 2 to 4, a method for testing power supply performance is provided, which is described by taking the method as an example for being applied to the terminal in fig. 1, and includes the following steps:
s1: and powering on the power supply performance test system according to a power-on logic sequence.
It should be noted that the powering up the power supply performance test system according to the power up logic sequence includes:
opening PDX test software, and utilizing the upper computer to control a power distribution unit to sequentially electrify the Intel pulling load jig, the oscilloscope, the digital multimeter and the data processing module;
meanwhile, the upper computer is used for controlling the digital multimeter to measure a central board card Pin (Pin Pin) to be measured of the platform manager, and whether a short circuit phenomenon occurs is judged based on a measurement result;
and when the multimeter is measured to be 0 omega, the short circuit is detected, the rest of the multimeter shows non-short circuits, and if the short circuit phenomenon does not occur, the to-be-detected board card of the center of the platform manager is electrified.
Further, after the system is completely powered on, before the pre-frequency sweeping is carried out, the upper computer collects voltage readings in a digital multimeter, an oscilloscope and PDX software in a no-load state, wherein the voltage in the PDX software is the voltage of the whole power supply performance test system; based on the voltage reading, calculating a maximum error, wherein the error refers to the difference between any two of PDX software, a digital multimeter and an oscilloscope, and comparing the maximum error with a first preset value: if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope, and starting an initial test according to a command of an upper computer after the correction is finished; if the maximum error is less than or equal to the first preset value, a pre-frequency sweeping step is performed, and for example, the first preset value set in this embodiment is 2mv.
S2: the power supply performance testing system based on electrification performs pre-frequency sweeping under a fixed duty ratio, obtains voltage peak values of all frequency points of each channel, and divides the voltage peak values into three sequence data sets according to a preset proportion.
When the BUCK circuit is stable, the charging amount of the upper tube capacitor when the upper MOS is turned on is equal to the discharging amount of the capacitor when the lower tube is turned on, and generally, the minimum value and the maximum value of the voltage are half-peak around the effective value in the dynamic test, that is:
Vout max ≈Vout mean +0.5*Vpk_pk max
Vout min ≈Vout mean -0.5*Vpk_pk max
wherein Vout max Denotes the maximum value of the output voltage, vout mean Represents the effective value of the output voltage, vpk _ pk max Represents the maximum value of the peak-to-peak value of the output voltage, vout min Represents the minimum value of the output voltage;
in the PCH related POL circuit, the effective value is determined by the reference voltage and the divider resistance, and is generally a determined value, so the peak-to-peak value of the voltage can be used as an important index for dynamic testing. In the dynamic test process, firstly, the load of the power supply performance test system is adjusted, when the heavy load and the light load respectively account for 50%, the charging and discharging time of the capacitor caused by the change of the load is the same, and the dynamic characteristic of the power supply with the frequency can be reflected most, so that 50% is adopted as the duty ratio index of the first pre-sweep frequency in the embodiment.
Pre-sweeping frequency of all channels based on 50% duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion, wherein the preset proportion is set to be 10%, 30% and 60%.
S3: and respectively carrying out voltage dynamic test on the three sequence data sets based on a preset rule, and judging whether the test result meets a preset standard.
It is to be noted that the steps specifically include:
scanning the duty ratios corresponding to the three sequence data concentrated frequency points in sequence from a second preset value to a third preset value by a fixed step length, specifically:
starting scanning at a fixed step length of 5% from 50% to 95% of duty ratios corresponding to frequency points in the first sequence data set, wherein 50% and 95% correspond to a second preset value and a third preset value respectively;
recording the maximum value and the minimum value obtained by scanning the frequency points, when the maximum value and the minimum value do not meet a preset Standard (SPEC), namely, dynamically testing Fail at the corresponding frequency point in the first sequence data set, determining the worst frequency point, grabbing the worst waveform image by an oscilloscope, adjusting and optimizing peripheral power supply, changing the duty ratio mode of the peripheral power supply for carrying out pull load, controlling to reduce the duty ratio step length to obtain a more exact frequency point range, testing again to find the worst frequency point, grabbing the worst waveform image by the oscilloscope, and repeatedly testing until the scanning of the first sequence data set is finished and no target frequency point is found, wherein the recorded frequency point is defined as the current target frequency point; if the PASS is tested in the first sequence data set, namely after the scanning of the first sequence data set is finished and no target frequency point is found, the steps are repeated for the second sequence data set and the third sequence data set for testing.
And when the target frequency point which does not meet the SPEC is not found after the scanning of the three sequence data sets is finished, outputting a test result.
S4: and if so, generating a test report.
Specifically, whether the voltage dynamic test meets the voltage SPEC is judged, if yes, namely when the scanning results of the three sequence data sets do not contain the target frequency point, a PCH voltage, a frequency and a duty ratio are output, a PCH power supply dynamic model is formed in a three-dimensional simulation system, a test report is generated, and power is supplied according to a power-down sequence, wherein the test report is shown in fig. 4, the maximum value and the minimum value of voltage change can be clearly represented for the dynamic model shown in fig. 4, the model clearly shows the change trend of the voltage along with the load-pulling frequency and the duty ratio, the color is closer to the SPEC, the color is more red, the test margin is larger, the color is more blue, and meanwhile, the model records the frequency, the duty ratio, the load-pulling current and other data when the margin is minimum.
The application provides an efficient server mainboard PCH test method, which comprises the following test steps: under a fixed duty ratio, automatically adjusting the carrier pulling frequency of each channel to perform pre-sweep to obtain a voltage peak value Vpk-pk, and sequencing frequency points according to the descending order of the Vpk-pk to obtain a first sequence, a second sequence and a third sequence; carrying out pull loading on the frequency points in the first sequence by changing the duty ratio of the frequency points, recording the maximum value and the minimum value of the voltage, and ending scanning if the value does not accord with the frequency points of the SPEC standard; and if the frequency point which does not meet the SPEC standard is not found, sequentially sweeping the frequency of the second sequence and the third sequence with different duty ratios. This application adopts suitable test strategy, carries out automated test to the frequency point of a plurality of passageways simultaneously, can realize accurately, find power developments response worst frequency point rapidly, has saved test and record time, has improved the measuring accuracy, and simultaneously, the data of gathering can form frequency, duty cycle, the three-dimensional voltage dynamic model of voltage, more clearly specifically shows the test result.
It should be understood that although the various steps in the flow diagrams of fig. 2-3 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2-3 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed alternately or alternatingly with other steps or at least some of the sub-steps or stages of other steps.
Example 2
In one embodiment, as shown in fig. 5, there is provided a power supply performance test system including: power distribution unit, data acquisition module, data processing module and host computer, wherein:
the power distribution unit is connected with the data acquisition module and the data processing module through power lines;
the data acquisition module is connected with the data processing module through a universal serial bus cable;
and the upper computer is connected with the data processing module through the universal serial bus cable and is connected with the power distribution unit based on an interconnection protocol between networks.
In one embodiment, the data acquisition module comprises a platform manager central board to be tested, an oscilloscope, a digital multimeter and an intel loading jig;
the platform manager center board to be tested is connected with the Intel pulling load jig through a pin joint;
the Intel pull-load jig is connected with the oscilloscope through a differential probe;
the intel pulling and loading jig is connected with the digital multimeter through a DuPont wire.
In one embodiment, the upper computer is connected with the digital multimeter and the oscilloscope through universal interface bus cables respectively, and is used for controlling the acquisition process of the data acquisition module.
Fig. 5 is a block diagram of the test system according to the present invention, which is an automatic programmable system and can perform an automatic test for a mainstream PCH chip power supply design in the market. Specifically, the PCH board to be tested (platform manager center board to be tested), the oscilloscope, the digital multimeter and the LPVRTT (intel pull test tool) form a data acquisition area; the upper computer is communicated with the LPVRTT and the data processing module through a USB cable (Universal Serial Bus, universal Serial Bus cable), the upper computer is respectively connected with the digital multimeter and the oscilloscope through a GPIB (General-Purpose-noise Interface Bus, which is a Bus for connecting equipment and a computer), the board card to be tested is connected with the LPVRTT through a Head to Head (pin joint) of a pin to pin, the LPVRTT is connected with the oscilloscope through a differential probe, the LPVRTT is connected with the digital multimeter through a DuPont wire, and the data acquisition area executes initial test and re-inspection test in the debugging process according to the control of the upper computer.
After a test environment is established, an upper computer controls a PDU (power distribution unit) to electrify the LPVRTT according to a standard electrifying sequence, PDX test software is opened, an oscilloscope, a digital multimeter and a data processing module are electrified in sequence, the upper computer controls the digital multimeter to measure a Pin Pin, and after the condition that no short circuit exists is judged, an integrated circuit board to be tested is electrified; after the system is completely powered on, the upper computer collects voltage readings in a digital multimeter, an oscilloscope and PDX software in a no-load state, judges whether the maximum error exceeds a preset value, corrects the oscilloscope if the maximum error exceeds the preset value, and enters a test if the maximum error is not greater than the preset value; and after the correction is finished, starting an initial test according to the command of the upper computer.
As a specific implementation manner of the foregoing embodiment, the specific steps of powering on the power supply performance test system according to the power-on logic sequence are as follows:
the upper computer is used for controlling the power distribution unit to sequentially electrify the Intel pulling load jig, the oscilloscope, the digital multimeter and the data processing module;
meanwhile, the upper computer is used for controlling the digital multimeter to measure a central board card pin to be measured of the platform manager, and whether a short circuit phenomenon occurs is judged based on a measurement result;
and if the short circuit phenomenon does not occur, electrifying the board card to be tested in the center of the platform manager.
As a specific implementation manner of the foregoing embodiment, before performing the test, the method further includes:
collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer;
based on the voltage reading, calculating a maximum error, comparing the maximum error to a first preset value:
if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope;
and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
As a specific implementation manner of the foregoing embodiment, the specific steps of the test include:
adjusting the load of the power supply performance test system, and determining the duty ratio of the frequency sweep based on the adjusted load;
pre-sweeping frequency of all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
As a specific implementation manner of the foregoing embodiment, the specific steps of the test further include: scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length;
when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and carrying out scanning again;
and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result to form a test report.
For specific limitations of the power supply performance testing system, reference may be made to the above limitations of the power supply performance testing method, which are not described herein again. The various modules in the power supply performance test system may be implemented in whole or in part by software, hardware, and combinations thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
Example 3
In one embodiment, as shown in fig. 6, there is provided a power supply performance test apparatus including: the device comprises a power-on module, a pre-sweep frequency module, a judgment module and a test report generation module, wherein:
the power-on module is used for powering on the power supply performance test system according to a power-on logic sequence;
the device comprises a pre-sweep frequency module, a frequency acquisition module and a frequency acquisition module, wherein the pre-sweep frequency module is used for pre-sweeping frequency under a fixed duty ratio based on a power supply performance test system after power-on, acquiring voltage peak values of all frequency points of each channel, and dividing the frequency points corresponding to the voltage peak values into three sequence data sets according to a preset proportion;
the judging module is used for respectively carrying out voltage dynamic testing on the three sequence data sets based on a preset rule and judging whether a testing result meets a preset standard or not;
and the test report generating module is used for generating a test report when the test result meets the preset standard.
As a preferred implementation manner, in the embodiment of the present invention, the power-on module is specifically configured to:
the upper computer is used for controlling the power distribution unit to sequentially electrify the Intel pulling load jig, the oscilloscope, the digital multimeter and the data processing module;
meanwhile, the upper computer is used for controlling the digital multimeter to measure the pins of the board card to be measured in the center of the platform manager, and whether a short circuit phenomenon occurs is judged based on the measurement result;
and if the short circuit phenomenon does not occur, electrifying the central board to be tested of the platform manager.
In one embodiment, the apparatus further comprises a preprocessing module, the preprocessing module is specifically configured to:
collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer;
calculating a maximum error based on the voltage reading, comparing the maximum error to a first preset value:
if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope;
and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
As a preferred implementation manner, in the embodiment of the present invention, the pre-sweep module is specifically configured to:
adjusting the load of the power supply performance test system, and determining the duty ratio of frequency sweeping based on the adjusted load;
pre-sweeping all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
As a preferred implementation manner, in an embodiment of the present invention, the test report generating module is specifically configured to:
scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length;
when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and scanning again;
and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result and forming a test report.
For the specific definition of the power supply performance testing device, reference may be made to the above definition of the power supply performance testing method, which is not described herein again. The modules in the power supply performance testing device can be wholly or partially realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent of a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
Example 4
In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as shown in fig. 7. The computer device includes a processor, a memory, a network interface, a display screen, and an input system connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a power supply performance testing method. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input system of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like.
Those skilled in the art will appreciate that the architecture shown in fig. 7 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a computer device is provided, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
s1: powering on the power supply performance test system according to a power-on logic sequence;
s2: the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
s3: respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
s4: and if so, generating a test report.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
the upper computer is used for controlling the power distribution unit to sequentially electrify the Intel pulling load jig, the oscilloscope, the digital multimeter and the data processing module;
meanwhile, the upper computer is used for controlling the digital multimeter to measure the pins of the board card to be measured in the center of the platform manager, and whether a short circuit phenomenon occurs is judged based on the measurement result;
and if the short circuit phenomenon does not occur, electrifying the board card to be tested in the center of the platform manager.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer;
based on the voltage reading, calculating a maximum error, comparing the maximum error to a first preset value:
if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope;
and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
In one embodiment, the processor when executing the computer program further performs the steps of:
adjusting the load of the power supply performance test system, and determining the duty ratio of frequency sweeping based on the adjusted load;
pre-sweeping frequency of all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length;
when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and scanning again;
and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result and forming a test report.
Example 5
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, performs the steps of:
s1: powering on the power supply performance test system according to a power-on logic sequence;
s2: the method comprises the steps that a power supply performance testing system after being electrified performs pre-frequency sweeping under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
s3: respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
s4: and if so, generating a test report.
In one embodiment, the computer program when executed by the processor further performs the steps of:
the upper computer is used for controlling the power distribution unit to sequentially electrify the Intel pulling load jig, the oscilloscope, the digital multimeter and the data processing module;
meanwhile, the upper computer is used for controlling the digital multimeter to measure a central board card pin to be measured of the platform manager, and whether a short circuit phenomenon occurs is judged based on a measurement result;
and if the short circuit phenomenon does not occur, electrifying the board card to be tested in the center of the platform manager.
In one embodiment, the computer program when executed by the processor further performs the steps of:
collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer;
based on the voltage reading, calculating a maximum error, comparing the maximum error to a first preset value:
if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope;
and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
In one embodiment, the computer program when executed by the processor further performs the steps of:
adjusting the load of the power supply performance test system, and determining the duty ratio of frequency sweeping based on the adjusted load;
pre-sweeping frequency of all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
In one embodiment, the computer program when executed by the processor further performs the steps of:
scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length;
when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and scanning again;
and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result and forming a test report.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A power supply performance test method is applied to a power supply performance test system, and comprises the following steps:
powering on the power supply performance test system according to the power-on logic sequence;
the method comprises the steps that pre-frequency sweeping is carried out on the basis of a power-on power supply performance test system under a fixed duty ratio, voltage peak values of all frequency points of each channel are obtained, and the frequency points corresponding to the voltage peak values are divided into three sequence data sets according to a preset proportion;
respectively performing voltage dynamic tests on the three sequence data sets based on a preset rule, and judging whether test results meet preset standards;
and if so, generating a test report.
2. The method according to claim 1, wherein the powering up the power performance testing system according to the power-up logic sequence comprises:
controlling a power distribution unit to sequentially electrify the Intel pulling and loading jig, the oscilloscope, the digital multimeter and the data processing module by utilizing an upper computer;
meanwhile, the upper computer is used for controlling the digital multimeter to measure the pins of the board card to be measured in the center of the platform manager, and whether a short circuit phenomenon occurs is judged based on the measurement result;
and if the short circuit phenomenon does not occur, electrifying the board card to be tested in the center of the platform manager.
3. The power supply performance testing method of claim 1, wherein prior to the conducting a pre-sweep, the method further comprises:
collecting voltage readings of a digital multimeter, an oscilloscope and a power supply performance testing system in a no-load state by using an upper computer;
based on the voltage reading, calculating a maximum error, comparing the maximum error to a first preset value:
if the maximum error is larger than the first preset value, correcting the acquired voltage by using an oscilloscope;
and if the maximum error is less than or equal to the first preset value, entering a pre-frequency sweeping step.
4. The method for testing the power supply performance according to claim 1, wherein the pre-sweeping is performed at a fixed duty cycle, voltage peak values of all frequency points of each channel are obtained, and the dividing of the voltage peak values into three sequence data sets according to a preset proportion comprises:
adjusting the load of the power supply performance test system, and determining the duty ratio of the frequency sweep based on the adjusted load;
pre-sweeping all channels based on the duty ratio, recording voltage peak values of all frequency points of each channel, and arranging the voltage peak values from small to large;
and dividing the frequency points corresponding to the arranged voltage peak values into three sequence data sets according to a preset proportion.
5. The power supply performance test method according to claim 4, wherein the voltage dynamic test is performed on the three sequence data sets respectively based on a preset rule, and the determining whether the test result meets a preset standard includes:
scanning the duty ratios corresponding to the three sequence data concentrated frequency points from a second preset value to a third preset value in sequence by a fixed step length;
when the scanning result contains the target frequency point which does not meet the preset standard, reducing the fixed step length and scanning again;
and when the scanning results of the three sequence data sets do not contain the target frequency point, outputting a test result and forming a test report.
6. A power supply performance testing system, the system comprising:
the power distribution unit is connected with the data acquisition module and the data processing module through power lines;
the upper computer is connected with the power distribution unit based on an interconnection protocol between networks, is connected with the data processing module through a universal serial bus cable, and is used for electrifying the data processing module according to an electrifying logic sequence;
the upper computer is connected with the data acquisition module through a universal interface bus cable and is used for controlling the data acquisition process of the data acquisition module and electrifying the data acquisition module according to an electrifying logic sequence;
the data processing module is connected with the data acquisition module through a universal serial bus cable and is used for dynamically testing the voltage of the system to be tested.
7. The power supply performance test system of claim 6, wherein the data acquisition module comprises a platform manager central board to be tested, an oscilloscope, a digital multimeter and an intel pull load fixture;
the platform manager center board to be tested is connected with the Intel pulling load jig through a pin joint;
the intel loading jig is connected with the oscilloscope through a differential probe;
the intel pulling and loading jig is connected with the digital multimeter through a DuPont wire.
8. A power supply performance testing apparatus, characterized in that the apparatus comprises:
the power-on module is used for powering on the power supply performance test system according to a power-on logic sequence;
the device comprises a pre-sweep frequency module, a frequency acquisition module and a frequency acquisition module, wherein the pre-sweep frequency module is used for pre-sweeping frequency under a fixed duty ratio based on a power supply performance test system after power-on, acquiring voltage peak values of all frequency points of each channel, and dividing the frequency points corresponding to the voltage peak values into three sequence data sets according to a preset proportion;
the judging module is used for respectively carrying out voltage dynamic testing on the three sequence data sets based on a preset rule and judging whether a testing result meets a preset standard or not;
and the test report generating module is used for generating a test report when the test result meets the preset standard.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 5 are implemented when the computer program is executed by the processor.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
CN202211449616.8A 2022-11-18 2022-11-18 Power supply performance test method and related assembly Pending CN115825797A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116312308A (en) * 2023-04-27 2023-06-23 海的电子科技(苏州)有限公司 Output voltage calibration method and device for shortening Bar and storage medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116312308A (en) * 2023-04-27 2023-06-23 海的电子科技(苏州)有限公司 Output voltage calibration method and device for shortening Bar and storage medium
CN116312308B (en) * 2023-04-27 2023-10-13 海的电子科技(苏州)有限公司 Output voltage calibration method and device for shortening Bar and storage medium

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