CN116184802B - Automatic debugging and testing device and method for atomic clock electrical parameters based on FPGA - Google Patents
Automatic debugging and testing device and method for atomic clock electrical parameters based on FPGA Download PDFInfo
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Abstract
The invention discloses an automatic debugging and testing device and method for atomic clock electric parameters based on FPGA, wherein the system comprises an atomic clock electric parameter testing and collecting control card, a database server and a data processing module, wherein the atomic clock electric parameter testing and collecting control card is used for installing and collecting electric parameter data output by a plurality of atomic clocks; the data processing module is used for calculating the electric parameter data output by the acquired atomic clock; the data base server is used for storing the calculated electric parameter data, 1PPS and 10MHz time frequency signals output by the atomic clock and the serial port are directly connected to the FPGA port, the time frequency characteristic test of the atomic clock is realized in the FPGA, the logic resource of 1 general FPGA can support simultaneous test of a plurality of atomic clocks, the automatic debugging test platform for the electric parameter of the atomic clock based on the FPGA can be used for communicating with the atomic clock to be tested, the automatic debugging and test of the atomic clock are realized, and the production efficiency and reliability of the atomic clock are greatly improved.
Description
Technical Field
The invention relates to the field of testing, in particular to an automatic debugging and testing device and method for electric parameters of an atomic clock based on FPGA.
Background
The method and the technical means for measuring the electrical parameters of the atomic clock are more, and conventionally, the parameters such as frequency deviation difference, frequency stability, aging drift rate, startup characteristics and the like can be tested by adopting a frequency stability tester; for parameters such as time difference, pulse width, level amplitude, rising edge and the like, a time interval counter can be adopted for testing; the signal power, phase noise and the like can be tested by adopting a phase noise tester.
Conventional atomic clock electrical parameter testing system as shown in fig. 1, the conventional atomic clock electrical parameter testing system has the following disadvantages:
(1) The required test equipment is more and the cost is higher. Each atomic clock needs 1 voltage/current tester, 1 frequency stability tester, 1 phase noise tester and 1 time interval tester for testing. These commercial instruments are powerful, excellent in index and inexpensive.
(2) A large number of coaxial lines, frequency signal transmission interfaces and control signal transmission interfaces are used in the system, the connection is complex, and the reliability is low.
(3) The number of test cables also results in reduced anti-interference capability of the system, and when a certain atomic clock is added or taken out of the system, other on-going atomic clock tests, such as jump points, are affected.
(4) The system expansion is inconvenient. In the system block diagram, a single atomic clock realizes the characteristic test of time and frequency of the atomic clock through a measuring instrument, and when a plurality of atomic clocks are debugged and tested at the same time, two modes can be realized:
mode 1, add special test equipment of equal frequency of voltage/current tester, frequency stability tester, phase noise tester, time interval tester.
In the mode 2, a switch matrix is added between the atomic clock and each measuring instrument, and the test of a plurality of atomic clocks is realized in a polling mode. The extension mode of mode 1 requires a large number of time-frequency test instruments to form a test cabinet, and therefore, the cost is high and the occupied space is large. The expansion mode of the mode 2 adopts a switch matrix to realize data acquisition of a plurality of atomic clocks in a time-sharing mode, and the quantity of measurement equipment can be saved, but the follow-up data analysis is not real due to discontinuous sampled data.
(5) And debugging personnel perform the debugging of the atomic clock parameters according to the test result, and then perform the test until the indexes are qualified. The debugging process is excessively dependent on manual work, and each debugging personnel cannot simultaneously consider a plurality of debugging personnel, so that the efficiency is low, and the productivity is influenced.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides an automatic debugging and testing device and method for the electrical parameters of an atomic clock based on FPGA.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
an automatic debugging and testing device for atomic clock electric parameters based on FPGA comprises an atomic clock electric parameter testing acquisition control card, a database server and a data processing module, wherein,
the atomic clock electric parameter test acquisition control card is used for installing and acquiring electric parameter data output by a plurality of atomic clocks;
the data processing module is used for calculating the electric parameter data output by the acquired atomic clock;
the database server is used for storing the calculated electric parameter data.
Further, the atomic clock electric parameter test collection control card is provided with a plurality of atomic clocks to be tested, the atomic clock electric parameter test collection cards are integrally installed on the same cabinet, and the cabinets are connected to the database server through the network switch.
A testing method of an automatic debugging testing device for the electrical parameters of an atomic clock based on FPGA comprises the following steps:
s1, inputting test requirements and configuring test items, and if no unconventional test items exist, selecting one or more default test items or processes to generate a test report;
s2, testing performance indexes of each test item according to the configured test item and the flow;
s3, displaying the current test state and storing test data into a database server;
and S4, after the test is completed, displaying the tested state at the corresponding position in the form of an LED lamp, and automatically generating a test report or generating the test report according to the requirement.
Further, the test items in S2 include a power consumption test, a frequency deviation test, a frequency stability test, an aging drift test, and a phase noise test of the atomic clock.
Further, the specific mode of the frequency deviation test is as follows:
the digital phase discrimination method is used for carrying out phase comparison test on a 10MHz signal output by an atomic clock and a reference 10MHz signal, and obtaining frequency deviation data according to the phase difference, wherein the specific calculation mode is as follows:
wherein,,for frequency deviation data, +.>Representation->The phase of the moment comparison; />Representation->Phase of time alignment.
Further, the specific mode of the aging drift rate test is as follows:
according to the frequency deviation data, the aging drift rate is calculated by the following specific calculation modes:
wherein,,is the frequency drift rate; />Is->A relative frequency value of the time frequency scale; />Sampling time; />For measuring the time of the relative frequency value, +.>To determine the average value of the relative frequency values in the time period and +.>N is the total number of samples; />Mean time and>。
a debugging method of an automatic debugging testing device for the electrical parameters of an atomic clock based on FPGA comprises the following steps:
s5, inputting debugging item requirements and configuring the debugging items, and if no unconventional debugging items exist, selecting one or more default debugging items or processes to generate a debugging report;
s6, debugging each parameter to be debugged according to the configured debugging item and the flow;
s7, displaying the current debugging state, and storing data in the debugging process into a database server;
and S8, after the debugging is finished, displaying the debugged filling in the corresponding position in the form of LED lamps, and generating a debugging report.
The invention has the following beneficial effects:
1. the invention can greatly reduce the manufacturing cost of the test system. The invention can realize simultaneous testing of multiple atomic clock parameters by adopting a single general FPGA. By adopting the traditional method, a plurality of (multi-channel) frequency stability testers, a time interval counter, a phase noise tester, a switch matrix and other general instruments are needed.
2. The invention has the advantage of easy expansion. The electric parameter acquisition control board cards are all in network communication through the switch, so that the device is suitable for testing and debugging of single/small batch atomic clocks, can be very conveniently expanded in board level or cabinet level, and meets the requirements of mass production debugging and testing.
3. The invention has simple structure, eliminates a large number of instrument connecting cables, and is beneficial to improving the anti-interference capability and the test reliability of the system.
4. The invention integrates debugging and testing, which is beneficial to improving production efficiency. On the one hand, after the debugging of each atomic clock is finished, the system can automatically test, and automatically generate a report and a test report, so that the intermediate turnover links are reduced. On the other hand, the machine can run for 24 hours, and the debugging personnel only need to take down the atomic clock which has completed the debugging test according to the report information given by the system, and change the atomic clock to be debugged and tested. Furthermore, the test of various parameters, such as the test of stability, can be performed simultaneously in the same time period, such as the test of steady-state power consumption, the test of phase noise, the test of time difference, the aging test, the test of output power, etc., thereby shortening the test time.
5. All the debugging test data are recorded in the database, so that the storage, statistics and analysis of the atomic clock production history debugging parameters and the test data can be realized.
Drawings
Fig. 1 is a conventional test block diagram.
Fig. 2 is a schematic structural diagram of an automatic debugging and testing device for the electrical parameters of an atomic clock based on the implementation of an FPGA.
Fig. 3 is a frequency offset test block diagram according to an embodiment of the present invention.
Fig. 4 is a phase noise test block diagram according to an embodiment of the present invention.
FIG. 5 is a schematic diagram of a time difference test-pulse filling method according to an embodiment of the present invention.
Fig. 6 is a system level schematic of an embodiment of the present invention.
Fig. 7 is a schematic diagram of a cabinet stage according to an embodiment of the invention.
Fig. 8 is a schematic diagram of a board level according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
An automatic debugging and testing device for the electrical parameters of an atomic clock is realized based on an FPGA, as shown in figure 2, 1PPS and 10MHz time-frequency signals output by the atomic clock and a serial port are directly connected to an FPGA port, the time-frequency characteristic of the atomic clock is tested in the FPGA, and the logic resource of 1 general FPGA can support simultaneous testing of a plurality of atomic clocks.
The debugging and testing process of the automatic atomic clock electric parameter debugging and testing device based on the FPGA specifically comprises two processes of automatic testing of the atomic clock and automatic debugging of the atomic clock, wherein as shown in fig. 6-8, the embodiment provides the automatic debugging and testing system for the atomic clock electric parameter based on the FPGA.
(1) The 10 atomic clocks are arranged on the electric parameter acquisition control board card through the tooling board;
(2) The 36 electric parameter acquisition control board cards are arranged on one cabinet;
(3) The 3 cabinets are connected to the database server through 3 network switches;
the system can carry out simultaneous debugging and testing of 1080 atomic clocks, and only 108 electric parameter acquisition control board cards, 3 network switches, 1 database server, 3 cabinets and 1 debugging tester are needed.
The method for debugging and testing the automatic debugging and testing platform for the atomic clock electrical parameters based on the FPGA comprises the following steps:
(1) Inputting debugging requirements, configuring debugging items, such as no irregular item debugging items, and selecting one or more default debugging items or processes of the system;
(2) The system automatically performs debugging of each parameter to be debugged according to the configuration item and the flow;
(3) The system displays the current debugging state in real time, and stores key data in the debugging process into a database;
(4) After the atomic clock is debugged, displaying the debugged state in the form of LED lamps at corresponding positions respectively, and automatically generating a debug report;
the automatic test part mainly comprises the steps of adjusting parameters such as working temperature, microwave power, modulation depth, signal amplification gain and the like of all quantum components in the atomic clock one by one, combining the test of frequency deviation, and comparing and finding out working parameter setting points of the atomic clock, wherein the working parameter setting points are insensitive to temperature change and microwave power change and have the best frequency stability, so that the atomic clock achieves the optimal working state. The method comprises the following steps:
the data processing and analysis control software automatically generates a debugging flow according to the debugging requirement configuration file input by the user, and controls the electric parameter acquisition control board card to carry out debugging. The debugging system adopts a configurable debugging item and a visual flow chart, namely a user can select parameters to be debugged and index items for judging whether the parameters are qualified or not according to the actual debugging conditions on the data processing and analysis control software according to the self debugging experience and requirements. For a common and universal debugging item or a debugging flow, a default debugging item or flow in the system can be directly called; for unconventional or customized debugging items or processes, the user can build the debugging items or processes by himself and save the debugging items or processes, and subsequent or other debugging personnel can conveniently and directly call the debugging items or processes. After the configuration of the debugging item is completed, the data processing and analysis control software automatically performs parameter debugging, testing, calculating and optimizing item by item.
(5) Inputting test requirements, configuring test items, such as test items without unconventional items, selecting one or more default test items or processes of the system, and selecting whether to automatically generate a test report according to the requirements;
(6) The system automatically tests the performance indexes of each test item according to the configuration item and the flow, and specifically, the system is as follows:
(1) And (3) power consumption test: the method comprises the steps of starting up maximum power consumption and steady-state power consumption, measuring current flowing into a sampling resistor by adopting a resistance sampling method, sampling voltages at two ends of the sampling resistor by a multi-channel ADC, calculating the power consumption of each atomic clock, and carrying out statistical analysis on the starting up maximum power consumption and the steady-state power consumption by data processing and analysis control software;
atomic clock frequency deviation test: by adopting a digital Phase discrimination method, the FPGA performs Phase comparison test on a 10MHz signal output by an atomic clock and a reference 10MHz signal, as shown in fig. 3, the reference signal and the detected signal are input into a Phase discriminator through I-path and Q-path outputs after quadrature demodulation, two paths of signals Phase0 and Phase1 with Phase difference are respectively output, the Phase difference obtains frequency deviation data Phase1-Phase0, and the calculation formula is as follows:
wherein,,for frequency deviation data, +.>Representation->The phase of the moment comparison; />Representation->Phase of time alignment.
Atomic clock frequency stability test: the software stores the frequency deviation data in real time, and performs Allan variance calculation to obtain the frequency stability of the atomic clock at different sampling times;
the instantaneous phase of the signal beingWhile the instantaneous angular frequency is the time derivative of the phase, i.e
Thus, the instantaneous frequency is +.>Instantaneous relative frequency deviation of +.>Frequency stability can only be studied using statistical analysis methods, i.e. alen variance is the most common time domain stability analysis method.
Aging drift rate test: according to the frequency deviation data, the software calculates the aging drift rate, and the calculation method is as follows.
Least squares solution of frequency drift rate
In the method, in the process of the invention,is the frequency drift rate; />Is->A relative frequency value of the time frequency scale; />Sampling time; />A time for measuring the relative frequency value, i.e. a sampling time sequence; />To determine the average value of the relative frequency values in the time periodN is the total number of samples; />Mean time and>。
and (3) measuring phase noise, performing FFT conversion on the phase difference data by the FPGA to obtain the phase noise of the atomic clock relative to a reference signal, wherein the signal processing flow is shown in figure 4.
And (3) starting up a locking time test: according to the frequency deviation data of the atomic clock, the software counts the time required by the atomic clock from starting up to the frequency accuracy required by the technology, and records the time as the starting up locking time of the atomic clock.
And (3) starting up characteristic test: and controlling a power supply switch of the atomic clock on the acquisition card by software, and calculating the starting characteristic of the atomic clock according to frequency accuracy data of a certain time after the power-on is locked.
Time difference test: pulse filling method is adopted, FPGA counts the pulse of 1PPS measured signal and 1PPS time base signal output by atomic clock to obtain cnt, multiplied by pulse widthThus, time difference data is obtained, as shown in fig. 5, in the illustration, T is the time length of the set gate, n1 is the number of counts of the actual signal in the time length of the set gate, n2 is the number of counts of the measured signal in the time length of the set gate, T is the period of the measured signal, and T1 is the time length of the actual gate.
The FPGA measures the pulse width of the 1PPS signal output by the atomic clock through a pulse filling method.
The working state, monitoring and control information and the like in the atomic clock are communicated with the FPGA through a serial interface, reported to the data processing and analysis control software and stored in a database.
The user reads the original data such as the atomic clock power consumption data, the frequency deviation data, the time difference data and the like in the database according to the actual demands of the user, analyzes the performance indexes such as the frequency stability, the aging drift rate, the startup locking time, the startup characteristics and the like of the atomic clock or carries out secondary statistics according to the batch test data, and obtains the statistics value of the batch information concerned by the user.
(7) The system displays the current test state in real time and stores the test data into a database;
(8) After the atomic clock tests, the tested states are respectively displayed at the corresponding positions in the form of LED lamps, and a test report is automatically generated and is generated as required.
In a word, the automatic debugging and testing platform for the atomic clock electric parameters based on the FPGA can be used for communicating with the atomic clock to be tested, so that the automatic debugging and testing of the atomic clock are realized, the production process of the atomic clock is simplified, and the production efficiency and reliability of the atomic clock are greatly improved
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The principles and embodiments of the present invention have been described in detail with reference to specific examples, which are provided to facilitate understanding of the method and core ideas of the present invention; meanwhile, as those skilled in the art will have variations in the scope of the embodiments and methods according to the ideas of the present invention, the present description should not be construed as limiting the present invention in light of the above.
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present invention and should be understood that the scope of the invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.
Claims (5)
1. An automatic debugging and testing device for the electrical parameters of an atomic clock based on an FPGA is characterized in that 1PPS and 10MHz time-frequency signals output by the atomic clock and a serial port are directly connected to an FPGA port, the time-frequency characteristics of the atomic clock are tested in the FPGA, and the logic resources of 1 general FPGA support simultaneous testing of a plurality of atomic clocks;
the FPGA performs Phase comparison test by adopting a 10MHz signal output by a digital Phase demodulation atomic clock and a reference 10MHz signal, mixes the reference signal and the detected signal by using an intermediate source, outputs an I path signal and a Q path signal to a Phase discriminator after quadrature modulation, respectively outputs two paths of signals Phase0 and Phase1 with Phase difference, and obtains frequency deviation data Phase1-Phase0 according to the Phase difference.
2. The method for testing the automatic debugging and testing device for the electrical parameters of the atomic clock based on the FPGA according to claim 1 is characterized by comprising the following steps:
s1, inputting test requirements and configuring test items, and if no unconventional test items exist, selecting one or more default test items or processes to generate a test report;
s2, testing performance indexes of each test item according to the configured test item and the flow;
s3, displaying the current test state and storing test data into a database server;
and S4, after the test is completed, displaying the tested state at the corresponding position in the form of an LED lamp, and automatically generating a test report or generating the test report according to the requirement.
3. The method for testing the automatic debugging and testing device for the electrical parameters of the atomic clock based on the FPGA according to claim 2, wherein the test items in the S2 comprise a power consumption test, a frequency deviation test, a frequency stability test, an aging drift test and a phase noise test of the atomic clock.
4. The method for automatically debugging and testing the electrical parameters of the atomic clock based on the FPGA of claim 3, wherein the specific mode of the aging drift test is as follows:
according to the frequency deviation data, the aging drift is calculated by the following specific calculation modes:
wherein,,is the frequency drift rate; />Is->A relative frequency value of the time frequency scale; />Sampling time; />For measuring the time of the relative frequency value, +.>To determine the average value of the relative frequency values in the time period and +.>N is the total number of samples; />Mean time and>。
5. the method for debugging the automatic debugging and testing device for the electrical parameters of the atomic clock based on the FPGA according to claim 1 is characterized by comprising the following steps:
s5, inputting debugging item requirements and configuring the debugging items, and if no unconventional debugging items exist, selecting one or more default debugging items or processes to generate a debugging report;
s6, debugging parameters to be debugged according to the configured debugging items and the flow;
s7, displaying the current debugging state, and storing data in the debugging process into a database server;
and S8, after the debugging is finished, displaying the debugged state in the form of LED lamps at the corresponding positions respectively, and generating a debugging report.
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