CN116153819A - Semiconductor chip packaging device and packaging technology - Google Patents
Semiconductor chip packaging device and packaging technology Download PDFInfo
- Publication number
- CN116153819A CN116153819A CN202310174904.5A CN202310174904A CN116153819A CN 116153819 A CN116153819 A CN 116153819A CN 202310174904 A CN202310174904 A CN 202310174904A CN 116153819 A CN116153819 A CN 116153819A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 47
- 238000011982 device technology Methods 0.000 title description 2
- 238000012536 packaging technology Methods 0.000 title description 2
- 239000000084 colloidal system Substances 0.000 claims abstract description 26
- 230000005540 biological transmission Effects 0.000 claims abstract description 17
- 238000012858 packaging process Methods 0.000 claims abstract description 12
- 238000009499 grossing Methods 0.000 claims abstract description 4
- 238000010438 heat treatment Methods 0.000 claims description 16
- 238000005192 partition Methods 0.000 claims description 12
- 238000001816 cooling Methods 0.000 claims description 9
- 239000013078 crystal Substances 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 230000001105 regulatory effect Effects 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 4
- 238000012545 processing Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
Abstract
The invention discloses a semiconductor chip packaging device and a packaging process, which belong to the field of semiconductor chip processing, and comprise a base, wherein a transmission assembly is arranged at the top end of the base, and an integrated circuit is transported through the transmission assembly; the packaging component is assembled at the top end of the base and positioned at one side of the transmission component and is used for smoothing the slow-down colloid on the integrated circuit, and meanwhile, two ends of the packaging component are connected with the base through the support posts; according to the invention, the outer surface of the integrated circuit is fixed through the fixing component, so that an operator can operate a plurality of integrated circuits simultaneously to greatly improve the processing efficiency when packaging the integrated circuits, and meanwhile, the packaging effect can be ensured.
Description
Technical Field
The invention relates to the technical field of semiconductor chip processing, in particular to a semiconductor chip packaging device and a packaging process.
Background
Semiconductor packaging refers to the process of processing a wafer passing through a test to obtain individual chips according to the product model and functional requirements, and in the semiconductor packaging process, bonding pads of the wafer need to be connected to corresponding pins of a substrate by using ultrafine metal wires or conductive resin, and a required circuit is formed.
The integrated circuit package always encounters the uneven precipitation condition in the colloid, needs to shake the colloid while cooling down the colloid so as to ensure the uniformity and the overall strength of the package, and conventionally, the mechanical arm clamping jig is usually relied on to shake the operation, so that the shaking effect is poor and the risk of flying out a certain workpiece is accompanied, the cooling is difficult to shake the operation while slowing down, and further, the single integrated circuit can be processed mostly only when shaking the colloid, and a semiconductor chip packaging device and a semiconductor chip packaging process are developed.
Disclosure of Invention
The invention aims to solve the problems that in the prior art, shaking operation is usually carried out after a mechanical arm clamps a jig, shaking effect is poor and a certain workpiece flies out with risk, and cooling is slowed down while shaking is difficult, so that most of integrated circuits can be processed when shaking, and provides a semiconductor chip packaging device and a semiconductor chip packaging process.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
the semiconductor chip packaging device comprises a base, wherein a transmission assembly is arranged at the top end of the base, and the semiconductor chip is transported through the transmission assembly;
the packaging component is assembled at the top end of the base and positioned at one side of the transmission component and is used for smoothing the slow-down colloid on the semiconductor chip, and meanwhile, two ends of the packaging component are connected with the base through the support posts;
the heating assembly is assembled on the transmission assembly, the bottom end of the heating assembly is connected with the base through the fixing plate, and the slow down colloid on the semiconductor chip is dried through the heating assembly.
As a further description of the above scheme: the packaging assembly comprises a driving device connected with the support column, a driving shaft is installed at the output end of the driving device, a limiting plate is installed on the outer surface of the driving shaft in a rotating mode, and one end of the limiting plate is connected with one side of the transmission assembly and used for limiting the driving shaft.
As a further description of the above scheme: the outer surface of drive shaft just is located one side of limiting plate installs first apron, simultaneously first apron with the limiting plate is the axis with drive arrangement symmetric distribution, the surface of first apron is provided with a plurality of through-holes, is used for right the inside machined part of encapsulation subassembly ventilates.
As a further description of the above scheme: the first apron is kept away from the cylinder is installed to limiting plate's one end, a plurality of recesses have been seted up to the one end of cylinder, simultaneously first apron be close to the one end of cylinder be provided with the lug that the recess corresponds, the surface of lug with the inner wall sliding connection of recess carries out spacingly through first apron to the one end of cylinder.
As a further description of the above scheme: the inner wall of the roller is provided with a plurality of slotted holes, the slotted holes are uniformly distributed on the inner wall of the roller, the inner wall of the slotted holes is slidably provided with a fixing assembly, and the outer surface of the semiconductor chip is fixed through the fixing assembly.
As a further description of the above scheme: the fixed subassembly include with cylinder sliding connection's bottom plate, the spout has been seted up to the one end of bottom plate, the inner wall slidable mounting of spout has the movable rod, and in the fly leaf is installed on the top of movable rod, the joint board is all installed to the both sides of fly leaf, simultaneously the spacing groove has been seted up to one side of joint board, through the spacing groove carries out spacingly to the surface of semiconductor chip.
As a further description of the above scheme: the movable rod is far away from one end of the movable plate, a partition plate is installed, one end of the partition plate is connected with an elastic mechanism, a reset plate is installed at one side of the sliding groove and positioned at the bottom end of the bottom plate, and one end of the elastic mechanism far away from the partition plate is connected with the reset plate.
As a further description of the above scheme: the ball body is installed to one side of bottom plate, the spheroidal surface rotates and installs the sleeve, the sleeve is kept away from spheroidal one end rotates and installs the connecting block, simultaneously the one end rotation of connecting block is installed the backing plate, the surface of backing plate with the inner wall sliding connection of slotted hole.
A semiconductor chip packaging process comprising the steps of:
s1, placing an integrated circuit to be processed on a conveying assembly, uniformly expanding the whole integrated circuit by a worker, and attaching a crystal film on the outer surface of the integrated circuit;
s2, after slow-down colloid is smeared on the integrated circuit in S1, the whole semiconductor core is placed on a fixed assembly, the integrated circuit is limited by the fixed assembly, and the integrated circuit is moved into the packaging assembly;
s3, driving the packaging assembly to shake the integrated circuit coated with the slow-down colloid evenly, enabling the slow-down colloid to be flatly attached to the integrated circuit through a continuously rotating roller, and ventilating the inside of the integrated circuit through a through hole on the first cover plate, so that the slow-down colloid is convenient to cool;
s4, placing the cooled integrated circuit into a heating assembly, standing for a period of time at constant temperature, and gradually cooling the packaging glue through a temperature regulating assembly in the heating assembly according to a set cooling curve.
Compared with the prior art, the invention provides a semiconductor chip packaging device and a packaging process, which have the following beneficial effects:
1. this semiconductor chip packaging hardware and packaging process carries out spacingly through the one end of first apron to the cylinder, make the whole joint of integrated circuit at the inner wall of cylinder, after the integrated circuit is put into the cylinder inside to needs, remove the one end to the cylinder with first apron simultaneously, make cylinder and first apron closely laminate, the inner wall of cylinder is provided with a plurality of slotted holes, a plurality of slotted holes evenly distributed in the inner wall of cylinder, the inner wall slidable mounting of slotted hole has fixed subassembly, fix the surface of integrated circuit through fixed subassembly, make this operating personnel when encapsulating the integrated circuit, can operate the promotion machining efficiency by a wide margin to a plurality of integrated circuits simultaneously, the effect of encapsulation can be guaranteed simultaneously.
2. This semiconductor chip packaging hardware and encapsulation technology installs the spheroid through one side of bottom plate, spheroidal surface rotates and installs the sleeve, the sleeve is kept away from spheroidal one end and is rotated and install the connecting block, the backing plate is installed in the one end rotation of connecting block simultaneously, the surface of backing plate and the inner wall sliding connection of slotted hole for operating personnel is when sliding whole fixed subassembly into the cylinder, with the inner wall joint of cylinder, rotate whole bottom plate through the connecting block, make the inner wall of bottom plate laminating and cylinder, and then drive the cylinder and rotate after drive arrangement starts, integrated circuit is in the horizontality, and make slow down colloid evenly distributed on integrated circuit.
Drawings
Fig. 1 is a schematic diagram of a semiconductor chip package device according to the present invention;
fig. 2 is a first cross-sectional view of a semiconductor chip package according to the present invention;
fig. 3 is a second cross-sectional view of a semiconductor chip package according to the present invention;
fig. 4 is a first schematic diagram of a fixing component structure of a semiconductor chip packaging apparatus according to the present invention;
fig. 5 is a second schematic diagram of a fixing component structure of a semiconductor chip package device according to the present invention;
fig. 6 is a cross-sectional view showing a structure of a fixing assembly of a semiconductor chip packaging apparatus according to the present invention;
fig. 7 is a flow chart of a semiconductor chip packaging process according to the present invention.
In the figure: 1. a base; 2. packaging the assembly; 3. a heating assembly; 4. a fixing assembly; 11. a transmission assembly; 12. a support post; 13. a fixing plate; 21. a driving device; 22. a drive shaft; 23. a limiting plate; 24. a first cover plate; 241. a through hole; 25. a roller; 26. a groove; 27. a bump; 28. a slot hole; 41. a bottom plate; 42. a chute; 43. a movable rod; 44. a movable plate; 45. a clamping plate; 46. a limit groove; 47. a partition plate; 48. an elastic mechanism; 49. a reset plate; 51. a sphere; 52. a sleeve; 53. a connecting block; 54. a backing plate.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that, directions or positional relationships indicated by terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., are based on directions or positional relationships shown in the drawings, are merely for convenience of description and simplification of description, and do not indicate or imply that the apparatus or element to be referred to must have a specific direction, be constructed and operated in the specific direction, and thus should not be construed as limiting the present invention; the terms "first," "second," "third," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance, and furthermore, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "coupled," and the like are to be construed broadly, and may be fixedly coupled, detachably coupled, or integrally coupled, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Embodiment one: referring to fig. 1 to 6, a semiconductor chip apparatus and a packaging process includes a base 1, a transfer assembly mounted on a top end of the base 1, and transporting an integrated circuit through the transfer assembly;
the packaging component 2 is assembled at the top end of the base 1 and is positioned at one side of the transmission component and used for smoothing the slow-down colloid on the integrated circuit, and meanwhile, two ends of the packaging component 2 are connected with the base 1 through the support posts 12; the heating component 3 is assembled on the transmission component, the bottom end of the heating component 3 is connected with the base 1 through the fixing plate 13, and the heating component 3 is used for drying the slow-down colloid on the integrated circuit;
the packaging assembly 2 comprises a driving device 21 connected with the support column 12, wherein the driving device 21 is equipment with power output such as a motor and is connected with external telecommunication, the output end of the driving device 21 is provided with a driving shaft 22, the outer surface of the driving shaft 22 is rotatably provided with a limiting plate 23, and one end of the limiting plate 23 is connected with one side of the transmission assembly and used for limiting the driving shaft 22, so that the driving device 21 ensures that the driving shaft 22 is integrally kept stable when driving the driving shaft 22 to rotate; the outer surface of the driving shaft 22 and one side of the limiting plate 23 are provided with a first cover plate 24, the first cover plate 24 takes the limiting plate 23 as a central axis and is symmetrically distributed with the driving device 21, the outer surface of the first cover plate 24 is provided with a plurality of through holes 241 for ventilating workpieces in the packaging assembly 2, one end of the first cover plate 24 far away from the limiting plate 23 is provided with a roller 25, one end of the roller 25 is provided with a plurality of grooves 26, one end of the first cover plate 24 close to the roller 25 is provided with a convex block 27 corresponding to the grooves 26, the outer surface of the convex block 27 is in sliding connection with the inner wall of the grooves 26, an operator can conveniently separate the first cover plate 24 from the roller 25, one end of the roller 25 is limited through the first cover plate 24, after the integrated circuit is required to be placed into the roller 25, the first cover plate 24 is simultaneously moved to one end of the roller 25, the inner wall of the roller 25 is provided with a plurality of slotted holes 28 which are uniformly distributed on the inner wall of the roller 25, the inner wall of the slotted holes 28 is slidably provided with a fixing assembly 4, the outer surface of the integrated circuit is fixed by the fixing assembly 4, and the operator can simultaneously package the integrated circuit by the operator;
the fixed assembly 4 comprises a bottom plate 41 which is in sliding connection with the roller 25, a sliding groove 42 is formed in one end of the bottom plate 41, a movable rod 43 is slidably arranged on the inner wall of the sliding groove 42, the movable rod 43 can slide on the inner wall of the sliding groove 42, a movable plate 44 is arranged at the top end of the movable rod 43, clamping plates 45 are arranged on two sides of the movable rod 44, meanwhile, a limiting groove 46 is formed in one side of the clamping plates 45, the outer surface of an integrated circuit is limited through the limiting groove 46, a partition plate 47 is arranged at one end of the movable rod 43 far away from the movable plate 44, an elastic mechanism 48 is connected to one end of the partition plate 47, a reset plate 49 is arranged at the bottom end of the bottom plate 41 and positioned at one side of the sliding groove 42, one end of the elastic mechanism 48 far away from the partition plate 47 is connected with the reset plate 49, when the integrated circuit is placed on the inner wall of the limiting groove 46, the movable plate 44 is extruded to move, and the movable plate 44 is connected with the movable rod 43, meanwhile, the bottom end of the movable rod 43 is connected with the partition plate 47, one end of the partition plate 47 is connected with the elastic mechanism 48, the other end of the elastic mechanism 48 is connected with the reset plate 49 fixedly arranged on the bottom plate 41, and the reset plate 49 is fixedly arranged on the bottom plate 41, and the integrated circuit is led out of the integrated circuit through the elastic mechanism after the elastic mechanism is taken out of the integrated circuit through the elastic mechanism;
the spheroid 51 is installed to one side of bottom plate 41, the sleeve 52 is installed in the surface rotation of spheroid 51, the sleeve 52 is kept away from the one end rotation of spheroid 51 and is installed connecting block 53, simultaneously the one end rotation of connecting block 53 is installed backing plate 54, the surface and the inner wall sliding connection of slotted hole 28 of backing plate 54, when making operating personnel slide whole fixed subassembly 4 into cylinder 25, with the inner wall joint of cylinder 25, rotate whole bottom plate 41 through connecting block 53, make bottom plate 41 laminating and the inner wall of cylinder 25, and then when drive arrangement 21 starts the back and drives cylinder 25 and rotate, integrated circuit is in the horizontality, and make slow down colloid evenly distributed on integrated circuit.
Embodiment two: referring to fig. 1-7, a semiconductor chip packaging process includes the steps of:
s1, placing an integrated circuit to be processed on a conveying assembly 11, uniformly expanding the whole integrated circuit by a worker, and attaching a crystal film on the outer surface of the integrated circuit;
s2, after slow-down colloid is smeared on the integrated circuit in S1, the whole semiconductor core is placed on the fixing component 4, the integrated circuit is limited by the fixing component 4, and the semiconductor core is moved into the packaging component 2;
s3, driving the packaging assembly 2 to shake the integrated circuit coated with the slow-down colloid evenly, enabling the slow-down colloid to be flatly attached to the integrated circuit through the roller 25 which continuously rotates, and ventilating the inside of the integrated circuit through the through hole 241 on the first cover plate 24, so that the slow-down colloid is convenient to cool;
s4, placing the cooled integrated circuit into the heating assembly 3 for constant temperature standing for a period of time, and gradually cooling the packaging glue through a temperature regulating assembly inside the heating assembly 3 according to a set cooling curve.
The present invention is not limited to the above-mentioned embodiments, and any person skilled in the art, based on the technical solution of the present invention and the inventive concept thereof, can be replaced or changed within the scope of the present invention.
Claims (9)
1. A semiconductor chip packaging apparatus, characterized by comprising:
the semiconductor chip packaging device comprises a base (1), wherein a transmission assembly (11) is arranged at the top end of the base (1), and semiconductor chips are transported through the transmission assembly (11);
the packaging component (2) is assembled at the top end of the base (1) and is positioned at one side of the transmission component (11) and used for smoothing the slow-down colloid on the semiconductor chip, and meanwhile, two ends of the packaging component (2) are connected with the base (1) through the support posts (12);
the heating assembly (3) is assembled on the transmission assembly (11), the bottom end of the heating assembly (3) is connected with the base (1) through the fixing plate (13), and the slow down colloid on the semiconductor chip is dried through the heating assembly (3).
2. The semiconductor chip packaging apparatus according to claim 1, wherein the packaging assembly (2) includes a driving device (21) connected to the pillar (12), a driving shaft (22) is mounted at an output end of the driving device (21), and a limiting plate (23) is rotatably mounted on an outer surface of the driving shaft (22), and one end of the limiting plate (23) is connected to one side of the transmission assembly (11) for limiting the driving shaft (22).
3. The semiconductor chip packaging device according to claim 2, wherein a first cover plate (24) is mounted on the outer surface of the driving shaft (22) and located on one side of the limiting plate (23), and the first cover plate (24) is symmetrically distributed with the driving device (21) by taking the limiting plate (23) as a central axis, and a plurality of through holes (241) are formed on the outer surface of the first cover plate (24) and used for ventilating workpieces inside the packaging assembly (2).
4. A semiconductor chip packaging apparatus according to claim 3, wherein a roller (25) is mounted at an end of the first cover plate (24) away from the limiting plate (23), a plurality of grooves (26) are formed at one end of the roller (25), a bump (27) corresponding to the groove (26) is disposed at one end of the first cover plate (24) close to the roller (25), and an outer surface of the bump (27) is slidably connected with an inner wall of the groove (26), so that one end of the roller (25) is limited by the first cover plate (24).
5. The semiconductor chip packaging apparatus according to claim 4, wherein the inner wall of the drum (25) is provided with a plurality of slots (28), the plurality of slots (28) are uniformly distributed on the inner wall of the drum (25), the inner wall of the slots (28) is slidably provided with a fixing member (4), and the outer surface of the semiconductor chip is fixed by the fixing member (4).
6. The semiconductor chip packaging device according to claim 5, wherein the fixing assembly (4) comprises a bottom plate (41) slidably connected with the roller (25), a chute (42) is formed in one end of the bottom plate (41), a movable rod (43) is slidably mounted on an inner wall of the chute (42), a movable plate (44) is mounted on a top end of the movable rod (43), clamping plates (45) are mounted on two sides of the movable plate (44), and a limit groove (46) is formed in one side of the clamping plates (45), and limiting is performed on an outer surface of the semiconductor chip through the limit groove (46).
7. The semiconductor chip packaging apparatus according to claim 6, wherein a partition plate (47) is installed at an end of the movable rod (43) away from the movable plate (44), and an elastic mechanism (48) is connected to an end of the partition plate (47), a reset plate (49) is installed at a bottom end of the bottom plate (41) and on one side of the chute (42), and an end of the elastic mechanism (48) away from the partition plate (47) is connected to the reset plate (49).
8. The semiconductor chip packaging apparatus according to claim 6, wherein a sphere (51) is mounted on one side of the bottom plate (41), a sleeve (52) is rotatably mounted on an outer surface of the sphere (51), a connection block (53) is rotatably mounted on an end of the sleeve (52) away from the sphere (51), and a backing plate (54) is rotatably mounted on an end of the connection block (53), and an outer surface of the backing plate (54) is slidably connected with an inner wall of the slot hole (28).
9. A semiconductor chip packaging process, comprising the steps of:
s1, placing an integrated circuit to be processed on a conveying assembly (11), uniformly expanding the whole integrated circuit by a worker, and attaching a crystal film on the outer surface of the integrated circuit;
s2, after slow-down colloid is smeared on the integrated circuit in the S1, the whole integrated circuit is placed on a fixed component (4), the integrated circuit is limited by the fixed component (4), and the integrated circuit is moved into the packaging component (2);
s3, driving the packaging assembly (2) to shake the integrated circuit coated with the slow-down colloid evenly, enabling the slow-down colloid to be flatly attached to the integrated circuit through the continuously rotating roller (25), and ventilating the inside of the slow-down colloid through the through hole (241) on the first cover plate (24), so that the slow-down colloid is convenient to cool;
s4, placing the cooled integrated circuit into a heating assembly (3), standing for a period of time at constant temperature, and gradually cooling the packaging glue through a temperature regulating assembly inside the heating assembly (3) according to a set cooling curve.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310174904.5A CN116153819B (en) | 2023-02-28 | 2023-02-28 | Semiconductor chip packaging device and packaging technology |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310174904.5A CN116153819B (en) | 2023-02-28 | 2023-02-28 | Semiconductor chip packaging device and packaging technology |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116153819A true CN116153819A (en) | 2023-05-23 |
| CN116153819B CN116153819B (en) | 2024-04-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310174904.5A Active CN116153819B (en) | 2023-02-28 | 2023-02-28 | Semiconductor chip packaging device and packaging technology |
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| Country | Link |
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| CN (1) | CN116153819B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117080090A (en) * | 2023-08-21 | 2023-11-17 | 黄山市弘泰电子有限公司 | Diode packaging technology and automatic diode packaging device |
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| US20070096333A1 (en) * | 2005-10-31 | 2007-05-03 | Amir Motamedi | Optimal stacked die organization |
| US20090108433A1 (en) * | 2007-10-30 | 2009-04-30 | Kenji Masumoto | Multilayer semiconductor device package assembly and method |
| CN113270345A (en) * | 2021-05-17 | 2021-08-17 | 深圳市芯电易科技股份有限公司 | Semiconductor chip packaging device and packaging process |
| CN114582739A (en) * | 2022-02-21 | 2022-06-03 | 合肥鑫丰科技有限公司 | Integrated circuit semiconductor chip packaging equipment and packaging method thereof |
| CN114664752A (en) * | 2020-12-22 | 2022-06-24 | 徐州智方联电子科技有限公司 | Packaging structure and packaging method of integrated circuit |
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2023
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070096333A1 (en) * | 2005-10-31 | 2007-05-03 | Amir Motamedi | Optimal stacked die organization |
| US20090108433A1 (en) * | 2007-10-30 | 2009-04-30 | Kenji Masumoto | Multilayer semiconductor device package assembly and method |
| CN114664752A (en) * | 2020-12-22 | 2022-06-24 | 徐州智方联电子科技有限公司 | Packaging structure and packaging method of integrated circuit |
| CN113270345A (en) * | 2021-05-17 | 2021-08-17 | 深圳市芯电易科技股份有限公司 | Semiconductor chip packaging device and packaging process |
| CN114582739A (en) * | 2022-02-21 | 2022-06-03 | 合肥鑫丰科技有限公司 | Integrated circuit semiconductor chip packaging equipment and packaging method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117080090A (en) * | 2023-08-21 | 2023-11-17 | 黄山市弘泰电子有限公司 | Diode packaging technology and automatic diode packaging device |
| CN117080090B (en) * | 2023-08-21 | 2024-01-30 | 黄山市弘泰电子有限公司 | Diode packaging technology and automatic diode packaging device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116153819B (en) | 2024-04-09 |
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