CN116148568A - Analog signal comprehensive measurement device based on FPGA - Google Patents
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Abstract
The application relates to an analog signal comprehensive measurement device based on FPGA, including: the FPGA module is integrated with a plurality of measuring units, and is used for calling the measuring units corresponding to the working modes of the measuring device and configuring working parameters for the measuring units; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters. Through integrating a plurality of measurement units on the same FPGA module, a plurality of measurement functions can be realized through one FPGA module, and the problem that comprehensive measurement equipment occupies a large space is solved.
Description
Technical Field
The application relates to the technical field of measurement, in particular to an analog signal comprehensive measurement device based on an FPGA.
Background
In the fields of testing and measuring equipment, aerospace and national defense testing and semiconductor testing, broadband signal excitation, broadband signal acquisition and high-precision time parameter measuring functions are often used, the integration level of a testing system is higher, and independent broadband signal generating equipment, broadband signal acquisition equipment and high-precision time parameter measuring equipment are used, so that the comprehensive measuring equipment occupies a larger space, and the volume and weight of the testing system are greatly increased.
In view of the above problems, no effective solution has been proposed at present.
Disclosure of Invention
The application provides an analog signal comprehensive measurement device based on an FPGA (field programmable gate array) to solve the technical problem that the comprehensive measurement equipment occupies a large space.
According to an aspect of an embodiment of the present application, there is provided an FPGA-based analog signal integrated measurement apparatus, including: the FPGA module is integrated with a plurality of measuring units, and is used for calling the measuring units corresponding to the working modes of the measuring device and configuring working parameters for the measuring units; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters.
Optionally, the measurement unit comprises: the waveform generation unit is used for outputting waveform signals according to the preset waveform parameters when the working mode is a waveform generator mode; the signal acquisition unit is used for acquiring and storing analog signals according to the acquisition parameters which are configured in advance under the condition that the working mode is a digitizer mode; and the time measurement unit is used for carrying out high-precision time parameter measurement according to the pre-configured measurement parameters under the condition that the working mode is the time parameter measurement mode.
Optionally, the FPGA module further comprises: and the PXI interface unit is used for establishing connection with the PXI bus so as to enable the FPGA module to communicate and interact with the PXI bus.
Optionally, the measuring device further comprises: the memory circuit is connected with the FPGA module and used for storing the waveform signals output by the waveform generation unit and the analog signals acquired by the signal acquisition unit.
Optionally, the measuring device further comprises: the high-speed digital-to-analog conversion unit is connected with the FPGA module and used for converting the digital signals output by the waveform generation unit into analog output signals.
Optionally, the measuring device further comprises: the high-speed analog-to-digital conversion unit is connected with the FPGA module and used for converting an analog input signal into a digital signal and transmitting the digital signal to the signal acquisition unit.
Optionally, the measuring device further comprises: and the clock unit is connected with the FPGA module and used for providing a high-performance reference clock for the normal operation of the device.
Optionally, the measuring device further comprises: the high-speed comparator unit is connected with the FPGA module and used for converting an analog input signal into a digital pulse signal and transmitting the digital pulse signal to the time measurement unit.
Optionally, the measuring device further comprises: and the input signal conditioning unit is connected with the measuring channel of the front panel at the input end, and the output end of the input signal conditioning unit is connected with the high-speed analog-to-digital conversion unit and is used for performing characteristic conditioning on the analog input signal of the measuring channel.
Optionally, the measuring device further comprises: and the input end of the output signal conditioning unit is connected with the high-speed digital-to-analog conversion unit, and the output end of the output signal conditioning unit is connected with the measuring channel of the front panel and is used for performing characteristic conditioning on the analog output signal output by the high-speed digital-to-analog conversion unit.
Compared with the related art, the technical scheme provided by the embodiment of the application has the following advantages:
the application passes through an analog signal integrated measurement device based on FPGA, includes: the FPGA module is integrated with a plurality of measuring units, and is used for calling the measuring units corresponding to the working modes of the measuring device and configuring working parameters for the measuring units; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters. Through integrating a plurality of measurement units on the same FPGA module, a plurality of measurement functions can be realized through one FPGA module, and the problem that comprehensive measurement equipment occupies a large space is solved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the related technical descriptions will be briefly described, and it is obvious to those skilled in the art that other drawings can be obtained according to these drawings without inventive effort.
FIG. 1 is a schematic diagram of an alternative FPGA-based analog signal integrated measurement device provided according to an embodiment of the present application;
FIG. 2 is a schematic diagram of another alternative FPGA-based analog signal integrated measurement device provided in accordance with an embodiment of the present application;
FIG. 3 is a flow chart of an alternative FPGA-based analog signal integrated measurement method provided in accordance with an embodiment of the present application;
FIG. 4 is a flow chart of another alternative FPGA-based analog signal integrated measurement method provided in accordance with an embodiment of the present application;
fig. 5 is a schematic structural diagram of an alternative electronic device according to an embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present application based on the embodiments herein.
In the following description, suffixes such as "module", "component", or "unit" for representing elements are used only for facilitating the description of the present application, and are not of specific significance per se. Thus, "module" and "component" may be used in combination.
In the fields of testing and measuring equipment, aerospace and national defense testing and measuring and semiconductor testing, the functions of broadband signal excitation, broadband signal acquisition and high-precision time parameter measurement are frequently used, the integration level of a testing system is higher, and independent broadband signal generating equipment, broadband signal acquisition equipment and high-precision time parameter measuring equipment are used, so that the comprehensive measuring equipment occupies a larger space, the volume and weight of the testing system are greatly increased, and the hardware cost of the system is greatly increased.
To solve the problems mentioned in the background art, according to an aspect of the embodiments of the present application, there is provided an FPGA-based analog signal integrated measurement apparatus, as shown in fig. 1, including:
the FPGA module 10 is integrated with a plurality of measurement units (measurement unit 101, measurement unit 102, and measurement unit 103) for calling the measurement unit corresponding to the operation mode of the measurement device and configuring the operation parameters for the measurement unit; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters.
Alternatively, the number of measuring units of the embodiment provided in the present application is 3, but it does not represent that the present application can only be applied to the integration of 3 measuring units.
The application provides an FPGA-based analog signal comprehensive measurement device conforming to PXI bus specifications, which can realize the functions of broadband signal generation, broadband signal acquisition and high-precision time parameter measurement.
The FPGA-based analog signal comprehensive measurement device integrates two analog signal comprehensive measurement channels in a single module, and each channel simultaneously supports the functions of wideband signal excitation, wideband signal acquisition and high-precision time parameter measurement, so that the module integration level is improved, and the system hardware cost is effectively reduced.
Preferably, the measurement unit comprises: the waveform generation unit is used for outputting waveform signals according to the preset waveform parameters when the working mode is a waveform generator mode; the signal acquisition unit is used for acquiring and storing analog signals according to the acquisition parameters which are configured in advance under the condition that the working mode is a digitizer mode; and the time measurement unit is used for carrying out high-precision time parameter measurement according to the pre-configured measurement parameters under the condition that the working mode is the time parameter measurement mode.
The FPGA module is used as a main control module of the comprehensive measurement device, and the working state control of the device is realized by integrating a plurality of logic IPs.
The logical IP provided by the present application includes: an arbitrary waveform generation logic IP (i.e. a waveform generation unit), a digitizer acquisition logic IP (i.e. a signal acquisition unit) and a high-precision time parameter measurement logic IP (i.e. an instant measurement unit), wherein the arbitrary waveform generation logic IP is used for realizing arbitrary waveform signal generation and generating a plurality of standard signals such as sine waves and modulation signals such as AM, FM, FSK; the digital instrument acquisition logic IP is used for realizing high-precision digital acquisition and completing acquisition signal triggering and storage; the high-precision time parameter measurement logic IP is used for realizing high-precision time measurement and counting and finishing test type setting, gate control and high-precision time counting.
Preferably, the FPGA module further comprises: and the PXI interface unit is used for establishing connection with the PXI bus so as to enable the FPGA module to communicate and interact with the PXI bus.
The PXI interface unit is connected with the PXI bus interface circuit and used for realizing parameter configuration, communication control and data interaction of the device.
Preferably, the measuring device further comprises: the memory circuit is connected with the FPGA module and used for storing the waveform signals output by the waveform generation unit and the analog signals acquired by the signal acquisition unit.
The memory circuit is an SRAM memory circuit and is used for storing arbitrary waveform data and digitizer acquisition data.
Preferably, the measuring device further comprises: the high-speed digital-to-analog conversion unit is connected with the FPGA module and used for converting the digital signals output by the waveform generation unit into analog output signals.
The application provides a high-speed DAC circuit for completing digital-to-analog signal conversion in an arbitrary waveform generator mode.
Preferably, the measuring device further comprises: the high-speed analog-to-digital conversion unit is connected with the FPGA module and used for converting an analog input signal into a digital signal and transmitting the digital signal to the signal acquisition unit.
The present application provides a high-speed ADC circuit for performing analog-to-digital signal conversion in digitizer mode.
Preferably, the measuring device further comprises: and the clock unit is connected with the FPGA module and used for providing a high-performance reference clock for the normal operation of the device.
The present application provides a clock circuit that provides a high performance reference clock for normal operation of a device.
Preferably, the measuring device further comprises: the high-speed comparator unit is connected with the FPGA module and used for converting an analog input signal into a digital pulse signal and transmitting the digital pulse signal to the time measurement unit.
The application provides a high-speed comparator circuit for completing conversion from an analog signal to a digital pulse signal in a time parameter measurement mode.
Preferably, the measuring device further comprises: and the input signal conditioning unit is connected with the measuring channel of the front panel at the input end, and the output end of the input signal conditioning unit is connected with the high-speed analog-to-digital conversion unit and is used for performing characteristic conditioning on the analog input signal of the measuring channel.
The application provides an input signal conditioning circuit which is used for finishing characteristic conditioning such as coupling control, range control and low-frequency suppression of analog input signals.
Preferably, the measuring device further comprises: and the input end of the output signal conditioning unit is connected with the high-speed digital-to-analog conversion unit, and the output end of the output signal conditioning unit is connected with the measuring channel of the front panel and is used for performing characteristic conditioning on the analog output signal output by the high-speed digital-to-analog conversion unit.
The application provides an output signal conditioning circuit which is used for conditioning signal characteristics such as filtering, amplifying and attenuating of analog output signals.
Fig. 2 is a schematic diagram of an FPGA-based analog signal integrated measurement device provided in the present application, as shown in the figure, including: the system mainly comprises PXI bus interface circuits, FPGA circuits, SRAM memory circuits, clock circuits, high-speed DAC circuits, high-speed ADC circuits, high-speed comparator circuits, output signal conditioning circuits, input signal conditioning circuits and the like. The FPGA hardware circuit internally realizes a plurality of FPGA control logics, and mainly comprises a high-speed PXI master control interface IP, an arbitrary waveform generation logic IP, a digitizer acquisition logic IP and a high-precision time parameter measurement logic IP. The PXI bus interface circuit realizes the hardware connection of the PXI bus; the FPGA circuit is a main control core of the analog signal comprehensive measurement device, and internally integrates a plurality of IP units such as a high-speed PXI bus interface IP, an arbitrary waveform generation logic IP, a digitizer acquisition logic IP, a high-precision time parameter measurement logic IP and the like, so that bus data communication and working state configuration of the whole machine are realized; the SRAM memory circuit realizes the storage of arbitrary waveform data and acquired data of the digitizer; the clock circuit provides a high-performance reference clock for the whole machine; the high-speed DAC circuit realizes digital-to-analog conversion of arbitrary waveform signals; the high-speed ADC circuit realizes the analog-to-digital conversion of the acquisition signal of the digital instrument; the high-speed comparator realizes the conversion from an analog signal to a digital pulse signal; the output signal conditioning circuit realizes the conditioning of signal characteristics such as filtering, amplifying, attenuating and the like of the analog output signal; the input signal conditioning circuit realizes characteristic conditioning such as coupling control, range control, low-frequency suppression and the like of the analog input signal; the front panel comprises two channels (CH 1 and CH 2) and trigger input channels (PFI 0 and PFI 1).
The invention provides an analog signal comprehensive measurement device which integrates broadband signal generation, broadband signal acquisition and high-precision time parameter measurement functions and can be flexibly configured on line.
The analog signal comprehensive measurement is a modularized instrument integrating the functions of broadband signal generation, broadband signal acquisition and high-precision time parameter measurement, the device integrates a 200MSa/s arbitrary waveform generator, a 50MSa/s digitizer and 200MHz high-precision time parameter measurement, and a high-speed main control interface is designed, so that flexible configuration, reading and writing and bus communication control operation of the board card integrated measurement function can be realized through the high-speed main control interface. Through the device, the test of various analog signal comprehensive test scenes can be realized.
The invention realizes the broadband arbitrary waveform generator with two-channel 200MSa/s and 14bit resolution, the two-channel 50MSa/s and 12bit high-precision digitizer and the two-channel 200MHz bandwidth high-precision time parameter measurement. The device can greatly reduce the design complexity of the system, and is convenient for realizing the miniaturization and portability of the test equipment.
The application passes through an analog signal integrated measurement device based on FPGA, includes: the FPGA module is integrated with a plurality of measuring units, and is used for calling the measuring units corresponding to the working modes of the measuring device and configuring working parameters for the measuring units; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters. Through integrating a plurality of measurement units on the same FPGA module, a plurality of measurement functions can be realized through one FPGA module, and the problem that comprehensive measurement equipment occupies a large space is solved.
The application also provides an FPGA-based analog signal comprehensive measurement method, which is applied to the FPGA-based analog signal comprehensive measurement device, as shown in fig. 3, and comprises the following steps:
Wherein step 305 comprises at least one of the following: when the working mode is an arbitrary waveform generator mode, calling a waveform generation unit and initializing parameters; under the condition that the working mode is a digitizer mode, a signal acquisition unit is called and parameter initialization is carried out; and when the working mode is a time parameter measurement mode, calling the time measurement unit and initializing parameters.
Corresponding to step 305, step 307 comprises at least one of the following methods: under the condition that the working mode is an arbitrary waveform generator mode, configuring waveform parameters for a waveform generation unit; under the condition that the working mode is a digitizer mode, configuring acquisition parameters for a signal acquisition unit; in case the operating mode is a time parameter measurement mode, a measurement parameter is configured for the time measurement unit.
Similarly, step 311 includes at least one of the following: when the working mode is an arbitrary waveform generator mode, the waveform generation unit is controlled to output waveform signals conforming to waveform parameters; under the condition that the working mode is a digitizer mode, the control signal acquisition unit completes analog signal acquisition according to acquisition parameters; and under the condition that the working mode is a time parameter measurement mode, controlling the time measurement unit to finish time parameter measurement according to the measurement parameters.
Fig. 4 is a workflow diagram of the FPGA-based analog signal integrated measurement apparatus provided in the present application.
According to another aspect of the embodiments of the present application, as shown in fig. 5, an electronic device is provided, where the electronic device includes a memory 501, a processor 503, a communication interface 505, and a communication bus 507, a computer program that can be run on the processor 503 is stored in the memory 501, the processor 503 communicates with the communication bus 507 through the communication interface 505, and the processor 503 executes the steps of the method when the processor 503 executes the computer program.
The memory and the processor in the electronic device communicate with the communication interface through a communication bus. The communication bus may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The communication bus may be classified as an address bus, a data bus, a control bus, or the like.
The memory may include random access memory (Random Access Memory, RAM) or non-volatile memory (non-volatile memory), such as at least one disk memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor.
The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processing, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
There is also provided, in accordance with yet another aspect of an embodiment of the present application, a computer readable medium having non-volatile program code executable by a processor.
Alternatively, specific examples in this embodiment may refer to examples described in the foregoing embodiments, and this embodiment is not described herein.
In specific implementation, the embodiments of the present application may refer to the above embodiments, which have corresponding technical effects.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For a hardware implementation, the processing units may be implemented within one or more application specific integrated circuits (Application Specific Integrated Circuits, ASIC), digital signal processors (Digital Signal Processing, DSP), digital signal processing devices (DSP devices, DSPD), programmable logic devices (Programmable Logic Device, PLD), field programmable gate arrays (Field-Programmable Gate Array, FPGA), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units configured to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented by means of units that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially or, what contributes to the prior art, or part of the technical solutions, may be embodied in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk, etc. It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing is merely a specific embodiment of the application to enable one skilled in the art to understand or practice the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. An analog signal comprehensive measurement device based on an FPGA, which is characterized by comprising:
the FPGA module is integrated with a plurality of measuring units, and is used for calling the measuring units corresponding to the working modes of the measuring device and configuring working parameters for the measuring units; and controlling the measuring unit to carry out comprehensive measurement according to the working parameters.
2. The apparatus according to claim 1, wherein the measurement unit comprises:
the waveform generation unit is used for outputting waveform signals according to the preset waveform parameters when the working mode is a waveform generator mode;
the signal acquisition unit is used for acquiring and storing analog signals according to the acquisition parameters which are configured in advance under the condition that the working mode is a digitizer mode;
and the time measurement unit is used for carrying out high-precision time parameter measurement according to the pre-configured measurement parameters under the condition that the working mode is a time parameter measurement mode.
3. The apparatus of claim 1, wherein the FPGA module further comprises:
and the PXI interface unit is used for establishing connection with the PXI bus so as to enable the FPGA module to communicate and interact with the PXI bus.
4. The apparatus of claim 2, wherein the measuring device further comprises:
and the memory circuit is connected with the FPGA module and is used for storing the waveform signals output by the waveform generation unit and the analog signals acquired by the signal acquisition unit.
5. The apparatus of claim 2, wherein the measuring device further comprises:
the high-speed digital-to-analog conversion unit is connected with the FPGA module and used for converting the digital signals output by the waveform generation unit into analog output signals.
6. The apparatus of claim 2, wherein the measuring device further comprises:
the high-speed analog-to-digital conversion unit is connected with the FPGA module and used for converting an analog input signal into a digital signal and transmitting the digital signal to the signal acquisition unit.
7. The apparatus of claim 1, wherein the measuring device further comprises:
and the clock unit is connected with the FPGA module and used for providing a high-performance reference clock for the normal operation of the device.
8. The apparatus of claim 2, wherein the measuring device further comprises:
and the high-speed comparator unit is connected with the FPGA module and used for converting an analog input signal into a digital pulse signal and transmitting the digital pulse signal to the time measurement unit.
9. The apparatus of claim 6, wherein the measuring device further comprises:
the input signal conditioning unit is connected with the measuring channel of the front panel at the input end, and is connected with the high-speed analog-to-digital conversion unit at the output end for performing characteristic conditioning on the analog input signal of the measuring channel.
10. The apparatus of claim 5, wherein the measuring means further comprises:
the input end of the output signal conditioning unit is connected with the high-speed digital-to-analog conversion unit, and the output end of the output signal conditioning unit is connected with the measuring channel of the front panel and is used for performing characteristic conditioning on the analog output signal output by the high-speed digital-to-analog conversion unit.
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